Rainbow Electronics DS2745 User Manual
SC
5
Low-Cost I2C Battery Monitor
DS2745
SDA
PIO
SNS
L
2
3
4
VDD
7
VIN
6
CTG
VSS
mMAX
www.maxim-ic.com
FEATURES
16-Bit Bidirectional Current Measurement
1.56mV LSB, ±51.2mV Dynamic Range
104mA LSB, ±3.4A Dynamic Range (RSNS =
15mW)
Current Accumulation Register Resolution
6.25mVhr LSB, ±204.8mVh Range
0.417mAhr LSB, ±13.65Ah Range
(R
= 15mW)
SNS
11-Bit Voltage Measurement
4.88mV LSB, 0V to 5V Input Range
11-Bit Temperature Measurement
0.125ºC Resolution, -20ºC to +70ºC
Industry Standard I
2
C* Interface
Low Power Consumption:
Active Current:
70mA typical, 100mA max
Sleep Current:
1mA typical, 3mA max
BLOCK DIAGRAM
PACK+
VDD
PIN CONFIGURATION
See Table 1 for Ordering Information.
DESCRIPTION
The DS2745 provides current-flow, voltage, and
temperature measurement data to support batterycapacity monitoring in cost-sensitive applications. The
DS2745 can be mounted on either the host side or
pack side of the application. Current measurement
and coulomb counting is accomplished by monitoring
the voltage drop across an external sense resistor,
voltage measurement is accomplished through a
separate voltage-sense input, and temperature
measurement takes place on-chip. A standard I
interface with software programmable address gives
the controlling microprocessor access to all data and
status registers inside the DS2745. A low-power sleep
mode state conserves energy when the cell pack is in
storage.
COMM
Fuel Gauge
Algorithm
µP
DS2745
SDA
SCL
SNS VSS
VIN
APPLICATIONS
Cellular
GPS
PDAs
Handheld Products
PACK-
Sense
Li+
Protector
Table 1.
DS2745U+
DS2745U+/T&R
+Denotes lead-free package.
2
*I
C is a trademark of Philips Corp. Purchase of I2C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated
Companies, conveys a license under the Philips I
conforms to the I
ORDERING INFORMATION
PART MARKING PIN-PACKAGE
2745
2745
2
2
C Standard Specification as defined by Philips.
C Patent Rights to use these components in an I2C system, provided that the system
mMAX package
DS2745U+ in Tape-and-Reel
2
C
1 of 14 091405
DS2745 Low-Cost I2C Battery Monitor
ABSOLUTE MAXIMUM RATINGS*
Voltage on All Pins Relative to VSS -0.3V to +6V
Operating Temperature Range -40°C to +85°C
Storage Temperature Range -55°C to +125°C
Soldering Temperature See IPC/JEDECJ-STD-020A
* This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(2.5V £ VDD £ 5.5V; TA = 0°C to +70°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Voltage VDD (Note 1) 2.5 5.5 V
Serial Data I/O Pin SDA (Note 1) -0.3 +5.5 V
Serial Clock Pin SCL (Note 1) -0.3 +5.5 V
Programmable I/O Pin PIO (Note 1) -0.3 +5.5 V
VIN Pin VIN (Note 1) -0.3 VDD +0.3 V
DC ELECTRICAL CHARACTERISTICS
(2.5V £ VDD £ 4.5V; TA = 0°C to +70°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
70 100
Active Current I
Sleep-Mode Current I
Current Resolution I
Current Full-Scale
Magnitude
Current Offset I
Current Gain Error I
Accumulated Current
Resolution
Accumulated Current
Offset
Voltage Resolution V
ACTIVE
SLEEP
LSB
I
(Note 1) 51.2 mV/R
FS
OERR
GERR
q
CA
q
OERR
LSB
V
= 5.5V 105
DD
SCL = SDA = V
PIO = V
SS
SS
,
1 3
1.56
(Note 2) - 7.82 + 12.5
- 1.0 +1.0
6.25
V
= VSS, (Notes 4, 5) - 188 + 0
SNS
4.88 mV
mA
mA
mV/R
mV/R
% of
reading
mVh/R
µVh/R
per day
Voltage Full-Scale VFS 0 4.992 V
Voltage Error V
(Note 12) - 25 + 25 mV
GERR
Temperature Resolution T
Temperature Error T
Current Sample Clock
Frequency
Timebase Accuracy t
0.125 °C
LSB
- 3 + 3 ºC
ERR
f
18.6 kHz
SAMP
V
ERR
= 3.8V, TA = +25°C ±1
DD
2 of 14
%
±2
DS2745 Low-Cost I2C Battery Monitor
-20°C ≤ T
2.5V ≤ V
≤ +70°C,
A
≤ 5.5V
DD
±3
Input Resistance, VIN RIN 15
Input Logic High:
SCL, SDA
Input Logic Low:
SCL, SDA
Output Logic Low:
SDA, PIO
Pulldown Current: SCL,
SDA
Input Capacitance: SCL,
SDA
SLEEP Timeout t
Input Logic High:
PIO
Input Logic Low:
PIO
V
(Note 1) 1.5 V
IH
V
(Note 1) 0.6 V
IL
V
OL
I
0.25
PD
C
BUS
SLEEP
V
(Note 1) VDD x 0.7 V
IH
V
(Note 1) VDD x 0.3 V
IL
I
= 4mA (Note 1) 0.4 V
OL
50 pF
(Note 3) 2.2 S
2-WIRE INTERFACE TIMING SPECIFICATIONS
(VDD = 2.5V to 5.5V, TA = -20°C to +70°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
f
SCL Clock Frequency
Bus Free Time Between a
STOP and START Condition
Hold Time (Repeated)
START Condition
Low Period of SCL Clock
SCL
t
BUF
t
HD:STA
t
LOW
(Note 6) 0 400 KHz
1.3 µs
(Note 7) 0.6 µs
1.3 µs
MW
mA
t
High Period of SCL Clock
Setup Time for a Repeated
START Condition
Data Hold Time
Data Setup Time
Rise Time of Both SDA and
SCL Signals
Fall Time of Both SDA and
SCL Signals
Setup Time for STOP
Condition
Spike Pulse Widths
Suppressed by Input Filter
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
t
SP
0.6 µs
(Note 8, 9) 0 0.9 µs
(Note 8) 100 ns
0.6 µs
0.6 µs
(Note 10) 0 50 ns
Capacitive Load for Each
Bus
B
(Note 11) 400 pF
C
Line
SCL, SDA Input
Capacitance
60 pF
C
BIN
3 of 14
20 + 0.1C
20 + 0.1C
B
B
300 ns
300 ns
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Figure 1. I
DS2745 Low-Cost I2C Battery Monitor
All voltages are referenced to V
SS
.
Offset specified after auto-calibration cycle and Current Offset Bias register (COBR) set to 00h.
To properly enter sleep mode, SMOD=1, and the application should hold SDA and SCL low for longer
than the maximum t
SLEEP
.
NBEN = 0, Current Offset Bias Register (COBR) set to 00h, and Accumulation Bias Register (ABR)
set to 00h.
Parameters guaranteed by design.
Timing must be fast enough to prevent the DS2745 from entering sleep mode due to SDA,SCL low
for period >
t
SLEEP.
f
must meet the minimum clock low time plus the rise/fall times.
SCL
The maximum t
has only to be met if the device does not stretch the LOW period (t
HD:DAT
LOW
) of the
SCL
signal.
This device internally provides a hold time of at least 300 ns for the SDA signal (referred to the
VIHmin of
the SCL signal) to bridge the undefined region of the falling edge of SCL.
Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant.
C
¾total capacitance of one bus line in pF.
B
The first voltage measurement after writing the ACR or after device POR is not valid.
2
C Bus Timing Diagram
SDA
t
SCL
F
t
LOW
t
HD;S TA
S
t
R
t
HD;DAT
t
SU;DAT
t
F
t
SU;STA
t
HD;S TA
Sr P S
t
SP
t
SU;STO
t
R
t
BUF
4 of 14
PIN DESCRIPTION
PIN SYMBOL FUNCTION
1
2
3
4
5 V
6
SCL
SDA
PIO
SNS
SS
CTG
DS2745 Low-Cost I2C Battery Monitor
Serial Clock Input. 2-Wire clock line. Input only. Connect this pin to the CLOCK
terminal of the battery pack. Pin has an internal pulldown (I
disconnection.
Serial Data Input/Output. 2-Wire data line. Open-drain output driver. Connect this pin
to the DATA terminal of the battery pack. Pin has an internal pulldown (I
disconnection.
General Purpose Input/Output. Open-drain output driver with input sense. Connect
to a pull up resistor for bidirectional operation.
Sense Resistor Connection. Connect to the negative terminal of the battery pack.
Connect the sense resistor between V
Device Ground. Connect to the negative terminal of the Li+ cell outside the cell
protection FETs. Connect the sense resistor between VSS and SNS.
Connect to Ground. Connect to the negative terminal of the Li+ cell outside the cell
protection FETs.
and SNS.
SS
) for sensing
PD
) for sensing
PD
7
8 V
VIN
DD
Voltage Sense Input. The voltage of the Li+ cell is monitored through this input pin.
Power-Supply Input. Connect to the positive terminal of the Li+ cell through a
decoupling network.
Figure 2. BLOCK DIAGRAM
THERMAL
SENSE
M
U
VIN
X
BIAS
VOLTAGE
REFERENCE
ADC1
ADC2
TIMEBASE
TEMPERATURE
VOLTAGE
CURRENT
ACR
2-WIRE
INTERFACE
VDD
SCL
SDA
STATUS
1kW 1kW
SNS VSS
+-
S
chip
ground
5 of 14
PIO
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