See Table 1 for Ordering Information.
See Table 2 for Detailed Pin Descriptions.
V
DD
DQ
6
V
SS
IS1IS2
PIN DESCRIPTION
OVD- 1-Wire Bus Speed Select
PIO - Programmable I/O Pin
SNS - Sense Resistor Input
IS2- Current-Sense Input
IS1- Current-Sense Input
VSS- Device Ground, Current-Sense Resistor
Return
DQ - Data Input/Output
VDD- Power-Supply Input (2.7V to 5.5V)
1-Wire is a registered trademark of Dallas Semiconductor.
1 of 15033103
DS2740
A
Table 1. ORDERING INFORMATION
PARTMARKINGPIN-PACKAGE
DS2740U
DS2740U/T&R
DS2740BU
DS2740BU/T&R
DS2740
DS2740
DS2740B
DS2740B
15-Bit Current Resolution, mMAX
15-Bit Current Resolution, mMAX, Tape-and-Reel
13-Bit Current Resolution, mMAX
13-Bit Current Resolution, mMAX, Tape-and-Reel
DESCRIPTION
The DS2740 provides high-precision current-flow measurement data to support battery-capacity
monitoring in cost-sensitive applications. Current is measured bidirectionally over a dynamic range of 15
bits (DS2740U) or 13 bits (DS2740UB), with the net flow accumulated in a separate 16-bit register.
Through its 1-Wire interface, the DS2740 allows the host system read/write access to status and current
measurement registers. Each device has a unique factory-programmed 64-bit net address that allows it to
be individually addressed by the host system, supporting multibattery slot operation. The interface can be
operated with standard or overdrive timing.
Although the DS2740 is primarily intended for location on the host system, it is also suited for mounting
in the battery pack. The DS2740 and FuelPack™ algorithms, along with host measurements of
temperature and voltage, form a complete and accurate solution for estimating remaining capacity.
Figure 1.BLOCK DIAGRAM
V
DD
DQ
1-WIRE
INTERFACE
AND
ADDRESS
R
10 k
STATUS/CONTROL
ACCUMULATED
CURRENT
CURRENT
15-Bit + Sign
IS
W
DC
TIMEBASE
R
IS
W
10 k
PIO
CHIP
GROUND
SNSIS2
FuelPack is a trademark of Dallas Semiconductor.
2 of 15
IS1
V
SS
Table 2.DETAILED PIN DESCRIPTION
PINSYMBOLDESCRIPTION
1-Wire Bus Speed Control. Input logic level selects the speed of the 1-
OVD1
Wire bus. Logic 1 selects overdrive (OVD) and Logic 0 selects standard
timing (STD). On a multidrop bus, all devices must operate at same
speed.
DS2740
PIO2
SNS3
IS2
IS15
V
SS
4
6
Programmable I/O Pin. Programmed as input or output through internal
registers. Open-drain output sufficient for LED or vibrator activation.
Current-Sense Resistor Input
Current-Sense Input. Connected to SNS through a 10kΩ resistor to
allow filtering of the current waveform by an external capacitor.
Current-Sense Input. Connected to VSS through a 10kΩ resistor to allow
filtering of the current waveform through an external capacitor.
Device Ground, Current-Sense Resistor Return. Connect directly to
the negative terminal of the battery cell.
Data I/O Pin. Operates bidirectionally with open-drain output driver.
DQ7
Internal 1µA pulldown aids in sensing pack removal and sleep-mode
activation.
V
DD
8
Power-Supply Input. Connects to system voltage supply or positive
terminal of battery cell.
Figure 2.APPLICATION EXAMPLE
2.7V to 5.5V
System Supply
Battery Pack
150
DATA
PIO
System
150
150
DQ
PIO
SNS
* *
VDD
DS2740
OVD
VSS
IS1IS2
104
GND
R
SNS
* 5.6V zener recommended for ESD protection when DATA or PIO
contacts exposed, such as a removable battery pack application
3 of 15
104
Negative
Battery
Pack
Return
DS2740
POWER MODES
The DS2740 has two power modes: active and sleep. While in active mode, the DS2740 operates as a
high-precision coulomb counter with current and accumulated current measurement blocks operating
continuously and the resulting values updated in the measurement registers. Read and write access is
allowed to all registers. PIO pin is active. In sleep mode, the DS2740 operates in a low-power mode with
no current measurement activity. Serial access to current, accumulated current, and status/control
registers is allowed if VDD > 2V.
The DS2740 operating mode transitions from SLEEP to ACTIVE when:
1)DQ > VIH, and VDD > UV threshold, or
2)VDD rises from below UV threshold to above UV threshold.
The DS2740 operating mode transitions from ACTIVE to SLEEP when:
1) VDD falls to UV threshold, or
2) SMOD = 1 and DQ < VIL for 2s.
CURRENT MEASUREMENT
In the active mode of operation, the DS2740 continually measures the current flow into and out of the
battery by measuring the voltage drop across a low-value current-sense resistor, R
range for pulse-type load currents, the voltage signal can be filtered by adding a capacitor between the
IS1 and IS2 pins. The external capacitor and two internal resistors form a lowpass filter at the input of the
ADC. The voltage-sense range at IS1 and IS2 is ±51.2mV. The input converts peak signal amplitudes up
to 75mV as long as the continuous or average signal level (post filter) does not exceed ±51.2mV over the
conversion cycle period. The ADC samples the input differentially at IS1 and IS2 with an 18.6kHz
sample clock and updates the current register at the completion of each conversion cycle. Conversion
times for each resolution option are listed in the tables below. Two resolution options are available.
Figure 3 describes the current measurement register format and resolution for each option. “S” indicates
the sign bit(s).
Every 1024th conversion, the ADC measures its input offset to facilitate offset correction. Offset
correction occurs approximately once per hour in the DS2740 and four times per hour in the DS2740B.
The resulting correction factor is applied to the subsequent 1023 measurements. During the offset
correction conversion, the ADC does not measure the IS1 to IS2 signal. A maximum error of 1/1024 in
the accumulated current register (ACR) is possible, however, to reduce the error, the current measurement
just prior to the offset conversion is displayed in the current register and is substituted for the dropped
current measurement in the current accumulation process. The typical error due to offset correction is
much less than 1/1024.
CURRENT ACCUMULATOR
Current measurements are internally summed, or accumulated, at the completion of each conversion
period with the results displayed in the ACR. The accuracy of the ACR is dependent on both the current
measurement and the conversion timebase. The ACR has a range of ±204.8mVh with an LSb of
6.25µVh. Additional registers hold fractional results of each accumulation, however, these bits are not
user accessible.
Read and write access is allowed to the ACR. Whenever the ACR is written, fractional accumulation
results are cleared. Also, a write forces the ADC to measure its offset and update the offset correction
factor. The current measurement and accumulation begin with the second conversion following a write to
the ACR. Figure 4 describes the ACR address, format, and resolution.
Figure 4. CURRENT ACCUMULATOR FORMAT
MSB—Address 10LSB—Address 11
1421321221121029
S2
MSbLSbMSbLSb
PART
DS2740
DS2740B
UPDATE
INTERVAL
3.515s
0.878s
V
- V
IS1
IS2
6.25mVh312.5mAh416.7mAh625mAh
8
2
272625242322212
Units:6.25mVh/Rsns
ACR LSB
R
SNS
20mW15mW10mW5mW
1.250mAh
0
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