The DS2422 temperature/datalogger combines the
core functions of a fully featured datalogger in a
single chip. It includes a temperature sensor, realtime clock (RTC), memory, 1-Wire
®
interface, and
serial interface for an analog-to-digital converter
(ADC) as well as control circuitry for a charge pump.
The ADC and the charge pump are peripherals that
can be added to build application-specific
dataloggers. Without external ADC, the DS2422
functions as a temperature logger only. The DS2422
measures the temperature and/or reads the ADC at a
user-defined rate. A total of 8192 8-bit readings or
4096 16-bit readings taken at equidistant intervals
ranging from 1s 273hrs can be stored.
APPLICATIONS
Temperature Logging in Cold Chain, Food Safety,
and Bio Science
High-Temperature Logging (Process Monitoring,
industrial Temperature Monitoring)
General-Voltage Datalogging (Pressure, Humidity,
Light, Material Stress)
PIN CONFIGURATION
TOP VIEW
VPAD
SCLK
SDATA
CNVST
NC
NC
NC
NC
AGND
X1
ALARM
X2
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
TEST_CG
VBAT
PUMP_ONZ
TEST_RX
NC
NC
NC
NC
TEST_SPLY
NC
GND
I/O
FEATURES
§Automatically Wakes Up, Measures Temperature
and/or Reads an External ADC and Stores
Values in 8kB of Datalog Memory in 8 or 16-Bit
Format
§On-Chip Direct-to-Digital Temperature Converter
with 8-Bit (0.5°C) or 11-Bit (0.0625°C) Resolution
§ Sampling Rate from 1s up to 273hrs
§ Programmable Recording Start Delay After
Elapsed Time or Upon a Temperature Alarm Trip
Point
§Programmable High and Low Trip Points for
Temperature and Data Alarms
§Quick Access to Alarmed Devices Through
1-Wire Conditional Search Function
§512 Bytes of General-Purpose Memory Plus 64
Bytes of Calibration Memory
§Two-Level Password Protection of all Memory
and Configuration Registers
§Unique Factory-Lasered 64-Bit Registration
Number Assures Error-Free Device Selection
and Absolute Part Identity
§Built-in Multidrop Controller Ensures Com-
patibility with Other Dallas Semiconductor 1-Wire
Net Products
§Directly Connects to a Single Port Pin of a Mi-
croprocessor and Communicates at Up to
15.4kbps at Standard Speed or up to 125kbps in
Overdrive Mode
§ -40°C to +85°C Operating Range
§ 2.8V to 3.6V Single-Supply Battery Operation
§ Low Power (1.2µA Standby, 350µA Active)
ORDERING INFORMATION
PARTTEMP RANGEPIN-PACKAGE
DS2422S
-40°C to +85°C
Commands, Registers, and Modes are capitalized for
clarity.
24-lead, 300-mil
SO
1-Wire is a registered trademark of Dallas Semiconductor.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
1 of 48REV: 111403
DS2422
ABSOLUTE MAXIMUM RATINGS*
ALARM, PUMP_ONZ, SDATA, SCLK, CNVST, VPAD,
I/O Voltage to GND
ALARM, PUMP_ONZ, I/O Combined Sink Current
Operating Temperature Range-40°C to +85°C
Junction Temperature+150°C
Storage Temperature Range-55°C to +125°C
Soldering TemperatureSee IPC/JEDEC J-STD-020A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device.
Intentional change, longer recovery time requirement due to modified 1-Wire front end.
System Requirement
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The
specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more heavily
loaded systems, an active pullup such as that found in the DS2480B may be required.
Capacitance on the data pin could be 800pF when V
after V
has been applied the parasite capacitance will not affect normal communications.
PUP
is first applied. If a 2.2kW resistor is used to pull up the data line, 2.5µs
PUP
Guaranteed by design, not production tested.
V
, VTH are a function of the internal supply voltage.
TL
Voltage below which, during a falling edge on I/O, a logic '0' is detected.
The voltage on I/O needs to be less or equal to V
whenever the master drives the line low.
ILMAX
Voltage above which, during a rising edge on I/O, a logic '1' is detected.
After V
is crossed during a rising edge on I/O, the voltage on I/O has to drop by VHY to be detected as logic '0'.
TH
The I-V characteristic is linear for voltages less than 1V.
The earliest recognition of a negative edge is possible at t
after VTH has been previously reached.
REH
Highlighted numbers are NOT in compliance with the published iButton standards. See comparison table below.
Interval during the negative edge on I/O at the beginning of a Presence Detect pulse between the time at which the voltage is
90% of V
and the time at which the voltage is 10% of V
PUP
e represents the time required for the pullup circuitry to pull the voltage on I/O up from V
d represents the time required for the pullup circuitry to pull the voltage on I/O up from V
PUP
.
to VTH.
IL
to the input high threshold of the bus
IL
master.
This is the expected range when using a crystal equivalent to the KDS SN14J (12.5pF).
Time to reach 63% of the temperature change; measured at a temperature transition step from +25°C to +85°C.
A 2-point calibration trim at 3V must be done to achieve the specified accuracy at 3V. An application note is available to help
developers perform the calibration by writing the trim registers to properly orient the error curve.
The duration is user-programmable from 0ms (code 00h) to 127.5ms (code FFh) with a tolerance of ±0.5ms. See Delay Register,
address 400h, for details.
Min. ±0.25°C uncertaintyMax. ±0.5°C uncertaintyMin. ±0.5°C uncertainty
Max. ±1°C uncertaintyMin. ±1°C uncertainty
-20
-10
0
10
Temperature (°C)
20
30
40
50
60
70
80
"Uncertainty" refers to the uncertainty of the temperature measurement when performing the 2-point calibration trim
as described in the application note. These graphs assume 11-bit temperature conversion. The accuracy can be
improved further through software correction. See the application note referenced as "Note 18" on the previous
page for details.
5 of 48
PIN DESCRIPTION
PINNAMEFUNCTION
Operating voltage of the serial interface pads CNVST, SCLK, SDATA. Used for
1
2SCLK
3SDATA
4CNVSTConversion Start control signal for the MAX1086. The idle state for the pin is low.
9AGNDAnalog ground. Ground reference for external ADC and charge pump.
10X1
11ALARM
12X2Second of two crystal pins for the real time clock crystal.
13IO
14GNDCommon ground supply for the device and VBAT.
16TEST_SPLYConnect to GND (test pin)
21
22
23VBAT
24
9 pinsNCNot connected
VPAD
TEST_RX
PUMP_ONZ
TEST_CG
level translation from the VBAT-powered internal logic to the 5V-powered ADC.
Connect to VBAT if the serial interface is not used.
Serial clock signal for serial interface. May connect directly to the corresponding
MAX1086 pin. The idle state for the pin is low.
Serial data pin for the serial interface. May connect directly to the DOUT pin of
MAX1086. The pin includes a weak pulldown and therefore has an idle state of low.
First of two crystal pins for the real time clock crystal. A standard 6pF 32KHz crystal
is used. The accuracy of the device's real time clock is largely dependent on the
temperature characteristics of the crystal. Trace length from the device to the crystal
should be minimized to reduce their capacitive effect.
Logic open-drain output with 215W maximum on-resistance, operating range 0V to
5.25V. Power-on default is OFF.
1-Wire communication line, data input and output. This pin also charges the internal
parasitic power cap that allows the 1-Wire front end of the device to run without
VBAT supply.
Connect to GND (test pin)
Signal to control an external charge-pump. The signal polarity is designed to fit to
the MAX619 charge pump/regulator.
3V power supply for the device, typically a battery. This pin supplies power to all
parts of the device except for the 1-Wire front end.
Do not connect (test pin)
DS2422
DESCRIPTION
The DS2422 temperature/data logger combines the core functions of a fully featured data logger in a single chip. It
includes a temperature sensor, RTC, memory, 1-Wire interface, and serial interface for an analog-to-digital
converter (ADC) as well as control circuitry for a charge pump. The ADC and the charge pump are peripherals that
can be added to build application-specific data loggers. Without external ADC, the DS2422 functions as a
temperature logger only. The DS2422 measures the temperature and/or reads the ADC at a user-defined rate. A
total of 8192 8-bit readings or 4096 16-bit readings taken at equidistant intervals ranging from 1 second to 273
hours can be stored. In addition to this, there are 512 bytes of SRAM for storing application specific information and
64 bytes for calibration data. A mission to collect data can be programmed to begin immediately, after a userdefined delay, or after a temperature alarm. Access to the memory and control functions can be passwordprotected. The DS2422 is configured and communicates with a host computing device through the serial 1-Wire
protocol, which requires only a single data lead and a ground return. Every DS2422 is factory-lasered with a
guaranteed unique 64-bit registration number that allows for absolute traceability. The extremely low energy consumption in conjunction with its high level of programmability makes the DS2422 the ideal choice for low-cost data
loggers that can take millions of measurements from the energy of a single 3V button cell.
APPLICATION
The DS2422 allows the design of data loggers or monitors with a minimum number of components. The simple
circuit of Figure 1 can monitor body or room temperature with 0.0625°C resolution. For very high temperaturemonitoring applications, a thermocouple can be connected to the analog-to-digital converter (ADC) through a preamplifier, as shown in Figure 2. The internal temperature sensor of the DS2422 keeps track of the reference
temperature, which is needed to accurately convert the voltage reading of the thermocouple into the actual
temperature of the monitored object. A less obvious application of the DS2422 is inside of major equipment.
Besides the temperature inside the chassis, the serial interface can monitor up to 16 digital signals, which are
parallel-clocked into an external shift register by CNVST and then shifted into the DS2422 through the SDATA pin
6 of 48
DS2422
2
under the control of SCLK. The DS2422 will activate its alarm output if the measured temperature or serial-input
data reaches a user-programmed high or low alarm threshold. This alarm then can be used to shut down the
equipment and enforce a service call. In contrast to microprocessor-based data loggers, the DS2422 does not
require any firmware development. Software for setup and data retrieval through the 1-Wire interface is available
for free download from the iButton website (www.ibutton.com
). This software also includes drivers for the serial and
USB port 1-Wire interfaces of a PC, and routines to access the general-purpose memory for storing application or
equipment-specific data files.
Figure 1. Simple Temperature Logger
OSC_TEST
TEST_EXTCLK_TEST
TEST_CG
IC1
1-Wire
GND
1
2
BR1225R
Lithium
IC2
DS9503
1
2
6
5
IC3
DS9503
KDS
SM14J
32768Hz
6
5
IO
IO
X1
X1
X2
X2
VBAT
VBAT
GND
GND
AGND
AGND
TEST_SPLY
TEST_RX
DS2422
ALARM
ALARM
PUMP_ONZ
PUMP_ONZ
VPAD
VPAD
CNVST
CNVST
SCLK
SCLK
SDATA
SDATA
Leave
open
Figure 2. Temperature and Voltage Logger With Thermocouple
7
8
1
6
3
2
5
4
IC3
INA122
V+
RG
RG
Vo
Vin+
Vin-
Ref
V-
1-Wire
GND
1
2
BR1225R
Lithium
IC4
DS9503
OSC_TEST
TEST_EXTCLK_TEST
TEST_CG
IC1
6
KDS
5
1
IC5
DS9503
2
SM14J
32768Hz
6
5
IO
IO
X1
X1
X2
X2
VBAT
VBAT
GND
GND
AGND
AGND
TEST_SPLY
TEST_RX
DS2422
ALARM
ALARM
PUMP_ONZ
PUMP_ONZ
CNVST
CNVST
SDATA
SDATA
VPAD
VPAD
SCLK
SCLK
Leave
open
R1
470W
1
5
6
8
7
C1
0.1mF
D1
1.5V LED
MAX1086
VDD
REF
CNVST
SCLK
DOUT
5V
R2
200k
IC
2
AIN1
3
AIN2
4
GND
R3
2k
Thermocouple
Type E, J, K, N
R4
2.2kW
Note: When using a positive/negative thermocouple, an offset voltage can be utilized through the Ref input of the
INA122 amplifier. This voltage shifts the 0V output of the amplifier up the amount equal to the offset voltage
allowing negative voltages to be read in the positive range of the MAX1086. This offset voltage may be obtained
through a simple resistor divider network (not shown).
7 of 48
Figure 3. DS2422 Block Diagram
A
DS2422
VPAD
CNVST
SCLK
SDATA
1-Wire
Port
I/O
3V Lithium
32.768kHz
Oscillator
Thermal
Sense
5V Pad
Structures
ROM
Function
Control
ll circuitry is powered by the battery
unless otherwise specified
Internal
Timekeeping &
Control Reg. &
Counters
ADC1
Control
Logic
64-Bit
Lasered
ROM
Memory
Function
Control
General-Purpose
SRAM
(512 Bytes)
Register Pages
(64 Bytes)
Calibration Memory
(64 Bytes)
Datalog
Memory
8k Bytes
Parasite
Powered
Circuitry
256-Bit
Scratchpad
PUMP_ONZ
Powered by VBAT
OVERVIEW
The block diagram in Figure 3 shows the relationships between the major control and memory sections of the
DS2422. The device has six main data components: 1) 64-bit lasered ROM, 2) 256-bit scratchpad, 3) 512-byte
general-purpose SRAM, 4) two 256-bit register pages of timekeeping, control, status, and counter registers and
passwords, 5) 64 bytes of calibration memory, and 6) 8192 bytes of data-logging memory. Except for the ROM and
the scratchpad, all other memory is arranged in a single linear address space. The data-logging memory, counter
registers and several other registers are read-only for the user. Both register pages are write-protected while the
device is programmed for a mission. The password registers, one for a read password and another one for a
read/write password can only be written to, never read.
The hierarchical structure of the 1-Wire protocol is shown in Figure 4. The bus master must first provide one of the
eight ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Conditional Search ROM, 5)
Skip ROM, 6) Overdrive-Skip ROM, 7) Overdrive-Match ROM or 8) Resume. Upon completion of an Overdrive
ROM command byte executed at standard speed, the device will enter Overdrive mode, where all subsequent
communication occurs at a higher speed. The protocol required for these ROM function commands is described in
Figure 14. After a ROM function command is successfully executed, the memory and control functions become
accessible and the master may provide any one of the eight available commands. The protocol for these memory
and control function commands is described in Figure 12. All data is read and written least significant bit first.
8 of 48
Figure 4. Hierarchical Structure for 1-Wire Protocol
A
A
DS2422
BUS
Master
Command
Level:
1-Wire ROM Function
Commands
DS2422-specific
Memory Function
Commands
1-Wire net
DS2422
Commands:
Read ROM
Match ROM
Search ROM
Conditional Search ROM
Passwords
Memory addresses 020C to 020Fh
Flags, Timestamp
Flags
PARASITE POWER
The block diagram (Figure 3) shows the parasite-powered circuitry. This circuitry “steals” power whenever the I/O
input is high. I/O provides sufficient power as long as the specified timing and voltage requirements are met. The
advantages of parasite power are two-fold: 1) by parasiting off this input, battery power is conserved; and 2) if the
battery is exhausted for any reason, the ROM may still be read.
64-BIT LASERED ROM
Each DS2422 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code. The next
48 bits are a unique serial number. The last 8 bits are a CRC of the first 56 bits. See Figure 5 for details. The
1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates as shown in
Figure 6. The polynomial is X
Application Note 27 and in the Book of DS19xx iButton Standards.
The shift register bits are initialized to 0. Then starting with the least significant bit of the family code, one bit at a
time is shifted in. After the 8
temperature range code is entered. After the range code has been entered, the shift register contains the CRC
value. Shifting in the 8 bits of CRC returns the shift register to all 0s.
8
+ X5 + X4 + 1. Additional information about the Dallas 1-W ire CRC is available in
th
bit of the family code has been entered, then the serial number followed by the
9 of 48
Figure 5. 64-Bit Lasered ROM
A
MSBLSB
DS2422
8-Bit
CRC Code
48-Bit Serial Number
8-Bit Family
Code (41h)
MSBLSBMSBLSBMSB LSB
Figure 6. 1-Wire CRC Generator
Polynomial = X8 + X5 + X4 + 1
STAGE
0
X
st
1
STAGE
1
X
nd
2
STAGE
2
X
rd
3
STAGE
3
X
th
4
STAGE
4
X
th
5
STAGE
5
X
th
6
6
X
th
7
STAGE
X
INPUT DATA
Figure 7. DS2422 Memory Map
32-Byte Intermediate Storage Scratchpad
8
STAGE
7
th
8
X
DDRESS
0000H to
001FH
0020H to
01FFH
0200H to
021FH
0220H to
023FH
0240H to
025FH
0260H to
027FH
0280H to
03FFH
0400H to
041FH
0420H to
0FFFH
1000H to
2FFFH
32-Byte General-Purpose SRAM (R/W)
General-Purpose SRAM (R/W)
32-Byte Register Page 1
32-Byte Register Page 2
Calibration Memory Page 1 (R/W)
Calibration Memory Page 2 (R/W)
Page 0
Pages 1
to 15
Page 16
Page 17
Page 18
Page 19
(Reserved For Future Extensions)Pages 20 to 31
Trim Register Page (R/W)
Page 32
(Reserved For Future Extensions)Pages 33 to 127
Datalog Memory (Read-Only)
Pages 128
to 383
10 of 48
DS2422
MEMORY
The memory map of the DS2422 is shown in Figure 7. The 512 bytes general-purpose SRAM are located in pages
0 through 15. The various registers to set up and control the device fill page 16 and 17, called Register Pages 1
and 2 (details in Figure 8). Pages 18 and 19 provide storage space for calibration data. They can alternatively be
used as extension of the general-purpose memory. The Trim Register Page holds registers that are used to tune
the timing of the serial data interface and to trim the on-chip temperature converter. The "datalog" logging memory
starts at address 1000h (page 128) and extends over 256 pages. The memory pages 20 to 31 and 33 to 127
reserved for future extensions. The scratchpad is an additional page that acts as a buffer when writing to the SRAM
memory or the register page. The data- and calibration memory can be written at any time. The access type for the
two register pages and the Trim Register Page is register-specific and depends on whether the device is programmed for a mission. Figures 8A and 8B show
the details. The datalog memory is read-only for the user. It is
written solely under supervision of the on-chip control logic. Due to the special behavior of the write access logic
(write scratchpad, copy scratchpad) it is recommended to only write full pages at a time. This also applies to all the
register pages and the calibration memory. See section Address Register and Transfer Status for details.
021Ch0010 DateSingle DateStamp
021DhCENT0010m.Single Months
021Eh10 YearsSingle Years
021Fh(no function; reads 00h)(N/A)R; R
0220hLow ByteMission
0221hCenter ByteSamplesR; R
0222hHigh ByteCounter
0223hLow ByteDevice
0224hCenter ByteSamplesR; R
0225hHigh ByteCounter
0226hConfiguration CodeFlavorR; R
0227hEPWPW. Cntrl.R/W; R
20h.
AM/PM
20h.
AM/PM
10h.Single HoursTime ClockR/W; R
Data
Alarms
Latest
Data
0MIP0Gen. Stat.R; R
LR
10h.Single Hours
Mission
Time
are
R/W; R
R/W; R
R/W; R
R; R
R; R
11 of 48
ADDRb7b6b5b4b3b2b1b0FunctionAccess*
0228hFirst ByteRead
——AccessW; —
022FhEighth BytePassword
0230hFirst ByteFull
——AccessW; —
0237hEighth BytePassword
0238h
—(no function; all of these bytes read 00h)(N/A)R; R
023Fh
Figure 8B. DS2422 Trim Register Page Map
ADDRb7b6b5b4b3b2b1b0FunctionAccess*
0400hdelay valuet
0401h
—(no function; undefined read)(N/A)R; R
0403h
0404hTemperature Counter Reset Low Byte
0405h000Temperature Counter Reset High Byte
0406hTemperature Conversion Length Low Byte
0407h000Temperature Conversion Length High Byte
0408h
—(no function; undefined read)(N/A)R; R
041Fh
SP
DS2422
R/W; R
R/W; R/W
R/W; R/W
Note: The first entry in column ACCESS TYPE is valid between missions. The second entry shows the applicable
access type while a mission is in progress.
TIMEKEEPING AND CALENDAR
The RTC/alarm and calendar information is accessed by reading/writing the appropriate bytes in the register page,
address 200h to 205h. For readings to be valid, all RTC registers must be read sequentially starting at address
0200h. Some of the RTC bits are set to 0. These bits always read 0 regardless of how they are written. The
number representation of the RTC registers is BCD format (binary-coded decimal).
0203h0010 DateSingle Date
0204hCENT0010m.Single Months
0205h10yrsSingle Years
The RTC of the DS2422 can run in either 12-hour or 24-hour mode. Bit 6 of the Hours Register (address 202h) is
defined as the 12- or 24-hour mode select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5
is the AM/PM bit with logic 1 being PM. In the 24-hour mode, bit 5 is the 20-hour bit (20 to 23 hours). The CENT bit,
bit 7 of the Months Register, can be written by the user. This bit changes its state when the years counter
transitions from 99 to 00.
20hr
AM/PM
10hr
Single Hours
The calendar logic is designed to automatically compensate for leap years. For every year value that is either 00 or
a multiple of 4 the device adds a 29
th
of February. This works correctly up to (but not including) the year 2100.
12 of 48
DS2422
SAMPLE RATE
The content of the Sample Rate Register (addresses 0206h, 0207h) specifies the time elapse (in seconds if EHSS
= 1, or minutes if EHSS = 0) between two temperature/data logging events. The sample rate may be any value
from 1 to 16383, coded as an unsigned 14-bit binary number. If EHSS = 1, the shortest time between logging
events is 1 second and the longest (sample rate = 3FFFh) is 4.55 hours. If EHSS = 0, the shortest is 1 minute and
the longest time is 273.05 hours (sample rate = 3FFFh). The EHSS bit is located in the RTC Control Register at
address 0212h. It is important that the user sets the EHSS bit accordingly while setting the Sample Rate register. A
sample rate of 0000h is not valid and must be avoided under all circumstances. This causes the device to enter
into an undefined state, requiring a power-on reset and restore of the trim settings to recover.
Sample Rate Register Bitmap
ADDRb7b6b5b4b3b2b1b0
0206hSample Rate Low
0207h00Sample Rate High
During a mission, there is only read access to these registers. Bits cells marked "0" always read 0 and cannot be
written to 1.
TEMPERATURE CONVERSION
The DS2422 can measure temperatures from -40°C to +85°C. Temperature values are represented as an 8- or 16bit unsigned binary number with a resolution of 0.5°C in the 8-bit mode and 0.0625°C in the 16-bit mode.
The higher temperature byte TRH is always valid. In the 16-bit mode only the three highest bits of the lower byte
TRL are valid. The five lower bits all read zero. TRL is undefined if the device is in 8-bit temperature mode. An outof-range temperature reading is indicated as 00h or 0000h when too cold and FFh or FFE0h when too hot.
Latest Temperature Conversion Result Register Bitmap
ADDRb7b6b5b4b3b2b1b0
020ChT2T1T000000
020DhT10T9T8T7T6T5T4T3
With TRH and TRL representing the decimal equivalent of a temperature reading the temperature value is
calculated as
J(°C) = TRH/2 - 41 + TRL/512(16 bit mode, TLFS = 1, see address 0213h)
J(°C) = TRH/2 - 41(8 bit mode, TLFS = 0, see address 0213h)
This equation is valid for converting temperature readings stored in the datalog memory as well as for data read
from the Latest Temperature Conversion Result Register.
To specify the temperature alarm thresholds, the equation above needs to be resolved to
TALM = 2 * J (°C) + 82
Since the temperature alarm threshold is only one byte, the resolution or temperature increment is limited to 0.5°C.
The TALM value needs to be converted into hexadecimal format before it can be written to one of the temperature
alarm threshold registers (Low Alarm address 0208h; High Alarm address 0209h). Independent of the
conversion mode (8 or 16 bit) only the most significant byte of a temperature conversion is used to determine
whether an alarm will be generated.
TRL
TRH
Temperature Conversion Examples
Mode
8-bit54h
8-bit17h
16-bit54h
16-bit17h
hexdecimal
TRH
84
23
84
23
TRL
hexdecimal
——1.0
——-29.5
00h
60h
0
96
J(°C)
1.000
-29.3125
13 of 48
Temperature Alarm Threshold Examples
DS2422
J(°C)
25.5
-10.0
TALM
hexdecimal
85h
3Eh
133
62
SERIAL DATA INPUT
In addition to temperature, the DS2422 can log 8-bit or 16-bit digital information that it receives through its serial
interface. This interface is designed to directly connect to ADCs such as the MAX1086 or other circuits that use the
same interface timing. The general timing of the serial interface is shown in Figure 9. All timing is derived from an
on-chip ring oscillator, which generates the CLK signal. The CNVST signal is intended to start an
conversion. After the conversion is completed, the SCLK signal becomes active and on its rising edge clocks the
digital value into the DS2422. The PUMP_ONZ signal can activate a MAX619 charge pump to convert the 3V
battery voltage of the DS2422 into 5V, for example, to power additional circuitry.
Figure 9A. Serial Interface Timing
CLK
PUMP_ONZ
CNVST
SCLK
SDATA
t
RING
t
SP
t
CPW
t
SCH
t
SCP
B15 B14 B13 B12 b4 B3 B2 B1 B0
analog-to-digital
Figure 9B. Serial Interface Setup and Hold Timing
t
SDS
t
SCLK
SDATA
SDH
Data
Valid
The serial interface becomes active whenever the DS2422 executes a Forced Conversion command (see
Memory/Control Function Commands) or during a mission, if the device is set up to log data from its serial
interface. Regardless of its setup, the DS2422 always reads 16 bits from its serial input. The 16-bit result of thelatest serial reading is found at address 020Eh (low byte) and 020Fh (high byte). The first bit read through the
serial interface is always found as B15 at address 020Fh. If an ADC generates less than 16 bits, the internal weak
pulldown of the SDATA pin makes the missing bits read zero.
During a mission, if data logging from the serial input is enabled, the HIGH byte (B15 to B8) is always recorded.
The LOW byte (B7 to B0) is only recorded if the DS2422 is set up for 16-bit logging of serial input data.
LOW
HIGH
The algorithm to convert the digital reading from the serial interface into a physical unit depends on the circuit that
provides the data to the DS2422. This algorithm needs to be reversed when calculating values for the alarm
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DS2422
threshold registers that are associated to the serial data input. The registers for data alarm thresholds arelocated at address 020Ah (Low Alarm) and 020B (High Alarm). The comparison is based on the most
significant serial input byte and assumes that the data is represented as unsigned binary number.
TEMPERATURE SENSOR ALARM
The DS2422 has two Temperature Alarm Threshold registers (address 0208h, 0209h) to store values, which
determine whether a critical temperature has been reached. A temperature alarm is generated if the device
measures an alarming temperature AND the alarm signaling is enabled. The bits ETLA and ETHA that enable the
temperature alarm are located in the Temperature Sensor Control Register. The temperature alarm flags TLF and
THF are found in the Alarm Status Register at address 0214h.
Temperature Sensor Control Register Bitmap
ADDRb7b6b5b4b3b2b1b0
0210h000000ETHAETLA
During a mission, there is only read access to this register. Bits 2 to 7 have no function. They always read 0 and
cannot be written to 1.
Register Details
BIT DESCRIPTIONBIT(S)DEFINITION
This bit controls whether, during a mission, the Temperature Low
ETLA: Enable Temperature Low Alarm
ETHA: Enable
Temperature High Alarm
b0
b1
Alarm Flag TLF may be set, if a temperature conversion results in a
value equal to or lower than the value in the Temperature Low Alarm
Threshold Register. If ETLA is 1, temperature low alarms are enabled.
If ETLA is 0, temperature low alarms are not generated.
This bit controls whether, during a mission, the Temperature High
Alarm Flag THF may be set, if a temperature conversion results in a
value equal to or higher than the value in the Temperature High Alarm
Threshold Register. If ETHA is 1, temperature high alarms are
enabled. If ETHA is 0, temperature high alarms are not generated.
SERIAL INPUT ALARM
The DS2422 has two Data Alarm Threshold registers (address 020Ah, 020Bh) to store values, which determine
whether data read through the serial interface can generate an alarm. Such an alarm is generated if the input data
qualifies for an alarm AND the alarm signaling is enabled. The bits EDLA and EDHA that enable the serial input
alarm are located in the DATA_IF Control Register. The corresponding alarm flags DLF and DHF are found in the
Alarm Status Register at address 0214h.
DATA_IF Control Register Bitmap
ADDRb7b6b5b4b3b2b1b0
0211h111111EDHAEDLA
During a mission, there is only read access to this register. Bits 3 to 7 have no function. They always read 1 and
cannot be written to 0.
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