addresses devices whose temperature is
outside of programmed limits (temperature
alarm condition)
• Software compatible with the DS1822
• Applications include thermostatic controls,
industrial systems, consumer products,
thermometers, or any thermally sensitive
system
PIN ASSIGNMENT
DALLAS
18B20
2 3
1
N
N
V
DD
DQ
8-pin 150-mil SOIC
DQ
GND
DD
V
1
2 3
BOTTOM VIEW
TO-92
DS18B20
PIN DESCRIPTION
GND - Ground
DQ - Data In/Out
V
- Power Supply Voltage
DD
NC - No Connect
1
DALLAS
18B20
2
3
4
7
6
(DS18B20Z)
NC
NC
NC
GND
DESCRIPTION
The DS18B20 Digital Thermometer provides 9 to 12–bit centigrade temperature measurements and has
an alarm function with nonvolatile user-programmable upper and lower trigger points. The DS18B20
communicates over a 1-wire bus that by definition requires only one data line (and ground) for
communication with a central microprocessor. It has an op eratin g tempera ture ran ge of –55°C to +125°C
and is accurate to ±0.5°C over the range of –10°C to +85°C. In addition, the DS18B20 can derive power
directly from the data line (“parasite power”), eliminating the need for an external power supply.
Each DS18B20 has a unique 64-bit serial code, which allows multiple DS18B20s to function on the same
1–wire bus; thus, it is simple to use one microprocessor to control many DS18B20s distributed over a
large area. Applications that can benefit from this feature include HVAC environmental controls,
temperature monitoring systems inside buildings, equipment or machinery, and process monitorin g and
control systems.
1 of 20 043001
DETAILED PIN DESCRIPTIONS Table 1
V
8-PIN SOIC* TO-92 SYMBOL DESCRIPTION
DS18B20
5 1 GND
Ground.
4 2 DQ Data Input/Output pin. Open-drain 1-wire interface pin. Also
provides power to the device when used in parasite power mode
(see “Parasite Power” section.)
3 3 VDD Optional VDD pin. VDD must be grounded for operation in
parasite power mode.
*All pins not specified in this table are “No Connect” pins.
OVERVIEW
Figure 1 shows a block diagram of the DS18B20, and pin descriptions ar e given in Table 1. The 64-bit
ROM stores the device’s unique serial code. The scratchpad memory contains the 2-byte temperature
register that stores the digital output from the temperature sensor. In addition, the scratchp ad provides
access to the 1-byte upper and lower alarm trigger registers (TH and TL), and the 1-byte configuration
register. The configuration register allows the user to set the resolution of the temperature-to-digital
conversion to 9, 10, 11, or 12 bits. The TH, TL and configuration registers are nonvolatile (EEPROM), so
they will retain data when the device is powered down.
The DS18B20 uses Dallas’ exclusive 1-wire bus protocol that implements bus communication using one
control signal. The control line requires a weak pullup resistor since all devices are linked to the bus via a
3-state or open-drain port (the DQ pin in the case of the DS18B20). In this bus system, the
microprocessor (the master device) identifies and addresses devices on the bus using each device’s unique
64-bit code. Because each device has a unique code, the number of devices that can be addressed on one
bus is virtually unlimited. The 1-wire bus protocol, including detailed explanations of the commands and
“time slots,” is covered in the 1-WIRE BUS SYSTEM section of this datasheet.
Another feature of the DS18B20 is the ability to operate without an external power supply. Power is
instead supplied through the 1-wire pullup resistor via the DQ pin when the bus is high. The high bus
signal also charges an internal c apacitor (CPP), which then supplies power to the device when the bus is
low. This method of deriving power from the 1-wire bus is referred to as “parasite power.” As an
alternative, the DS18B20 may also be powered by an external supply on V
DD
.
DS18B20 BLOCK DIAGRAM Figure 1
V
PU
4.7K
DQ
GND
DD
PARASITE POWER
CPP
CIRCUIT
INTERNAL VDD
POWER
SUPPLY
SENSE
64-BIT ROM
AND
1-wire PORT
MEMORY CONTROL
LOGIC
SCRATCHPAD
DS18B20
TEMPERATURE SENSOR
ALARM HIGH TRIGGER (T
REGISTER (EEPROM)
ALARM LOW TRIGGER (TL)
REGISTER (EEPROM)
CONFIGURATION REGISTER
(EEPROM)
8-BIT CRC GENERATOR
H
)
2 of 20
DS18B20
OPERATION – MEASUR ING TEMPE RAT URE
The core functionality of the DS18B20 is its direct-to-digital temperature sensor. The resolution of the
temperature sensor is user-configurable to 9, 10, 11, or 12 bits, corresponding to increments of 0.5°C,
0.25°C, 0.125°C, and 0.0625°C, respectively. The default resolution at power-up is 12 bit. The
DS18B20 powers-up in a low-power idle state; to initiate a temperature measurement and A-to-D
conversion, the master must issue a Convert T [44h] command. Following the conv ersion, the resulting
thermal data is stored in the 2-byte temperature register in the scratchpad memory and the DS18B20
returns to its idle state. If the DS18B20 is powered by an external supply, the master can issue “read
time slots” (see the 1-WIRE BUS SYSTEM section) after the Convert T command and the DS18B20 will
respond by transmitting 0 while the temperature conversion is in progress and 1 when the conversion is
done. If the DS18B20 is powered with parasite power, this notification technique cannot be used since
the bus must be pulled high by a strong pullup during the entire temperature conversion. The bus
requirements for parasite power are ex plained in detail in the POWER ING THE DS18B20 s ection of this
datasheet.
The DS18B20 output temperature data is calibrated in degrees centigrade; for Fahrenheit applications, a
lookup table or conversion routine must be used. The temperature data is stored as a 16-bit sign-extended
two’s complement number in the temperature register (see Figure 2). The sign bits (S) indicate if the
temperature is positive or negative: for positive numbers S = 0 and for negative numbers S = 1. If the
DS18B20 is configured for 12-bit resolution, all bits in the temperature register will contain valid data.
For 11-bit resolution, bit 0 is undefined. For 10-bit resolution, bits 1 and 0 are undefined, and for 9-bit
resolution bits 2, 1 and 0 are undefined. Table 2 gives examples of digital output data and the
corresponding temperature reading for 12-bit resolution conversions.
TEMPERATURE REGISTER FORMAT Figure 2
LS Byte
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
23 2
2
2
1
2
0
2
-1
2
-2
2
-3
2
-4
bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
*The power-on reset value of the temperature register is +85°C
DIGITAL OUTPUT
(Hex)
5
2
4
3 of 20
DS18B20
OPERATION – ALARM SIG NALING
After the DS18B20 performs a temperature conversion, the temperature value is compared to the userdefined two’s complement alarm trigger values stored in the 1-byte TH and TL registers (see Figure 3).
The sign bit (S) indicates if the value is positive or negative: for positive numbers S = 0 and for negative
numbers S = 1. The TH and TL registers are nonvolatile (EEPROM) so they will retain data when the
device is powered down. T
and TL can be accessed through b ytes 2 and 3 of the scratchpad as ex plained
H
in the MEMORY section of this datasheet.
TH AND TL REGISTER FORMAT Figure 3
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 b it 0
S 26 2
5
2
5
2
5
2
2
2
1
2
0
Only bits 11 through 4 of the temperature register are used in t he TH and TL comparison since TH and T
L
are 8-bit registers. If the result of a temperature measurement is higher than TH or lower than TL, an
alarm condition exists and an alarm flag is set inside the DS18B20. This flag is updated after every
temperature measurement; therefore, if the alarm condition goes away, the flag will be turned off after the
next temperature conversion.
The master device can check the alarm flag status of all DS18B20s on the bus by issuing an Alarm Search
[ECh] command. Any DS18B20s with a set alarm flag will respond to the command, so the master can
determine exactly which DS18B20s have experienced an alarm condition. If an alarm condition exists
and the TH or TL settings have changed, another temperature conv ersion should be done to validate the
alarm condition.
POWERING THE DS18B20
The DS18B20 can be powered by an external sup pl y on the VDD pin, or it can operate in “parasite power”
mode, which allows the DS18B20 to function without a local external suppl y. Parasite power is very
useful for applications that require remote temperature sensing or that are very space constrained. Figure
1 shows the DS18B20’s parasite-power control circuitry, which “steals” power from the 1 -wire bus via
the DQ pin when the bus is high. The stolen charge powers the DS18B20 while the bus is high, and some
of the charge is stored on the parasite power capacitor (CPP) to provide power when the bus is low.
When the DS18B20 is used in parasite power mode, the VDD pin must be connected to ground.
In parasite power mode, the 1-wire bus and CPP can provide sufficient current to the DS18B20 for most
operations as long as the specified timing and voltage requirements are met (refer to the DC
ELECTRICAL CHARACTERISTICS and the AC ELECTRICAL CHARACTERISTICS sections of this
data sheet). However, when the DS18B20 is performing temperature conversions or copying data from
the scratchpad memory to EEPROM, the operating current can be as high as 1.5 mA. This current can
cause an unacceptable voltage drop across the weak 1-wire pullup resistor and is more current than can be
supplied by CPP. To assure that the DS18B20 has sufficient supply current, it is necessary to provide a
strong pullup on the 1-wire bus whenever temperature conversions are taking place or data is being
copied from the scratchpad to EEPROM. This can be accompl ished by using a MOSFET to pull the bus
directly to the rail as shown in Figure 4. The 1-wire bus must be switched to the strong pullup within 10
µs (max) after a Convert T [44h] or Copy Scratchpad [48h] command is issued, and the bus must be held
high by the pullup for the duration of the conversion (t
) or data transfer (t
conv
= 10 ms). No other
wr
activity can take place on the 1-wire bus while the pullup is enabled.
The DS18B20 can also be powered by the conventional method of connecting an external power supply
to the VDD pin, as shown in Figure 5. The advantage of this method is t hat the MOSFET pullup is not
required, and the 1–wire bus is free to carry other traffic during the temperature conversion time.
4 of 20
DS18B20
The use of parasite power is not recommended for temperatures above 100°C since the DS18B20 may not
be able to sustain communications due to the hi gher leakage current s that can ex ist at these t emperatures.
For applications in which such temperatures are likely, it is strongly recommended that the DS18B20 be
powered by an external power supply.
In some situations the bus master may not know whether the DS18B20s on the bus are parasite powered
or powered by external supplies. The master needs this information to determine if the strong bus pullup
should be used during temperature conversions. To get this information, the master can issue a Skip
ROM [CCh] command followed by a Read Power Supply [B4h] command followed by a “read time
slot”. During the read time slot, parasite powered DS18B20s will pull the bus low, and externally
powered DS18B20s will let the bus remain high. If the bus is pulled low, the master knows that it must
supply the strong pullup on the 1-wire bus during temperature conversions.
SUPPLYING THE PARASITE-POWERED DS18B20 DURING TEMPERATURE
CONVERSIONS Figure 4
Micro-
processor
VPU
4.7K
VPU
1-Wire Bus
DS18B20
GND
V
DQ
DD
To Other
1-Wire Devices
POWERING THE DS18B20 WITH AN EXTERNAL SUPPLY Figure 5
Micro-
processor
VPU
4.7K
1-Wire Bus
DS18B20
GND
V
VDD (External Supply)
DQ
DD
To Other
1-Wire Devices
64-BIT LASERED ROM CODE
Each DS18B20 contains a unique 64–bit code (see Figure 6) stored in ROM. The least significant 8 bits
of the ROM code contain the DS18B20’s 1–wire family code: 28h. The next 48 bits contain a unique
serial number. The most significant 8 bits contain a cyclic redundancy check (CRC) byte that is
calculated from the first 56 bits of the ROM code. A detailed explanation of the CRC bits is provided in
the CRC GENERATION section. The 64–bit ROM code and associated ROM function control logic
allow the DS18B20 to operate as a 1–wire device using the protocol detailed in the 1-WIRE BUS
SYSTEM section of this datasheet.
64-BIT LASERED ROM CODE Figure 6
8-BIT CRC 48-BIT SERIAL NUMBER 8-BIT FAMILY CODE (28h)
MSB MSB LSB LSBLSBMSB
5 of 20
DS18B20
MEMORY
The DS18B20’s memory is organized as shown in Figure 7. The memory consists of an SRAM
scratchpad with nonvolatile EEPROM storage for the high and low alarm trigger registers (TH and TL)
and configuration register. Note that if the DS18B20 alarm function is not used, the TH and TL registers
can serve as general-purpose memory. All memory commands are described in detail in the DS18B20
FUNCTION COMMANDS section.
Byte 0 and byte 1 of the scratchpad contain the LSB and the MSB of the temperature register,
respectively. These bytes are read-onl y. Bytes 2 and 3 provide access to TH and TL registers. Byte 4
contains the configuration register data, which is explained in detail in the CONFIGURATION
REGISTER section of this datasheet. Bytes 5, 6 and 7 ar e reserved for internal use by the device and
cannot be overwritten; these bytes will return all 1s when read.
Byte 8 of the scratchpad is read-only and contains the cyclic redundancy check (CRC) code for bytes 0
through 7 of the scratchpad. The DS18B20 generates this CRC using the method described in the CRC
GENERATION section.
Data is written to bytes 2, 3, and 4 of the scratchpad using the Write Scratchpad [4Eh] command; the data
must be transmitted to the DS18B20 starting with the least significant bit of byte 2. To verify data
integrity, the scratchpad can be read (using the Read Scratchpad [BEh] command) after the data is
written. When reading the scratchpad, data is transferred over the 1-wire bus starting with the least
significant bit of byte 0. To transfer the TH, TL and configuration data from the scratchpad to EEPROM,
the master must issue the Copy Scratchpad [48h] command.
Data in the EEPROM registers is retained when the device is powered down; at power-up the EEPROM
data is reloaded into the corresponding scratchpad locations. Data can also be reloaded from EEPROM
to the scratchpad at any time using the Recall E2 [B8h] command. The master can issue read time slots
following the Recall E2 command and the DS18B20 will indicate the status of the r ecall by transmitting 0
while the recall is in progress and 1 when the recall is done.
DS18B20 MEMORY MAP cбЦмкЙ=T
SCRATCHPAD (Power-up State)
byte 0 Temperature LSB (50h)
(85°C)
byte 1 Temperature MSB (05h)
byte 2 TH Register or User Byte 1* TH Register or User Byte 1
byte 3 TL Register or User Byte 2* TL Register or User Byte 2
byte 4 Configuration Register* Configuration Register
byte 5 Reserved (FFh)
byte 6 Reserved (0Ch)
byte 7 Reserved (10h)
byte 8 CRC*
*Power-up state depends on value(s) stored
in EEPROM
EEPROM
6 of 20
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