Rainbow Electronics DS1843 User Manual

General Description

The DS1843 is a sample-and-hold circuit useful for capturing fast signals where board space is constrained. It includes a differential, high-speed switched capacitor input sample stage, offset nulling circuitry, and an output buffer. The DS1843 is optimized for use in optical line transmission (OLT) systems for burst-mode RSSI measurement in conjunction with an external sense resistor.

Applications

Gigabit Passive Optical Network (GPON) OLT

Gigabit Ethernet Passive Optical Network (GEPON) OLT

GPON Optical Network Unit

Sample and Hold

Features

♦ Fast Sample Time < 300ns

♦ Hold Time > 100µs

♦ Low Input Offset

♦ Buffered Output

♦ Small, 8-Pin µDFN (2mm x 2mm) Pb-Free Package

DS1843

Fast Sample-and-Hold Circuit

________________________________________________________________

Maxim Integrated Products

1

Ordering Information

V

OUTN

MAIN MEMORY EEPROM/SRAM

A/D CONFIG/RESULTS, SYSTEM STATUS BITS,

ALARMS/WARNINGS,

LOOKUP TABLES,

USER MEMORY

CONTROLLER

V

INP

V

CC

V

INN

SEN

GND

V

OUTP

V

CC

DEN

SDA

SCL

MON1

BIAS DAC

12-BIT

ADC

MOD

DAC

BMD

SEN

STROBE

MON4

MON3P

MON3N

ANALOG MUX

3.3V

TEMP

SENSOR

I

2

C

INTERFACE

DS1843

DS1842/

MAX4007

R

IN

C

S

C

S

C

IN

C

IN

CONTROL

LOGIC

Typical Operating Circuit

19-4539; Rev 0; 5/09

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

+

Denotes a lead(Pb)-free/RoHS-compliant package.

TRL = Tape and reel.

PART TEMP RANGE PIN-PACKAGE

DS1843D+ -40°C to +85°C 8 μDFN

DS1843D+TRL -40°C to +85°C 8 μDFN

Pin Configuration appears at end of data sheet.

DS1843

Fast Sample-and-Hold Circuit

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

RECOMMENDED OPERATING CONDITIONS

(TA= -40°C to +85°C, unless otherwise noted.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Voltage Range on VCC.............................................-0.5V to +6V

Voltage Range on V

OUTP

, V

OUTN

,

V

INP

, V

INN

, SEN, DEN ............................-0.5V to (VCC+ 0.5V)*

Operating Temperature Range ...........................-40°C to +85°C

Storage Temperature Range .............................-55°C to +125°C

Soldering Temperature ..............................................Refer to the

IPC/JEDEC J-STD-020 Specification.

DC ELECTRICAL CHARACTERISTICS

(V

CC

= +2.97V to +5.5V, TA= -40°C to +85°C, unless otherwise noted.)

*

Subject to not exceeding +6V.

Supply Voltage V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

CC

(Note 1) +2.97 +5.5 V

Supply Current ICC (Note 1) 5.7 9 mA

Input Capacitance C

Sample Capacitance C

Logic-Input Low V

Logic-Input High V

Input Leakage I

Input Voltage V

Output Voltage V

Output Impedance R

Output Capacitiv e Load C

Total Input Referenced Voltage Offset: D ifferential

Total Input Referenced Voltage Offset: S ingle-Ended

PARAMETER S YMBOL CONDITIONS MIN TYP MAX UNITS

All pins (Note 2) 7 pF

IN

V

S

IL

IH

IN

OUT

OUTMAX

OUT

V

OS-DIFF

V

OS-SE

and V

INN

INP

SEN and DEN inputs

V

or V

INN

INP,

VIN = V

V

OUT

= V

INP

- V

OUTP

each output pin

(Note 2) 1 1.3 k

Capacitance for stable operation 50 pF

V

= 2.9V, 1μs sample time, VIN = 6mV 3.6 6.1 mV

CC

Voltco (V

V

Voltco (V

CC

= 2.9V, 1μs sample time, VIN = 6mV 3.4 8 mV

CC

(Note 2) 5 pF

0.3 x V

CC

0.7 x V

CC

V

SEN = 0 1 μA

0 1.0 V

INN

- V

; 100k load on

OUTN

0 1.0 V

= 2.9V to 5.5V) 1 mV/V

V

DS1843

Fast Sample-and-Hold Circuit

_______________________________________________________________________________________ 3

Note 1: All voltages are referenced to ground. Currents entering the IC are specified positive and currents exiting the IC are negative. Note 2: Guaranteed by design. Note 3: V

OUT

at the end of the 10μs hold time is within specified % of VINduring the sample window; a 2.5kΩ resistor connected in

series to both V

INP

and V

INN(VINP

- V

INN

= 1V). External capacitance to ground for both V

INP

and V

INN

is approximately 10pF.

Note 4: The sampling capacitor must be removed from the input signal before the input signal changes. Therefore, the SEN pin

must be low for a short period of time, t

DEL

, before the input changes.

Note 5: V

OUT

at the end of the hold time is within 1% of VINduring the sample window (V

INP

- V

INN

= 1V).

Note 6: Voltage step applied across V

OUTP

to V

OUTN

through a 5pF capacitor connected to each pin. This models the load presented

by an ADC while it is sampling the DS1843’s output. See the

Output Buffer

section. Settled within 1% of initial voltage.

AC ELECTRICAL CHARACTERISTICS

(VCC= +2.97V to +5.5V, TA= -40°C to +85°C, unless otherwise noted.) (See the

Timing Diagram

.)

Timing Diagram

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

V

is with in 1% 300

Sample Time Minimum (Note 3) t

Delay Time Minimum t

Output T ime t

Hold Time t

Output Step Recovery Time (Note 6)

S

DEL

OUT

HOLD

t

REC

OUT

V

is with in 35% 260

OUT

(Note 4) 10 ns

Dela y from SEN falling edge until va lid output at V

OUT to 1% accuracy

(Note 5) t

1V step, DEN = high 2

3V step, DEN = high or low 3.5

2 μs

100 μs

OUT

ns

μs

V

- V

INP

INN

t

S

SEN

V

- V

OUTP

OUTN

EXTERNAL ADC DATA

t

= EXTERNAL ADC SAMPLING TIME.

ADC:ST

= EXTERNAL ADC CONVERSION TIME.

t

ADC:CT

DEN IS CONNECTED TO V

NOTE: THIS TIMING DIAGRAM IS APPLICABLE FOR SINGLE-ENDED AND DIFFERENTIAL OUTPUT CONFIGURATIONS.

FOR DIFFERENTIAL OUTPUT.

CC

t

DEL

VOLTAGE INVALID

t

OUT

t

REC

t

ADC:ST

t

ADC:CT

t

HOLD

DATA VALID