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www.dalsemi.com
DS1644/DS1644P
Nonvolatile Timekeeping RAM
FEATURES
Integrated NV SRAM, real time clock,
crystal, power-fail control circuit and lithium
energy source
Clock registers are accessed identically to the
static RAM. These registers are resident in
the eight top RAM locations.
Totally nonvolatile with over 10 years of
operation in the absence of power
BCD coded year, month, date, day, hours,
minutes, and seconds with leap year
compensation valid up to 2100
Power-fail write protection allows for ±10%
VCC power supply tolerance
DS1644 only (DIP Module)
− Upward compatible with the DS1643
Timekeeping RAM to achieve higher RAM
density
− Standard JEDEC bytewide 32k x 8 static
RAM pinout
DS1644P only (PowerCap® Module Board)
− Surface mountable package for direct
connection to PowerCap containing battery
and crystal
− Replaceable battery (PowerCap)
− Power-fail output
− Pin-for-pin compatible with other densities
of DS164XP Timekeeping RAM
PIN ASSIGNMENT
A7
A5
A4
A3
A2
A1
A0
X1 GND V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Extended)
NC
NC
NC
PFO
V
CC
WE
OE
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
A14
A12
A12
A
DQ0
DQ1
DQ2
GND
28-Pin Encapsulated Package (720-mil
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
34-Pin PowerCap Module Board
(Uses DS9034PCX PowerCap)
BAT
28
27
26
25
24
23
22
21
20
19
18
17
16
15
X2
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
VCC
WE
11
OE
10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
NC
NC
14
12
10
8
5
3
2
1
0
PIN DESCRIPTION
A0-A14 - Address Input
CE - Chip Enable
OE - Output Enable
WE - Write Enable
- +5V
V
CC
GND - Ground
DQ0-DQ7 - Data Input/Output
NC - No Connection
PFO - Power-fail Output
(DS1644P only)
X1, X2 - Crystal Connection
V
- Battery Connection
BAT
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DS1644/DS1644P
ORDERING INFORMATION
DS1644 28-pin DIP module
*DS1644P 34-pin PowerCap Module
Board
*DS9034PCX (Power Cap) Required;
must be ordered separately
DESCRIPTION
The DS1644 is a 32k x 8 nonvolatile static RAM with a full function real time clock, which are both
accessible in a byte-wide format. The nonvolatile timekeeping RAM is function equivalent to any JEDEC
standard 32k x 8 SRAM. The device can also be easily substituted for ROM, EPROM and EEPROM,
providing read/write nonvolatility and the addition of the real time clock function. The real time clock
information resides in the eight uppermost RAM locations. The RTC registers contain year, month, date,
day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for the day of the month and
leap year are made automatically. The RTC clock registers are double-buffered to avoid access of
incorrect data that can occur during clock update cycles. The double-buffered system also prevents time
loss as the timekeeping countdown continues unabated by access to time register data. The DS1644 also
contains its own power-fail circuitry, which deselects the device when the V
tolerance condition. This feature prevents loss of data from unpredictable system operation brought on b y
low VCC as errant access and update cycles are avoided.
supply is in an out-of-
CC
PACKAGES
The DS1644 is available in two packages (28-pin DIP and 34-pin PowerCap module). The 28-pin DIP
style module integrates the crystal, lithium energy source, and silicon all in one package. The 34-pin
PowerCap Module Board is designed with contacts for connection to a separate PowerC ap (DS9034PCX)
that contains the crystal and battery. This design allows the PowerCap to be mounted on top of the
DS1644P after the completion of the surface-mount process. Mounting the PowerCap after the surface
mount process prevents damage to the crystal and battery due to the hi gh tempe ratur es required for solde r
reflow. The PowerCap is keyed to prevent reverse insertion. The PowerCap Module Board and PowerCap
are ordered separately and shipped in separate containers. The part number for the PowerCap is
DS9034PCX.
CLOCK OPERATIONS - READING THE CLOCK
While the double-buffered register structure reduces the chanc e of r eadin g incor rect d ata, internal updates
to the DS1644 clock registers should be halted before clock data is read to prevent reading of data in
transition. However, halting the internal clock register updating process does not affect clock accuracy.
Updating is halted when a 1 is written into the read bit, the 7th most significant bit in the control register.
As long as a 1 remains in that position, updating is halted. After a halt is issued, the registers reflect the
count, that is day, date, and time that was present at the moment the halt command was issued. However,
the internal clock registers of the double-buffered system continue to update so that the clock accuracy is
not affected by the access of data. All of the DS1644 registers are updated simultaneously after the clock
status is reset. Updating is within a second after the read bit is written to 0.
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DS1644 BLOCK DIAGRAM Figure 1
DS1644 TRUTH TABLE Table 1
V
CC
5V ± 10%
<4.5V >V
<V
BAT
BAT
CE OE WE
V
IH
X X DESELECT HIGH-Z STANDBY
X X X DESELECT HIGH-Z STANDBY
V
V
V
IL
IL
IL
XVILWRITE DATA IN ACTIVE
V
V
IL
IH
V
V
IH
IH
X X X DESELECT HIGH-Z CMOS STANDBY
X X X DESELECT HIGH-Z DATA RETENTION
DS1644/DS1644P
MODE DQ POWER
READ DATA OUT ACTIVE
READ HIGH-Z ACTIVE
MODE
SETTING THE CLOCK
The MSB Bit, (B7) of the control register is the write bit. Setting the write bit to a 1, like the read bit,
halts updates to the DS1644 registers. The user can then load them with the correct day, date and time
data in 24-hour BCD format. Resetting the write bit to a 0 then transfers those values to the actual clock
counters and allows normal operation to resume.
STOPPING AND STARTING THE CLOCK OSCILLATOR
The clock oscillator may be stopped at any time. To increase the shelf life, the oscillator can be turned off
to minimize current drain from the battery. The
OSC bit is the MSB for the seconds registers. Setting it to
a 1 stops the oscillator.
FREQUENCY TEST BIT
Bit 6 of the day byte is the frequency test bit. When the frequency test bit is set to logic 1 and the
oscillator is running, the LSB of the seconds register will toggle at 512 Hz. When the seconds register is
being read, the DQ0 line will toggle at the 512 Hz frequency as long as conditions for access remain valid
(i.e., CE low, OE low, and address for seconds register remain valid and stable).
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DS1644/DS1644P
CLOCK ACCURACY (DIP MODULE)
The DS1644 is guaranteed to keep time accurac y to within ±1 minute per month at 25°C. The RTC is
calibrated at the factory by Dallas Semiconductor using nonvolatile tuning elements, and does not require
additional calibration. For this reason, methods of field clock calibration are not available and not
necessary. Clock accuracy is also effected by the electrical environment and caution should be taken to
place the RTC in the lowest level EMI section of the PCB layout. For additional information please see
application note 58.
CLOCK ACCURACY (POWERCAP MODULE)
The DS1644 and DS9034PCX are each individually tested for accuracy. Once mounted together, the
module will typically keep time accuracy to within ±1.53 minutes per month (35 ppm) at 25°C. Clock
accuracy is also effected by the electrical environment and caution should be taken to place the RTC in
the lowest level EMI section of the PCB layout. For additional information please see application note
58.
DS1644 REGISTER MAP - BANK1 Table 2
ADDRESS
7FFF - - - - - - - - YEAR 00-99
7FFE X X X - - - - - MONTH 01-12
7FFD XX------DATE 01-31
7FFC X FT X X X - - - DAY 01-07
7FFB X X - - - - - - HOUR 00-23
7FFA X-------MINUTES00-59
7FF9
7FF8 WRXXXXXXCONTROLA
OSC = STOP BIT
W = WRITE BIT X = UNUSED
DATA
B
7
OSC
B
6
B
5
B
4
B
3
B
2
B
1
B
0
-------
R = READ BIT FT = FREQUENCY TEST
FUNCTION
SECONDS 00-59
NOTE:
All indicated “X” bits are not dedicated to any particular function and can be used as normal RAM bits.
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