Rainbow Electronics DS1371 User Manual

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2-Wire, 32-Bit Binary Counte

DS1371

www.maxim-ic.com

General Description

The DS1371 is a 32-bit binary counter that is
designed to continuously count time in seconds.
An additional counter that can generate a
periodic alarm or serve as a watchdog timer is
also provided. If enabled as a watchdog timer,
the watchdog strobe input pin provides a
hardware reset of the counter. If disabled, this
counter can be used as 3 Bytes of general­purpose RAM. A configurable output can be
used as an interrupt or provide a square wave at
one of four selectable frequencies. The device is
programmed serially through a 2-wire
bidirectional bus.

Applications

Servers
Point-of-Sale Equipment
Portable Instruments
Elapsed Time Measurements

Typical Configuration

Watchdo

Clock

Features

§ 32-Bit Binary Counter

§ 24-Bit Binary Counter Provides Periodic

Alarm, Watchdog Timer, or RAM

§ Strobe Input to Reset Watchdog Timer

§ Single Output Configurable as Interrupt or

Square Wave

§ 2-Wire Serial Interface

§ Low-Voltage Operation

§ Operating Temperature Range:

-40°C to +85°C

§ Available in 8-Pin mSOP

Ordering Information

PART TEMP RANGE

DS1371U -40°C to +85°C 8 µSOP DS1371

PIN­PACKAGE

TOP
MARK

Pin Configuration

TOP VIEW

Package Dimension Information is available at:

www.maxim-ic.com/DallasPackInfo

X1

X2

WDS

GND

1

2

DS1371

3

4

µSOP

V

8

7

6

5

.

CC

SQW/INT

SCL

SDA

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata

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.

DS1371

ABSOLUTE MAXIMUM RATINGS

Voltage Range on VCC Pin Relative to Ground -0.3V to +6.0V
Voltage Range on SDA, SCL, and WDS Relative to Ground -0.3V to V
Operating Temperature Range -40°C to +85°C
Storage Temperature Range -55°C to +125°C
Soldering Temperature See IPC/JEDEC J-STD-020A

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating conditions for extended periods can affect device reliability.

+0.5V

CC

RECOMMENDED DC OPERATING CONDITIONS

(TA = -40°C to +85°C)

PARAMETER SYMBOL MIN TYP MAX UNITS

Supply Voltage (Note 1) VCC 1.7 3.3 5.5 V
Input Logic 1 (Notes 2, 3) VIH 0.7 VCC V

+ 0.3 V

CC

Input Logic 0 (Notes 2, 3) VIL -0.3 0.3VCC V

DC ELECTRICAL CHARACTERISTICS

(VCC = 1.7V to 5.5V, TA = -40°C to +85°C, unless otherwise noted.) (Note 4)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Supply Voltage (Note 1) VCC 1.7 5.5 V
Oscillator Operating Voltage
Range (Note 1)
Input Leakage ILI (Note 2) 1
I/O Leakage ILO (Note 3) 1

1.3 5.5 V

V

OSC

mA
mA

VCC > 2V; VOL = 0.4V

SDA Logic 0 Output (Note 1) I

OLSDA

< 2V; VOL = 0.2VCC

V

CC

3 mA

VCC > 2V; VOL = 0.4V 3.0

SQW/INT Logic 0 Output
(Note 1)

Active Supply Current I

Timekeeping Current
(Oscillator Enabled, INTCN = 1)
Timekeeping Current
(Oscillator Enabled, INTCN = 0)
Data Retention Current
(Oscillator Disabled)

1.7V < VCC < 2V;
= 0.2VCC

V

I

OLSQW

(Note 5) 100 150

CCA

(Notes 6, 7) 800 nA

I

OSC0

(Notes 6, 7) 1300 nA

I

OSC1

(Note 6) 50 nA

I

DDR

OL

1.3V < V

V

= 0.2VCC

OL

< 1.7V;

CC

3.0

250

mA

mA

mA

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AC ELECTRICAL CHARACTERISTICS

(VCC = 1.7V to 5.5V, TA = -40°C to +85°C, unless otherwise noted.) (Note 8)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SCL Clock Frequency (Note 9) f

START Conditions

(Note 10)

t

Low Period of SCL Clock t

High Period of SCL Clock t

Data Hold Time (Notes 11, 12) t

Data Setup Time (Note 13) t

Start Setup Time t

Rise Time of Both SDA and SCL
Signals (Note 9)

Fall Time of Both SDA and SCL Signals
(Note 9)

Setup Time for STOP Condition t

Capacitive Load for Each Bus Line
(Note 7)
Pulse Width of Spikes that Must be
Suppressed by the Input Filter (Note 14)

SCL

t

BUF

HD:STA

LOW

HIGH

HD:DAT

SU:DAT

SU:STA

t

R

t

F

SU:STO

400 pF

C

B

Fast mode 30 ns

T

SP

Fast mode 100 400
Standard mode 0 100
Fast mode 1.3 Bus Free Time Between STOP and
Standard mode 4.7
Fast mode 0.6 Hold Time (repeated) START Condition
Standard mode 4.0
Fast mode 1.3
Standard mode 4.7
Fast mode 0.6
Standard mode 4.0
Fast mode 0 0.9
Standard mode 0 0.9
Fast mode 100
Standard mode 250
Fast mode 0.6
Standard mode 4.7

Fast mode

Standard mode

Fast mode

Standard mode

Fast mode 0.6
Standard mode 4.7

20 +

0.1C
20 +

0.1C
20 +

0.1C
20 +

0.1C

DS1371

kHz

ms

ms

ms

ms

ms

ns

ms

B

1000

B

300

B

300

B

ns

ns

300

ms

Watchdog Strobe (WDS) Pulse Width t

Oscillator Stop Flag (OSF) Delay
(Note 8)

Note 1: All voltages are referenced to ground.
Note 2: SCL and WDS only.
Note 3: SDA and SQW/INT.
Note 4: Limits at -40°C are guaranteed by design and not production tested.
Note 5: I
Note 6: Specified with WDS input and 2-wire bus inactive, SCL = SDA = V
Note 7: Measured with a 32.768kHz crystal attached to the X1 and X2 pins.
Note 8: The parameter t

Note 9: A fast mode device can be used in a standard mode system, but the requirement t

Note 10: After this period, the first clock pulse is generated.
Note 11: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V

Note 12: The maximum t
Note 13: C
Note 14: This parameter is not production tested.

—SCL clocking at max frequency = 400kHz. WDS inactive.

CCA

is the period of time the oscillator must be stopped in order for the OSF flag to be set over the voltage range of 1.3V

CCMAX

OSF

.

has only to be met if the device does not stretch the LOW period (t

HD:DAT

≤ V

≤ V

CC

automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of
the SCL signal, it must output the next data bit to the SDA line t

bridge the undefined region of the falling edge of SCL.

—total capacitance of one bus line in pF.

B

100 ns

WDS

100 ms

t

OSF

.

CC

≥ to 250ns must then be met. This is

SU:DAT

R MAX + tSU:DAT

= 1000 + 250 = 1250ns before the SCL line is released.

) of the SCL signal.

LOW

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of the SCL signal) in order to

IHMIN

Typical Operating Characteristics

(VCC = 3.3V, TA = +25°C, unless otherwise noted)

I

vs. V

OSCO

600

550

500

450

400

SUPPLY CURRENT (nA)

350

300

750

700

650

600

SUPPLY CURRENT (nA)

550

500

SQUARE-WAVE OFF

1.5 5.5

I

vs. TEMPERATURE

OSC0

-40
TEMPERATURE ( C)

CC

DS1371 toc01

5.04.54.03.53.02.52.0

VCC (V)

VCC = 3.3V

DS1371 toc03

806040200-20

I

vs. V

OSC1

950

900

850

800

750

700

650

600

SUPPLY CURRENT (nA)

550

500

450

400

1.5 5.5

75
70
65
60
55
50
45
40
35
30
25

SUPPLY CURRENT (µA)

20
15
10

5
0

SQUARE-WAVE ON

SQUARE-WAVE ON

TEMPERATURE ( C)

CC

VCC (V)

I

vs. V

CCA

CC

DS1371

DS1371 toc02

5.04.53.5 4.02.5 3.02.0

DS1371 toc04

806040200-20-40

I

vs. WDS FREQUENCY

OSC0

35

30

25

20

15

SUPPLY CURRENT (µA)

10

5

0

0 1000

WDS FREQUENCY (kHz)

OSCILLATOR FREQUENCY vs. V

32767.76

DS1371 toc05

32767.71

32767.66

FREQUENCY (Hz)

32767.61

800600400200

3.767.56

1.3
VCC (V)

CC

DS1371 toc06

5.34.84.33.83.32.82.31.8

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DS1371

Figure 1. Timing Diagram

Figure 2. Functional Diagram

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