Rainbow Electronics DS1339 User Manual
www.maxim-ic.com
NT
www.maxim-ic.com
DS1339
Serial Real-Time Clock
FEATURES
§ Real-time clock (RTC) counts seconds,
minutes, hours, day, date, month, and year
with leap-year compensation valid up to 2100
§ 2-wire serial interface
§ Two time-of-day alarms
§ Programmable square-wave output
§ Oscillator stop flag
§ Automatic power-fail detect and switch
circuitry
§ Trickle charge capability
ORDERING INFORMATION
PART
DS1339U-2 8 µSOP 1339 ##-2
DS1339U-3 8 µSOP 1339 ##-3
DS1339U-33 8 µSOP 1339 ##-33
## = second line, revision code
2 = 2.0V, V
3 = 3.0V, V
33 = 3.3V, V
±10%
CC
±10%
CC
CC
±10%
PIN-
PACKAGE
TOP MARK
TYPICAL OPERATING CIRCUIT
VCC
CPU
RPU RPU
VCC
CRYSTAL
12
6
SCL
5
SDA
X2X1
SQW /INT
DS1339
VBACKUP
GND
4
VCC
VCC
8
7
i
3
PIN ASSIGNMENT (Top View)
X1
X2
V
BACKUP
GND
8-Pin mSOP
Package Dimension Information
http://www.maxim-ic.com/TechSupport/DallasPackInfo.htm
V
CC
SQW/
SCL
SDA
I
PIN DESCRIPTION
V
CC
X1, X2 - 32.768kHz Crystal Connection
GND - Ground
SDA - Serial Data
SCL - Serial Clock
V
BACKUP
- Secondary Power Supply
SQW/ INT - Square-Wave/Interrupt Output
- Power Supply
APPLICATIONS
§ Handhelds (GPS, POS Terminal)
§ Consumer Electronics (Set-Top Box, Digital
Recording, Network Appliance)
§ Office Equipment (Fax/Printer, Copier)
§ Medical (Glucometer, Medicine Dispenser)
§ Telecommunications (Router, Switcher,
Server)
§ Other (Utility Meter, Vending Machine,
Thermostat, Modem)
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: http://www.maxim-ic.com/errata.
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DS1339
DESCRIPTION
The DS1339 serial real-time clock is a low-power clock/date device with two programmable time-of-day
alarms and a programmable square-wave output. Address and data are transferred serially by a 2-wire
bidirectional bus. The clock/date provides seconds, minutes, hours, day, date, month, and year
information. The date at the end of the month is automatically adjusted for months with fewer than 31
days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with
AM/PM indicator. The DS1339 has a built-in power-sense circuit that detects power failures and
automatically switches to the backup supply.
OPERATION
The DS1339 operates as a slave device on the serial bus. Access is obtained by implementing a START
condition and providing a device identification code followed by data. Subsequent registers can be
accessed sequentially until a STOP condition is executed. The device is fully accessible and data can be
written and read when VCC is greater than VPF. However, when VCC falls below VPF, the internal clock
registers are blocked from any access. If VPF is less than V
to V
BACKUP
VCC to V
when VCC drops below VPF. If VPF is greater than V
BACKUP
when VCC drops below V
BACKUP
. The registers are maintained from the V
BACKUP
, the device power is switched from V
BACKUP
, the device power is switched from
BACKUP
CC
source
until VCC is returned to nominal levels. The block diagram in Figure 1 shows the main elements of the
serial real-time clock.
Figure 1. BLOCK DIAGRAM
X1 X2
V
BACKUP
V
CC
SCL
SDA
OSCILLATOR
AND
DIVIDER
POWER
CONTROL
SERIAL BUS
INTERFACE
CONTROL
LOGIC
ADDRESS
REGISTER
TIMEKEEPING,
CONTROL,
AND
TRICKLE
CHARGE
REGISTERS
SQW
/
INT
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DS1339
SIGNAL DESCRIPTIONS
VCC, GND – DC power is provided to the device on these pins.
SCL (Serial Clock Input) – SCL is used to synchronize data movement on the serial interface.
SDA (Serial Data Input/Output) – SDA is the input/output pin for the 2-wire serial interface. The SDA
pin is an open-drain output and requires an external pullup resistor.
V
BACKUP
(Secondary Supply Input) – Connection for a secondary power supply. Supply voltage must
be held between 1.3V and 3.7V for proper operation. This pin can be connected to a primary cell such as
a lithium button cell. Additionally, this pin can be connected to a rechargeable cell or a super cap when
used with the trickle charge feature.
SQW/ INT (Square-Wave/Interrupt Output) – Programmable square-wave or interrupt-output signal.
The SQW/ INT pin is an open-drain output and requires an external pullup resistor.
X1, X2 – These signals are connections for a standard 32.768kHz quartz crystal. The internal oscillator
circuitry is designed for operation with a crystal having a specified load capacitance (CL) of 6pF.
For more information about crystal selection and crystal layout considerations, refer to Application Note
58 “Crystal Considerations with Dallas Real-Time Clocks.”
The DS1339 can also be driven by an external 32.768kHz oscillator. In this configuration, the X1 pin is
connected to the external oscillator signal and the X2 pin is floated.
The oscillator is controlled by an enable bit in the control register. Oscillator startup times are highly
dependent upon crystal characteristics, PC board leakage, and layout. High ESR and excessive capacitive
loads are the major contributors to long startup times. A circuit using a crystal with the recommended
characteristics and proper layout usually starts within one second.
TYPICAL PC BOARD LAYOUT FOR CRYSTAL
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DS1339
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was
trimmed. Additional error is added by crystal frequency drift caused by temperature shifts. External
circuit noise coupled into the oscillator circuit can result in the clock running fast. Refer to Application
Note 58 “Crystal Considerations with Dallas Real-Time Clocks” for detailed information.
ADDRESS MAP
The address map for the registers of the DS1339 is shown in Figure 2. During a multibyte access, when
the address pointer reaches the end of the register space (10h), it wraps around to location 00h. On a 2wire START, STOP, or address pointer incrementing to location 00h, the current time is transferred to a
second set of registers. The time information is read from these secondary registers, while the clock can
continue to run. This eliminates the need to re-read the registers in case of an update of the main registers
during a read.
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Figure 2. DS1339 TIMEKEEPER REGISTERS
ADDRESS BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 FUNCTION RANGE
00H 0 10 SECONDS SECONDS Seconds 00–59
01H 0 10 MINUTES MINUTES Minutes 00–59
02H 0 12/24
AM/PM
10HR HOUR Hours
10HR
1–12 +
AM/PM
00–23
03H 0 0 0 0 0 DAY Day 1–7
04H 0 0 10 DATE DATE Date 00–31
05H CENTURY 0 0 10 MO MONTH
Month/
Century
01–12 +
Century
06H 10 YEAR YEAR Year 00–99
07H A1M1 10 SECONDS SECONDS
08H A1M2 10 MINUTES MINUTES
AM/PM
09H A1M3 12/24
10HR HOUR
10HR
Alarm 1
Seconds
Alarm 1
Minutes
Alarm 1
Hours
00–59
00–59
1–12 +
AM/PM
00-23
Alarm 1
0AH A1M4 DY/DT 10 DATE
DAY
DATE
Day
Alarm 1
1–7
1–31
Date
0BH A2M2 10 MINUTES MINUTES
AM/PM
0CH A2M3 12/24
10HR HOUR
10HR
Alarm 2
Minutes
Alarm 2
Hours
00–59
1–12 +
AM/PM
00–23
Alarm 2
0DH A2M4 DY/DT 10 DATE
DAY
DATE
Day
Alarm 2
1–7
1–31
Date
DS1339
0EH
EOSC
0 BBSQI RS2 RS1 INTCN A2IE A1IE Control —
0FH OSF 0 0 0 0 0 A2F A1F Status —
10H TCS3 TCS2 TCS1 TCS0 DS1 DS0 ROUT1 ROUT0
Trickle
Charge
Note: Unless otherwise specified, the registers’ state are not defined when power is first applied or VCC and V
falls below the V
BACKUP
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—
BACKUP
min.
DS1339
TIME AND DATE OPERATION
The time and date information is obtained by reading the appropriate register bytes. The real-time clock
registers are illustrated in Figure 2. The time and date are set or initialized by writing the appropriate
register bytes. The contents of the time and date registers are in the binary coded decimal (BCD) format.
The DS1339 can be run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the
12-hour or 24-hour mode-select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5
is the AM/PM bit with logic high being PM. In the 24-hour mode, bit 5 is the second 10-hour bit (20–23
hours). All hours values, including the alarms, must be re-entered whenever the 12/24-hour mode bit is
changed. The century bit (bit 7 of the month register) is toggled when the years register overflows from
99 to 00. The day-of-week register increments at midnight. Values that correspond to the day of week are
user-defined, but must be sequential (i.e., if 1 equals Sunday, then 2 equals Monday, and so on). Illogical
time and date entries result in undefined operation.
When reading or writing the time and date registers, secondary (user) buffers are used to prevent errors
when the internal registers update. When reading the time and date registers, the user buffers are
synchronized to the internal registers on any START or STOP, and when the address pointer rolls over to
0. The countdown chain is reset whenever the seconds register is written. Write transfers occur on the
acknowledge pulse from the device. To avoid rollover issues, once the countdown chain is reset, the
remaining time and date registers must be written within one second. The 1Hz square-wave output, if
enabled, transitions high 500ms after the seconds data transfer, provided the oscillator is already running.
ALARMS
The DS1339 contains two time-of-day/date alarms. Alarm 1 can be set by writing to registers 07h to 0Ah.
Alarm 2 can be set by writing to registers 0Bh to 0Dh. The alarms can be programmed (by the alarm
enable and INTCN bits of the control register) to activate the SQW/ INT output on an alarm match
condition. Bit 7 of each of the time-of-day/date alarm registers are mask bits (Figure 3). When all of the
mask bits for each alarm are logic 0, an alarm only occurs when the values in the timekeeping registers
00h–06h match the values stored in the time-of-day/date alarm registers. The alarms can also be
programmed to repeat every second, minute, hour, day, or date. Figure 3 shows the possible settings.
Configurations not listed in the table result in illogical operation.
The DY/DT bits (bit 6 of the alarm day/date registers) control whether the alarm value stored in bits 0 to
5 of that register reflects the day of the week or the date of the month. If DY/DT is written to a logic 0,
the alarm is the result of a match with date of the month. If DY/DT is written to a logic 1, the alarm is the
result of a match with day of the week.
When the RTC register values match alarm register settings, the corresponding alarm flag (A1F or A2F)
bit is set to logic 1. If the corresponding alarm interrupt enable (A1IE or A2IE) is also set to logic 1 and
the INTCN bit is set to logic 1, the alarm condition activates the SQW/
INT signal.
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