Rainbow Electronics DS1305 User Manual
www.maxim-ic.com
DS1305
Serial Alarm Real-Time Clock
FEATURES
§ Real-time clock (RTC) counts seconds,
minutes, hours, date of the month, month,
day of the week, and year with leap-year
compensation valid up to 2100
§ 96-byte, battery-backed NV RAM for data
storage
§ Two time-of-day alarms, programmable on
combination of seconds, minutes, hours, and
day of the week
§ Serial interface supports Motorola SPI
(serial peripheral interface) serial data ports
or standard 3-wire interface
§ Burst mode for reading/writing successive
addresses in clock/RAM
§ Dual-power supply pins for primary and
backup power supplies
§ Optional trickle charge output to backup
supply
§ 2.0V to 5.5V operation
§ Optional industrial temperature range:
-40°C to +85°C
§ Available in space-efficient, 20-pin TSSOP
package
§ Underwriters Laboratory (UL) recognized
™
PIN ASSIGNMENT
V
CC2
V
BAT
X1 3 18 PF
NC 4 17 V
X2 5 16 SD0
NC 6 15 SDI
INT0 7 14 SCLK
NC 8 13 NC
INT1 9 12 CE
GND 10 11 SERMODE
DS1305 20-Pin TSSOP (4.4mm)
V
CC2
V
BAT
X1 3 14 V
X2 4 13 SDO
NC 5 12 SDI
INT0 6 11 SCLK
INT1 7 10 CE
GND 8 9 SERMODE
DS1305 16-Pin DIP (300mil)
Package dimension information can be found at:
http://www.maxim-ic.com/TechSupport/DallasPackInfo.htm
120V
219NC
1 16 V
215PF
CC1
CCIF
CC1
CCIF
ORDERING INFORMATION
DS1305 16-Pin DIP (300mil)
DS1305N 16-Pin DIP (Industrial)
DS1305E 20-Pin TSSOP (173mil)
DS1305EN 20-Pin TSSOP (Industrial)
SPI is a trademark of Motorola, Inc.
TYPICAL OPERATING CIRCUIT
1 of 20 061202
DS1305
PIN DESCRIPTION
V
CC1
V
- Backup Power Supply
CC2
V
- +3V Battery Input
BAT
V
- Interface Logic Power-Supply Input
CCIF
GND - Ground
X1, X2 - 32,768kHz Crystal Connection
INT0 - Interrupt 0 Output
INT1 - Interrupt 1 Output
SDI - Serial Data In
SDO - Serial Data Out
CE - Chip Enable
SCLK - Serial Clock
SERMODE - Serial Interface Mode
PF - Power-Fail Output
- Primary Power Supply
DESCRIPTION
The DS1305 serial alarm real-time clock provides a full binary coded decimal (BCD) clock calendar that
is accessed by a simple serial interface. The clock/calendar provides seconds, minutes, hours, day, date,
month, and year information. The end of the month date is automatically adjusted for months with fewer
than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour
format with AM/PM indicator. In addition, 96 bytes of NV RAM are provided for data storage.
An interface logic power-supply input pin (V
) allows the DS1305 to drive SDO and PF pins to a level
CCIF
that is compatible with the interface logic. This allows an easy interface to 3V logic in mixed supply
systems.
The DS1305 offers dual-power supplies as well as a battery input pin. The dual power supplies support a
programmable trickle charge circuit that allows a rechargeable energy source (such as a super cap or
rechargeable battery) to be used for a backup supply. The V
pin allows the device to be backed up by
BAT
a non-rechargeable battery. The DS1305 is fully operational from 2.0V to 5.5V.
Two programmable time-of-day alarms are provided by the DS1305. Each alarm can generate an
interrupt on a programmable combination of seconds, minutes, hours, and day. “Don’t care” states can be
inserted into one or more fields if it is desired for them to be ignored for the alarm condition. The time-ofday alarms can be programmed to assert two different interrupt outputs or to assert one common interrupt
output. Both interrupt outputs operate when the device is powered by V
CC1
CC2
, or V
BAT
.
, V
The DS1305 supports a direct interface to SPI serial data ports or standard 3-wire interface. A
straightforward address and data format is implemented in which data transfers can occur 1 byte at a time
or in multiple-byte-burst mode.
2 of 20
DS1305
OPERATION
The block diagram in Figure 1 shows the main elements of the serial alarm RTC. The following
paragraphs describe the function of each pin.
Figure 1. BLOCK DIAGRAM
OSCILLATOR AND
COUNTDOWN CHAIN
1Hz
SIGNAL DESCRIPTIONS
V
– DC power is provided to the device on this pin. V
CC1
V
– This is the secondary power supply pin. In systems using the trickle charger, the rechargeable
CC2
energy source is connected to this pin.
is the primary power supply.
CC1
V
– Battery input for any standard 3V lithium cell or other energy source. UL recognized to ensure
BAT
against reverse charging current when used in conjunction with a lithium battery.
See “Conditions of Acceptability” at http://www.maxim-ic.com/TechSupport/QA/ntrl.htm.
V
(Interface Logic Power-Supply Input) – The V
CCIF
pin allows the DS1305 to drive SDO and PF
CCIF
output pins to a level that is compatible with the interface logic, thus allowing an easy interface to 3V
logic in mixed supply systems. This pin is physically connected to the source connection of the p-channel
transistors in the output buffers of the SDO and
PF pins.
SERMODE (Serial Interface Mode Input) – The SERMODE pin offers the flexibility to choose
between two serial interface modes. When connected to GND, standard 3-wire communication is
selected. When connected to VCC, SPI communication is selected.
SCLK (Serial Clock Input) – SCLK is used to synchronize data movement on the serial interface for
either the SPI or 3-wire interface.
3 of 20
DS1305
SDI (Serial Data Input) – When SPI communication is selected, the SDI pin is the serial data input for
the SPI bus. When 3-wire communication is selected, this pin must be tied to the SDO pin (the SDI and
SDO pins function as a single I/O pin when tied together).
SDO (Serial Data Output) – When SPI communication is selected, the SDO pin is the serial data output
for the SPI bus. When 3-wire communication is selected, this pin must be tied to the SDI pin (the SDI and
SDO pins function as a single I/O pin when tied together).
CE (Chip Enable) – The chip enable signal must be asserted high during a read or a write for both 3wire and SPI communication. This pin has an internal 55k pulldown resistor (typical).
INT0 (Interrupt 0 Output) – The INT0 pin is an active low output of the DS1305 that can be used as an
interrupt input to a processor. The INT0 pin can be programmed to be asserted by only Alarm 0 or can be
programmed to be asserted by either Alarm 0 or Alarm 1. The
INT0 pin remains low as long as the status
bit causing the interrupt is present and the corresponding interrupt enable bit is set. The
when the DS1305 is powered by V
CC1
, V
CC2
, or V
. The INT0 pin is an open drain output and requires
BAT
INT0 pin operates
an external pullup resistor.
INT1 (Interrupt 1 Output) – The INT1 pin is an active-low output of the DS1305 that can be used as an
interrupt input to a processor. The INT1 pin can be programmed to be asserted by Alarm 1 only. The
INT1 pin remains low as long as the status bit causing the interrupt is present and the corresponding
interrupt enable bit is set. The INT1 pin operates when the DS1305 is powered by V
CC1
, V
CC2
, or V
BAT
The INT1 pin is an open-drain output and requires an external pullup resistor.
Both INT0 and INT1are open-drain outputs. The two interrupts and the internal clock continue to run
regardless of the level of VCC (as long as a power source is present).
PF (Power-Fail Output) – The PF pin is used to indicate loss of the primary power supply (V
When V
is less than V
CC1
or is less than V
CC2
, the PF pin is driven low.
BAT
CC1
X1, X2 – Connections for a standard 32.768kHz quartz crystal. The internal oscillator is designed for
operation with a crystal having a specified load capacitance of 6pF. For more information on crystal
selection and crystal layout considerations, refer to Application Note 58, “Crystal Considerations with
Dallas Real-Time Clocks.” The DS1305 can also be driven by an external 32.768kHz oscillator. In this
configuration, the X1 pin is connected to the external oscillator signal and the X2 pin is floated.
.
).
4 of 20
DS1305
RECOMMENDED LAYOUT FOR CRYSTAL
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was
trimmed. Additional error is added by crystal frequency drift caused by temperature shifts. External
circuit noise coupled into the oscillator circuit can result in the clock running fast. Refer to Application
Note 58, “Crystal Considerations with Dallas Real-Time Clocks” for detailed information.
CLOCK, CALENDAR, AND ALARM
The time and calendar information is obtained by reading the appropriate register bytes. The RTC
registers and user RAM are illustrated in Figure 2. The time, calendar, and alarm are set or initialized by
writing the appropriate register bytes. Note that some bits are set to 0. These bits always read 0 regardless
of how they are written. Also note that registers 12h to 1Fh (read) and registers 92h to 9Fh are reserved.
These registers always read 0 regardless of how they are written. The contents of the time, calendar, and
alarm registers are in the BCD format.
Except where otherwise noted, the initial power on state of all registers is not defined. Therefore, it is
important to enable the oscillator (EOSC = 0) and disable write protect (WP = 0) during initial
configuration.
WRITING TO THE CLOCK REGISTERS
The internal time and date registers continue to increment during write operations. However, the
countdown chain is reset when the seconds register is written. Writing the time and date registers within
one second after writing the seconds register ensures consistent data.
Terminating a write before the last bit is sent aborts the write for that byte.
READING FROM THE CLOCK REGISTERS
Buffers are used to copy the time and date register at the beginning of a read. When reading in burst
mode, the user copy is static while the internal registers continue to increment.
5 of 20
Figure 2. RTC REGISTERS AND ADDRESS MAP
DS1305
HEX ADDRESS
READ WRITE
00H 80H 0 10-SEC SEC 00–59
01H 81H 0 10-MIN MIN 00–59
02H 82H 0
03H 83H 0 0 0 0 DAY 1–7
04H 84H 0 0 10-DATE DATE 1–31
05H 85H 0 0 10-MONTH MONTH 01–12
06H 86H 10 YEAR YEAR 00–99
——
07H 87H M 10-SEC ALARM SEC ALARM 00–59
08H 88H M 10-MIN ALARM MIN ALARM 00–59
09H 89H M
0AH 8AH M 0 0 0 DAY ALARM 01–07
——
0BH 8BH M 10-SEC ALARM SEC ALARM 00–59
0CH 8CH M 10-MIN ALARM MIN ALARM 00–59
0DH 8DH M
0EH 8EH M 0 0 0 DAY ALARM 01–07
0FH 8FH CONTROL REGISTER —
10H 90H STATUS REGISTER —
11H 91H TRICKLE CHARGER REGISTER —
12–1FH 92–9FH RESERVED —
20–7FH A0–FFH 96 BYTES USER RAM 00–FF
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 RANGE
12
24 10
12
24 10
12
24 10
P 01–12 + P/A
A
P
A
P
A
10-HR HOURS
ALARM 0
10 HR HOUR ALARM
ALARM 1
10 HR HOUR ALARM
00–23
—
01–12 + P/A
00–23
—
01–12 + P/A
00–23
Note: Range for alarm registers does not include mask’m’ bits.
The DS1305 can be run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the
12- or 24-hour mode select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the
AM/PM bit with logic high being PM. In the 24-hour mode, bit 5 is the second 10-hour bit (20 to 23
hours).
The DS1305 contains two time-of-day alarms. Time-of-day Alarm 0 can be set by writing to registers 87h
to 8Ah. Time-of-day Alarm 1 can be set by writing to registers 8Bh to 8Eh. The alarms can be
programmed (by the INTCN bit of the control register) to operate in two different modes; each alarm can
drive its own separate interrupt output or both alarms can drive a common interrupt output. Bit 7 of each
of the time-of-day alarm registers are mask bits (Table 1). When all of the mask bits are logic 0, a timeof-day alarm only occurs once per week when the values stored in timekeeping registers 00h to 03h
match the values stored in the time-of-day alarm registers. An alarm is generated every day when bit 7 of
the day alarm register is set to a logic 1. An alarm is generated every hour when bit 7 of the day and hour
alarm registers is set to a logic 1. Similarly, an alarm is generated every minute when bit 7 of the day,
hour, and minute alarm registers is set to a logic 1. When bit 7 of the day, hour, minute, and seconds
alarm registers is set to a logic 1, alarm occurs every second.
6 of 20
Loading...