Rainbow Electronics DS1220Y User Manual
DS1220Y
DS1220Y
16K Nonvolatile SRAM
FEATURES
• 10 years minimum data retention in the absence of
external power
• Data is automatically protected during power loss
• Directly replaces 2K x 8 volatile static RAM or
EEPROM
• Unlimited write cycles
• Low-power CMOS
• JEDEC standard 24–pin DIP package
• Read and write access times as fast as 100 ns
• Full + 10% operating range
• Optional industrial temperature range of -40°C to
+85°C, designated IND
PIN ASSIGNMENT
1
A7
2
A6
3
A5
4
A4
5
A3
6
A2
7
A1
8
A0
9
DQ0
10
DQ1
11
DQ2
12 13
GND
24–PIN ENCAPSULATED PACKAGE
720 MIL EXTENDED
PIN DESCRIPTION
A0-A
10
DQ0-DQ
CE
WE
OE
V
CC
GND – Ground
– Address Inputs
– Data In/Data Out
7
– Chip Enable
– Write Enable
– Output Enable
– Power (+5V)
2324A8
22
21
20
19
18
17
16
15
DQ5
14
V
CC
A9
WE
OE
A10
CE
DQ7
DQ6
DQ4
DQ3
DESCRIPTION
The DS1220Y 16K Nonvolatile SRAM is a 16,384-bit,
fully static, nonvolatile RAM organized as 2048 words
by 8 bits. Each NV SRAM has a self-contained lithium
energy source and control circuitry which constantly
monitors VCC for an out-of-tolerance condition. When
such a condition occurs, the lithium energy source is
automatically switched on and write protection is unconditionally enabled to prevent data corruption. The NV
SRAM can be used in place of existing 2K x 8 SRAMs
Copyright 1995 by Dallas Semiconductor Corporation.
All Rights Reserved. For important information regarding
patents and other intellectual property rights, please refer to
Dallas Semiconductor data books.
directly conforming to the popular bytewide 24-pin DIP
standard. The DS1220Y also matches the pinout of the
2716 EPROM or the 2816 EEPROM, allowing direct
substitution while enhancing performance. There is no
limit on the number of write cycles that can be executed
and no additional support circuitry is required for microprocessor interfacing.
091295 1/8
DS1220Y
READ MODE
The DS1220Y executes a read cycle whenever WE
(Write Enable) is inactive (high) and CE (Chip Enable)
and OE (Output Enable) are active (low). The unique
address specified by the 11 address inputs (A
0-A10
defines which of the 2048 bytes of data is to be
accessed. Valid data will be available to the eight data
output drivers within t
(Access Time) after the last
ACC
address input signal is stable, providing that CE and OE
access times are also satisfied. If OE and CE access
times are not satisfied, then data access must be
measured from the later occurring signal (CE
or OE)
and the limiting parameter is either tCO for CE or tOE for
rather than address access.
OE
WRITE MODE
The DS1220Y executes a write cycle whenever the WE
and CE signals are active (low) after address inputs are
stable. The latter occurring falling edge of CE or WE will
determine the start of the write cycle. The write cycle is
terminated by the earlier rising edge of CE
address inputs must be kept valid throughout the write
cycle. WE must return to the high state for a minimum
or WE. All
recovery time (t
ated. The OE
) before another cycle can be initi-
WR
control signal should be kept inactive
(high) during write cycles to avoid bus contention. However, if the output drivers are enabled (CE and OE ac-
)
tive) then WE will disable the outputs in t
falling edge.
DATA RETENTION MODE
The DS1220Y provides full functional capability for V
greater than 4.5 volts and write protects at 4.25 nominal.
Data is maintained in the absence of V
additional support circuitry. The DS1220Y constantly
monitors VCC. Should the supply voltage decay, the NV
SRAM automatically write protects itself, all inputs become “don’t care,” and all outputs become high impedance. As VCC falls below approximately 3.0 volts, a
power switching circuit connects the lithium energy
source to RAM to retain data. During power-up, when
rises above approximately 3.0 volts, the power
V
CC
switching circuit connects external VCC to RAM and disconnects the lithium energy source. Normal RAM operation can resume after V
exceeds 4.5 volts.
CC
CC
from its
ODW
without any
CC
091295 2/8
DS1220Y
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground -0.3V to +7.0V
Operating Temperature 0°C to 70°C; -40°C to +85°C for IND parts
Storage Temperature -40°C to +70°C; -40°C to +85°C for IND parts
Soldering Temperature 260°C for 10 seconds
* This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS (0°C to 70°C)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Power Supply Voltage V
Input Logic 1 V
Input Logic 0 V
CC
IH
IL
4.5 5.0 5.5 V
2.2 V
CC
0.0 +0.8 V
V
DC ELECTRICAL CHARACTERISTICS (0°C to 70°C; VCC = 5V ± 10%)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Input Leakage Current I
I/O Leakage Current
> VIH < V
CE
CC
Output Current @ 2.4V I
Output Current @ 0.4V I
Standby Current CE = 2.2V I
Standby Current CE = VCC-0.5V I
Operating Current t
(Commercial)
Operating Current t
(Industrial)
CYC
CYC
=200ns
=200ns
I
I
Write Protection Voltage V
IL
I
IO
OH
OL
CCS1
CCS2
CCO1
CCO1
TP
-1.0 +1.0 µA
-1.0 +1.0 µA
-1.0 mA
2.0 mA
3.0 7.0 mA
2.0 4.0 mA
75 mA
85 mA
4.25 V
CAPACITANCE (tA = 25°C)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Input Capacitance C
Input/Output Capacitance C
IN
I/O
5 10 pF
5 12 pF
091295 3/8
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