Rainbow Electronics DS1086L User Manual

General Description

The DS1086 EconOscillator™ is a programmable clock
generator that produces a spread-spectrum (dithered)
square-wave output of frequencies from 260kHz to
133MHz. The selectable dithered output reduces radi­ated-emission peaks by dithering the frequency 2% or
4% below the programmed frequency. The DS1086 has
a power-down mode and an output-enable control for
power-sensitive applications. All the device settings are
stored in nonvolatile (NV) EEPROM memory allowing it
to operate in stand-alone applications.

Applications

Printers

Copiers

PCs

Computer Peripherals

Cell Phones

Cable Modems

Features

♦ User-Programmable Square-Wave Generator

♦ Frequencies Programmable from 260kHz to

133MHz

♦ 2% or 4% Selectable Dithered Output

♦ Glitchless Output-Enable Control

♦ 2-Wire Serial Interface

♦ Nonvolatile Settings

♦ 5V Supply

♦ No External Timing Components Required

♦ Power-Down Mode

♦ 10kHz Master Frequency Step Size

♦ EMI Reduction

DS1086

DS1086 Spread-Spectrum EconOscillator

______________________________________________ Maxim Integrated Products 1

PDN

OEGND

1

2

87SCL

SDASPRD

V

CC

OUT

µSOP/SO

TOP VIEW

3

4

6

5

DS1086

Pin Configuration

Ordering Information

DS1086

XTL1/OSC1

MICRO-

PROCESSOR

XTL2/OSC2

DITHERED 260kHz TO

133MHz OUTPUT

DECOUPLING CAPACITORS

(0.1µF and 0.01µF)

*SDA AND SCL CAN BE CONNECTED DIRECTLY HIGH IF THE DS1086 NEVER NEEDS
TO BE PROGRAMMED IN-CIRCUIT, INCLUDING DURING PRODUCTION TESTING.

SPRD

OUT

V

CC

V

CC

V

CC

GND

N.C.

SCL*

SDA*

PDN

OE

Typical Operating Circuit

Rev 1; 9/03

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

*Future Product

PART PIN-PACKAGE

DS1086U* 8 µSOP (118mil)

DS1086Z 8 SO (150mil)

EconOscillator is a trademark of Dallas Semiconductor.

DS1086

DS1086 Spread-Spectrum EconOscillator

2 _____________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

RECOMMENDED DC OPERATING CONDITIONS

(VCC= 5V ±5%, TA= 0°C to +70°C.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Supply Voltage V

CC

(Note 1)

V

High-Level Input Voltage
(SDA, SCL)

V

IH

0.7 x

VCC +

0.3

V

Low-Level Input Voltage
(SDA, SCL)

V

IL

0.3 x
V

High-Level Input Voltage
(SPRD, PDN, OE)

V

IH

2

V

CC

+

0.3

V

Low-Level Input Voltage
(SPRD, PDN, OE)

V

IL

0.8 V

DC ELECTRICAL CHARACTERISTICS

(VCC= 5V ±5%, TA= 0°C to +70°C.)

PARAMETER

CONDITIONS

UNITS

V

OH

IOH = -4mA, VCC = min 2.4 V

V

OL

IOL = 4mA 0.4 V

High-Level Input Current I

IH

VCC = 5.25V 1 µA

Low-Level Input Current I

IL

VIL = 0 -1 µA

Supply Current (Active)

I

CC

CL = 15pF (output at default frequency) 35 mA

Standby Current (Power-Down) I

CCQ

Power-down mode 10 µA

Voltage on VCCRelative to Ground ......................-0.5V to +6.0V

Voltage on SPRD, PDN, OE, SDA,

SCL Relative to Ground (See Note 1).......-0.5 to (V

CC

+ 0.5V)

Operating Temperature Range...............................0°C to +70°C

Storage Temperature Range .............................-55°C to +125°C

Soldering Temperature ..................See IPC/JEDEC J-STD-020A

Note 1: This voltage must not exceed 6.0V.

4.75 5.00 5.25

V

CC

High-Level Output Voltage (OUT)

Low-Level Output Voltage (OUT)

SYMBOL

-0.3

-0.3

MIN TYP MAX

V

CC

DS1086

DS1086 Spread-Spectrum EconOscillator

_____________________________________________________________________ 3

MASTER OSCILLATOR CHARACTERISTICS

(VCC= 5V ±5%, TA= 0°C to +70°C.)

PARAMETER

SYMBOL

CONDITION

MIN

TYP

MAX

UNITS

Master Oscillator Range f

OSC

(Note 2) 66

Default Master Oscillator Frequency

f

0

Master Oscillator Frequency
Tolerance

∆

f

0

f

0

VCC = 5V,
T

A

= +25°C

(Notes 3,17)

DAC step size

%

Default frequency

Voltage Frequency Variation

∆

f

V

f

0

Over voltage range,

DAC step size

%

Default frequency

133MHz

Temperature Frequency Variation

∆

f

T

f

0

Over temperature
range, V

CC

= 5V

(Note 5)

66MHz

%

Prescaler bit J0 = 1 (Note 6) 2

Dither Frequency Range

∆

f

f

0 Prescaler bit J0 = 0 (Note 6) 4

%

Integral Nonlinearity of Frequency
DAC

INL Entire range (Note 7)

%

DAC Step Size

∆ between two consecutive DAC values
(Note 8)

10 kHz

DAC Span

Frequency range for one offset setting
(see Table 2)

DAC Default Factory default register setting 500

Offset Step Size

∆ between two consecutive offset values
(see Table 2)

Offset Default OS

Factory default OFFSET register setting
(5 LSBs) (see Table 2)

RANGE

(5 LSBs of

hex

Dither Rate f0/4096 Hz

TA = +25°C (Note 4)

133 MHz

97.1 MHz

Default frequency (f0) -0.75 +0.75

-0.75 +0.75

-0.75 +0.75

-0.75 +0.75

-0.5 +0.5

-0.5 +0.5

-1.0 +1.0

-0.4 +0.4

10.24 MHz

decimal

5.12 MHz

RANGE register)

DS1086

DS1086 Spread-Spectrum EconOscillator

4 _____________________________________________________________________

AC ELECTRICAL CHARACTERISTICS

(VCC= 5V ±5%, TA= 0°C to +70°C.)

PARAMETER

SYMBOL

CONDITION

MIN

TYP

MAX

UNITS

Frequency Stable After Prescaler
Change

1

Period

Frequency Stable After DAC or
Offset Change

(Note 9) 0.2 1 ms

Power-Up Time

p

(Note 10) 0.1 0.5 ms

Enable of OUT After Exiting
Power-Down Mode

t

stab

µs

OUT High-Z After Entering
Power-Down Mode

t

pdn

0.1 ms

Load Capacitance C

L

(Note 11) 15 50 pF

Output Duty Cycle (OUT) 40 60 %
PDN Rise/Fall Time 1µs

AC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE

(VCC= 5V ±5%, TA= 0°C to +70°C.)

PARAMETER

CONDITION

UNITS

Fast mode

SCL Clock Frequency f

SCL

Standard mode

(Note 12)

kHz

Fast mode 1.3

Bus Free Time Between a STOP
and START Condition

t

BUF

Standard mode

(Note 12)

4.7

µs

Fast mode 0.6

Hold Time (Repeated) START
Condition

Standard mode

(Notes 12, 13)

4.0

µs

Fast mode 1.3

LOW Period of SCL t

LOW

Standard mode

(Note 12)

4.7

µs

Fast mode 0.6

HIGH Period of SCL t

HIGH

Standard mode

(Note 12)

4.0

µs

Fast mode 0.6

Setup Time for a Repeated
START

t

SU:STA

Standard mode

(Note 12)

4.7

µs

Fast mode

Data Hold Time

Standard mode

(Notes 12, 14, 15) 0 0.9 µs

Fast mode 100

Data Setup Time

Standard mode

(Note 12)

250

ns

Fast mode 20 + 0.1C

B

Rise Time of Both SDA and SCL
Signals

t

R

Standard mode

(Note 16)

20 + 0.1C

B

ns

Fast mode 20 + 0.1C

B

Fall Time of Both SDA and SCL
Signals

t

F

Standard mode

(Note 16)

20 + 0.1C

B

ns

t

+ t

or

stab

SYMBOL

MIN TYP MAX

500

400
100

t

HD:STA

t

HD:DAT

t

SU:DAT

300

1000

300

1000

DS1086

DS1086 Spread-Spectrum EconOscillator

_____________________________________________________________________ 5

AC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE (continued)

(VCC= 5V ±5%, TA= 0°C to +70°C.)

PARAMETER

CONDITION

UNITS

Fast mode 0.6

Setup Time for STOP

Standard mode 4.0

µs

Capacitive Load for Each Bus
Line

C

B

(Note 16)

pF

NV Write-Cycle Time t

WR

10 ms

Input Capacitance C

I

5pF

Note 1: All voltages are referenced to ground.
Note 2: DAC and OFFSET register settings must be configured to maintain the master oscillator frequency within this range.

Correct operation of the device is not guaranteed if these limits are exceeded.

Note 3: This is the absolute accuracy of the master oscillator frequency at the default settings.
Note 4: This is the change that is observed in master oscillator frequency with changes in voltage from nominal voltage at

T

A

= +25°C.

Note 5: This is the percentage frequency change from the +25°C frequency due to temperature at V

CC

= 5V. The maximum tem­perature change varies with the master oscillator frequency setting. The minimum occurs at the default master oscillator
frequency (f

default

). The maximum occurs at the extremes of the master oscillator frequency range (66MHz or 133MHz)

(see Figure 2).

Note 6: The dither deviation of the master oscillator frequency is unidirectional and lower than the undithered frequency.
Note 7: The integral nonlinearity of the frequency adjust DAC is a measure of the deviation from a straight line drawn between the

two endpoints of a range. The error is in percentage of the span.

Note 8: This is true when the prescaler = 1.
Note 9: Frequency settles faster for small changes in value. During a change, the frequency transitions smoothly from the original

value to the new value.

Note 10: This indicates the time elapsed between power-up and the output becoming active. An on-chip delay is intentionally

introduced to allow the oscillator to stabilize. t

stab

is equivalent to approximately 512 master clock cycles and therefore

depends on the programmed clock frequency.

Note 11: Output voltage swings can be impaired at high frequencies combined with high output loading.
Note 12: A fast-mode device can be used in a standard-mode system, but the requirement t

SU:DAT

> 250ns must then be met.
This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does
stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line at least t

R MAX

+ t

SU:DAT

=

1000ns + 250ns = 1250ns before the SCL line is released.

Note 13: After this period, the first clock pulse is generated.
Note 14: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the V

IH MIN

of the SCL sig-

nal) in order to bridge the undefined region of the falling edge of SCL.

Note 15: The maximum t

HD:DAT

need only be met if the device does not stretch the LOW period (t

LOW

) of the SCL signal.

Note 16: C

B

—total capacitance of one bus line, timing referenced to 0.9 x VCCand 0.1 x VCC.

Note 17: Typical frequency shift due to aging is ±0.5%. Aging stressing includes Level 1 moisture reflow preconditioning (24hr

+125°C bake, 168hr 85°C/85%RH moisture soak, and 3 solder reflow passes +240 +0/-5°C peak) followed by 1000hr
max V

CC

biased 125°C HTOL, 1000 temperature cycles at -55°C to +125°C, 96hr 130°C/85%RH/5.5V HAST and 168hr

121°C/2 ATM Steam/Unbiased Autoclave.

SYMBOL

t

SU:STO

MIN TYP MAX

400