Rainbow Electronics AT42QT5480 User Manual
Features
• Configurations:
– Can be configured as a combination of touchscreen, sliders/wheels and keys, with
Adjacent Key Suppression
• QField
™
Touchscreen:
– Two-touch capable with independent XY tracking for one or two concurrent
touches in real time, with touch size reporting
– Up to eight-inch diagonal screen size supported
– 1024 x 1024 resolution
• Discrete Keys:
– Up to 48 (subject to other configurations)
• QSlide
™
/QWheel™:
– Configurable up to six independent sliders/wheels
• Linearity:
– Screen design dependent but typically better than ±1 percent
• Filtering:
– Advanced digital filtering (user configurable)
• Response Times:
– Sub 15 ms possible, depending on filter settings
• General Purpose Outputs (GPOs):
– Up to four user controllable outputs
• Technolo g y:
– Patented charge-transfer (transverse mode)
• Panel Thickness:
– Glass up to 5 mm, screen size dependent
– Plastic up to 3 mm, screen size dependent
• Channel Sensitivity:
– Individually settable via simple commands over serial interface
• Interface:
2
C-compatible slave mode, 100 kHz or 400 kHz with 2.7V or greater Vdd
–I
• Power:
– 1.8V to 5.5V (2.7V to 5.5V in high speed mode)
• Packages:
– 44-pin 7 x 7 mm MLF RoHS compliant
– 44-pin 10 x 10 mm TQFP RoHS compliant
– 49-ball 5 x 5 mm BGA RoHS compliant
• Signal Processing:
– Self-calibration, auto drift compensation, noise filtering, Adjacent Key
Suppression technology
™
(AKS™) technology between groups
QTwo™ 10-bit
Touchscreen
Controller
AT42QT5480
Summary
Note: This is a summary document. A
complete document is available under
NDA. For more information contact
www.atmel.com/touchscreen.
9510AS–AT42–10/08
1. Pinout and Schematic
GPO1
CHANGE
VREF
SMP
GPO0
Vss
Vdd
Y0B
Y1B
Y2B
Y3B
X3X4X5X6X7
Vdd
Vss
SCL
SDA
Y0A
Y1A
GPO2
GPO3
TRIGGER
RST
Vdd
Vss
XT2
XT1
X0
X1
X2
Y2A
Y3A
Y4A
Y5A
Vdd
Vss
Vdd
A0
FORCE_S
Y5B
Y4B
1
2
3
4
5
6
7
8
9
10
11 23
24
25
26
27
28
29
30
31
32
33
44
43
42
41
403938
37
36
34
35
12
13
14 22
21
19
2018
17
1615
QT5480
QT5480
1.1 Pinout Configurations
2
QT5480
9510AS–AT42–10/08
QT5480
1.2 Pin Descriptions
Table 1-2. Pin Listing
Pin Ball Name Type Comments If Unused, Connect To...
1 B2 GPO2 O General purpose output 2 Leave open
2 B1 GPO3 O General purpose output 3 Leave open
3 C3 TRIGGER I Trigger input (active low) Vss
4C2 RST
5A5 Vdd PPower –
6 A1 Vss P Supply ground –
7 D2 XT2 X Clock resonator –
8 E1 XT1 X Clock resonator –
9 D3 X0 O X matrix drive line Leave open
10 E2 X1 O X matrix drive line Leave open
11 F1 X2 O X matrix drive line Leave open
12 F2 X3 O X matrix drive line Leave open
13 G2 X4 O X matrix drive line Leave open
I Reset low; has internal 30k - 60k pull-up Leave open or Vdd
14 E3 X5 O X matrix drive line Leave open
15 F3 X6 O X matrix drive line Leave open
16 E4 X7 O X matrix drive line Leave open
17 C1 Vdd P Power –
18 A4 Vss P Supply ground –
19 F4 SCL OD Serial Interface Clock –
20 G5 SDA OD Serial Interface Data –
21 F5 Y0A I Y line connection Leave open
22 G6 Y1A I Y line connection Leave open
23 F6 Y2A I Y line connection Leave open
24 E5 Y3A I Y line connection Leave open
25 F7 Y4A I Y line connection Leave open
26 E6 Y5A I Y line connection Leave open
27 E7 Vdd P Power –
28 A7 Vss P Supply ground –
29 C7 Vdd P Power –
30 D6 A0 I I2C-compatible address select –
31 C6 FORCE_S I Force sensor input Vdd or Vss
32 B7 Y5B I Y line connection Leave open
33 D5 Y4B I Y line connection Leave open
34 B6 Y3B I Y line connection Leave open
35 A6 Y2B I Y line connection Leave open
9510AS–AT42–10/08
3
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