Features
• Configurations:
– Can be configured as a combination of touchscreen, sliders/wheels and keys, with
Adjacent Key Suppression
• QField
™
Touchscreen:
– Two-touch capable with independent XY tracking for one or two concurrent
touches in real time, with touch size reporting
– Up to eight-inch diagonal screen size supported
– 1024 x 1024 resolution
• Discrete Keys:
– Up to 32 (subject to other configurations)
• QSlide
™
/QWheel™:
– Configurable up to four independent sliders/wheels
• Linearity:
– Screen design dependent but typically better than ±1 percent
• Filtering:
– Advanced digital filtering (user configurable)
• Response Times:
– Sub 15 ms possible, depending on filter settings
• Technolo g y:
– Patented charge-transfer (transverse mode)
• Panel Thickness:
– Glass up to 5 mm, screen size dependent
– Plastic up to 3 mm, screen size dependent
• Channel Sensitivity:
– Individually settable via simple commands over serial interface
• Interface:
2
C-compatible slave mode, 100 kHz or 400 kHz with 2.7V or greater Vdd
–I
• Power:
– 1.8V to 5.5V (2.7V to 5.5V in high speed mode)
• Packages:
– 32-pin 5 x 5mm MLF RoHS compliant
• Signal Processing:
– Self-calibration, auto drift compensation, noise filtering, Adjacent Key
Suppression technology
™
(AKS™) technology between groups
QTwo™ 10-bit
Touchscreen
Controller
AT42QT5320
Summary
Note: This is a summary document. A
complete document is available under
NDA. For more information contact
www.atmel.com/touchscreen.
9509AS–AT42–10/08
1. Pinout and Schematic
Y2A
Y1A
Y0A
RST
SCL
SDA
Y3B
Y2B
TRIGGER
VREF
SMPX0X1X2X3
X4
Y3A
CHANGE
Vss
Vdd
Vss
Vdd
X6
X7 X5
Vdd
Vdd
Vss
A0
Y0B
Y1B
1
2
3
4
5
6
7
817
18
19
20
21
22
23
24
32
31
30
29
282726
25
9
10
11
16
15
14
13
12
QT5320
FORCE_S
1.1 Pinout Configuration
1.2 Pin Descriptions
Table 1-1. Pin Listing
Pin Name Type Comments If Unused, Connect To...
1 Y3A I Y line connection Leave open
2 CHANGE OD State change notification –
3 Vss P Supply ground –
4 Vdd P Power –
5 Vss P Supply ground –
6 Vdd P Power –
7 X6 O X matrix drive line Leave open
8 X7 O X matrix drive line Leave open
9 TRIGGER I Trigger input (active low) Vdd or Vss
10 Vref I Supply ground –
11 SMP O Sample output. –
12 X0 O X matrix drive line Leave open
13 X1 O X matrix drive line Leave open
14 X2 O X matrix drive line Leave open
15 X3 O X matrix drive line Leave open
16 X4 O X matrix drive line Leave open
17 X5 O X matrix drive line Leave open
2
QT5320
9509AS–AT42–10/08
QT5320
Table 1-1. Pin Listing
Pin Name Type Comments If Unused, Connect To...
18 Vdd P Power –
19 FORCE_S I Force sensor input Vdd or Vss
20 Vdd P Power –
21 Vss P Supply ground –
22 A0 I I2C-compatible address select –
23 Y0B I Y line connection Leave open
24 Y1B I Y line connection Leave open
25 Y2B I Y line connection Leave open
26 Y3B I Y line connection Leave open
27 SDA OD Serial Interface Data –
28 SCL OD Serial Interface Clock –
29 RST
30 Y0A I Y line connection Leave open
I Reset low; has internal 30k - 60k pull-up Leave open or Vdd
31 Y1A I Y line connection Leave open
32 Y2A I Y line connection Leave open
9509AS–AT42–10/08
3