Rainbow Electronics AT29LV512 User Manual

Features

• Single Supply Voltage, Range 3V to 3.6V

• 3-volt Only Read and Write Operation

• Software Protected Programming

• Low-power Dissipation

– 15mAActiveCurrent
– 40 µA CMOS Standby Current

• Fast Read Access Time – 120 ns

• Sector Program Operation

– Single-cycle Reprogram (Erase and Program)
– 512 Sectors (128 Bytes/Sector)
– Internal Address and Data Latches for 128 Bytes

• Fast Sector Program Cycle Time – 20 ms Max.

• Internal Program Control and Timer

• DATA Polling for End of Program Detection

• Typical Endurance > 10,000 Cycles

• CMOS and TTL Compatible Inputs and Outputs

• Commercial and Industrial Temperature Ranges

Description

The AT29LV512 is a 3-volt-only in-system Flash programmable erasable read-only
memory (PEROM). Its 512K of memory is organized as 65,536 words by 8 bits. Man­ufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 120 ns with power dissipation of just 54 mW over the commercial tem­perature range. When the device is deselected, the CMOS standby current is less
than 40 µA. The device endurance is such that any sector can typically be written to in
excess of 10,000 times.

512K (64K x 8)
3-volt Only
Flash Memory

AT29LV512

Pin Configurations

Pin Name Function

A0 - A15 Addresses

CE

OE

WE

I/O0 - I/O7 Data Inputs/Outputs

NC No Connect

A7
A6
A5
A4
A3
A2
A1
A0

I/O0

Chip Enable

Output Enable

Write Enable

PLCC Top View

A12

A15NCNC

VCCWENC

432

1

I/O2

GND

I/O3

323130

I/O4

I/O5

29
28
27
26
25
24
23
22
21

I/O6

5
6
7
8
9
10
11
12
13

14151617181920

I/O1

A14
A13
A8
A9
A11
OE
A10
CE
I/O7

A11

A13
A14

NC

WE

VCC

NC

NC
A15
A12

TSOP Top View

Type 1

1
2

A9

3

A8

4
5
6
7
8
9
10
11
12
13

A7

14

A6

15

A5

16

A4

OE

32

A10

31

CE

30

I/O7

29

I/O6

28

I/O5

27

I/O4

26

I/O3

25

GND

24

I/O2

23

I/O1

22

I/O0

21

A0

20

A1

19

A2

18

A3

17

Rev. 0177M–05/02

1

Block Diagram

To allow for simple in-system reprogrammability, the AT29LV512 does not require high
input voltages for programming. Three-volt-only commands determine the operation of
the device. Reading data out of the device is similar to reading from an EPROM. Repro­gramming the AT29LV512 is performed on a sector basis; 128 bytes of data are loaded
into the device and then simultaneously programmed.

During a reprogram cycle, the address locations and 128 bytes of data are captured at
microprocessor speed and internally latched, freeing the address and data bus for other
operations. Following the initiation of a program cycle, the device will automatically
erase the sector and then program the latched data using an internal control timer. The
end of a program cycle can be detected by DATA
gram cycle has been detected, a new access for a read or program can begin.

polling of I/O7. Once the end of a pro-

Device Operation

READ: The AT29LV512 is accessed like an EPROM. When CE and OE are low and

WE

is high, the data stored at the memory location determined by the address pins
is asserted on the outputs. The outputs are put in the high impedance state whenever
CE

or OE is high. This dual-line control gives designers flexibility in preventing bus

contention.

SOFTWARE DATA PROTECTION PROGRAMMING: The AT29LV512 has 512 individ­ual sectors, each 128 bytes. Using the software data protection feature, byte loads are
used to enter the 128 bytes of a sector to be programmed. The AT29LV512 can only be
programmed or reprogrammed using the software data protection feature. The device is
programmed on a sector basis. If a byte of data within the sector is to be changed, data
for the entire 128-byte sector must be loaded into the device. The AT29LV512 automat­ically does a sector erase prior to loading the data into the sector. An erase command is
not required.

Software data protection protects the device from inadvertent programming. A series of
three program commands to specific addresses with specific data must be presented to
the device before programming may occur. After writing the three-byte command
sequence (and after t
mands must begin each program operation. All software program commands must obey
the sector program timing specifications. Power transitions will not reset the software
data protection feature; however, the software feature will guard against inadvertent
program cycles during power transitions.

), the entire device is protected. The same three program com-

WC

2

AT29LV512

0177M–05/02

AT29LV512

Any attempt to write to the device without the 3-byte command sequence will start the
internal write timers. No data will be written to the device; however, for the duration of
t

, a read operation will effectively be a polling operation.

WC

After the software data protection’s 3-byte command code is given, a byte load is per­formed by applying a low pulse on the WE
and OE

high. The address is latched on the falling edge of CE or WE, whichever occurs

last. The data is latched by the first rising edge of CE

The 128 bytes of data must be loaded into each sector. Any byte that is not loaded dur­ing the programming of its sector will be erased to read FFh. Once the bytes of a sector
are loaded into the device, they are simultaneously programmed during the internal pro­gramming period. After the first data byte has been loaded into the device, successive
bytes are entered in the same manner. Each new byte to be programmed must have its
high-to-low transition on WE
CE

) of the preceding byte. If a high-to-low transition is not detected within 150 µs of the

(or CE) within 150 µs of the low-to-high transition of WE (or

last low-to-high transition, the load period will end and the internal programming period
will start. A7 to A15 specify the sector address. The sector address must be valid during
each high-to-low transition of WE

(or CE). A0 to A6 specify the byte address within the
sector. The bytes may be loaded in any order; sequential loading is not required. Once a
programming operation has been initiated, and for the duration of t
will effectively be a polling operation.

HARDWARE DATA PROTECTION: Hardware features protect against inadvertent
programs to the AT29LV512 in the following ways: (a) V
(typical), the program function is inhibited; (b) V
reached the V

sense level, the device will automatically time out 10 ms (typical)

CC

before programming; (c) Program inhibit – holding any one of OE
high inhibits program cycles; and (d) Noise filter – pulses of less than 15 ns (typical) on
the WE

or CE inputs will not initiate a program cycle.

or CE input with CE or WE low (respectively)

or WE.

, a read operation

WC

sense – if VCCis below 1.8V

CC

power on delay – once VCChas

CC

low, CE high or WE

INPUT LEVELS: Whileoperatingwitha3.3V±10% power supply, the address inputs
and control inputs (OE

,CEand WE) may be driven from 0 to 5.5V without adversely

affecting the operation of the device. The I/O lines can only be driven from 0 to 3.6 volts.

PRODUCT IDENTIFICATION: The product identification mode identifies the device
and manufacturer as Atmel. It may be accessed by hardware or software operation. The
hardware operation mode can be used by an external programmer to identify the correct
programming algorithm for the Atmel product. In addition, users may wish to use the
software product identification mode to identify the part (i.e., using the device code), and
have the system software use the appropriate sector size for program operations. In this
manner, the user can have a common board design for 256K to 4-megabit densities
and, with each density’s sector size in a memory map, have the system software apply
the appropriate sector size.

For details, see Operating Modes (for hardware operation) or Software Product Identifi­cation. The manufacturer and device code is the same for both modes.

DATA

POLLING: The AT29LV512 features DATA polling to indicate the end of a pro-

gram cycle. During a program cycle an attempted read of the last byte loaded will result
in the complement of the loaded data on I/O7. Once the program cycle has been com­pleted, true data is valid on all outputs and the next cycle may begin. DATA

polling may

begin at any time during the program cycle.

0177M–05/02

3

TOGGLE BIT: In addition to DATA polling the AT29LV512 provides another method

for determining the end of a program or erase cycle. During a program or erase opera­tion, successive attempts to read data from the device will result in I/O6 toggling
between one and zero. Once the program cycle has completed, I/O6 will stop toggling
and valid data will be read. Examining the toggle bit may begin at any time during a pro­gram cycle.

OPTIONAL CHIP ERASE MODE: The entire device can be erased by using a 6-byte
software code. Please see Software Chip Erase application note for details.

Absolute Maximum Ratings*

Temperature Under Bias................................ -55°Cto+125°C

Storage Temperature ..................................... -65°Cto+150°C

All Input Voltages (including NC Pins)

with Respect to Ground ...................................-0.6V to +6.25V

All Output Voltages

with Respect to Ground .............................-0.6V to V

Voltage on A9 (including NC Pins)

with Respect to Ground ...................................-0.6V to +13.5V

CC

+0.6V

*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam­age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability

4

AT29LV512

0177M–05/02

DC and AC Operating Range

AT29LV512

AT29LV512-12 AT29LV512-15 AT29LV512-20 AT29LV512-25

Operating
Temperature (Case)

V

Power Supply

CC

(1)

Com. 0°C-70°C0°C-70°C

Ind. -40°C-85°C-40°C-85°C

3.3V ± 0.3V 3.3V ± 0.3V 3.3V ± 0.3V 3.3V ± 0.3V

0°C-70°C 0°C-70°C

-40°C-85°C -40°C-85°C

Notes: 1. After power is applied and VCCis at the minimum specified data sheet value, the system should wait 20 ms before an

operational mode is started.

2.

Not recommended for New Designs.

Operating Modes

Mode CE OE WE Ai I/O

Read V

Program

(2)

Standby/Write Inhibit V

IL

V

IL

IH

Program Inhibit X X V

Program Inhibit X V

Output Disable X V

Product Identification

Hardware V

Software

Notes: 1. X can be V

(5)

or VIH.

IL

IL

2. Refer to AC Programming Waveforms.

3. V

= 12.0V ± 0.5V.

H

4. Manufacturer Code is 1F. The Device Code is 3D.

5. See details under Software Product Identification Entry/Exit.

V

IL

V

IH

(1)

X

IL

IH

V

IL

V

IH

V

IL

Ai D

Ai D

OUT

IN

XXHighZ

IH

X

XHighZ

V

IH

A1 - A15 = VIL,A9=V

A1 - A15 = VIL,A9=V

A0 = V

A0 = V

(3)

,A0=VILManufacturer Code

H

(3)

,A0=VIHDevice Code

H

IL

IH

Manufacturer Code

Device Code

(4)

(4)

(4)

(4)

DC Characteristics

Symbol Parameter Condition Min Max Units

I

LI

I

LO

I

SB1

I

SB2

I

CC

V

IL

V

IH

V

OL

V

OH

0177M–05/02

Input Load Current VIN=0VtoV

Output Leakage Current V

=0VtoV

I/O

VCCStandby Current CMOS CE =VCC-0.3VtoV

CC

CC

CC

Com. 40 µA

Ind. 50 µA

VCCStandby Current TTL CE =2.0VtoV

VCCActive Current f = 5 MHz; I

CC

=0mA;VCC=3.6V 15 mA

OUT

Input Low Voltage 0.6 V

Input High Voltage 2.0 V

Output Low Voltage IOL=1.6mA;VCC=3.0V 0.45 V

Output High Voltage IOH=-100µA;VCC=3.0V 2.4 V

1µA

1µA

1mA

5