Rainbow Electronics AT29LV512 User Manual

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Page 1

Features

• Single Supply Voltage, Range 3V to 3.6V

• 3-volt Only Read and Write Operation

• Software Protected Programming

• Low-power Dissipation

– 15mAActiveCurrent – 40 µA CMOS Standby Current

• Fast Read Access Time – 120 ns

• Sector Program Operation

– Single-cycle Reprogram (Erase and Program) – 512 Sectors (128 Bytes/Sector) – Internal Address and Data Latches for 128 Bytes

• Fast Sector Program Cycle Time – 20 ms Max.

• Internal Program Control and Timer

• DATA Polling for End of Program Detection

• Typical Endurance > 10,000 Cycles

• CMOS and TTL Compatible Inputs and Outputs

• Commercial and Industrial Temperature Ranges

Description

The AT29LV512 is a 3-volt-only in-system Flash programmable erasable read-only memory (PEROM). Its 512K of memory is organized as 65,536 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 120 ns with power dissipation of just 54 mW over the commercial temperature range. When the device is deselected, the CMOS standby current is less than 40 µA. The device endurance is such that any sector can typically be written to in excess of 10,000 times.

512K (64K x 8) 3-volt Only Flash Memory

AT29LV512

Pin Configurations

Pin Name Function

A0 - A15 Addresses

I/O0 - I/O7 Data Inputs/Outputs

NC No Connect

A7 A6 A5 A4 A3 A2 A1 A0

I/O0

Chip Enable

Output Enable

Write Enable

PLCC Top View

A12

A15NCNC

VCCWENC

432

I/O2

GND

I/O3

323130

I/O4

I/O5

29 28 27 26 25 24 23 22 21

I/O6

5 6 7 8 9 10 11 12 13

14151617181920

I/O1

A14 A13 A8 A9 A11 OE A10 CE I/O7

A11

A13 A14

VCC

NC A15 A12

TSOP Top View

Type 1

1 2

4 5 6 7 8 9 10 11 12 13

A10

I/O7

I/O6

I/O5

I/O4

I/O3

GND

I/O2

I/O1

I/O0

Rev. 0177M–05/02

Page 2

Block Diagram

To allow for simple in-system reprogrammability, the AT29LV512 does not require high input voltages for programming. Three-volt-only commands determine the operation of the device. Reading data out of the device is similar to reading from an EPROM. Reprogramming the AT29LV512 is performed on a sector basis; 128 bytes of data are loaded into the device and then simultaneously programmed.

During a reprogram cycle, the address locations and 128 bytes of data are captured at microprocessor speed and internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the sector and then program the latched data using an internal control timer. The end of a program cycle can be detected by DATA gram cycle has been detected, a new access for a read or program can begin.

polling of I/O7. Once the end of a pro-

Device Operation

READ: The AT29LV512 is accessed like an EPROM. When CE and OE are low and

is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE

or OE is high. This dual-line control gives designers flexibility in preventing bus

contention.

SOFTWARE DATA PROTECTION PROGRAMMING: The AT29LV512 has 512 individual sectors, each 128 bytes. Using the software data protection feature, byte loads are used to enter the 128 bytes of a sector to be programmed. The AT29LV512 can only be programmed or reprogrammed using the software data protection feature. The device is programmed on a sector basis. If a byte of data within the sector is to be changed, data for the entire 128-byte sector must be loaded into the device. The AT29LV512 automatically does a sector erase prior to loading the data into the sector. An erase command is not required.

Software data protection protects the device from inadvertent programming. A series of three program commands to specific addresses with specific data must be presented to the device before programming may occur. After writing the three-byte command sequence (and after t mands must begin each program operation. All software program commands must obey the sector program timing specifications. Power transitions will not reset the software data protection feature; however, the software feature will guard against inadvertent program cycles during power transitions.

), the entire device is protected. The same three program com-

AT29LV512

0177M–05/02

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AT29LV512

Any attempt to write to the device without the 3-byte command sequence will start the internal write timers. No data will be written to the device; however, for the duration of t

, a read operation will effectively be a polling operation.

After the software data protection’s 3-byte command code is given, a byte load is performed by applying a low pulse on the WE and OE

high. The address is latched on the falling edge of CE or WE, whichever occurs

last. The data is latched by the first rising edge of CE

The 128 bytes of data must be loaded into each sector. Any byte that is not loaded during the programming of its sector will be erased to read FFh. Once the bytes of a sector are loaded into the device, they are simultaneously programmed during the internal programming period. After the first data byte has been loaded into the device, successive bytes are entered in the same manner. Each new byte to be programmed must have its high-to-low transition on WE CE

) of the preceding byte. If a high-to-low transition is not detected within 150 µs of the

(or CE) within 150 µs of the low-to-high transition of WE (or

last low-to-high transition, the load period will end and the internal programming period will start. A7 to A15 specify the sector address. The sector address must be valid during each high-to-low transition of WE

(or CE). A0 to A6 specify the byte address within the sector. The bytes may be loaded in any order; sequential loading is not required. Once a programming operation has been initiated, and for the duration of t will effectively be a polling operation.

HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs to the AT29LV512 in the following ways: (a) V (typical), the program function is inhibited; (b) V reached the V

sense level, the device will automatically time out 10 ms (typical)

before programming; (c) Program inhibit – holding any one of OE high inhibits program cycles; and (d) Noise filter – pulses of less than 15 ns (typical) on the WE

or CE inputs will not initiate a program cycle.

or CE input with CE or WE low (respectively)

or WE.

, a read operation

sense – if VCCis below 1.8V

power on delay – once VCChas

low, CE high or WE

INPUT LEVELS: Whileoperatingwitha3.3V±10% power supply, the address inputs and control inputs (OE

,CEand WE) may be driven from 0 to 5.5V without adversely

affecting the operation of the device. The I/O lines can only be driven from 0 to 3.6 volts.

PRODUCT IDENTIFICATION: The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external programmer to identify the correct programming algorithm for the Atmel product. In addition, users may wish to use the software product identification mode to identify the part (i.e., using the device code), and have the system software use the appropriate sector size for program operations. In this manner, the user can have a common board design for 256K to 4-megabit densities and, with each density’s sector size in a memory map, have the system software apply the appropriate sector size.

For details, see Operating Modes (for hardware operation) or Software Product Identification. The manufacturer and device code is the same for both modes.

DATA

POLLING: The AT29LV512 features DATA polling to indicate the end of a pro-

gram cycle. During a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. DATA

polling may

begin at any time during the program cycle.

0177M–05/02

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TOGGLE BIT: In addition to DATA polling the AT29LV512 provides another method

for determining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit may begin at any time during a program cycle.

OPTIONAL CHIP ERASE MODE: The entire device can be erased by using a 6-byte software code. Please see Software Chip Erase application note for details.

Absolute Maximum Ratings*

Temperature Under Bias................................ -55°Cto+125°C

Storage Temperature ..................................... -65°Cto+150°C

All Input Voltages (including NC Pins)

with Respect to Ground ...................................-0.6V to +6.25V

All Output Voltages

with Respect to Ground .............................-0.6V to V

Voltage on A9 (including NC Pins)

with Respect to Ground ...................................-0.6V to +13.5V

+0.6V

*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability

AT29LV512

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DC and AC Operating Range

AT29LV512

AT29LV512-12 AT29LV512-15 AT29LV512-20 AT29LV512-25

Operating Temperature (Case)

Power Supply

(1)

Com. 0°C-70°C0°C-70°C

Ind. -40°C-85°C-40°C-85°C

3.3V ± 0.3V 3.3V ± 0.3V 3.3V ± 0.3V 3.3V ± 0.3V

0°C-70°C 0°C-70°C

-40°C-85°C -40°C-85°C

Notes: 1. After power is applied and VCCis at the minimum specified data sheet value, the system should wait 20 ms before an

operational mode is started.

Not recommended for New Designs.

Operating Modes

Mode CE OE WE Ai I/O

Read V

Program

(2)

Standby/Write Inhibit V

Program Inhibit X X V

Program Inhibit X V

Output Disable X V

Product Identification

Hardware V

Software

Notes: 1. X can be V

(5)

or VIH.

2. Refer to AC Programming Waveforms.

3. V

= 12.0V ± 0.5V.

4. Manufacturer Code is 1F. The Device Code is 3D.

5. See details under Software Product Identification Entry/Exit.

(1)

Ai D

OUT

XXHighZ

XHighZ

A1 - A15 = VIL,A9=V

A0 = V

(3)

,A0=VILManufacturer Code

(3)

,A0=VIHDevice Code

Manufacturer Code

Device Code

(4)

DC Characteristics

Symbol Parameter Condition Min Max Units

SB1

SB2

0177M–05/02

Input Load Current VIN=0VtoV

Output Leakage Current V

=0VtoV

I/O

VCCStandby Current CMOS CE =VCC-0.3VtoV

Com. 40 µA

Ind. 50 µA

VCCStandby Current TTL CE =2.0VtoV

VCCActive Current f = 5 MHz; I

=0mA;VCC=3.6V 15 mA

OUT

Input Low Voltage 0.6 V

Input High Voltage 2.0 V

Output Low Voltage IOL=1.6mA;VCC=3.0V 0.45 V

Output High Voltage IOH=-100µA;VCC=3.0V 2.4 V

1µA

1mA

Page 6

AC Read Characteristics

Symbol Parameter

ACC

(1)

(2)

(3)(4)

Address to Output Delay 120 150 200 250 ns

CE to Output Delay 120 150 200 250 ns

OE to Output Delay 0 50 0 70 0 100 0 120 ns

CE or OE to Output Float 0 30 0 40 0 50 0 60 ns

Output Hold from OE,CEor Address, whichever occurred first

Note:

Not recommended for New Designs.

AC Read Waveforms

(1)(2)(3)(4)

AT29LV512-12 AT29LV512-15

AT29LV512-20 AT29LV512-25

Min Max Min Max

000 0 ns

UnitsMin Max Min Max

Notes: 1. CE may be delayed up to t

2. OE

may be delayed up to tCE-tOEafter the falling edge of CE without impact on tCEor by t

without impact on t

3. t

is specified from OE or CE whichever occurs first (CL = 5 pF).

ACC

ACC-tCE

after the address transition without impact on t

4. This parameter is characterized and is not 100% tested.

Input Test Waveforms and Measurement Level

tR,tF<5ns

Output Test Load

ACC

ACC-tOE

after an address change

AT29LV512

0177M–05/02

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AT29LV512

Pin Capacitance

f=1MHz,T=25°C

Symbol Typ Max Units Conditions

(1)

OUT

Note: 1. These parameters are characterized and not 100% tested.

46pFV

812pFV

OUT

=0V

AC Byte Load Characteristics

Symbol Parameter Min Max Units

AS,tOES

DH,tOEH

WPH

AC Byte Load Waveforms

WE Controlled

Address, OE Set-up Time 0 ns

Address Hold Time 100 ns

Chip Select Set-up Time 0 ns

Chip Select Hold Time 0 ns

Write Pulse Width (WE or CE) 200 ns

Data Set-up Time 100 ns

Data, OE Hold Time 10 ns

Write Pulse Width High 200 ns

(1)(2)

Controlled

0177M–05/02

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Program Cycle Characteristics

Symbol Parameter Min Max Units

BLC

WPH

WriteCycleTime 20 ms

Address Set-up Time 0 ns

Address Hold Time 100 ns

Data Set-up Time 100 ns

Data Hold Time 10 ns

Write Pulse Width 200 ns

Byte Load Cycle Time 150 µs

Write Pulse Width High 200 ns

Software Protected Program Waveform

(1)(2)(3)

Notes: 1. OE must be high when WE and CE arebothlow.

2. A7 through A15 must specify the sector address during each high-to-low transition of WE has been entered.

3. All bytes that are not loaded within the sector being programmed will be indeterminate.

Programming Algorithm

(1)

LOAD DATA AA

ADDRESS 5555

LOAD DATA 55

ADDRESS 2AAA

LOAD DATA A0

ADDRESS 5555

LOAD DATA

SECTOR (128 BYTES)

WRITES ENABLED

ENTER DATA

(3)

PROTECT STATE

Notes: 1. Data Format: I/O7 - I/O0 (Hex); Address Format: A14 - A0 (Hex).

2. Data Protect state will be re-activated at end of program cycle.

3. 128 bytes of data MUST BE loaded.

(or CE) after the software code

(2)

AT29LV512

0177M–05/02

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AT29LV512

Data Polling Characteristics

(1)

Symbol Parameter Min Typ Max Units

OEH

Data Hold Time 10 ns

OE Hold Time 10 ns

OE to Output Delay

(2)

Write Recovery Time 0 ns

Notes: 1. These parameters are characterized and not 100% tested.

2. See t

spec in AC Read Characteristics.

Data Polling Waveforms

Toggle Bit Characteristics

(1)

Symbol Parameter Min Typ Max Units

OEH

OEHP

Data Hold Time 10 ns

OE Hold Time 10 ns

OE to Output Delay

(2)

OE High Pulse 150 ns

Write Recovery Time 0 ns

Notes: 1. These parameters are characterized and not 100% tested.

2. See t

Toggle Bit Waveforms

spec in AC Read Characteristics.

(1)(3)

Notes: 1. Toggling either OE or CE or both OE and CE will operate toggle bit.

2. Beginning and ending state of I/O6 will vary.

3. Any address location may be used but the address should not vary.

0177M–05/02

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Software Product Identification Entry

LOAD DATA AA

ADDRESS 5555

LOAD DATA 55

ADDRESS 2AAA

LOAD DATA 90

ADDRESS 5555

(1)

PAUSE 20 mS ENTER PRODUCT

IDENTIFICATION MODE

Notes: 1. Data Format: I/O7 - I/O0 (Hex); Address Format: A14 - A0 (Hex).

2. A1 - A15 = V

. Manufacturer Code is read for A0 = VIL; Device Code is read for A0 = VIH.

3. The device does not remain in identification mode if powered down.

4. The device returns to standard operation mode.

5. Manufacturer Code is 1F. The Device Code is 3D.

Software Product Identification Exit

(1)

LOAD DATA AA

ADDRESS 5555

LOAD DATA 55

ADDRESS 2AAA

LOAD DATA F0

ADDRESS 5555

(2)(3)(5)

AT29LV512

PAUSE 20 mS EXIT PRODUCT

IDENTIFICATION

(4)

MODE

0177M–05/02

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Ordering Information

ACC

(ns)

120 15 0.04 AT29LV512-12JC

150 15 0.04 AT29LV512-15JC

200 15 0.04 AT29LV512-20JC

250 15 0.04 AT29LV512-25JC

(mA)

Ordering Code Package Operation RangeActive Standby

AT29LV512-12TC

15 0.05 AT29LV512-12JI

AT29LV512-12TI

AT29LV512-15TC

15 0.05 AT29LV512-15JI

AT29LV512-15TI

AT29LV512-20TC

15 0.05 AT29LV512-20JI

AT29LV512-20TI

AT29LV512-25TC

15 0.05 AT29LV512-25JI

AT29LV512-25TI

32J 32T

AT29LV512

Commercial (0° to 70°C)

Industrial

(-40° to 85°C)

Commercial (0° to 70°C)

Industrial

(-40° to 85°C)

Commercial (0° to 70°C)

Industrial

(-40° to 85°C)

Commercial (0° to 70°C)

Industrial

(-40° to 85°C)

Note:

Not recommended for New Designs.

32J 32-lead, Plastic J-leaded Chip Carrier (PLCC)

32T 32-lead, Thin Small Outline Package (TSOP)

0177M–05/02

Package Type

Page 12

Packaging Information

32J–PLCC

1.14(0.045) X 45˚

0.51(0.020)MAX

45˚ MAX (3X)

Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE.

2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line.

3. Lead coplanarity is 0.004" (0.102 mm) maximum.

PIN NO. 1 IDENTIFIER

1.14(0.045) X 45˚

E1 E

0.318(0.0125)

0.191(0.0075)

COMMON DIMENSIONS

(Unit of Measure = mm)

SYMBOL

A 3.175 – 3.556

A1 1.524 – 2.413

A2 0.381 – –

D 12.319 – 12.573

D1 11.354 – 11.506 Note 2

D2 9.906 – 10.922

E 14.859 – 15.113

E1 13.894 – 14.046 Note 2

E2 12.471 – 13.487

B 0.660 – 0.813

B1 0.330 – 0.533

e 1.270 TYP

MIN

NOM

MAX

NOTE

10/04/01

2325 Orchard Parkway

San Jose, CA 95131

AT29LV512

TITLE

32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)

DRAWING NO.

32J

REV.

0177M–05/02

Page 13

32T – TSOP

AT29LV512

PIN 1

Pin 1 Identifier

SEATING PLANE

Notes: 1. This package conforms to JEDEC reference MO-142, Variation BD.

2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.

3. Lead coplanarity is 0.10 mm maximum.

0º ~ 8º

COMMON DIMENSIONS

SYMBOL

A – – 1.20

A1 0.05 – 0.15

A2 0.95 1.00 1.05

D 19.80 20.00 20.20

D1 18.30 18.40 18.50 Note 2

E 7.90 8.00 8.10 Note 2

L 0.50 0.60 0.70

L1 0.25 BASIC

b 0.17 0.22 0.27

c 0.10 – 0.21

e 0.50 BASIC

GAGE PLANE

(Unit of Measure = mm)

MIN

NOM

MAX

NOTE

0177M–05/02

2325 Orchard Parkway

San Jose, CA 95131

TITLE

32T, 32-lead (8 x 20 mm Package) Plastic Thin Small Outline

Package, Type I (TSOP)

DRAWING NO.

32T

10/18/01

REV.

Page 14

Atmel Headquarters Atmel Operations

Corporate Headquarters

2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 487-2600

Europe

Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland TEL (41) 26-426-5555 FAX (41) 26-426-5500

Asia

Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong TEL (852) 2721-9778 FAX (852) 2722-1369

Japan

9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL (81) 3-3523-3551 FAX (81) 3-3523-7581

Memory

2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 436-4314

Microcontrollers

2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 436-4314

La Chantrerie BP 70602 44306 Nantes Cedex 3, France TEL (33) 2-40-18-18-18 FAX (33) 2-40-18-19-60

ASIC/ASSP/Smart Cards

Zone Industrielle 13106 Rousset Cedex, France TEL (33) 4-42-53-60-00 FAX (33) 4-42-53-60-01

1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 1(719) 576-3300 FAX 1(719) 540-1759

Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland TEL (44) 1355-803-000 FAX (44) 1355-242-743

RF/Automotive

Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany TEL (49) 71-31-67-0 FAX (49) 71-31-67-2340

1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 1(719) 576-3300 FAX 1(719) 540-1759

Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom

Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France TEL (33) 4-76-58-30-00 FAX (33) 4-76-58-34-80

e-mail

literature@atmel.com

Web Site

http://www.atmel.com

Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems.

AT ME L®is the registered trademarks of Atmel.

Other terms and product names may be the trademarks of others.

Printed on recycled paper.

0177M–05/02/xM