Rainbow Electronics AT29LV256 User Manual

Features
Single Supply Voltage, Range 3V to 3.6V
3-Volt Only Read and Write Operation
Software Protected Programming
Low Power Dissipation
Fast Read Access Time - 150 ns
Sector Program Operation
– Single Cycle Reprogram (Erase and Program) – 512 Sectors (64 bytes / sec tor) – Internal Address and Data Latches for 64 Bytes
Fast Sector Program Cycle Time - 20 ms Max.
Internal Program Control and Timer
DAT A Polling for End of Program Detection
Typical Endurance > 10,000 Cycles
CMOS and TTL Compatible Inputs and Outputs
Commercial and Industrial Temperature Ranges
256K (32K x 8) 3-volt Only Flash Memory
Description
The AT29LV256 is a 3-volt-only in-system Flash Programmable Erasable Read Only Memory (PEROM). Its 256K of mem ory is orga nized as 32,768 words by 8 bi ts. Man­ufactured with Atmel ’s advanced nonvolatile CMOS technology , the device offers access times to 150 ns with power dissipation of just 54 mW over the commercial tem­perature range. When the device is deselected, the CMOS standby current is less than 40 µA. The device endurance is such that any sector can typically be written to in excess of 10,000 times.
(continued)
Pin Configurations
22 23 24 25 26 27 28 1 2 3 4 5 6 7
TSOP Top View
Type 1
21
A10
20
CE
19
I/O7
18
I/O6
17
I/O5
16
I/O4
15
I/O3
14
GND
13
I/O2
12
I/O1
11
I/O0
10
A0
9
A1
8
A2
Pin Name Function
A0 - A14 Addresses CE OE WE
Chip Enable Output En able
Write Enable I/O0 - I/O7 Data Inputs/Outputs NC No Connect DC Don’t Connect
PLCC Top View
OE
A11
A9
A8 A13 A14
VCC
WE
A12
A7
A6
A5
A4
A3
AT29LV256
NC
I/O0
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
12 13
A7
A12WEDC
VCC
A14
432
1
323130
14151617181920
DC
I/O1
I/O2
I/O3
I/O4
GND
A13
29 28 27 26 25 24 23 22 21
I/O5
A8 A9 A11 NC OE A10 CE I/O7 I/O6
Rev. 0563B–10/98
1
To allow for simple in-system reprogrammability, the AT29LV256 does not require high input voltages for pro­gramming. Thre e-vol t-only c omman ds dete rmine th e oper­ation of the device. Reading data out of the device is similar to reading from an EPROM. Reprogramming the AT29LV256 is performed on a sector basis; 64 bytes of data are loaded into the device and then simultaneou sly programmed.
Block Diagram
During a reprogram cycle, the address locations and 64 bytes of data are captured at microprocessor speed and internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the sector and then program the latched data using an internal control timer. The end of a program cycle can be detected by
polling of I/O7. Once the end of a program cy cl e has
DATA been detected, a new access for a read or program can begin.
Device Operation
READ:
When CE at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE control gives designers flexibility in preventing bus conten­tion.
SOFTWARE DATA PROTECTION PROGRAMMING:
AT29LV256 has 512 individual secto rs, each 64 by tes. Using the software data protection feature, byte loads are used to enter the 64 bytes o f a sector to be programmed. The AT29LV256 can only be progr ammed or repro­grammed using the software data protection feature. The device is programmed on a se ctor basis. If a byte of data within the sect or is to be ch anged, dat a for the en tire 64­byte sector must be loaded in to the device. The AT29LV256 automatically does a sector erase prior to loading the data into the sector. An erase command is not required.
Software data protection p rotec ts the dev ice from inadv ert­ent programming. A series of three program commands to specific addresses with specific data must be presented to the device before programming may occur. The same three program commands must begin each program operation. All software program co mmands must ob ey the sec tor pro­gram timing specifications. Power transitions will not reset
The AT29LV256 is ac cessed like an EPROM . and OE are low and WE is high, the data stored
or OE is high. This dual-line
The
the software data pr otection feature, however th e softwa re feature will guard against inadvertent program cycles dur­ing power transitions.
Any attempt to write to the device without the 3-byte com­mand sequen ce will start the int ernal wri te tim ers. N o data will be written to the device; however, for the duration of
, a read operation will effectively be a polling operation.
t
WC
After the software data protection’s 3-byte command code is given, a byte load is performed by applying a l ow pulse on the WE and OE
or WE, whichever occurs last. The data is latched by
CE the first rising edge of CE
The 64 bytes of data must be lo ade d into eac h sect or. Any byte that is not loaded during the programming of its sector will be erased to read FFh. Once the bytes of a sector are loaded into the device, they are simult aneously pro­grammed during the internal programming period. After the first data byte h as been load ed in to the de vice, s ucces sive bytes are entered in the same manner. Each new byte to be programmed must ha ve its hi gh to low t ransiti on on WE (or CE) within 150 µs of the low to high transition of WE (or
) of the preceding byte. If a high to low transition is not
CE detected within 150 µs of t he la st lo w t o hig h tra ns ition, th e load period will end and the internal programming period
or CE input with CE or WE low (respectively)
high. The address is lat ched on the falling edge of
or WE.
2
AT29LV256
AT29LV256
will start. A6 to A14 spec ify the sector ad dress . The sect or address must be valid during each high to low transition of
(or CE). A0 to A5 specify the byte addre ss within the
WE sector. The bytes may be loade d in any order; sequ ential loading is not required. Once a programming operation has been initiated, an d for the dura tion o f t
, a read operation
WC
will effectively be a polling operation.
HARDWARE DATA PROTE CTION:
Hardware features protect against inadvertent programs to the AT29LV256 in the following ways: (a) V (typical), the program function is inhibited; (b) V delay—once V
has reached the VCC sense level, the
CC
sense—if VCC is below 1.8V
CC
power on
CC
device will automa tically t ime out 10 ms (typic al) befo re programming; (c) Progr am inh ibit— ol ding an y one o f OE low, CE high or WE high inh ibits program cycles; and (d) Noise filter—p ulses of les s than 15 ns (t ypical) on th e
or CE inputs will not initiate a program cycle.
WE
INPUT LEVELS:
supply, the address inputs and control inputs (OE
) may be driven from 0 to 5.5V without adversely affect-
WE
While operati ng with a 3. 3V ±10% p ower
, CE and
ing the operation of the devic e. The I/O lin es can only be driven from 0 to 3.6 volts.
PRODUCT IDENTIFICATION:
The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external pro­grammer to identify the correct programming algorithm for the Atmel product. In addi tion, users may wis h to use the software product identification mode to identify the part (i.e.
using the device code), and hav e the syst em softw are use the appropriate sector size for program operations. In this manner, the user can have a common board design for 256K to 4-megabit densities and, with each density’s sector size in a memory ma p, ha ve the sy st em s oft war e ap pl y th e appropriate sector size.
For details, see O perat ing Mode s (for ha rdware operat ion) or Software Product Identification. The manufacturer and device code is the same for both modes.
DATA
POLLING:
The AT29LV256 features DATA
polling to indicate the end of a program cycle. During a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the pro­gram cycle has been completed, true data is valid on all outputs and the next cycle may begin. DATA
polling may
begin at any time during the program cycle.
TOGGLE BIT:
In addition to DATA
polling the AT29LV256 pr ovides anothe r meth od for determ ining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the program cycle has completed, I/O6 will stop tog­gling and valid data will be read. Exami ning the to ggle bit may begin at any time during a program cycle.
OPTIONAL CHIP ERASE MODE:
The entire device can be erased by using a 6-byte software code. Please see Software Chip Erase application note for details.
Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature.....................................-65°C to +150°C
All Input Voltages (including NC Pins)
with Respect to Ground...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground.............................-0.6V to VCC + 0.6V
Voltage on A9 (including NC Pins)
with Respect to Ground...................................-0.6V to +13.5V
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam­age to the de vic e. T his is a stres s r ating o nly an d functional opera tion of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reli abi li ty.
3
DC and AC Operating Range
AT29LV256-15 AT29LV256-20 AT29LV256-25
Operating Temperature (Case)
V
Power Supply 3.3V ± 0.3V 3.3V ± 0.3V 3.3V ± 0.3V
CC
Com. 0°C - 70°C 0°C - 70°C 0°C - 70°C Ind. -40°C - 85°C -40°C - 85°C -40°C - 85°C
Operating Modes
Mode CE OE WE Ai I/O
Read V Program
(2)
Standby/Write Inhibit V
IL
V
IL
IH
Program Inhibit X X V Program Inhibit X V Output Disable X V
X
V
IL
V
IH (1)
IL
IH
V
IH
V
IL
Ai D Ai D
OUT
IN
XXHigh Z
IH
X XHigh Z
Product Identification
IL
IH
(3)
H
(3)
H
, A0 = V , A0 = V
Manufacturer Co de
IL
Device Code
IH
Manufacturer Co de Device Code
(4)
(4)
Hardware V
Software
Notes: 1. X can be V
(5)
or VIH.
IL
IL
V
IL
V
IH
A1 - A14 = VIL, A9 = V
A0 = V A0 = V
A1 - A14 = VIL, A9 = V
2. Refer to AC Programming Waveforms. = 12.0V ± 0.5V.
3. V
H
4. Manufacturer Code is 1F. The Device Code is BC.
5. See details under Software Product Identification Entry/Exit.
DC Characteristics
Symbol Parameter Condition Min Max Units
I I
I
LI
LO
SB1
Input Load Current VIN = 0V to V Output Leakage Current V
VCC Standby Current CMOS CE = V
= 0V to V
I/O
CC
- 0.3V to V
CC
CC
CC
1 µA
1 µA Com. 40 µA Ind. 50 µA
(4)
(4)
I
SB2
I
CC
V
IL
V
IH
V
OL
V
OH
4
VCC Standby Current TTL CE = 2.0V to V V
Active Current f = 5 MHz; I
CC
OUT
CC
= 0 mA; VCC = 3.6V 15 mA
1mA
Input Low Voltage 0.6 V Input High Voltage 2.0 V Output Low Voltage IOL = 1.6 mA; VCC = 3.0V 0.45 V Output High Voltage IOH = -100 µA; VCC = 3.0V 2.4 V
AT29LV256
AC Read Characteristics
Symbol Parameter
t t t t
t
ACC
CE
OE
DF
OH
(1)
(2)
(3)(4)
Address to Output Delay 150 200 250 ns CE to Output Delay 150 200 250 ns OE to Output De lay 0 70 0 100 0 120 ns CE or OE to Output Float 0 40 0 50 0 60 ns Output Hold from OE, CE or Address,
whichever occurred f irst
AT29LV256
AT29L V256-15 AT29LV256-20 AT29LV256-25
UnitsMin Max Min Max Min Max
000ns
AC Read Waveforms
Notes: 1. CE may be delayed up to t
(1)(2)(3)(4)
ACC
2. OE may be delayed up to tCE - tOE after the falling edge of CE with out im pa ct on tCE or by t without impact on t
is specified from OE or CE whichever occurs first (CL = 5 pF).
3. t
DF
ACC
.
4. This parameter is characterized and is not 100% tested.
Input Test Waveforms and Measurement Level
- tCE after the address transition without impact on t
Output Test Load
ACC
.
- tOE after an address change
ACC
t
, tF < 5 ns
R
Pin Capacitance
f = 1 MHz, T = 25°C
Symbol Typ Max Units Conditions
C
IN
C
OUT
Note: 1. These parameters are characterized and not 100% tested.
(1)
46pFV 812pFV
IN
OUT
= 0V
= 0V
5
AC Byte Load Characteristics
Symbol Parameter Min Max Units
, t
t
AS
t
AH
t
CS
t
CH
t
WP
t
DS
tDH, t t
WPH
OES
OEH
Address, OE Set-up Time 10 ns Address Hold Time 100 ns Chip Select Set-up Time 0 ns Chip Select Hold Time 0 ns Write Pulse Width (WE or CE) 200 ns Data Set-up Time 100 ns Data, OE Hold Time 10 ns Write Pulse Width High 200 ns
AC Byte Load Waveforms
WE Controlled
CE Controlled
(1)(2)
6
AT29LV256
AT29LV256
Program Cyc le Characteristics
Symbol Parameter Min Max Units
t
WC
t
AS
t
AH
t
DS
t
DH
t
WP
t
BLC
t
WPH
Software Protected Program Waveform
Write Cycle Time 20 ms Address Set-up Time 10 ns Address Hold Time 100 ns Data Set-up Time 100 ns Data Hold Time 10 ns Write Pulse Width 200 ns Byte Load Cycle Time 150 Write Pulse Width High 200 ns
(1)(2)(3)
s
µ
Notes: 1. OE must be high when WE and CE are both low.
2. A6 through A14 must spe cify the se ctor addres s during each hig h to low transiti on of WE (or CE) after the software code has been entered.
3. All bytes that are not loaded within the sector being programmed will be indeterminate.
Programming Algorithm
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA A0
TO
ADDRESS 5555
LOAD DATA
TO
SECTOR (64 BYTES)
WRITES ENABLED
ENTER DATA
(3)
PROTECT STATE
(1)
(2)
Notes for software program code:
1. Data Format: I/O7 - I/O0 (Hex); Address Format: A14 - A0 (Hex).
2. Data Protect state will be re-activated at end of pro­gram cycle.
3. 64 bytes of data
MUST BE
loaded.
7
Data Po lling Characteristics
Symbol Parameter Min Typ Max Units
t
DH
t
OEH
t
OE
t
WR
Notes: 1. These parameters are characterized and not 100% tested.
Data Hold Time 10 ns OE Hold Time 10 ns OE to Output Delay Write Recovery Time 0 ns
2. See tOE spec in AC Read Characteristics.
(2)
(1)
Data Polling Waveforms
ns
Toggle Bit Characteristics
Symbol Parameter Min Typ Max Units
t
DH
t
OEH
t
OE
t
OEHP
t
WR
Notes: 1. These parameters are characterized and not 100% tested.
Data Hold Time 10 ns OE Hold Time 10 ns OE to Output Delay OE High Pulse 150 ns Write Recovery Time 0 ns
2. See tOE spec in AC Read Characteristics.
(2)
Toggle Bit Waveforms
(1)
(1)(3)
ns
Notes: 1. Toggling either OE or CE or both OE and CE will operate toggle bit.
2. Beginning and ending state of I/O6 will vary.
3. Any address location may be used but the address should not vary.
8
AT29LV256
AT29LV256
Software Product Identification Entry
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA 90
TO
ADDRESS 5555
PAUSE 20 mS ENTER PRODUCT
Notes for software product identification:
1. Data Format: I/O7 - I/O0 (Hex); Address Format: A14 - A0 (Hex).
2. A1 - A14 = V
.
IL
Manufacturer Code is read for A0 = V Device Code is read for A0 = V
3. The device does not remain in identification mode if powered down.
4. The device returns to standard operation mode.
5. Manufacturer Code is 1F. The Device Code is BC.
IDENTIFICATION
(2)(3)
MODE
;
IL
.
IH
(1)
Software Product Identification Exit
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA F0
TO
ADDRESS 5555
PAUSE 20 mS EXIT PRODUCT
IDENTIFICATION
(4)
MODE
(1)
9
Ordering Information
I
t
ACC
(ns)
150 15 0.04 AT29LV256-15JC
200 15 0.04 AT29LV256-20JC
250 15 0.04 AT29LV256-25JC
(mA)
CC
Ordering Code Package Operation RangeActive Standby
AT29LV256-15TC
15 0.05 AT29LV256-15JI
AT29LV256-15TI
AT29LV256-20PC AT29LV256-20TC
15 0.05 AT29LV256-20JI
AT29LV256-20PI
AT29LV256-25PC AT29LV256-25TC
15 0.05 AT29LV256-25JI
AT29LV256-25PI
32J 28T
32J 28T
32J 28P6 28T
32J 28P6
32J 28P6 28T
32J 28P6
Commercial (0° to 70°C)
Industrial
(-40° to 85°C)
Commercial (0° to 70°C)
Industrial
(-40° to 85°C)
Commercial (0° to 70°C)
Industrial
(-40° to 85°C)
Package Type
32J 32-Lead, Plastic J-Leaded Chip Carrier (PLCC) 28P6 28-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 28T 28-Lead, Thin Small Outline Package (TSOP)
10
AT29LV256
Packaging Information
AT29LV256
32J
, 32-Lead, Plastic J-Leaded Chip Carrier (PLCC)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-016 AE
.045(1.14) X 45˚
.032(.813) .026(.660)
.050(1.27) TYP
PIN NO.1 IDENTIFY
.553(14.0) .547(13.9)
.300(7.62) REF
.430(10.9) .390(9.90)
.453(11.5) .447(11.4)
.495(12.6) .485(12.3)
.025(.635) X 30˚ - 45˚
.595(15.1) .585(14.9)
AT CONTACT POINTS
.022(.559) X 45˚ MAX (3X)
.021(.533) .013(.330)
.140(3.56) .120(3.05)
.012(.305) .008(.203)
.530(13.5) .490(12.4)
.030(.762) .015(.381) .095(2.41) .060(1.52)
28P6
, 28-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-011 AB
1.47(37.3)
.220(5.59)
SEATING
PLANE
MAX
.161(4.09) .125(3.18)
.110(2.79) .090(2.29)
.012(.305) .008(.203)
1.44(36.6)
1.300(33.02) REF
.065(1.65) .041(1.04)
.630(16.0) .590(15.0)
.690(17.5) .610(15.5)
PIN
1
0
REF
15
.566(14.4) .530(13.5)
.090(2.29)
.005(.127)
.065(1.65)
.015(.381) .022(.559) .014(.356)
MAX
MIN
28T
, 28-Lead, Plastic Thin Small Outline Package (TSOP) Dimensions in Inches and (Millimeters)*
INDEX
MARK
AREA
0.55 (0.022) BSC
0
REF
5
7.15 (0.281) REF
8.10 (0.319)
7.90 (0.311)
0.20 (0.008)
0.10 (0.004)
0.70 (0.028)
0.30 (0.012)
11.9 (0.469)
11.7 (0.461)
0.27 (0.011)
0.18 (0.007)
13.7 (0.539)
13.1 (0.516)
1.25 (0.049)
1.05 (0.041)
0.20 (0.008)
0.15 (0.006)
*Controlling dimension: millimeters
11
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Fax-on-Demand
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International: 1-(408) 441-0732
e-mail
literature@atmel.com
Web Site
http://www.atmel.com
BBS
1-(408) 436-4309
© Atmel Corporation 1998.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard war­ranty which is detailed in Atmel’s Terms and Conditions located on the Company’s website. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual prop­erty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems.
®
Marks bearing Terms and product names in this document may be trademarks of others.
and/or ™ are registered trademarks and trademarks of Atmel Corporation.
Printed on recycled paper.
0563B–10/98//xM
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