Rainbow Electronics AT29LV256 User Manual

Features

•

Single Supply Voltage, Range 3V to 3.6V

•

3-Volt Only Read and Write Operation

•

Software Protected Programming

•

Low Power Dissipation

– 15 mA Active Current – 40 µA CMOS Standby Current

•

Fast Read Access Time - 150 ns

•

Sector Program Operation

– Single Cycle Reprogram (Erase and Program) – 512 Sectors (64 bytes / sec tor) – Internal Address and Data Latches for 64 Bytes

•

Fast Sector Program Cycle Time - 20 ms Max.

•

Internal Program Control and Timer

•

DAT A Polling for End of Program Detection

•

Typical Endurance > 10,000 Cycles

•

CMOS and TTL Compatible Inputs and Outputs

•

Commercial and Industrial Temperature Ranges

256K (32K x 8) 3-volt Only Flash Memory

Description

The AT29LV256 is a 3-volt-only in-system Flash Programmable Erasable Read Only Memory (PEROM). Its 256K of mem ory is orga nized as 32,768 words by 8 bi ts. Manufactured with Atmel ’s advanced nonvolatile CMOS technology , the device offers access times to 150 ns with power dissipation of just 54 mW over the commercial temperature range. When the device is deselected, the CMOS standby current is less than 40 µA. The device endurance is such that any sector can typically be written to in excess of 10,000 times.

(continued)

Pin Configurations

22 23 24 25 26 27 28 1 2 3 4 5 6 7

TSOP Top View

Type 1

A10

I/O7

I/O6

I/O5

I/O4

I/O3

GND

I/O2

I/O1

I/O0

Pin Name Function

A0 - A14 Addresses CE OE WE

Chip Enable Output En able

Write Enable I/O0 - I/O7 Data Inputs/Outputs NC No Connect DC Don’t Connect

PLCC Top View

A11

A8 A13 A14

VCC

A12

AT29LV256

I/O0

12 13

A12WEDC

VCC

A14

432

323130

14151617181920

I/O1

I/O2

I/O3

I/O4

GND

A13

29 28 27 26 25 24 23 22 21

I/O5

A8 A9 A11 NC OE A10 CE I/O7 I/O6

Rev. 0563B–10/98

To allow for simple in-system reprogrammability, the AT29LV256 does not require high input voltages for programming. Thre e-vol t-only c omman ds dete rmine th e operation of the device. Reading data out of the device is similar to reading from an EPROM. Reprogramming the AT29LV256 is performed on a sector basis; 64 bytes of data are loaded into the device and then simultaneou sly programmed.

Block Diagram

During a reprogram cycle, the address locations and 64 bytes of data are captured at microprocessor speed and internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the sector and then program the latched data using an internal control timer. The end of a program cycle can be detected by

polling of I/O7. Once the end of a program cy cl e has

DATA been detected, a new access for a read or program can begin.

Device Operation

READ:

When CE at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE control gives designers flexibility in preventing bus contention.

SOFTWARE DATA PROTECTION PROGRAMMING:

AT29LV256 has 512 individual secto rs, each 64 by tes. Using the software data protection feature, byte loads are used to enter the 64 bytes o f a sector to be programmed. The AT29LV256 can only be progr ammed or reprogrammed using the software data protection feature. The device is programmed on a se ctor basis. If a byte of data within the sect or is to be ch anged, dat a for the en tire 64byte sector must be loaded in to the device. The AT29LV256 automatically does a sector erase prior to loading the data into the sector. An erase command is not required.

Software data protection p rotec ts the dev ice from inadv ertent programming. A series of three program commands to specific addresses with specific data must be presented to the device before programming may occur. The same three program commands must begin each program operation. All software program co mmands must ob ey the sec tor program timing specifications. Power transitions will not reset

The AT29LV256 is ac cessed like an EPROM . and OE are low and WE is high, the data stored

or OE is high. This dual-line

The

the software data pr otection feature, however th e softwa re feature will guard against inadvertent program cycles during power transitions.

Any attempt to write to the device without the 3-byte command sequen ce will start the int ernal wri te tim ers. N o data will be written to the device; however, for the duration of

, a read operation will effectively be a polling operation.

After the software data protection’s 3-byte command code is given, a byte load is performed by applying a l ow pulse on the WE and OE

or WE, whichever occurs last. The data is latched by

CE the first rising edge of CE

The 64 bytes of data must be lo ade d into eac h sect or. Any byte that is not loaded during the programming of its sector will be erased to read FFh. Once the bytes of a sector are loaded into the device, they are simult aneously programmed during the internal programming period. After the first data byte h as been load ed in to the de vice, s ucces sive bytes are entered in the same manner. Each new byte to be programmed must ha ve its hi gh to low t ransiti on on WE (or CE) within 150 µs of the low to high transition of WE (or

) of the preceding byte. If a high to low transition is not

CE detected within 150 µs of t he la st lo w t o hig h tra ns ition, th e load period will end and the internal programming period

or CE input with CE or WE low (respectively)

high. The address is lat ched on the falling edge of

or WE.

AT29LV256

will start. A6 to A14 spec ify the sector ad dress . The sect or address must be valid during each high to low transition of

(or CE). A0 to A5 specify the byte addre ss within the

WE sector. The bytes may be loade d in any order; sequ ential loading is not required. Once a programming operation has been initiated, an d for the dura tion o f t

, a read operation

will effectively be a polling operation.

HARDWARE DATA PROTE CTION:

Hardware features protect against inadvertent programs to the AT29LV256 in the following ways: (a) V (typical), the program function is inhibited; (b) V delay—once V

has reached the VCC sense level, the

sense—if VCC is below 1.8V

power on

device will automa tically t ime out 10 ms (typic al) befo re programming; (c) Progr am inh ibit— ol ding an y one o f OE low, CE high or WE high inh ibits program cycles; and (d) Noise filter—p ulses of les s than 15 ns (t ypical) on th e

or CE inputs will not initiate a program cycle.

INPUT LEVELS:

supply, the address inputs and control inputs (OE

) may be driven from 0 to 5.5V without adversely affect-

While operati ng with a 3. 3V ±10% p ower

, CE and

ing the operation of the devic e. The I/O lin es can only be driven from 0 to 3.6 volts.

PRODUCT IDENTIFICATION:

The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external programmer to identify the correct programming algorithm for the Atmel product. In addi tion, users may wis h to use the software product identification mode to identify the part (i.e.

using the device code), and hav e the syst em softw are use the appropriate sector size for program operations. In this manner, the user can have a common board design for 256K to 4-megabit densities and, with each density’s sector size in a memory ma p, ha ve the sy st em s oft war e ap pl y th e appropriate sector size.

For details, see O perat ing Mode s (for ha rdware operat ion) or Software Product Identification. The manufacturer and device code is the same for both modes.

DATA

POLLING:

The AT29LV256 features DATA

polling to indicate the end of a program cycle. During a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. DATA

polling may

begin at any time during the program cycle.

TOGGLE BIT:

In addition to DATA

polling the AT29LV256 pr ovides anothe r meth od for determ ining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be read. Exami ning the to ggle bit may begin at any time during a program cycle.

OPTIONAL CHIP ERASE MODE:

The entire device can be erased by using a 6-byte software code. Please see Software Chip Erase application note for details.

Absolute Maximum Ratings*

Temperature Under Bias................................ -55°C to +125°C

Storage Temperature.....................................-65°C to +150°C

All Input Voltages (including NC Pins)

with Respect to Ground...................................-0.6V to +6.25V

All Output Voltages

with Respect to Ground.............................-0.6V to VCC + 0.6V

Voltage on A9 (including NC Pins)

with Respect to Ground...................................-0.6V to +13.5V

*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent damage to the de vic e. T his is a stres s r ating o nly an d functional opera tion of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reli abi li ty.

DC and AC Operating Range

AT29LV256-15 AT29LV256-20 AT29LV256-25

Operating Temperature (Case)

Power Supply 3.3V ± 0.3V 3.3V ± 0.3V 3.3V ± 0.3V

Com. 0°C - 70°C 0°C - 70°C 0°C - 70°C Ind. -40°C - 85°C -40°C - 85°C -40°C - 85°C

Operating Modes

Mode CE OE WE Ai I/O

Read V Program

(2)

Standby/Write Inhibit V

Program Inhibit X X V Program Inhibit X V Output Disable X V

IH (1)

Ai D Ai D

OUT

XXHigh Z

X XHigh Z

Product Identification

(3)

, A0 = V , A0 = V

Manufacturer Co de

Device Code

Manufacturer Co de Device Code

(4)

Hardware V

Software

Notes: 1. X can be V

(5)

or VIH.

A1 - A14 = VIL, A9 = V

A0 = V A0 = V

A1 - A14 = VIL, A9 = V

2. Refer to AC Programming Waveforms. = 12.0V ± 0.5V.

3. V

4. Manufacturer Code is 1F. The Device Code is BC.

5. See details under Software Product Identification Entry/Exit.

DC Characteristics

Symbol Parameter Condition Min Max Units

I I

SB1

Input Load Current VIN = 0V to V Output Leakage Current V

VCC Standby Current CMOS CE = V

= 0V to V

I/O

- 0.3V to V

1 µA

1 µA Com. 40 µA Ind. 50 µA

(4)

SB2

VCC Standby Current TTL CE = 2.0V to V V

Active Current f = 5 MHz; I

OUT

= 0 mA; VCC = 3.6V 15 mA

1mA

Input Low Voltage 0.6 V Input High Voltage 2.0 V Output Low Voltage IOL = 1.6 mA; VCC = 3.0V 0.45 V Output High Voltage IOH = -100 µA; VCC = 3.0V 2.4 V

AT29LV256

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