Rainbow Electronics AT29C256 User Manual

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Page 1

Features

• Fast Read Access Time – 70 ns

• 5-volt Only Reprogramming

• Page Program Operation

– Single Cycle Reprogram (Erase and Program) – Internal Address and Data Latches for 64 Bytes

• Internal Program Control and Timer

• Hardware and Software Data Protection

• Fast Program Cycle Times

– Page(64Byte)ProgramTime–10ms – Chip Erase Time– 10 ms

• DATA Polling for End of Program Detection

• Low-power Dissipation

– 50mAActiveCurrent –300 µA CMOS Standby Current

• Typical Endurance > 10,000 Cycles

• Single 5V ± 10% Supply

• CMOS and TTL Compatible Inputs and Outputs

• Commercial and Industrial Temperature Ranges

Description

The AT29C256 is a five-volt-only in-system Flash programmable and erasable read only memory (PEROM). Its 256K of memory is organized as 32,768 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 70 ns with power dissipation of just 275 mW. When the device is deselected, the CMOS standby current is less than 300 µA. The device endurance is such that any sector can typically be written to in excess of 10,000 times.

256K (32K x 8) 5-volt Only Flash Memory

AT29C256

Pin Configurations

Pin Name Function

A0 - A14 Addresses

I/O0 - I/O7 Data Inputs/Outputs

NC No Connect

DC Don’t Connect

PLCC and LCC Top View

Note: PLCC package pins 1 and 17 are

DON’T CONNECT.

Chip Enable

Output Enable

Write Enable

432

I/O0

14151617181920

I/O1

A12WEDC

I/O2

GND

VCC

A14

323130

I/O3

I/O4

A13

29 28 27 26 25 24 23 22 21

I/O5

A8 A9 A11 NC OE A10 CE I/O7 I/O6

DIP Top View

A12

I/O0 I/O1 I/O2

GND

TSOP Top View

A11

A13

A14

VCC

A12

A7 A6 A5 A4 A3 A2 A1 A0

1 2 3 4 5 6 7 8 9 10 11 12 13 14

Type 1

VCC

A14

A13

A11

A10

I/O7

I/O6

I/O5

I/O4

I/O3

A10

I/O7

I/O6

I/O5

I/O4

I/O3

GND

I/O2

I/O1

I/O0

Rev. 0046O–FLASH–06/02

Page 2

Block Diagram

To allow for simple in-system reprogrammability, the AT29C256 does not require high input voltages for programming. Five-volt-only commands determine the operation of the device. Reading data out of the device is similar to reading from a static RAM. Reprogramming the AT29C256 is performed on a page basis; 64 bytes of data are loaded into the device and then simultaneously programmed. The contents of the entire device may be erased by using a six-byte software code (although erasure before programming is not needed).

During a reprogram cycle, the address locations and 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the page and then program the latched data using an internal control timer. The end of a program cycle can be detected by DATA access for a read, program or chip erase can begin.

polling of I/O7. Once the end of a program cycle has been detected a new

Device Operation

READ: The AT29C256 is accessed like a static RAM. When CE and OE are low and

is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE

or OE is high. This dual-line control gives designers flexibility in preventing bus

contention.

BYTE LOAD: A byte load is performed by applying a low pulse on the WE with CE edge of CE CE software codes for data protection and chip erasure.

or WE low (respectively) and OE high. The address is latched on the falling

or WE, whichever occurs last. The data is latched by the first rising edge of

or WE. Byte loads are used to enter the 64 bytes of a page to be programmed or the

or CE input

AT29C256

0046O–FLASH–06/02

Page 3

AT29C256

PROGRAM: Thedeviceisreprogrammedonapagebasis.Ifabyteofdatawithina

page is to be changed, data for the entire page must be loaded into the device. Any byte that is not loaded during the programming of its page will be indeterminate. Once the bytes of a page are loaded into the device, they are simultaneously programmed during the internal programming period. After the first data byte has been loaded into the device, successive bytes are entered in the same manner. Each new byte to be programmed must have its high-to-low transition on WE high transition of WE

(or CE) of the preceding byte. If a high-to-low transition is not detected within 150 µs of the last low-to-high transition, the load period will end and the internal programming period will start. A6 to A14 specify the page address. The page address must be valid during each high-to-low transition of WE the byte address within the page. The bytes may be loaded in any order; sequential loading is not required. Once a programming operation has been initiated, and for the duration of t

, a read operation will effectively be a polling operation.

SOFTWARE DATA PROTECTION: A software controlled data protection feature is available on the AT29C256. Once the software protection is enabled a software algorithm must be issued to the device before a program may be performed. The software protection feature may be enabled or disabled by the user; when shipped from Atmel, the software data protection feature is disabled. To enable the software data protection, a series of three program commands to specific addresses with specific data must be performed. After the software data protection is enabled the same three program commands must begin each program cycle in order for the programs to occur. All software program commands must obey the page program timing specifications. Once set, the software data protection feature remains active unless its disable command is issued. Power transitions will not reset the software data protection feature, however the software feature will guard against inadvertent program cycles during power transitions.

(or CE) within 150 µs of the low-to-

(or CE). A0 to A5 specify

Once set, software data protection will remain active unless the disable command sequence is issued.

After setting SDP, any attempt to write to the device without the three-byte command sequence will start the internal write timers. No data will be written to the device; however, for the duration of t

, a read operation will effectively be a polling operation.

After the software data protection’s three-byte command code is given, a byte load is performed by applying a low pulse on the WE tively) and OE

high. The address is latched on the falling edge of CE or WE, whichever

occurs last. The data is latched by the first rising edge of CE

or CE input with CE or WE low (respec-

or WE. The 64 bytes of data must be loaded into each sector by the same procedure as outlined in the program section under device operation.

HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs to the AT29C256 in the following ways: (a) V (typical), the program function is inhibited; (b) V reached the V

sense level, the device will automatically time out 5 ms (typical) before

programming; (c) Program inhibit – holding any one of OE

sense – if VCCis below 3.8V

power on delay – once VCChas

low, CE high or WE high inhibits program cycles; and (d) Noise filter – pulses of less than 15 ns (typical) on the WE

or CE inputs will not initiate a program cycle.

0046O–FLASH–06/02

Page 4

PRODUCT IDENTIFICATION: The product identification mode identifies the device

and manufacturer and may be accessed by a hardware operation. For details, see Operating Modes or Product Identification.

DATA POLLING: The AT29C256 features DATA gram cycle. During a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. DATA begin at any time during the program cycle.

TOGGLE BIT: In addition to DATA determining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit may begin at any time during a program cycle.

OPTIONAL CHIP ERASE MODE: The entire device can be erased by using a six-byte software code. Please see Software Chip Erase application note for details.

Absolute Maximum Ratings*

Temperature Under Bias................................ -55°Cto+125°C

Storage Temperature ..................................... -65°Cto+150°C

All Input Voltages (including NC Pins)

with Respect to Ground ...................................-0.6V to +6.25V

All Output Voltages

with Respect to Ground .............................-0.6V to V

+0.6V

polling to indicate the end of a pro-

polling may

polling the AT29C256 provides another method for

*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Voltage on OE

with Respect to Ground ...................................-0.6V to +13.5V

AT29C256

0046O–FLASH–06/02

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DC and AC Operating Range

AT29C256

AT29C256-70 AT29C256-90 AT29C256-12 AT29C256-15

Operating Temperature (Case)

Power Supply 5V ± 5% 5V± 10% 5V± 10% 5V± 10%

Note:

Not recommended for New Designs.

Com. 0°C-70°C0°C-70°C0°C-70°C

Ind. -40°C-85°C-40°C-85°C-40°C-85°C

Operating Modes

Mode CE OE WE Ai I/O

Read V

Program

(2)

5V Chip Erase V

Standby/Write Inhibit V

Write Inhibit X X V

Write Inhibit X V

Output Disable X V

High Voltage Chip Erase V

Product Identification

Hardware

Software

(5)

Notes: 1. X can be VILor VIH.

2. Refer to AC Programming Waveforms.

3. V

= 12.0V ± 0.5V.

4. Manufacturer Code: 1F, Device Code: DC.

5. See details under Software Product Identification Entry/Exit.

(1)

(3)

Ai D

OUT

XXHighZ

XHighZ

A1-A14 = VIL,A9=VH,A0=VILManufacturer Code

XHighZ

A1-A14 = VIL,A9=VH,A0=VIHDevice Code

A0 = V

Manufacturer Code

Device Code

0°C-70°C

-40°C-85°C

(4)

DC Characteristics

Symbol Parameter Condition Min Max Units

SB1

SB2

OH1

OH2

0046O–FLASH–06/02

Input Load Current VIN=0VtoV

Output Leakage Current V

=0VtoV

I/O

VCCStandby Current CMOS CE =VCC-0.3VtoV

VCCStandby Current TTL CE =2.0VtoV

VCCActive Current f = 5 MHz; I

= 0 mA 50 mA

OUT

10 µA

300 µA

3mA

Input Low Voltage 0.8 V

Input High Voltage 2.0 V

Output Low Voltage IOL=2.1mA 0.45 V

Output High Voltage IOH=-400µA 2.4 V

Output High Voltage CMOS IOH=-100µA;VCC=4.5V 4.2 V

Page 6

AC Read Characteristics

Symbol Parameter

ACC

Note:

(1)

(2)

(3)(4)

Address to Output Delay 70 90 120 150 ns

CE to Output Delay 70 90 120 150 ns

OE to Output Delay 0 40 0 40 0 50 0 70 ns

CE or OE to Output Float 0 25 0 25 0 30 0 40 ns

Output Hold from OE,CEor Address, whichever occurred first

Not recommended for New Designs.

AC Read Waveforms

(1)(2)(3)(4)

AT29C256-70 AT29C256-90 AT29C256-12

AT29C256-15

Min Max

0000 ns

UnitsMin Max Min Max Min Max

Notes: 1. CE may be delayed up to t

2. OE

may be delayed up to tCE-tOEafter the falling edge of CE without impact on tCEor by t

without impact on t

3. t

is specified from OE or CE whichever occurs first (CL = 5 pF).

ACC

4. This parameter is characterized and is not 100% tested.

AT29C256

ACC-tCE

after the address transition without impact on t

ACC

ACC-tOE

after an address change

0046O–FLASH–06/02

Page 7

Input Test Waveforms and Measurement Level

tR,tF<5ns

Output Test Load

Pin Capacitance

f=1MHz,T=25°C

(1)

AT29C256

Symbol Typ Max Units Conditions

OUT

Note: 1. This parameter is characterized and is not 100% tested.

46pFV

812pFV

OUT

=0V

0046O–FLASH–06/02

Page 8

AC Byte Load Characteristics

Symbol Parameter Min Max Units

AS,tOES

DH,tOEH

WPH

Address, OE Set-up Time 0 ns

Address Hold Time 50 ns

Chip Select Set-up Time 0 ns

Chip Select Hold Time 0 ns

Write Pulse Width (WE or CE)90ns

Data Set-up Time 35 ns

Data, OE Hold Time 0 ns

Write Pulse Width High 100 ns

AC Byte Load Waveforms

WE Controlled

Controlled

AT29C256

0046O–FLASH–06/02

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AT29C256

Program Cycle Characteristics

Symbol Parameter Min Max Units

BLC

WPH

WriteCycleTime 10 ms

Address Set-up Time 0 ns

Address Hold Time 50 ns

Data Set-up Time 35 ns

Data Hold Time 0 ns

Write Pulse Width 90 ns

Byte Load Cycle Time 150 µs

Write Pulse Width High 100 ns

Program Cycle Waveforms

(1)(2)(3)

Notes: 1. A6 through A14 must specify the page address during each high-to-low transition of WE (or CE).

2. OE

must be high when WE and CE are both low.

3. All bytes that are not loaded within the page being programmed will be indeterminate.

0046O–FLASH–06/02

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Software Data Protection Enable Algorithm

(1)

Software Data Protection Disable Algorithm

(1)

LOAD DATA AA

ADDRESS 5555

LOAD DATA 55

ADDRESS 2AAA

LOAD DATA A0

ADDRESS 5555

LOAD DATA

PAGE (64 BYTES)

WRITES ENABLED

ENTER DATA

(4)

PROTECT STATE

Notes: 1. Data Format: I/O7 - I/O0 (Hex);

Address Format: A14 - A0 (Hex).

2. Data Protect state will be re-activated at end of program cycle.

3. Data Protect state will be deactivated at end of program period.

4. 64 bytes of data MUST BE loaded.

LOAD DATA AA

ADDRESS 5555

LOAD DATA 55

ADDRESS 2AAA

LOAD DATA 80

(2)

ADDRESS 5555

LOAD DATA AA

ADDRESS 5555

LOAD DATA 55

ADDRESS 2AAA

LOAD DATA 20

ADDRESS 5555

EXIT DATA PROTECT STATE

(3)

LOAD DATA

Software Protected Program Cycle Waveform

PAGE (64 BYTES)

(1)(2)(3)

(4)

Notes: 1. A6 through A14 must specify the page address during each high-to-low transition of WE (or CE) after the software code has

been entered.

2. OE

must be high when WE and CE arebothlow.

3. All bytes that are not loaded within the page being programmed will be indeterminate.

AT29C256

0046O–FLASH–06/02

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AT29C256

Data Polling Characteristics

(1)

Symbol Parameter Min Typ Max Units

OEH

Data Hold Time 0 ns

OE Hold Time 10 ns

OE to Output Delay

(2)

Write Recovery Time 0 ns

Notes: 1. These parameters are characterized and not 100% tested.

2. See t

spec in AC Read Characteristics.

Data Polling Waveforms

Toggle Bit Characteristics

(1)

Symbol Parameter Min Typ Max Units

OEH

OEHP

Data Hold Time 0 ns

OE Hold Time 10 ns

OE to Output Delay

(2)

OE High Pulse 150 ns

Write Recovery Time 0 ns

Notes: 1. These parameters are characterized and not 100% tested.

2. See t

Toggle Bit Waveforms

spec in AC Read Characteristics.

(1)(2)(3)

Notes: 1. Toggling either OE or CE or both OE and CE will operate toggle bit.

2. Beginning and ending state of I/O6 will vary.

3. Any address location may be used but the address should not vary.

0046O–FLASH–06/02

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Software Product Identification Entry

(1)

Software Product Identification Exit

(1)

LOAD DATA AA

ADDRESS 5555

LOAD DATA 55

ADDRESS 2AAA

LOAD DATA 90

ADDRESS 5555

PAUSE 10 mS ENTER PRODUCT

IDENTIFICATION MODE

Notes: 1. Data Format: I/O7 - I/O0 (Hex);

Address Format: A14 - A0 (Hex).

2. A1 - A14 = V

Manufacturer Code is read for A0 = V Device Code is read for A0 = V

3. The device does not remain in identification mode if powered down.

4. The device returns to standard operation mode.

5. Manufacturer Code is 1F. The Device Code is DC.

(2)(3)(5)

LOAD DATA AA

ADDRESS 5555

LOAD DATA 55

ADDRESS 2AAA

LOAD DATA F0

ADDRESS 5555

PAUSE 10 mS EXIT PRODUCT

;

IDENTIFICATION

(4)

MODE

AT29C256

0046O–FLASH–06/02

Page 13

AT29C256

NORMALIZED SUPPLY CURRENT

vs. TEMPERATURE

1.4

N O

1.3

R M

1.2

A L

1.1

Z E

1.0

0.9

C C

0.8

-55

1.1

N O R

1.0

M A L

0.9

Z E D

0.8

I C C

0.7 0

-25 5 35 65 95 125

TEMPERATURE (C)

NORMALIZED SUPPLY CURRENT

vs. ADDRESS FREQUENCY

= 5V

T = 25C

1234567

FREQUENCY (MHz)

0046O–FLASH–06/02

NORMALIZED SUPPLY CURRENT

vs. SUPPLY VOLTAGE

1.4

N O R

1.2

M A L

1.0

Z E D

0.8

I C C

0.6

4.50

4.75 5.00 5.25 5.50

SUPPLY VOLTAGE (V)

Page 14

Ordering Information

ACC

(ns)

70 50 0.3 AT29C256-70JC

90 50 0.3 AT29C256-90JC

120 50 0.3 AT29C256-12JC

150 50 0.3 AT29C256-15JC

(mA)

Ordering Code Package Operation RangeActive Standby

AT29C256-70PC AT29C256-70TC

AT29C256-70JI AT29C256-70TI

AT29C256-90PC AT29C256-90TC

AT29C256-90JI AT29C256-90PI AT29C256-90TI

AT29C256-12PC AT29C256-12TC

AT29C256-12JI AT29C256-12PI AT29C256-12TI

AT29C256-15PC AT29C256-15TC

AT29C256-15JI AT29C256-15PI AT29C256-15TI

32J 28P6 28T

32J 28T

32J 28P6 28T

Commercial (0° to 70°C)

Industrial

(-40° to 85°C)

Commercial (0° to 70°C)

Industrial

(-40° to 85°C)

Commercial (0° to 70°C)

Industrial

(-40° to 85°C)

Commercial (0° to 70°C)

Industrial

(-40° to 85°C)

Note:

32J 32-lead, Plastic J-leaded Chip Carrier (PLCC)

28P6 28-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)

28T 28-lead, Plastic Thin Small Outline Package (TSOP)

Not recommended for New Designs.

Package Type

AT29C256

0046O–FLASH–06/02

Page 15

Packaging Information

32J – PLCC

AT29C256

1.14(0.045) X 45˚

0.51(0.020)MAX

45˚ MAX (3X)

Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE.

2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line.

3. Lead coplanarity is 0.004" (0.102 mm) maximum.

PIN NO. 1 IDENTIFIER

1.14(0.045) X 45˚

E1 E

0.318(0.0125)

0.191(0.0075)

COMMON DIMENSIONS

(Unit of Measure = mm)

SYMBOL

A 3.175 – 3.556

A1 1.524 – 2.413

A2 0.381 – –

D 12.319 – 12.573

D1 11.354 – 11.506 Note 2

D2 9.906 – 10.922

E 14.859 – 15.113

E1 13.894 – 14.046 Note 2

E2 12.471 – 13.487

B 0.660 – 0.813

B1 0.330 – 0.533

e 1.270 TYP

MIN

NOM

MAX

NOTE

10/04/01

2325 Orchard Parkway

San Jose, CA 95131

0046O–FLASH–06/02

TITLE

32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)

DRAWING NO.

32J

REV.

Page 16

28P6 – PDIP

REF

SEATING PLANE

0º ~ 15º

Notes: 1. This package conforms to JEDEC reference MS-011, Variation AB.

2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").

TITLE

2325 Orchard Parkway

San Jose, CA 95131

28P6, 28-lead (0.600"/15.24 mm Wide) Plastic Dual Inline Package (PDIP)

COMMON DIMENSIONS

(Unit of Measure = mm)

SYMBOL

A – – 4.826

A1 0.381 – –

D 36.703 – 37.338 Note 2

E 15.240 – 15.875

E1 13.462 – 13.970 Note 2

B 0.356 – 0.559

B1 1.041 – 1.651

L 3.048 – 3.556

C 0.203 – 0.381

eB 15.494 – 17.526

e 2.540 TYP

MIN

NOM

MAX

DRAWING NO.

28P6

NOTE

09/28/01

REV.

AT29C256

0046O–FLASH–06/0 2

Page 17

28T – TSOP

AT29C256

PIN 1

Pin 1 Identifier

Notes: 1. This package conforms to JEDEC reference MO-183.

2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.

3. Lead coplanarity is 0.10 mm maximum.

0º ~ 5º

SEATING PLANE

SYMBOL

GAGE PLANE

COMMON DIMENSIONS

(Unit of Measure = mm)

MIN

A ––1.20

A1 0.05 – 0.15

A2 0.90 1.00 1.05

D 13.20 13.40 13.60

D1 11.70 11.80 11.90 Note 2

E 7.90 8.00 8.10 Note 2

L 0.50 0.60 0.70

L1 0.25 BASIC

b 0.17 0.22 0.27

c 0.10 – 0.21

e 0.55 BASIC

NOM

MAX

NOTE

2325 Orchard Parkway

San Jose, CA 95131

0046O–FLASH–06/02

TITLE

28T, 28-lead (8 x 13.4 mm Package) Plastic Thin Small Outline

Package, Type I (TSOP)

DRAWING NO.

28T

10/18/01

REV.

Page 18

Atmel Headquarters Atmel Operations

Corporate Headquarters

2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 487-2600

Europe

Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland TEL (41) 26-426-5555 FAX (41) 26-426-5500

Asia

Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong TEL (852) 2721-9778 FAX (852) 2722-1369

Japan

9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL (81) 3-3523-3551 FAX (81) 3-3523-7581

Memory

2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 436-4314

Microcontrollers

2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 436-4314

La Chantrerie BP 70602 44306 Nantes Cedex 3, France TEL (33) 2-40-18-18-18 FAX (33) 2-40-18-19-60

ASIC/ASSP/Smart Cards

Zone Industrielle 13106 Rousset Cedex, France TEL (33) 4-42-53-60-00 FAX (33) 4-42-53-60-01

1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 1(719) 576-3300 FAX 1(719) 540-1759

Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland TEL (44) 1355-803-000 FAX (44) 1355-242-743

RF/Automotive

Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany TEL (49) 71-31-67-0 FAX (49) 71-31-67-2340

1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 1(719) 576-3300 FAX 1(719) 540-1759

Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom

Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France TEL (33) 4-76-58-30-00 FAX (33) 4-76-58-34-80

e-mail

literature@atmel.com

Web Site

http://www.atmel.com

Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems.

AT ME L®is the registered trademark of Atmel.

Other terms and product names may be the trademarks of others.

Printed on recycledpaper.

0046O–FLASH–06/02 xM