Rainbow Electronics AT27C4096 User Manual

Features

•

Fast Read Access Time - 55 ns

•

Low Power CMOS Operation

– 100 µA Maximum Standby
– 40 mA Maximum Active at 5 MHz

•

JEDEC Standard Packages

– 40-Lead 600 mil PDIP
– 44-Lead PLCC
– 40-Lead VSOP (10 mm x 14 mm)

•

Direct Upgrade from 512K-bit, 1M-bit, and 2M-bit
(AT27C516, AT27C1024, and AT27C2048) EPROMs

±±±±

•

5V

10% Power Supply

•

High Reliability CMOS Technology

– 2,000V ESD Protection
– 200 mA Latchup Immunity

•

Rapid™ Programming Algorithm - 50 µs/word (typical)

•

CMOS and TTL Compatible Inputs and Outputs

•

Integrated Product Identification Code

•

Commercial and Industrial Temperature Ranges

Description

The AT27C4096 is a low-power, high-performance 4,194,304-bit one-time program­mable read only memor y (OTP EP ROM) or ganiz ed 256K by 16 bits . It re quires a sin­gle 5V power su pply i n norma l read mode o peratio n. Any word c an be a ccessed in

(continued)

Pin Configurations

Pin Name Function

A0 - A17 Addresses
O0 - O15 Outputs
CE
OE
NC No Connect

Note: Both GND pins must be connected.

Chip Enable
Output Enable

O12
O11
O10

O9
O8

GND

NC
O7
O6
O5
O4

PLCC Top View

O13

O14

O15CEVPPNCVCC

65432

7
8
9
10
11
12
13
14
15
16
17

1819202122232425262728

O3O2O1

O0

OE

1

NC

A17

4443424140

A0A1A2A3A4

A16

A15

A14

39
38
37
36
35
34
33
32
31
30
29

A13
A12
A11
A10
A9
GND
NC
A8
A7
A6
A5

4-Megabit
(256K x 16)
OTP EPROM

AT27C4096

PDIP Top View

1

VPP

2

CE

3

O15

4

O14

5

O13

6

O12

7

O11

8

O10

9

O9

10

O8

11

GND

12

O7

13

O6

14

O5

15

O4

16

O3

17

O2

18

O1

19

O0

20

OE

VSOP Top View

40

VCC

39

A17

38

A16

37

A15

36

A14

35

A13

34

A12

33

A11

32

A10

31

A9

30

GND

29

A8

28

A7

27

A6

26

A5

25

A4

24

A3

23

A2

22

A1

21

A0

A10
A11
A12
A13
A14
A15
A16

A17
VCC
VPP

O15

O14

O13

O12

O11

O10

1

A9

2
3
4
5
6
7
8
9
10
11
12

CE

13
14
15
16
17
18
19

O9

20

O8

Type 1

40

GND

39

A8

38

A7

37

A6

36

A5

35

A4

34

A3

33

A2

32

A1

31

A0

30

OE

29

O0

28

O1

27

O2

26

O3

25

O4

24

O5

23

O6

22

O7

21

GND

Rev. 0311F–10/98

1

less than 55 ns, eliminating the need for speed-reducing
WAIT states. The by-16 organization makes this part ideal
for high-performance 16- and 32-bit microprocessor sys­tems.

In read mode, the AT27C4096 typically consumes 15 mA.
Standby mode supply current is typically less than 10 µA.

The AT27C4096 is available in industry standard
JEDEC-approved one-tim e programmable (OTP) plastic
PDIP, PLCC, and VSOP packages . The device features
two-line control (CE
high-speed systems.

With high density 256K word storage capability, the
AT27C4096 allows firmware to be stored reliably and to be
accessed by the system without the delays of mass storage
media.

Atmel’s AT27C4096 has additional features that ensure
high quality and efficient productio n use. The Rapid
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Program­ming time is typically only 50 µs/word. The Integrated Prod­uct Identif ication Code ele ctronica lly iden tifies the dev ice

, OE) to eliminate bus contention in

™

Pro-

Block Diagram

and manufacturer. This feature is used by industry stan­dard programming equipment to select the proper program­ming algorithms and voltages.

System Considerations

Switching between active and standby conditions via the
Chip Enable pin may produ ce tra ns ien t vo ltag e ex cu rs i ons .
Unless accommodated by the system design, these tran­sients may exceed data sheet limits, resulting in device
non-conforma nce. At a min imum, a 0. 1 µF high fr equency ,
low inherent inductance, ceramic capacitor should be uti­lized for each device. This capacitor should be connected
between the V
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the V
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.

and Ground terminals of the device, as

CC

and Ground

CC

2

AT27C4096

Absolute Maximum Ratings*

Temperature Under Bias................................ -55°C to +125°C

Storage Temperature..................................... -65°C to +150°C

Voltage on Any Pin with

Respect to Ground .........................................-2.0V to +7.0V

Voltage on A9 with

Respect to Ground ......................................-2.0V to +14.0V

AT27C4096

*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam­age to the dev ice . This is a s tress rating only an d
functional oper ation of the de vi ce at these or any

(1)

(1)

other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions f or e xtended periods ma y af fect de vice
reliability .

VPP Supply Voltage with

Respect to Ground .......................................-2.0V to +14.0V

(1)

Note: 1. Maximum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is

V

+ 0.75V dc which may overshoot to +7.0V for pulses of less than 20 ns.

CC

Operating Modes

Mode/Pin CE OE Ai V

Read V

IL

Output Disable X V
Standby V
Rapid Program

(2)

PGM Verify V
PGM Inhibit V

Product Identification

(4)

IH

V

IL

IH

IH

V

IL

V

IL

IH

Ai X

XXHigh Z

XXX

V

IH

V

IL

V

IH

V

IL

Ai V
Ai V

XV

A9 = V

(3)

H

A0 = VIH or VIL
A1 - A17 = V

IL

Notes: 1 . X can be VIL or VIH.

2. Refer to the Programming characteristics.
= 12.0 ± 0.5V.

3. V

H

4. Two identifier w ord s may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is to ggl ed

low (V

5. Standby V

) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word.

IL

current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB.

CC

V

Outputs

PP

(1)

D

OUT

(5)

High Z
D

PP

PP

PP

CC

IN

D

OUT

High Z

Identification Code

3

DC and AC Operating Conditions for Read Operation

AT27C4096

-55 -70 -90 -12 -15

Operating
Temperature (Case)

V

Power Supply 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10%

CC

Com. 0°C - 70°C0°C - 70°C0°C - 70°C0°C - 70°C0°C - 70°C

Ind. -40°C - 85°C-40°C - 85°C-40°C - 85°C-40°C - 85°C-40°C - 85°C

DC and Operating Characteristics for Read Operation

Symbol Parameter Condition Min Max Units

I

LI

I

LO

(2)

I

PP1

I

SB

I

CC

V

IL

V

IH

V

OL

V

OH

Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.

Input Load Current VIN = 0V to V
Output Leakage Current V

(1)

V

Read/Standby Current VPP = V

PP

(1)

V

Standby Current

CC

= 0V to V

OUT

I

(CMOS)

SB1

CE = V
I

(TTL)

SB2

CC

CC

± 0.3V

CE = 2.0 to V

VCC Active Current f = 5 MHz, I

CC

CC

+ 0.5V

CC

= 0 mA, CE = V

OUT

IL

± 1 µA
± 5 µA

10 µA

100 µA

1mA

40 mA
Input Low Voltage -0.6 0.8 V
Input High Voltage 2.0 VCC + 0.5 V
Output Low Voltage IOL = 2.1 mA 0.4 V
Output High Voltage I

= -400 µA2.4V

OH

2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP.

AC Characteristics for Read Operat ion

-55 -70 -90 -12 -15

Symbol Parameter Condition

t

t
t

t

t

ACC

CE

OE

DF

OH

(3)

(2)

(2)(3)

(4)(5)

(4)

Address to Output
Delay

CE to Output Delay OE = V
OE to Output Delay CE = V
OE or CE High to Output Float,

whichever occurred f irst
Output Hold from Address, CE or OE,

whichever occurred f irst

CE = OE

= V

IL

IL

IL

Note: 2, 3, 4, 5. See the AC Waveforms for Read Operation diagram.

4

AT27C4096

Min Max Min Max Min Max Min Max Min Max

55 70 90 120 150 ns

55 70 90 120 150 ns
20 30 35 40 50 ns

20 20 20 30 35 ns

77000ns

AT27C4096

Units

AT27C4096

OUTPUT

PIN

1.3V
(1N914)

3.3K

CL

AC Waveforms for Read Operation

Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.

2. OE

3. OE may be delayed up to t

4. This parameter is only sampled and is not 100% tested.

5. Output float is defined as the point when data is no longer driven.

may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.

- tOE after the address is valid without impact on t

ACC

Input Test Waveforms and

(1)

.

ACC

Output Test Load

Measurement Levels

For -55 de vices only:

tR, tF < 5 ns (10% to 90%)

For -70, -90, -12 and -15 devices:

, tF < 20 ns (10% to 90%)

t

R

Note: CL = 100 pF incl udi ng j ig ca pac ita nc e, except for the -45

and -55 devices, where CL = 30 pF.

Pin Capacitance

f = 1 MHz, T = 25°C

Symbol Ty p Max Units Conditions

C

IN

C

OUT

Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.

(1)

410pFV
812pFV

IN

OUT

= 0V

= 0V

5

Programming Waveforms

(1)

Notes: 1. The Input Timing Refe rence is 0.8V for VIL and 2.0V for VIH.

2. tOE and t

are characteristics of the device but must be accommodated by the programmer.

DFP

3. When programming the AT27C4096, a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage
transients.

DC Programming Characteristics

TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V

Symbol Parameter T est Condit ions

I

LI

V

IL

V

IH

V

OL

V

OH

I

CC2

I

PP2

V

ID

Input Load Current VIN = VIL, V

IH

Input Low Level -0.6 0.8 V
Input High Level 2.0 V
Output Low Voltage IOL = 2.1 mA 0.4 V
Output High Voltage IOH = -400 µA2.4 V
VCC Supply Current

(Program and Verify)
VPP Supply Current CE = V

IL

A9 Product Identification Voltage 11.5 12.5 V

Limits

10

±

+

0.7

CC

50 mA

30 mA

UnitsMin Max

A

µ

V

6

AT27C4096

AC Programming Characteristics

TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V

Symbol Parameter Test Conditions

AT27C4096

Limits

(1)

UnitsMin Max

t

AS

t

OES

t

DS

t

AH

t

DH

t

DFP

t

VPS

t

VCS

t

PW

t

OE

t

PRT

Notes: 1. V

Address Setup Time
OE Setup Time 2 µs
Data Setup Time 2 µs

Input Rise and Fall Times :

(10% to 90%) 20 ns

Address Hold Time 0 µs
Data Hold Time 2 µs
OE High to Output Float Delay

(2)

VPP Setup Time 2 µs
VCC Setup Time 2 µs
CE Program Pulse Width

(3)

Data Valid from OE 150 ns

Input Pulse Levels:

0.45V to 2.4V

Input Timing Reference Level:

0.8V to 2.0 V

Output Timing Reference Level:

0.8V to 2.0 V
VPP Pulse Rise Time During
Programming

must be applied simultaneously or before VPP and removed simultaneously or after VPP.

CC

2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
—see timing diagram.

3. Program Pulse width tolerance is 50 µsec ± 5%.

Atmel’s 27C4096 Intergrated Product Identification Code

Pins

Codes

2 µs

0 130 ns

47.5 52.5 µs

50 ns

Hex DataA0 O15-O8 O7 O6 O5 O4 O3 O2 O1 O0

Manufacturer 0 0 00011110001E
Device Type 1 0 1111010000F4

7

Rapid Programming Algorithm

A 50 µs CE pulse width is used to pr ogram . Th e add re ss is
set to the first loca tion. V
raised to 13.0V. Each address is first programmed with one
50 µs CE
tion/reprogramming loop is execu ted for ea ch address . In
the event a word fails to pass verifi catio n, up to 10 s ucces­sive 50 µs pulses are applied with a verification after each

pulse without verification. Then a verifica-

is raised to 6. 5V and VPP is

CC

pulse. If the word fails to verify after 10 p ulses have be en
applied, the part is considered failed. After the word verifies
properly, the next address is selected until all have been
checked. V
words are read again and compared with the original data
to determine if the device passes or fails.

is then lowered to 5.0V and VCC to 5.0V. All

PP

8

AT27C4096

Ordering Information

I

(mA)

CC

t

(ns)

ACC

55 40 0.1 AT27C4096-55JC

40 0.1 AT27C4096-55JI

70 40 0.1 AT27C4096-70JC

40 0.1 AT27C4096-70JI

90 40 0.1 AT27C4096-90JC

40 0.1 AT27C4096-90JI

120 40 0.1 AT27C4096-12JC

40 0.1 AT27C4096-12JI

150 40 0.1 AT27C4096-15JC

40 0.1 AT27C4096-15JI

Ordering Code Package Operation RangeActive Standby

AT27C4096-55PC
AT27C4096-55VC

AT27C4096-55PI
AT27C4096-55VI

AT27C4096-70PC
AT27C4096-70VC

AT27C4096-70PI
AT27C4096-70VI

AT27C4096-90PC
AT27C4096-90VC

AT27C4096-90PI
AT27C4096-90VI

AT27C4096-12PC
AT27C4096-12VC

AT27C4096-12PI
AT27C4096-12VI

AT27C4096-15PC
AT27C4096-15VC

AT27C4096-15PI
AT27C4096-15VI

44J
40P6
40V

44J
40P6
40V

44J
40P6
40V

44J
40P6
40V

44J
40P6
40V

44J
40P6
40V

44J
40P6
40V

44J
40P6
40V

44J
40P6
40V

44J
40P6
40V

AT27C4096

Commercial

(0°C to 70°C)

Industrial

(-40°C to 85°C)

Commercial

(0°C to 70°C)

Industrial

(-40°C to 85°C)

Commercial

(0°C to 70°C)

Industrial

(-40°C to 85°C)

Commercial

(0°C to 70°C)

Industrial

(-40°C to 85°C)

Commercial

(0°C to 70°C)

Industrial

(-40°C to 85°C)

Package Type

44J 44-Lead, Plastic J-Leaded Chip Carrier (PLCC)
40P6 40-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
40V 40-Lead, Plastic Thin Small Outline Package (VSOP) 10 x 14 mm

9

Packaging Information

44J

, 44-Lead, Plastic J-Leaded Chip Carrier (PLCC)

Dimensions in Inches and (Millimeters)

JEDEC STANDARD MS-018 AC

.045(1.14) X 45°

.032(.813)
.026(.660)

.050(1.27) TYP

PIN NO.1
IDENTIFY

.500(12.7) REF SQ

.045(1.14) X 30° - 45°

.656(16.7)

SQ

.650(16.5)

.695(17.7)

SQ

.685(17.4)

.022(.559) X 45° MAX (3X)

.012(.305)
.008(.203)

.630(16.0)
.590(15.0)

.021(.533)
.013(.330)

.043(1.09)
.020(.508)

.120(3.05)

.090(2.29)
.180(4.57)
.165(4.19)

40P6

, 40-Lead, 0.600" Wide, Plastic Dual Inline
Package (PDIP)
Dimensions in Inches and (Millimeters)

JEDEC STANDARD MS-011 AC

2.07(52.6)

.220(5.59)

SEATING

PLANE

MAX

.161(4.09)
.125(3.18)

.110(2.79)
.090(2.29)

.012(.305)
.008(.203)

2.04(51.8)

1.900(48.26) REF

.065(1.65)
.041(1.04)

.630(16.0)
.590(15.0)

.690(17.5)
.610(15.5)

PIN

0

REF

15

1

.566(14.4)
.530(13.5)

.090(2.29)

.005(.127)

.065(1.65)
.015(.381)

.022(.559)
.014(.356)

MAX

MIN

40V

, 40-Lead, Plastic Thin Small Outline Package
(TSOP)
Dimensions in Millimeters and (Inches)

JEDEC OUTLINE MO-142 CA

10

AT27C4096

AT27C4096

11

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Corporate Headquarters

2325 Orchard Parkway
San Jose, CA 95131
TEL [phone]
FAX [phone]

Europe

Atmel U.K., Ltd.
Coliseum Business Centre
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TEL [phone]
FAX [phone]

Asia

Atmel Asia, Ltd.
Room 1219
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TEL [phone]
FAX [phone]

Japan

Atmel Japan K.K.
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Japan
TEL [phone]
FAX [phone]

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Colorado Springs, CO 80906
TEL [phone]
FAX [phone]

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Zone Indu strie lle
13106 Rousset Cedex, France
TEL [phone]
FAX [phone]

Fax-on-Demand

North America:
1-[phone]

International:
1-[phone]

e-mail

[e-mail]

Web Site

http://www.atmel.com

BBS

1-[phone]

© Atmel Corporation 1998.

Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard war­ranty which is detailed in Atmel’s Terms and Conditions located on the Company’s website. The Company assumes no responsibility for
any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without
notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual prop­erty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are
not authorized for use as critical components in life support devices or systems.

®

Marks bearing
Ter ms and product names in this document may be trademarks of others.

and/or ™ are registered trademarks and trademarks of Atmel Corporation.

Printed on recycled paper.

0311F–10/98/xM