Rapid™ Programming Algorithm - 100 µs/b y te (typic al)
•
CMOS and TTL Compatible Inputs and Outputs
– JEDEC Standard for LVTTL and LVBO
•
Integrated Product Identification Code
•
Commercial and Industrial Temperature Ranges
256K (32K x 8)
Unregulated
Battery-Voltage
High Speed
OTP EPROM
™
Description
The AT27BV256 is a high performance, low power, low voltage 262,144-bit one-time
programmable re ad only memory (OTP EP ROM) organized as 32 K by 8 bits. It
requires only one suppl y in t he ran ge of 2. 7V to 3. 6V in norma l rea d mode o perat ion,
making it ideal for fast, portable systems using either regulated or unregulated battery
power.
Pin Configurations
Pin NameFunction
A0 - A14Addresses
O0 - O7Outputs
CE
OE
NCNo Connect
A6
A5
A4
A3
A2
A1
A0
NC
O0
Note: PLCC package pins 1 and 17 are
DON’T CONNECT.
Chip Enable
Output En able
PLCC Top View
A7
A12
VPPNCVCC
432
1
5
6
7
8
9
10
11
12
13
14151617181920
O1
323130
O2
O3O4O5
NC
GND
A14
A13
29
28
27
26
25
24
23
22
21
A8
A9
A11
NC
OE
A10
CE
O7
O6
OE
A11
A13
A14
VCC
VPP
A12
SOIC Top View
VPP
A12
O0
O1
O2
GND
1
2
3
A7
4
A6
5
A5
6
A4
7
A3
8
A2
9
A1
10
A0
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TSOP Top View
Type 1
22
23
24
A9
25
A8
26
27
28
1
2
3
A7
4
A6
5
A5
6
A4
7
A3
(continued)
VCC
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
21
A10
20
CE
19
O7
18
O6
17
O5
16
O4
15
O3
14
GND
13
O2
12
O1
11
O0
10
A0
9
A1
8
A2
AT27BV256
Rev. 0601B–10/98
1
Atmel’s innovative desi gn techniques provide fast sp eeds
that rival 5V parts while keepi ng the lo w power con sumption of a 3V supply. At V
= 2.7V, any word can be
CC
accessed in less than 70 ns. With a typical power dissipation of only 18 mW at 5 MHz and V
= 3V, the AT27BV256
CC
consumes less than one fifth the power of a standard 5V
EPROM.
Standby mode supply current is typically less than 1 µA at
3V. The AT27BV256 simplifies system design an d
stretches battery lif etime even further by el iminating the
need for power supply regulation.
The AT27BV256 is available in industry standard JEDECapproved one-time programmable (OTP) plastic PLCC,
SOIC and TSOP packages. All devices feature two-line
control (CE
, OE) to give designers the flexibility to prevent
bus contention.
The AT27BV256 op eratin g with V
at 3.0V produces TTL
CC
level outputs that are compatible with standard TTL logic
devices operati ng at V
= 5.0V. At VCC = 2.7V, the part is
CC
compatible with JEDEC approved low voltage battery operation (LVBO) interface specifications. T he device is als o
capable of standard 5-volt operation making it ideally suited
for dual sup ply rang e system s or car d produc ts that are
pluggable in both 3-volt and 5-volt hosts.
Atmel’s AT27BV 256 h as a dditio nal f eatures to en sur e hig h
quality and efficient producti on use. The Rapi d™ Progra m-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 100 µs/byte. The Integrated Product
Identification Code electronically identifi es the device and
manufacturer. This feature is used by industry standard
programming eq uipme nt to sele ct the prop er program ming
algorithms and voltages. The AT27BV256 programs
exactly the same way as a standard 5V AT27C256R and
uses the same programming equipment.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produ ce tra ns ien t vo ltag e ex cu rs i ons .
Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device
non-conforman ce. At a mini mum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected
between the V
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the V
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
and Ground terminals of the device, as
CC
and Ground
CC
Block Diagram
2
AT27BV256
Absolute Maximum Ratings*
Temperature Under Bias.................................. -40°C to +85°C
Storage Temperature..................................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground ........................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
(1)
AT27BV256
*NOTICE:Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the de vic e. T his is a stres s r ating o nly an d
functional opera tion of the device at these or an y
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
(1)
conditions for extended periods may affect
device reli abi li ty
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
Note:1.Minimum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
+ 0.75V dc which may be exceeded if certain precautions are observed (consult application notes) and which may
V
CC
overshoot to +7.0V for pulses of less than 20 ns.
Operating Modes
Mode \ PinCEOEAiV
(2)
Read
Output Disable
Standby
Rapid Program
PGM Verify
(2)
(2)
(3)
(3)
Optional PGM Verify
PGM Inhibit
(3)
Product Identification
Notes:1 . X can be V
(3)
(3)(5)
IL
or VIH.
V
IL
V
IL
V
IH
V
IL
V
IL
V
IH
AiV
(1)
X
XXVCCV
V
IH
AiV
XVILAiV
V
IL
V
IH
V
IL
V
IL
V
IH
V
IL
AiV
XVPPV
A9 = V
(4)
H
A0 = VIH or VIL
A1 - A14 = V
IL
2. Read, output disable, and standby modes require, 2.7 V ≤ VCC ≤ 3.6V, or 4.5V ≤ VCC ≤ 5.5V.
3. Refer to Programming C haracteristics. Programming modes require VCC = 6.5V.
= 12.0 ± 0.5V.
4. V
H
5. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggle d low
) to select the Manufacturers’ Identification byte and high (VIH) to select the Device Code byte.