Rainbow Electronics AT25F1024A User Manual

Features

• Serial Peripheral Interface (SPI) Compatible

• Supports SPI Modes 0 (0,0) and 3 (1,1)

– Datasheet Describes Mode 0 Operation

• 20 MHz Clock Rate

• Byte Mode and 256-byte Page Mode for Program Operations

• Sector Architecture:

– Four Sectors with 32K Bytes Each (1M)
– 128 Pages per Sector

• Product Identification Mode

• Low-voltage Operation

– 2.7 (V

• Sector Write Protection

• Write Protect (WP) Pin and Write Disable Instructions for

both Hardware and Software Data Protection

• Self-timed Program Cycle (20 µs/Byte Typical)

• Self-timed Sector Erase Cycle (1 second/Sector Typical)

• Single Cycle Reprogramming (Erase and Program) for Status Register

• High Reliability

– Endurance: 10,000 Write Cycles Typical

• Lead-free/Halogen-free Devices

• 8-lead JEDEC SOIC and 8-lead SAP Packages

= 2.7V to 3.6V)

CC

SPI Serial
Memory

1M (131,072 x 8)

AT25F1024A

Description

The AT25F1024A provides 1,048,576 bits of serial reprogrammable Flash memory
organized as 131,072 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT25F1024A is available in a space-saving 8-lead JEDEC SOIC
and 8-lead SAP packages.

The AT25F1024A is enabled through the Chip Select pin (CS
wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial
Clock (SCK). All write cycles are completely self-timed.

BLOCK WRITE protection for top 1/4, top 1/2 or the entire memory array is enabled by
programming the status register. Separate write enable and write disable instructions
are provided for additional data protection. Hardware data protection is provided via
the WP
HOLD

pin to protect against inadvertent write attempts to the status register. The

pin may be used to suspend any serial communication without resetting the

serial sequence.

Pin Configurations

Pin Name Function

CS

SCK Serial Data Clock

SI Serial Data Input

SO Serial Data Output

GND Ground

VCC Power Supply

WP

HOLD

Chip Select

Write Protect

Suspends Serial Input

CS
SO

WP

GND

VCC

HOLD

SCK

SI

) and accessed via a 3-

8-lead SOIC

1
2
3
4

8-lead SAP

8
7
6
5

Bottom View

VCC

8

HOLD

7

SCK

6

SI

5

CS

1

SO

2

WP

3

GND

4

Advance
Information

Rev. 3346C–SEEPR–7/04

1

Absolute Maximum Ratings*

Operating Temperature .................................... -40°C to +85°C

Storage Temperature..................................... -65°C to +150°C

Voltage on Any Pin

with Respect to Ground .....................................-1.0V to +3.6V

Maximum Operating Voltage ............................................ 3.6V

DC Output Current........................................................ 5.0 mA

Block Diagram

*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam­age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.

131,072 x 8

2

3346C–SEEPR–7/04

Pin Capacitance

(1)

Applicable over recommended operating range from TA = 25°C, f = 20.0 MHz, VCC = +3.6V (unless otherwise noted).

Symbol Test Conditions Max Units Conditions

C

OUT

C

IN

Output Capacitance (SO) 8 pF V

Input Capacitance (CS, SCK, SI, WP, HOLD)6pFV

OUT

IN

= 0V

= 0V

Note: 1. This parameter is characterized and is not 100% tested.

DC Characteristics (Preliminary – Subject to Change)

Applicable over recommended operating range from: TAI = -40 to +85°C, VCC = +2.7 to +3.6V,
T

= 0 to +70°C, VCC = +2.7 to +3.6V (unless otherwise noted).

AC

Symbol Parameter Test Condition Min Typ Max Units

V

CC

I

CC1

I

CC2

I

SB

I

IL

I

OL

(1)

V

IL

(1)

V

IH

V

OL

V

OH

Note: 1. V

Supply Voltage 2.7 3.6 V

Supply Current VCC = 3.6V at 20 MHz, SO = Open Read 10.0 15.0 mA

Supply Current VCC = 3.6V at 20 MHz, SO = Open Write 25.0 35.0 mA

Standby Current VCC = 2.7V, CS = V

Input Leakage VIN = 0V to V

CC

CC

-3.0 3.0 µA

2.0 10.0 µA

Output Leakage VIN = 0V to VCC, TAC = 0°C to 70°C -3.0 3.0 µA

Input Low Voltage -0.6 V

x 0.3 V

CC

Input High Voltage VCC x 0.7 VCC + 0.5 V

Output Low Voltage

Output High Voltage IOH = -100 µA VCC - 0.2 V

2.7V ≤ V

and VIH max are reference only and are not tested.

IL

≤ 3.6V

CC

I

= 0.15 mA 0.2 V

OL

3346C–SEEPR–7/04

3

AC Characteristics (Preliminary – Subject to Change)

Applicable over recommended operating range from TA = -40 to +85°C, VCC = +2.7 to +3.6V
C

= 1 TTL Gate and 30 pF (unless otherwise noted).

L

Symbol Parameter Min Typ Max Units

f

SCK

t

RI

t

FI

t

WH

t

WL

t

CS

t

CSS

t

CSH

t

SU

t

H

t

HD

t

CD

t

V

t

HO

t

LZ

t

HZ

t

DIS

t

EC

t

SR

t

BPC

Endurance

(2)

SCK Clock Frequency 0 20 MHz

Input Rise Time 20 ns

Input Fall Time 20 ns

SCK High Time 20 ns

SCK Low Time 20 ns

CS High Time 25 ns

CS Setup Time 25 ns

CS Hold Time 25 ns

Data In Setup Time 5 ns

Data In Hold Time 5 ns

Hold Setup Time 15 ns

Hold Time 15 ns

Output Valid 20 ns

Output Hold Time 0 ns

Hold to Output Low Z 200 ns

Hold to Output High Z 200 ns

Output Disable Time 100 ns

Erase Cycle Time per Sector 1.1 s

Status Register Write Cycle Time 60 ms

Byte Program Cycle Time

(1)

Notes: 1. The programming time for n bytes will be equal to n x t

2. This parameter is characterized at 3.3V, 25°C and is not 100% tested.

3. One write cycle consists of erasing a sector, followed by programming the same sector.

BPC

20 60 µs

10K Write Cycles

(3)

.

4

3346C–SEEPR–7/04

Serial Interface

MASTER: The device that generates the serial clock.

Description

SLAVE: Because the Serial Clock pin (SCK) is always an input, the AT25F1024A

always operates as a slave.
TRANSMITTER/RECEIVER: The AT25F1024A has separate pins designated for data

transmission (SO) and reception (SI).

MSB: The Most Significant Bit (MSB) is the first bit transmitted and received.
SERIAL OP-CODE: After the device is selected with CS

received. This byte contains the op-code that defines the operations to be performed.
INVALID OP-CODE: If an invalid op-code is received, no data will be shifted into the

AT25F1024A, and the serial output pin (SO) will remain in a high impedance state until
the falling edge of CS

CHIP SELECT: The AT25F1024A is selected when the CS
is not selected, data will not be accepted via the SI pin, and the serial output pin (SO)
will remain in a high impedance state.

HOLD: The HOLD
When the device is selected and a serial sequence is underway, HOLD
pause the serial communication with the master device without resetting the serial
sequence. To pause, the HOLD
resume serial communication, the HOLD
(SCK may still toggle during HOLD
is in the high impedance state.

WRITE PROTECT: The AT25F1024A has a write lockout feature that can be activated
by asserting the write protect pin (WP
sectors will be READ only. The write protect pin will allow normal read/write operations
when held high. When the WP
the status register are inhibited. WP
the status register. If the internal status register write cycle has already been initiated,
WP

going low will have no effect on any write operation to the status register. The WP
pin function is blocked when the WPEN bit in the status register is “0”. This will allow the
user to install the AT25F1024A in a system with the WP
able to write to the status register. All WP
is set to “1”.

is detected again. This will reinitialize the serial communication.

pin is used in conjunction with the CS pin to select the AT25F1024A.

pin must be brought low while the SCK pin is low. To

pin is brought high while the SCK pin is low

). Inputs to the SI pin will be ignored while the SO pin

). When the lockout feature is activated, locked-out

is brought low and WPEN bit is “1”, all write operations to

going low while CS is still low will interrupt a write to

pin functions are enabled when the WPEN bit

going low, the first byte will be

pin is low. When the device

can be used to

pin tied to ground and still be

3346C–SEEPR–7/04

5

SPI Serial Interface

MASTER:

MICROCONTROLLER

DATA OUT (MOSI)

DATA IN (MISO)

SERIAL CLOCK (SPI CK)

SS0

SS1

SS2

SS3

SLAVE:

AT25F1024A

SI

SO

SCK

CS

SI

SO

SCK

CS

SI

SO

SCK

CS

SI

SO

SCK

CS

6

3346C–SEEPR–7/04