Rainbow Electronics AT25640 User Manual
Features
• Serial Peripheral Interf ace (SPI) Compatible
• Supports SPI Modes 0 (0,0) and 3 (1,1)
• Medium-v olt age and Standard-voltage Operation
– 5.0 (V
– 2.7 (V
• 3.0 MHz Clock Rate (5V)
• 32-byte Page Mode
• Block Write Pr otection
– Protect 1/4, 1/2, or Entire Array
• Write Protect (WP) Pin and Write Disable Instructions for
both Hardware and Software Data Protection
• Self-timed Write Cycle (5 ms Typica l)
• High-reliability
– Enduranc e: One Million Write Cycles
– Data Retention: 100 Years
• 8-lead PDIP and 8-lead JEDEC SOIC Packages
= 4.5V to 5.5V)
CC
= 2.7V to 5.5V)
CC
SPI Serial
Automotive
EEPROMs
8K (1024 x 8)
Description
The AT25080/160/320/640 provides 8192/16384/32768/65536 bits of serial electrically-erasable programmable read only memory (EEPROM) organized as
1024/204 8/40 96/819 2 wo rds of 8 bits each . Th e device is o pti mized for use in m any
automotive applications where low-power and low-voltage operation are essential.
The AT25080/160/320/640 is available in space saving 8-lead PDIP and 8-lead
JEDEC SOIC packages.
The AT25080/160/320/640 is enabled through the Chip Se lect pin (CS
) and accessed
via a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and
Serial C lock (SC K). All programm ing cy cle s are c omp letely self-tim ed, and no sep arate ERASE cycle is required before WRITE.
BLOCK WRIT E protectio n is enabled by programmi ng the statu s registe r with on e of
four blocks of write protection. Separate program enable and program disable instructions are provided for additional data protection. Hardware data protection i s provided
via the WP
HOLD
pin to protect against inadvertent write at tempt s to the status regist er. The
pin may be used to suspend any serial communication without resetting the
serial sequence.
Pin Configuration
Pin Name Function
CS
SCK Seria l Da ta Cl ock
SI Serial Data Input
SO Serial Data Output
Chip Select
CS
SO
WP
GND
8-lead PDIP
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
CS
SO
WP
GND
8-lead SOIC
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
16K (2048 x 8)
32K (4096 x 8)
64K (8192 x 8)
AT25080
AT25160
AT25320
AT25640
GND Ground
VCC Power Supply
WP
HOLD
NC No Connect
DC Don’t Connect
Write Protect
Suspends Serial Input
3260D–SEEPR–9/03
1
Absolute Maximum Ratings*
Operating Temperature.................................. -55°C to +125°C
Storage Temperature........... .............. ........... .-65°C to +150°C
Voltage on Any Pin
with Resp e c t to Gr o und ...... .. ... ....... .. ... ..............-1.0V to +7.0 V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
Block Diagram
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device . This is a stress r ating onl y and
functional operation of th e device at these or any
other conditions beyond those indi cated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions f or e xtended p eriods may af fe ct devi ce
reliability.
2
AT25080/160/320/640
3260D–SEEPR–9/03
AT25080/160/320/640
Pin Capacitance
(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).
Symbol Tes t Condi ti ons Max Units Conditions
C
OUT
C
IN
Output Capacitanc e (SO) 8 pF V
Input Capacitance (CS, SCK, SI, WP, HOLD)6pFV
OUT
IN
= 0V
= 0V
Note: 1. This parameter is characterized and is not 100% tested.
DC Characteristics
(1)
Applicable over recommended operating range from: TA = -40°C to +125 °C, VCC = +2.7V to +5.5V
Symbol Parameter Test Condition Min Typ Max Units
V
CC1
V
Supply Voltage 4.5 5.5 V
CC2
I
Supply Current VCC = 5.0V at 1 MHz, SO = Open, Read 3.0 mA
CC1
I
Supply Current VCC = 5.0V at 2 MHz, SO = Open,
CC2
Standby Current VCC = 2.7V, CS = V
I
SB1
I
SB2
I
Input Leakage VIN = 0V to V
IL
I
OL
(1)
V
IL
(1)
V
IH
V
Output Low-voltage 2.7V ≤ VCC ≤ 5.5V IOL = 3.0 mA 0.4 V
OL1
V
OH1
Note: 1. VIL min and VIH max are reference onl y and are not tested.
Supply Voltage 2.7 5.5 V
5.0 mA
Read, Write
0.2 2.0 µA
2.0 5.0 µA
Standby Current VCC = 5.0V, CS = V
CC
Output Leakage V
= 0V to VCC -3.0 3.0 µA
IN
CC
CC
-3.0 µA
Input Low-voltage -0.6 VCC x 0.3 V
Input High-v oltage VCC x 0.7 VCC + 0.5 V
Output High-voltage IOH = -1.6 mA VCC - 0.8 V
3260D–SEEPR–9/03
3
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +125°C, VCC = As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol Parameter Voltage Min Max Units
f
SCK
SCK Clock Frequency 4.5 - 5.5
2.7 - 5.5
t
RI
Input Rise Time 4.5 - 5.5
2.7 - 5.5
t
FI
Input Fall Time 4.5 - 5.5
2.7 - 5.5
t
WH
SCK High Time 4.5 - 5.5
2.7 - 5.5
t
WL
SCK Low Time 4.5 - 5.5
2.7 - 5.5
t
CS
CS High Time 4.5 - 5.5
2.7 - 5.5
t
CSS
CS Setup Time 4.5 - 5.5
2.7 - 5.5
t
CS Hold Time 4.5 - 5.5
CSH
2.7 - 5.5
t
Data In Setup Time 4.5 - 5.5
SU
2.7 - 5.5
t
H
Data In Hold Time 4.5 - 5.5
2.7 - 5.5
t
Hold Setup Time 4.5 - 5.5
HD
2.7 - 5.5
0
0
133
200
133
200
250
250
250
250
250
250
50
50
50
50
100
100
3.0
2.1
2
2
2
2
ns
MHz
µs
µs
ns
ns
ns
ns
ns
ns
t
CD
t
V
t
HO
t
LZ
t
HZ
t
DIS
t
WC
Endurance
Hold Hold Time 4.5 - 5.5
Output Valid 4.5 - 5.5
Output Hold Time 4.5 - 5.5
Hold to Outp u t Low Z 4.5 - 5.5
Hold to Output High Z 4.5 - 5.5
Output Disabl e Time 4.5 - 5.5
Write Cycle Time 4.5 - 5.5
(1)
5.0V, 25°C, Page Mode 1M Write Cycles
Note: 1. This parameter is characterized and is not 100% tested.
4
AT25080/160/320/640
2.7 - 5.5
2.7 - 5.5
2.7 - 5.5
2.7 - 5.5
2.7 - 5.5
2.7 - 5.5
2.7 - 5.5
200
200
0
0
0
0
0
0
133
200
100
100
100
100
250
250
5
10
ns
ns
ns
ns
ns
ns
ms
3260D–SEEPR–9/03
AT25080/160/320/640
Serial Interface Description
MASTER: The device that generates the serial clock.
SLAVE: Because the Serial Clock pin (SCK) is always an input, the AT25080/160/320/640
always operates as a slave.
TRANSMITTER/RECEIVER: The AT25080/160/320/640 has separate pins designated for
data transmission (SO) and reception (SI).
MSB: The Most Significant Bit (MSB) is the first bit transmitted and received.
SERIAL OP-CODE: After the device is selected with CS
received. This byte contains the op-code that defines the operations to be performed.
INVALID O P-COD E: If an invalid op-code is received, no data will be shifted into the
AT25080/160/320/640, and the serial output pin (SO) will remain in a high impedance state
until the falling edge of CS
CHIP SELECT: The AT25080/160/320/640 is selected when the CS
device is not selected, data will not be accept ed via the SI pin, and the serial output pin (SO)
will remain in a high impedance state.
HOLD: The HOLD
AT25080/160 /320/640. When the dev ice is selected and a serial sequ ence is underway ,
HOLD
can be used to pause the serial communication with the master device without resetting
the serial sequence. To pause, the HOLD
To resume serial communication, the HOLD
may still toggle during HOLD
high impedance state.
is detected again. This will reinitialize the serial communication.
pin is used in conjunction with the CS pin to select the
pin must be bro ugh t low whil e the S CK pin is l ow.
pin is brought high while the SCK pin is low (SCK
). Inputs to the SI pin will be ignored while the SO pin is in the
going low, the first byte will be
pin is low. When the
WRITE PROTECT: The write protect pin (WP
held high. When the WP pin is brought low and WPEN bit is “1”, all write operations to the status register are in hibited. WP
register. If the internal write cycle has al ready been initiated, WP
on any write operation to t he st atus register. Th e WP
bit in the status register is "0". This will allow t he user to install the AT25080/160/320/640 in a
system with the WP
pin functions are enabled when the WPEN bit is set to “1”.
pin tied to g round an d still b e able to write to the st atus register. All WP
going low while C S is still low will in terrupt a write to the st atus
) will allow normal read/write operations when
going low will have no effe ct
pin function is blocked when the WPEN
3260D–SEEPR–9/03
5
SPI Serial Interface
6
AT25080/160/320/640
3260D–SEEPR–9/03
Loading...