Rainbow Electronics AT25040A User Manual

Features

• Serial Peripheral Interf ace (SPI) Compatible

• Supports SPI Modes 0 (0,0) and 3 (1,1)

• Medium-v olt age and Standard-voltage Operation

– 5.0 (V – 2.7 (V

• 3.0 MHz Clock Rate (5V)

• 8-byte Page M o de

• Block Write Pr otection

– Protect 1/4, 1/2, or Entire Array

• Write Protect (WP) Pin and Write Disable Instructions for

Both Hardware and Sof tware Data Protection

• Self-timed Write Cycle (10 ms max)

• High Reliability

– Enduranc e: One Million Write Cycles – Data Retention: 100 Years

• 8-pin PDIP and 8-lead JEDEC SOIC Package

= 4.5V to 5.5V)

= 2.7V to 5.5V)

SPI Serial Automotive EEPROMs

1K (128 x 8)

Description

The AT25010A/020A/040A provides 1024/2048/4096 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 128/256/512 words of 8 bits each. The device is optimized for use in many automotive applications where low-power and low voltage operation are essential. The AT25010A/020A/040A is available in space saving 8-pin PDIP and 8-lead JEDEC SOIC packages.

The AT25010A/020A/040A is enabled through the Chip Select pin (CS via a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial C lock (SC K). All programm ing cy cle s are c omp letely self-tim ed, and no sep arate ERASE cycle is required before WRITE.

BLOCK WRIT E protectio n is enabled by programmi ng the statu s registe r with on e of four blocks of write protection. Separate program enable and program disable instructions are provided for additional data protection. Hardware data protection i s provided via the WP used to suspend any serial communication without resetting the serial sequence.

pin to protect against inadvertent write attempts. The HOLD pin may be

) and accessed

Pin Configurations

CS SO

8-pin PDIP

1 2 3 4

VCC

HOLD

SCK

Pin Name Function

CS SCK Serial Data Clock SI Serial Data Input SO Serial Data Output

Chip Select

GND

2K (256 x 8) 4K (512 x 8)

AT25010A AT25020A AT25040A

Preliminary

SPI, 1K Serial

PROM

GND Ground VCC Power Supply WP HOLD

Write Protect Suspends Serial Input

CS SO

GND

8-lead SOIC

1 2 3 4

8 7 6 5

VCC HOLD SCK SI

Rev. 3402A–SEEPR–10/3/03

Absolute Maximum Ratings*

Operatin g Temperature....... .. ........................ -55°C to + 1 25° C

Storage Temperature.................................... -65°C to + 150°C

Voltage on Any Pin

with Respect to Ground ....................................-1.0V to + 7.0V

Maximum Operating Voltage .......................................... 6.25V

DC Output Current........................................................ 5.0 mA

Block Diagram

*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratin gs” may cause permanent damage to the devi ce . This is a stres s rati ng only and functional operation of the de vice at these or any other conditions beyond those indicated in the operational sections of this specif ication is not implied. Expos ure to absolute maximum rat ing conditions for ext ended periods may affect device reliability.

AT25010A/020A/040A [Preliminary]

3402A–SEEPR–10/3/03

AT25010A/020A/040A [Preliminary]

Pin Capacitance

(1)

Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).

Symbol T est Conditions Max Units Conditions

OUT

Output Capacitance (SO) 8 pF V Input Capacit ance (CS, SCK, SI, WP, HOLD)6pFV

OUT

= 0V

Note: 1. This parameter is characterized and is not 100% tested.

DC Characteristics

Applicable over recommended operating range from: TA = -40°C to +125°C, VCC = +2.7V to +5.5V.

Symbol Parameter Te st Condi ti on Min Max Units

CC1

CC2

CC1

CC2

SB1

SB2

(2)

OL1

OH1

OL2

OH2

Notes: 1. This parameter is preliminary and Atmel may change the specifications upon further characterization.

Supply Voltage 2.7 5.5 V Supply Voltage 4.5 5.5 V Supply Current VCC = 5.0V at 1 MHz, SO = Open, Read 3.0 mA

= 5.0V at 2 MHz, SO = Open,

Supply Current

Read, Write Standby Current VCC = 2.7V CS = V Standby Current VCC = 5.0V CS = V

6.0 mA

5µA

10 µA Input Leakage VIN = 0V to VCC -0.6 3.0 µA Output Leakage VIN = 0V to VCC -0.6 3.0 µA Input Low Voltage -0.6 V

x 0.3 V

Input High Voltage VCC x 0.7 VCC + 0.5 V Outp u t Lo w Voltag e Output High Voltage IOH = -1.0 mA VCC - 0.8 V

4.5V ≤ V

≤ 5.5V

Outp u t Lo w Voltag e Output High Voltage IOH = -100 µA VCC - 0.2 V

2.7V ≤ V

2. V

min and VIH max are reference onl y and are not tested.

≤ 5.5V

= 2.0 mA 0.4 V

= 0.15 mA 0.2 V

3402A–SEEPR–10/3/03

AC Characteristics

Applicable over recommended operating range from TA = -40°C to +125°C, VCC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted).

Symbol Parameter Voltage Min Max Units

SCK

CSS

CSH

SCK Clock Frequency

Input Rise Time

Input Fall Time

SCK High Time

SCK Low Time

CS High Time

CS Setup Time

CS Hold0 Time

Data In Setup Time

Data In Hold Time

Hold Setup Time

Hold Hold Time

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

0 0

133 266

250 250

50 50

100 100

100 200

200

3.0

1.5 2

2 2

MHz

µs

DIS

Endurance

Output Valid

Output Hold Time

Hold to Output Low Z

Hold to Output High Z

Output Disable Time

Write Cycle Time

(1)

5.0V, 25°C, Page M o de 1M Wri t e Cycl es

Note: 1. This parameter is characterized and is not 100% tested.

AT25010A/020A/040A [Preliminary]

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

4.5 - 5.5

2.7 - 5.5

0 0

133 266

100 100

250 500

3402A–SEEPR–10/3/03

AT25010A/020A/040A [Preliminary]

Serial Interface Description

MASTER: The device that generates the serial clock. SLAVE: Because the Serial Clock pin (SCK) is always an input, the

AT25010A/020A/040A always operates as a slave. TRANSMITTER/RECEIVER: The AT25010A/020A /040A has sepa rate pins des ignated

for data transmission (SO) and reception (SI).

MSB: The Most Significant Bit (MSB) is the first bit transmitted and received. SERIAL OP-CODE: After the device is selected with CS

received. This byte contains the op-code that defines the operations to be performed. The op-code also contains address bit A8 in both the READ and WRITE instructions.

INVALID OP-CODE: If an invalid op-code is received, no data will be shifted into the AT250 10A /020A /040A , and the s erial out put p in (SO ) wil l remai n in a high imped an ce state until the falling edge of CS communication.

CHIP SELECT: The AT25010A/020A/040A is selected when the CS the device is not selected, data will not be ac cept ed v ia the SI pin, and t he ser i al output pin (SO) will remain in a high impedance state.

HOLD: The HOLD AT25010A/020A/040A. When the device is selected and a serial sequence is underway, HOLD

can be used to paus e the serial communication with the master device without resett ing th e s erial sequ en ce. To pa use, th e HOLD SCK pin is low. To resume serial communication, the HOLD SCK pin is low (SCK ma y still toggle duri ng HOLD while the SO pin is in the high impedance state.

pin is used in conjunction with the CS pin to s elect th e

is detected again. This will reinitialize the serial

going l o w , th e f ir s t byte will be

pin is lo w. W hen

pin mu st be brou gh t low whil e the

pin is brought high while the

). Inputs to the SI pin will be i gnored

WRITE PROTECT: The write pro tect pin (WP when held high. When the WP

goin g lo w wh il e C S is still low will interrupt a write to the AT25010A/020A/040A. If

WP the internal write cycle has already been initiated, WP any write operation.

pin is brought low, all write operations are inhibited.

) will allo w no rmal read /wr ite o perat io ns

going low will have no effect on

3402A–SEEPR–10/3/03

SPI Serial Interface

AT25010A/020A/040A

AT25010A/020A/040A [Preliminary]

3402A–SEEPR–10/3/03

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