– Endurance: 100,000 Write Cycles/Page
– Data Retention: 40 Years
• 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead LAP and 8-ball dBGA
= 2.7V to 5.5V)
CC
TM
Packages
2-wire Serial
EEPROM
1M (131,072 x 8)
Description
The AT24C1024 provides 1,048,576 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The
device’s cascadable feature allows up to 2 devices to share a common 2-wire bus.
The device is optimized for use in many industrial and commercial applications where
low-power and low-voltage operation are essential. The devices are available in
space-saving 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead Leadless Array (LAP), and 8-ball
dBGA packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V)
versions.
Pin Configurations
Pin NameFunction
A1Address Input
SDASerial Data
SCLSerial Clock Input
WPWrite Protect
NCNo Connect
8-lead SOIC
8-lead PDIP
8
NC
A1
NC
GND
1
2
3
4
VCC
7
WP
6
SCL
5
SDA
8-lead Leadless Array
Bottom View
VCC
WP
SCL
SDA
8
7
6
5
NC
1
A1
2
NC
3
GND
4
AT24C1024
Advance
Information
NC
A1
NC
GND
1
2
3
4
VCC
8
WP
7
SCL
6
SDA
5
8-ball dBGA
Bottom View
8
VCC
7
WP
6
SCL
5
SDA
1
NC
2
A1
3
NC
4
GND
Rev. 1471D–07/01
1
Absolute Maximum Ratings*
Operating Temperature.................................. -40°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground.....................................-1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
Block Diagram
*NOTICE:Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
2
AT24C1024
1471D–07/01
AT24C1024
Pin DescriptionSERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is opendrain driven and may be wire-ORed with any number of other open-drain or open-collector
devices.
DEVICE/PAGE ADDRESSES (A1): The A1 pin is a device address input that can be hardwired or left not connected for hardware compatibility with AT24C128/256/512. When the A1
pin is hardwired, as many as two 1024K devices may be addressed on a single bus system
(device addressing is discussed in detail under the Device Addressing section). When the pin
is not hardwired, the default A1 is zero.
WRITE PROTECT (WP): The hardware Write Protect pin is useful for protecting the entire
contents of the memory from inadvertent write operations. The write-protect input, when tied to
GND, allows normal write operations. When WP is tied high to V
memory are inhibited. If left unconnected, WP is internally pulled down to GND. Switching WP
prior to a write operation creates a software write-protect function.
to V
CC
, all write operations to the
CC
Memory
Organization
AT24C1024, 1024K SERIAL EEPROM: The 1024K is internally organized as 512 pages of
256 bytes each. Random word addressing requires a 17-bit data word address.
1471D–07/01
3
Pin Capacitance
(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +2.7V.
SymbolTest ConditionMaxUnitsConditions
C
I/O
C
IN
Input/Output Capacitance (SDA)8pFV
I/O
= 0V
Input Capacitance (A1, SCL)6pFVIN = 0V
Note:1. This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: T
= +2.7V to +5.5V (unless otherwise noted).
V
CC
SymbolParameterTest ConditionMinTypMaxUnits
V
CC
I
CC
I
CC
I
SB
I
LI
I
LO
V
IL
V
IH
V
OL
Note:1. VIL min and VIH max are reference only and are not tested.
Supply Voltage2.75.5V
Supply CurrentVCC = 5.0VREAD at 400 kHz2.0mA
Supply CurrentVCC = 5.0VWRITE at 400 kHz5.0mA
= 2.7VVIN = VCC or V
V
Standby Current
CC
VCC = 5.5V6.0µA
Input Leakage CurrentVIN = V
Output Leakage
CC or VSS
V
= V
OUT
CC or VSS
Current
Input Low Level
Input High Level
(1)
(1)
Output Low LevelVCC = 3.0VIOL = 2.1 mA0.4V
= -40°C to +85°C, VCC = +2.7V to +5.5V, TAC = 0°C to +70°C,
AI
SS
1.0µA
0.103.0µA
0.053.0µA
-0.6VCC x 0.3V
VCC x 0.7VCC + 0.5V
4
AT24C1024
1471D–07/01
AT24C1024
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = +2.7V to +5.5V, CL = 100 pF (unless
otherwise noted). Test conditions are listed in Note 2.
SymbolParameterTest ConditionsMinMaxUnits
f
SCL
t
LOW
t
HIGH
t
AA
t
BUF
t
HD.STA
t
SU.STA
t
HD.DAT
t
SU.DAT
t
R
t
F
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Clock Low to Data Out Valid
Time the bus must be free before a new
transmission can start
(1)
Start Hold Time
Start Setup Time
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
0.6
1.3
0.4
1.0
0.05
0.05
0.5
1.3
0.25
0.6
0.25
0.6
1000
400
0.55
0.9
kHz
µs
µs
µs
µs
µs
µs
Data In Hold Time0µs
Data In Setup Time100ns
Inputs Rise Time
Inputs Fall Time
(1)
(1)
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
0.3µs
100
300
ns
t
SU.STO
t
DH
t
WR
Endurance
Stop Setup Time
Data Out Hold Time50ns
Write Cycle Time10ms
(1)
5.0V, 25°C, Page Mode100KWrite Cycles
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
Notes: 1. This parameter is characterized and is not 100% tested.
2. AC measurement conditions:
(connects to VCC): 1.3 kΩ (2.7V, 5V)
R
L
Input pulse voltages: 0.3 V
to 0.7 V
CC
CC
Input rise and fall times: ≤50 ns
Input and output timing reference voltages: 0.5 V
CC
0.25
0.6
µs
1471D–07/01
5
Loading...
+ 11 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.