output low voltage Iout = -0.1mA for Output Pins 0.5 V
output high voltage Iout = 0.1mA for Output Pins 3.8 V
PIN DESCRIPTION
NO Pin Name Description
1 VDDD Digital Positive Power Supply
2 VDDA Analog Positive Power Supply
3 GNDD Digital Negative Power Supply
4 GNDA Analog Negative Power Supply
5 AMPOUT Power Amplifier Output
6 AMPIN Power Amplifier Input
7 OSC1 Oscillator Input
8 OSC2 Oscillator Output
9 PI3 Data Input Pin
10 PI2 ~ PI0 Data Input/Output Pins
11 PIO3 ~ PIO0 Data Input/Output Pins
12 PO3 ~ PO0 Data Output Pins
13 CEN Memory Chip Enable Pin , Low Active
14 OEN Memory Data Out Enable Pin , Low Active
15 D7 ~ D0 Memory Data Input Pins
16 A23 ~ A0 Memory Address Output Pins
2
INTEGRATEDAPI4000M SERIES
CIRCUITS INC. VOICE OTP MODULE
Functional Description
A. Micro–Controller
The Micro-Controller inside API4000M is a 8Bit Processor, it has 2 groups Data Bank each has 16 X 8
Bit Register, the Function for processing Data: Addition , Subtraction , logical AND , Moving , Shift and
the other Basic Function. It also has Address Jump , Data Input , Data Output , Sound Control , Melod
yControl and the other Advanced Function.
Here is the list of 42 instruction in API4000M, each instruction has its Format and Description.
1. JUMP
Instruction Format Code CycleBytes
JUMP INTR1, Pn ﹔
JUMP INTR2, Pn ﹔
JUMP INTR3, Pn ﹔
JUMP INTR4, Pn ﹔
JUMP ADDR, Pn ﹔
JUMP CO0, Pn ﹔
JUMP CO1, Pn ﹔
PS :
(1). Code : Code of instruction.
(2). Cycle : Time to executive instruction, 1Cycle = 64 clock period.
(3). Bytes : Size of instruction, 1 Byte = 8 Bits.
(4). Pn ﹕Address in Program, e.g. P123;n = 0 ~ 9999.
(5). INTR1 ﹕Key In signal.
(6). INTR2 ﹕Song End signal.
(7). INTR3 ﹕Sound End signal.
(8). INTR4 ﹕Change Instrument signal.
01 2 3
02 2 3
03 2 3
04 2 3
05 2 3 Program Address(PC) direct jump to Pn.
06 2 3
07 2 3
2. Register & Data
Instruction
if INTR1 = 1, Program Address(PC) will jump to Pn.
if INTR2 = 1, Program Address (PC)will jump to Pn.
if INTR3 = 1, Program Address (PC)will jump to Pn.
if INTR4 = 1, Program Address(PC) will jump to Pn.
if carry out = 0,Program Address(PC) will jump to Pn.
if carry out = 1,Program Address(PC) will jump to Pn.
Description
Instruction Format Code CycleBytesInstruction Description
ADDC Rn, Data ﹔
ADDD Rn, Data ﹔
ANDD Rn, Data ﹔
MOVD Rn, Data ﹔
SUBDC Rn, Data ﹔
SUBD Rn, Data ﹔
PS :
(1). Rn ﹕Number of Register,e.g. R3;n = 0 ~ 15.
(2). Data ﹕a decimal value during 0 ~ 255.
6n 1 2
7n 1 2 Rn ÍRn + Data
4n 1 2
5n 1 2 set Rn Í Data.
En 1 2
Fn 1 2 Rn Í Rn - Data
The value of Rn adds Data,only set Carry but don’t
change the value of Rn. ( Rn + Data ÎC=?)
The value of Rn logical AND Data,set the solution
to Rn. ( Rn Í Rn AND Data)
The value of Rn subduct Data, only return Carry
but don’t change the value of Rn.(Rn-DataÎC?)
3
INTEGRATEDAPI4000M SERIES
CIRCUITS INC. VOICE OTP MODULE
3. Single Register Operation
Instruction Format Code CycleBytes Instruction Description
SHIFTL Rn ﹔
SHIFTR Rn ﹔
DEC Rn ﹔
INC Rn ﹔
2n 1 1
3n 1 1
An 1 1
Bn 1 1
Each Bit of Rn Shift to left Bit,shift 0 to D0.
i.e. D7←D6←D5←D4←D3←D2←D1←D0←0.
Each Bit of Rn Shift to right Bit,shift 0 to D7.
i.e. 0→D7→D6→D5→D4→D3→D2→D1→D0.
The value of Rn subduct 1,set the solution to Rn. (RnÍRn-1)
The value of Rn add 1,set the solution to Rn.(RnÍRn+1)
4. Operation between two Registers
Instruction Format Code CycleBytes Instruction Description
ADDR Rn, Rm ﹔
ADDRI Rn, Rm ﹔
ADDRC Rn, Rm ﹔
SUBR Rn, Rm ﹔
SUBRI Rn, Rm ﹔
SUBRC Rn, Rm ﹔
ANDR Rn, Rm ﹔
MOVR Rn, Rm ﹔
D0 2 2 Rn add Rm, set the amount to Rn..(Rn,ÍRn+Rm)
D1 2 2
D2 2 2
D4 2 2
D5 2 2
D6 2 2
D8 2 2
D9 2 2 Set the value of Rm to Rn. ( RnÍRm)
Rn add Rm and Carry, set the amount to Rn. (RnÍRn+Rm+C)
Rn add Rm, only set Carry but don’t change the value
of Rn and Rm. (Rn+Rm Î C?)
Rn subduct Rm, set the difference to Rn. (Rn,ÍRn-Rm)
Rn subduct Rm and Carry, set the difference to Rn.
(Rn ÍRn-Rm-C)
Rn subduct Rm, only set Carry but don’t change the
value of Rn and Rm. (Rn-Rm Î C?)
Rn logical AND Rm, set the solution to Rn.
(RnÍRn AND Rm)
5. Sound & Melody Control
Instruction Format Code CycleBytes Instruction Description
LDSPADB Cn, Sn ﹔
LDSPADF Cn, Sn ﹔
LDMYAD Mn ﹔
PLAYSP Cn, Data ﹔
TEMPO Rn ﹔
GAIN Rn ﹔
PS :
(1). Cn ﹕Code of Channel, n = 1A , 1B , 2A , 2B , 3A , 3B , 4A , 4B.
(2). Sn ﹕Code of Sound,sort by sequence,n = 0 ~ 9999.
(3). Mn ﹕Code of Melody Song, sort by sequence n = 0 ~ 9999.
(4). Data : Code of Sound Sample Rate, the value is during 0 ~ 31, reference B.Sound Processor to get
more description.
(5). Reference C. Melody Processor to get more description of Tempo Code.
(6). Volume is during 0 ~ 63,0 is mute,63 is MAX volume.
1n 2 4 Set the start address of Sound.
9n 2 4 Set the end address of Sound.
CF 2 4 Set the start address of Melody.
CE 2 3 Play Sound(PS4).
8E 1 2 Set Rn to Tempo value of Melody (PS5).
8F 1 2 Set Rn to the volume of output sound (PS6).
4
INTEGRATEDAPI4000M SERIES
CIRCUITS INC. VOICE OTP MODULE
6. Input & Output Data
Instruction Format Code CycleBytes Instruction Description
INPUT PA, Rn ﹔
INPUT PB, Rn ﹔
INPUT PC, Rn ﹔
OUT PA, Rn ﹔
OUT PB, Rn ﹔
OUT PC, Rn ﹔
OUT PD, Rn ﹔
OUT PE, Rn ﹔
PS :
(1). PA , PB , PC , PD , PE is Data Port A , B, C, D, E, Reference D. Data Port to get more description.
80 1 2 Set Data Port A to Rn.( Rn ÍPA)
81 1 2 Set Data Port B to Rn. ( Rn ÍPB)
82 1 2 Set Data Port C to Rn. ( Rn ÍPC)
88 1 2 Set the value of Rn to Data Port A. (PAÍRn)
89 1 2 Set the value of Rn to Data Port B. (PBÍRn)
8A 1 2 Set the value of Rn to Data Port C. (PCÍRn)
8B 1 2 Set the value of Rn to Data Port D. (PDÍRn)
8C 1 2 Set the value of Rn to Data Port E. (PEÍRn)
7. System Control
Instruction Format Code CycleBytesInstruction Description
CLINTR ﹔
INTRE ﹔
SHUTDN ﹔
PS : (1). Before executiving SHUTDN Instruction, be sure to executive INTRE Instruction first to assure system
can be restarted after shutdown.
C8 1 1 Clear Interrupt Signal
C9 1 1 Make system can receive interrupt signal.
CA 1 1 System shutdown.
B. Sound Processor
Sound Processor of API4000M use 4 bits ADPCM construction, it has 4 Sound Channel can play music
mixed by 4 different type sound.Sample Rate of Sound is during 4KHz ~ 32Khz, each Channel can has different
Sample Rate.Each Channel has 2 group Address Register for Sound Data, each group Address Register has a Start
Address Register and a End Address Register for Sound Data. Each Sound Channel can be Controlled by
Instruction PLAYSP, or Controlled by Melody Processor.Before Play Sound, Address of Sound Data must be set
first. The following is the description about setting with Channel, Address, and Sample Rate.
1. Channel :
Cn is the no. of Channel in Instruction LDSPADB, LDSPADF, and PLAYSP. Each Channel has A and B
2 group, A and B can’t play together. The folloeing is the Table.
Table B.1
Channel CH1 CH2 CH3 CH4
Group A B A B A B A B
Cn C1A C1B C2A C2B C3A C3B C4A C4B
5
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