Rainbow Electronics APExx24 User Manual

PLUS MAKE YOUR PRODUCTION A-PLUS

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APExx24 Series

DATA SHEET

PLUS INTEGRATED CIRCUITS INC.

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Address:

3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,

Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段 32 號 3 樓之 10.

TEL: [phone]

FAX: [phone]

WEBSITE : http: //www.aplusinc.com.tw

Sales E-mail:

[e-mail]

Technology E-mail:

[e-mail]

APExx24 Series

1.0 General Description

The APExx24 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various
features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody
synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one
voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices.
With CMOS technology and halt function can minimize power dissipation. Their architectures are similar
to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single
cycle, except for program branches and data table read instructions (which need two instruction cycles).

2.0 Features

(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz.
(2) Program ROM: 64k x 10 bits
(3) 1 set of 16-bits DPR can access up to 64k x 10 bits melody data memory space, and 1 set of 20-bits

VPR can access up to 1024k x 10 bits voice data memory space.

Product Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bits)

APE12724 127 19-bits 384k
APE17024 170 19-bits 512k
APE25524 255 20-bits 768k
APE34024 340 20-bits 1024k

(4) Data Registers:

a). 128 x 4-bits data RAM (00-7Fh)
b). Unbanked special function registers (SFR) range: 00h-2Fh

(5) I/O Ports:

a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Regist er control)
b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option)
c). PR C: 4-bits I/O Port C (14h) can be programmed to input/output individually. (Register control)
d). PRD: 4-bits I/O Port D (15h) can be programmed to input/output individually. (Register control)
e). PRE: 4-bits I/O Port E (17h) can be programmed to input/ out put individually. (Register control)

f). PRF: 4-bits I/O Port F (18h) can be programmed to input/output individually. (Register control)
(6) On-chip clock generator: Resistive Clock Drive (RM) or Crystal oscillator (HM)
(7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter).
(8) Stack: 2-level subroutine nesting.
(9) B uilt-in 4 Level Vol u me C ontrol can be prog r amm ed .
(10) Built-in 8 Level DAC Current Control can be configured. (Mask option)
(11) Built-in IR Carry Output: Port B[1] can be configured as IR pin by 38k / 56kHz. (Mask option)

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Rev 1.5 2004/4/20

APExx24 Series

(12) External Reset: Port B[3] can be configured as reset pin. (Mask opt on)
(13) HALT and Release from HALT function to reduce power consumpt ion
(14) Watch Dog Timer (WDT)
(15) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles
(16) Number of instruction: 27
(17) DAC: 1 channel voice and dual tone melody synthesizer (One 9-bits Cout or 8-bits PWM output).

FIGURE 1 : ROM Map of APExx24 Series

PC[15:0]

16-bit x 2 STACK

16-bit Data Pointer

00000h-0FFFFh

Data ROM for Melody

00000h-FFFFFh

Voice RO M for Vo ice

20-bit Voice Pointer

Reserved for Testing

Reset Vector

00000h
000FEh

000FFh-00400h
00401h

00000h-0FFFFh

Program ROM

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Rev 1.5 2004/4/20