Rainbow Electronics APExx12 User Manual

PLUS MAKE YOUR PRODUCTION A-PLUS

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APExx12 Series

DATA SHEET

PLUS INTEGRATED CIRCUITS INC.

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Address:

3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,

Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段 32 號 3 樓之 10.

TEL: [phone]

FAX: [phone]

WEBSITE : http: //www.aplusinc.com.tw

Sales E-mail:

[e-mail]

Technology E-mail:

[e-mail]

APExx12 Series

1.0 General Description

The APExx12 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various
features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody
synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one
voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices.
With CMOS technology and halt function can minimize power dissipation. Their architectures are similar
to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single
cycle, except for program branches and data table read instructions (which need two instruction cycles).

2.0 Features

(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz.
(2) Program ROM: 16k x 10 bits
(3) 1 set of 16-bits DPR can access up to 64k x 10 bits melody data memory space, and 1 set of 18-bits

VPR can access up to 256k x 10 bits voice data memory space.

Product Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bit )

APE0612 6 14-bits 20k
APE1012 10 15-bits 32k
APE1512 15 16-bits 48k
APE2012 20 16-bits 64k
APE3112 31 17-bits 96k
APE4112 41 17-bits 128k
APE5212 52 18-bits 160k
APE6312 63 18-bits 192k
APE7312 73 18-bits 224k
APE8412 84 18-bits 256k

(4) Data Registers:

a). 128 x 4-bit data RAM (00-7Fh)
b). Unbanked special function registers (SFR) range: 00h-2Fh

(5) I/O Ports:

a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Regist er control)
b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option)

c). PRD: 4-b its I/O Port D (15h) c a n be pr og r am me d t o inpu t/output ind i v i du al l y. (Reg i s t er c ont r ol )
(6) On-chip clock generator: Resistive Clock Drive (RM)
(7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter).
(8) Stack: 2-level subroutine nesting.
(9) B uilt-in 4 Level Vol u me Co ntrol can be pro gr amm ed .

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Rev 1.5 2004/4/20