PLUS MAKE YOUR PRODUCTION A-PLUS
A
APExx08 Series
DATA SHEET
PLUS INTEGRATED CIRCUITS INC.
A
Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段 32 號 3 樓之 10.
TEL: 886-2-2782-9266
FAX: 886-2-2782-9255
WEBSITE : http: //www.aplusinc.com.tw
Sales E-mail:
sales@aplusinc.com.tw
Technology E-mail:
service@aplusinc.com.tw
APExx08 Series
1.0 General Description
The APExx08 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various
features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody
synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one
voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices.
With CMOS technology and halt function can minimize power dissipation. Their architectures are similar
to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single
cycle, except for program branches and data table read instructions (which need two instruction cycles).
2.0 Features
(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz.
(2) Program ROM: 16k x 10 bits
(3) 1 set of 16-bits DPR can access up to 64k x 10 bits melody data memory space, and 1 set of 18-bits
VPR can access up to 256k x 10 bits voice data memory space.
Product Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bit )
APE0508 5 14-bits 16k
APE1008 10 15-bits 32k
APE1508 15 16-bits 48k
APE2008 20 16-bits 64k
APE3108 31 17-bits 96k
APE4108 41 17-bits 128k
APE5208 52 18-bits 160k
APE6308 63 18-bits 192k
(4) Data Registers:
a). 128 x 4-bit s data RAM (00-7Fh)
(APE0508 /1008 is 96 x 4-bits data RAM 00-5Fh)
b). Unbanked special function registers (SFR) range: 00h-2Fh
(5) I/O Ports:
a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Regist er control)
b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option)
(6) On-chip clock generator: Resistive Clock Drive (RM)
(7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter).
(8) Stack: 2-level subroutine nesting.
(9) B uilt-in 4 Level Volume Control can be pr o gr amm ed .
(10) Built-in 8 Level DAC current output can be configured. (Mask option)
(11) Built-in IR Carry Output: Port B[1] can be configured as IR pin by 38k / 56kHz. (Mask option)
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Rev 1.5 2004/4/20
APExx08 Series
(12) External Reset: Port B[3] can be configured as reset pin. (Mask opt on)
(13) HALT and Release from HALT function to reduce power consumpt ion
(14) Watch Dog Timer (WDT)
(15) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles
(16) Number of instruction: 27
(17) DAC: 1 channel voice and dual tone melody synthesizer (One 9-bits Cout or 8-bits PWM output).
FIGURE 1 : ROM Map of APExx08 Series
00000h-0FFFFh
Data ROM for Melody
PC[13:0]
14-bit x 2 STACK
16-bit Data Pointer
18-bit Voice Pointer
Reserved for Testing
Reset Vector
00000h
000FEh
000FFh-00400h
00401h
00000h-03FFFh
Program ROM
00000h-2FFFFh
Voic e ROM fo r Voice
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Rev 1.5 2004/4/20