Rainbow Electronics APC5890 User Manual

APLUS INTEGRATED CIRCUITS INC. APC5890

APC5890 DE-COMPRESSION VOICE IC

1. CHIP FEATURES.

z DUAL OPERATION FREQUENCIES:

- 32.768 KHZ & 0.5 SECOND TIMER INTERRUPT.

- BUILT-IN PLL CIRCUIT TO GENERATE SYSTEM CLOCK MAX 20MHZ.

z BUILT-IN 2KBYTES(1K*16) RAM.
z ADDRESS UP TO 8MBYTE(4M*16) RAM OR ROM OR “ROM AND RAM”

BUILT-IN 16KBYTE(8K*16) PROGRAM ROM AND 1.5M BYTE(768K*16) DATA ROM

z BUILT-IN DECOMPRESSION ENGINE

THE VOICE DE-COMPRESSION RATE IS AS THE FOLLOWS:

- 3.6KBIT/SEC - 4.8KBIT/SEC - 6.0KBIT/SEC - 7.2KBIT/SEC - 8.4KBIT/SEC - 9.6KBIT/SEC -

10.8KBIT/SEC - 12.0 KBIT/SEC - 13.2 KBIT/SEC - 14.4 KBIT/SEC

DE-COMPRESSION

RATE

VOICE DURATION

DE-COMPRESSION

RATE

VOICE DURATION

3.6 K BIT/SEC 56.89 min. 9.6 K BIT/SEC 21.33 min.

4.8 K BIT/SEC 42.67 min. 10.8 K BIT/SEC 18.96 min.

6.0 K BIT/SEC 34.13 min. 12.0 K BIT/SEC 17.07 min.

7.2 K BIT/SEC 28.44 min. 13.2 K BIT/SEC 15.52 min.

8.4 K BIT/SEC 24.38 min. 14.4 K BIT/SEC 14.22 min.

THE MUSIC DE-COMPRESSION RATE IS AS THE FOLLOWS:

DE-COMPRESSION

RATE

VOICE DURATION

DE-COMPRESSION

RATE

VOICE DURATION

10 K BIT/SEC 20.48 min. 18 K BIT/SEC 11.38 min.
12 K BIT/SEC 17.07 min. 20 K BIT/SEC 10.24 min.
14 K BIT/SEC 14.63 min. 22 K BIT/SEC 9.31 min.
16 K BIT/SEC 12.80 min. 24 K BIT/SEC 8.53 min.

z BUILT-IN 12 BITS D/A, 8 BITS ADC.
z I/O PORTS

16 I/O PINS FOR PORT A.
12 OUTPUT FOR PORT B.
16 I/O PINS FOR PORT C.

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APLUS INTEGRATED CIRCUITS INC. APC5890

z TWO 16BITS TIMERS : TIMER_A AND TIMER_B.
z WATCHDOG TIMER.
z SLEEP MODE : CRYSTAL & SYSTEM

2. BLOCK DIAGRAM.

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APLUS INTEGRATED CIRCUITS INC. APC5890

.

2. PIN DESCRIPTION :

P

IN NAME I/O DESCRIPTION

RESET I RESET INPUT. ACTIVE LOW.

PWM1,PWM2 O PWM OUTPUT.

DAC O OUTPUT FROM D/A CONVERTER.
XOSC1 I CRYSTAL OSCILLATOR INPUT PIN.
XOSC2 O CRYSTAL OSCILLATOR OUTPUT PIN.

CAP I CAPACITOR FOR PLL CIRCUIT.

PA0-PA7 I/O

I/O PORT_A PIN 0 TO 7. ALSO AS EXTERNAL INTERRUPT

SOURCE.(FALL EDGE TRIGGER), INTERNAL PULL HIGH.

PA8-PA12 IO I/O PORT_A PIN 8 TO 12, INTERNAL PULL HIGH.

PA13/ADC I/O

I/O PORT_A PIN 13 OR ANALOG SIGNAL INPUT.INTERNAL PULL LOW.

PA14 I/O I/O PORT_A PIN 14, INTERNAL PULL HIGH.
PA15 I/O I/O PORT_A PIN 15, INTERNAL PULL HIGH.

PB0-PB5/BANK3-BANK8 O PORT_B OR EXTERNAL MEMORY BANK SELECT

PORT_B PIN 6 OR EXTERNAL RAM READ

PB6/EMEMRD O

(ACTIVE LOW).

PORT_B PIN 7 OR EXTERNAL RAM SELECT PIN

PB7/EXTRAM O

(ACTIVE LOW)

PB8/EMEMWRL I/O

Port_b pin 8 or External RAM low byte write(Active Low),

Input at reset cycle, output at normal cycle, internal pull high

Port_b pin 9 or External IRQ input pin(rise edge trigger),

PB9/EXTIRQ I/O

Input at reset cycle, output at normal cycle, internal pull low.

Port_b pin 10 or External RAM high byte write(Active Low),

PB10/EMEMWRH O

Input at reset cycle, output at normal cycle, Internal pull low.

PORT_B PIN 11 ROM SELECT OR EXTERNAL ROM CHIP

PB11/EXTROMCS I/O

SELECT
AT NORMAL OPERATION ,CYCLE, INTERNAL PULL HIGH.

(ACTIVE LOW), INPUT AT RESET CYCLE, OUTPUT

EMEMAD: EXTERNAL MEMORY ADDRESS/DATA

PC/EMEMAD I/O

IF IT IS ADDRESS THEN EMEMA0~EMEMA12 IS A1~A13.

EMEMA13~EMEMA15 IS BANK0~BANK2.

EXTERNAL MEMORY ADDRESS LATCH ENABLE.

ALE I/O

I

NPUT AT RESET CYCLE,OUTPUT AT NORMAL OPERATION

CYCLE

, INTERNAL PULL HIGH.

VDD1-VDD4 I DIGITAL POWER INPUT.

GND1-GND4 I DIGITAL GROUND.

PLLVDD,PLLGND I POWER AND GROUND FOR PLL CIRCUIT.

DACVDD,DACGND I POWER AND GROUND FOR DAC CIRCUIT.

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