Rainbow Electronics aP8942A User Manual

Integrated Circuits Inc. aP8942A

1

APLUS MAKE YOUR PRODUCTION A-PLUS

VOICE OTP IC

aP8942A – 42sec

APLUS INTEGRATED CIRCUITS INC.

Address:

3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
Taiwan 115, R.O.C.

(115)台北市南港區成功路一段 32號3樓之10.

TEL: [phone]
FAX: [phone]
WEBSITE : http: //www.aplusinc.com.tw

Sales E-mail:

[e-mail]

Support E-mail:

[e-mail]

Ver 2.0 Dec 6, 2006

Integrated Circuits Inc. aP8942A

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FEATURES

• Standard CMOS process.

• Embedded 1M bits EPROM.

• 42 sec Voice Length at 6KHz sampling and 4-bit ADPCM compression.

• Maximum 32 voice groups.

• Combination of voice blocks to extend playback duration.

• 960 table entries are available for voice block combinations.

• User selectable PCM or ADPCM data compression.

• Two triggering modes are available (EPROM programmable options).

- Key Trigger Mode – Combinations of S1 ~ S8 to trigger 32 Voice Groups; SBT

sequential trigger is possible.

- CPU Parallel Trigger Mode – Combinations of S1 ~ S5 with SBT goes HIGH to

strobe start the voice playback.

• Voice Group Trigger Options: Edge / Level; Hold / Un-hold; Retrigger / Non-retrigger.

• Whole Chip Options: Ramp / No-ramp; Output Options; Key / CPU trigger mode.

• 16ms (@ 8KHz sampling rate) Debounce Time for both Key and CPU Trigger Mode.

• RST pin set to HIGH to stop playback at once.

• Two user programmable outputs for STOP pulse, BUSY signal and flashing LED.

• Built-in oscillator to control sampling frequency with an external resistor.

• 2.6V – 5.0V; Wide range single power supply and < 5uA low stand-by current.

• PWM Vout1 and Vout2 drive speaker directly.

• D/A COUT to drive speaker through an external BJT.

• Development System support voice compilation and options selection.

DESCRIPTION

aP8942A high performance Voice OTP is fabricated with Standard CMOS process with embedded
1M bits EPROM. It can store up to 42sec voice message with 4-bit ADPCM compression at 6KHz
sampling rate. 8-bit PCM is also available as user selectable option. Two trigger modes, simple
Key trigger mode and Parallel CPU trigger mode facilitate different user interface. User selectable
triggering and output signal options provide maximum flexibility to various applications. Built-in
resistor controlled oscillator, 8-bit current mode D/A output and PWM direct speaker driving output
minimize the number of external components. PC controlled programmer and developing
software are available.

Ver 2.0 Dec 6, 2006

Integrated Circuits Inc. aP8942A

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Mode

Mode

1 S8 - Trigger pin (input with internal pull

-

down)

S8

OUT1

VOUT1

VOUT2

VSS

OUT2

V33 COUT

2 3 4 5 6 7 8 20

S1 S3 S2 VDD

S4 SBT

RST

S7

OSC

S5

S6 VPP

PIN CONFIGURATIONS

1

19
18
17
16

15

14

13

PIN

Playback

9

10

DIP / SOP 300 MIL

OTP Program

Description

12

11

2 OUT1 OEB Programmable output (I/O pin)
3 VOUT1 - PWM output to drive speaker directly
4 VOUT2 - PWM output to drive speaker directly
5 VSS VSS Power Ground
6 OUT2 IO Programmable output (I/O pin)
7 V33 V33 Power Supply for OTP programming
8 COUT - D/A current output

9 OSC ACLK Oscillator input
10 S5 S5 Trigger pin (input with internal pull-down)
11 S6 S6 Trigger pin (input with internal pull-down)
12 VPP VPP Supply voltage for OTP programming
13 S1 S1 Trigger pin (input with internal pull-down)
14 S2 S2 Trigger pin (input with internal pull-down)
15 VDD VDD Positive Power Supply
16 S3 S3 Trigger (input with internal pull-down)
17 S4 S4 Trigger (input with internal pull-down)
18 SBT PGM Trigger pin (input with internal pull-down)
19 RST DCLK Reset pin (input with internal pull-down)
20 S7 S7 Trigger pin (input with internal pull-down)

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PIN DESCRIPTIONS

S1 ~ S8

Input Trigger Pins:

- S1 to S8 are used to trigger the 32 Voice Groups in Key Mode.

- S1 to S5 together with SBT are used to trigger the 32 Voice Groups in CPU Parallel Mode.

- In OTP Programming Mode, S1 to S7 are used as program enable pins.

SBT

Input Trigger Pin:

- In Key Trigger Mode, this pin is trigger pin to trigger the playback of Voice Groups one by one

sequentially.

- In CPU Parallel Command Mode, this pin is used as address strobe to latch the input from S1 to

S5 and starts the voice playback.

- In OTP Programming Mode, this pin is used as PGM signal.

VDD and V33

Power Supply Pin for normal and programming operation

VSS

Power Ground Pin

VOUT1 and VOUT2

Digital PWM output pins which can drive speaker and buzzer directly for voice playback.

OSC

During voice playback, an external resistor is connected between this pin and the VDD pin to set
the sampling frequency. In OTP Programming Mode, this is the ACLK input signal.

VPP

No connection during voice playback. In OTP Programming Mode, this pin is connected to a
separate 6.5V power supply.

OUT1 and OUT2

- In Key Trigger Mode and CPU Parallel Command Mode, these pins are user programmable pins

for the STOP pulse, BUSY and LED signals.

- During OTP programming, OUT1 serves as OEB while OUT2 serves as data IO.

COUT

Analog 8-bit current mode D/A output for voice playback

RST

Chip reset in playback mode or DCLK pin in OTP programming mode.

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Integrated Circuits Inc. aP8942A

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VOICE SECTION COMBINATIONS

Voice files created by the PC base developing system are stored in the built-in EPROM of the
aP8942A chip as a number of fixed length Voice Blocks. Voice Blocks are then selected and
grouped into Voice Groups for playback. Up to 32 Voice Groups are allowed. A Voice Block
Table is used to store the information of combinations of Voice Blocks and then group them
together to form Voice Group.

Chip aP8942A

Memory size 1M bits
Max no. of Voice Block 252
No. of bytes per Voice Block 512
Max. no. of Voice Group 32
No. of Voice Table entries 960
Voice Length (@ 6KHz 4-bit ADPCM) 42 sec

Example of Voice Block Combination

Assume here we have three voice files, they are “How are You?”, Sound Effect and Music. Each
of the voice file is divided into a number of fixed length Voice Block and stored into the memory.

Voice File 1 - “How are You?” is stored in Voice Block B0 to B12.
Voice File 2 - Sound Effect is stored in Voice Block B13 to B15.
Voice File 3 - Music is Voice Block B16 to B40.

Voice Blocks are grouped together using Voice Table to form Voice Group for playback:

Group no. Voice Group contents Voice Table Entries

Group 1 “How are You?” B0 … B12
Group 2 Sound Effect + “How are You?” B13 … B15 + B0 … B12
Group 3 “How are You?” + Music B0 … B12 + B16 … B40
Group 4 Music B16 … B40

Voice Data Compression

Voice File data is stored in the on-chip EPROM as either 4-bit ADPCM or 8-bit PCM format.
Voice data stored as 4-bit ADPCM provides 2:1 data compression which can save 50% of memory
space. On the other hand, voice data are stored as 8-bit PCM format means no data compression is
employed but voice playback quality will be better.

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Integrated Circuits Inc. aP8942A

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Programmable Options

In both Key Trigger Mode and CPU Parallel Trigger Mode, user can select different trigger
functions and output signals to be sent out from the pins OUT1 and OUT2.
Options affect all Voice Group playback are called Whole Chip Options. Options only affect the
playback of individual Voice Group are called Group Options.

Whole Chip Options

• Key or CPU Parallel Trigger Mode.

• Ramp-up-down enable or disable:

When COUT is used for playback, Ramp-up-down should be enabled. This function
eliminates the ‘POP’ noise at the beginning and end of voice playback.
When VOUT1 and VOUT2 are used to drive speaker directly, Ramp-up-down should be
disabled.

Fig. 1 Ramp-up-down Enable Fig.2 Ramp-up-down Disable

• Output Options:

This option sets up the three output pins OUT1 and OUT2 to send out different signals
during voice playback. Four settings are allowed:

OUT1 OUT2

Option 1 LED2 LED1
Option 2 LED2 STOP
Option 3 LED2 BUSY

Option 4 STOP BUSY

Note: Stop plus must be set to enable in order to have STOP plus to come out.

Fig. 3 Output waveforms

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Integrated Circuits Inc. aP8942A

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Group Options

User selectable options that affect each individual group are called Group Options. They are:

• Edge or Level trigger

• Unholdable or Holdable trigger

• Re-triggerable or non-retriggerable

• Stop pulse disable or enable

Fig. 4 to Fig. 9 show the voice playback with different combination of triggering mode and the
relationship between outputs and voice playback.

Fig. 4 Level, Unholdable, Non-retriggerable

Fig. 5 Level Holdable

Fig. 6 SBT sequential trigger with Level Holdable and Unholdable

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Fig. 7 Edge, Unholdable, Non-retrigger

Fig. 8 Edge, Holdable

Fig. 9 SBT sequential trigger with Edge Holdable and Unholdable

Ver 2.0 Dec 6, 2006

Integrated Circuits Inc. aP8942A

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Overlap trigger is supported with Level/Unholdable trigger options:

Fig. 10 Overlap trigger

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Integrated Circuits Inc. aP8942A

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TRIGGER MODES

There are two triggering modes available with aP8942A.

Key or CPU Trigger modes are determined by setting the EPORM programmable options during
voice data compilation.

Key Trigger Mode

With this trigger mode, up to 32 Voice Groups are triggered by setting S1 to S8 to HIGH or NC (not
connected) in different combinations. Each Voice Group can have its only independent trigger
options (See Fig. 4, 5, 7 and 8 for trigger options definition).

Voice Groups can also be triggered sequentially by setting SBT pin to HIGH.

CPU Parallel Trigger Mode

In this mode, S1 to S5 are set to HIGH or LOW according to the table above and followed by
setting the SBT input pin to HIGH, the corresponding Voice Group will be triggered.

Trigger options defined in Fig. 4, 5, 7 and 8 are valid for this mode.

Fig. 11 CPU Parallel Trigger Mode

Note that SBT pin cannot be used as Single Button Sequential trigger in this mode. In stead, it
acts as a Strobe input to clock-in the data input from S1 to S5 into the chip.

Ver 2.0 Dec 6, 2006

Integrated Circuits Inc. aP8942A

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Key Trigger Mode

Up to 32 Voice Groups can be triggered by S1 to S8.

Voice Group

1 HIGH
2 NC HIGH
3 NC NC HIGH
4 NC NC NC HIGH
5 NC NC NC NC HIGH
6 NC NC NC NC NC HIGH

S1 S2 S3 S4 S5 S6 S7 S8

NC NC NC NC NC NC NC

NC NC NC NC NC NC

NC NC NC NC NC

NC NC NC NC

NC NC NC

NC NC
7 NC NC NC NC NC NC HIGH
8 NC NC NC NC NC NC NC HIGH
9 HIGH HIGH

10 NC HIGH HIGH
11 NC NC HIGH HIGH
12 NC NC NC HIGH HIGH
13 NC NC NC NC HIGH HIGH

NC NC NC NC NC NC

NC NC NC NC NC

NC NC NC NC

NC NC NC

NC NC

14 NC NC NC NC NC HIGH HIGH
15 NC NC NC NC NC NC HIGH HIGH
16 HIGH

NC NC NC NC NC NC HIGH

NC

NC

17 HIGH HIGH HIGH
18 NC HIGH HIGH HIGH
19 NC NC HIGH HIGH HIGH
20 NC NC NC HIGH HIGH HIGH
21 NC NC NC NC HIGH HIGH HIGH

NC NC NC NC NC

NC NC NC NC

NC NC NC

NC NC

NC
22 NC NC NC NC NC HIGH HIGH HIGH
23 HIGH
24 HIGH HIGH
25 HIGH HIGH HIGH HIGH
26 NC HIGH HIGH HIGH HIGH
27 NC NC HIGH HIGH HIGH HIGH
28 NC NC NC HIGH HIGH HIGH HIGH

NC NC NC NC NC HIGH HIGH

NC NC NC NC NC HIGH

NC NC NC NC

NC NC NC

NC NC

NC
29 NC NC NC NC HIGH HIGH HIGH HIGH
30 HIGH
31 HIGH HIGH
32 HIGH HIGH HIGH

NC NC NC NC HIGH HIGH HIGH

NC NC NC NC HIGH HIGH

NC NC NC NC HIGH

Ver 2.0 Dec 6, 2006

Integrated Circuits Inc. aP8942A

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CPU Trigger Mode

Up to 32 Voice Groups can be triggered by supplying address to [S5:S1] with SBT as strobe signal.

Voice Group S8 S7 S6 S5 S4 S3 S2 S1

1 NC NC NC 0 0 0 0 0
2 NC NC NC 0 0 0 0 1
3 NC NC NC 0 0 0 1 0
4 NC NC NC 0 0 0 1 1
5 NC NC NC 0 0 1 0 0
6 NC NC NC 0 0 1 0 1
7 NC NC NC 0 0 1 1 0
8 NC NC NC 0 0 1 1 1

9 NC NC NC 0 1 0 0 0
10 NC NC NC 0 1 0 0 1
11 NC NC NC 0 1 0 1 0
12 NC NC NC 0 1 0 1 1
13 NC NC NC 0 1 1 0 0
14 NC NC NC 0 1 1 0 1
15 NC NC NC 0 1 1 1 0
16 NC NC NC 0 1 1 1 1
17 NC NC NC 1 0 0 0 0
18 NC NC NC 1 0 0 0 1
19 NC NC NC 1 0 0 1 0
20 NC NC NC 1 0 0 1 1
21 NC NC NC 1 0 1 0 0
22 NC NC NC 1 0 1 0 1
23 NC NC NC 1 0 1 1 0
24 NC NC NC 1 0 1 1 1
25 NC NC NC 1 1 0 0 0
26 NC NC NC 1 1 0 0 1
27 NC NC NC 1 1 0 1 0
28 NC NC NC 1 1 0 1 1
29 NC NC NC 1 1 1 0 0
30 NC NC NC 1 1 1 0 1
31 NC NC NC 1 1 1 1 0
32 NC NC NC 1 1 1 1 1

Ver 2.0 Dec 6, 2006

Integrated Circuits Inc. aP8942A

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BLOCK DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol Rating Unit

VDD - VSS

VIN V

V

V

OUT

SS

-0.5 ~ +6 V

- 0.3<VIN<V

SS <VOUT<VDD/33

T (Operating):

DIP

SOP

-10 ~ +70

-40 ~ +85

T (Junction) -40 ~ +125

T (Storage) -55 ~ +125

DD/33

+ 0.3

V

V

℃

℃

℃

Ver 2.0 Dec 6, 2006

Integrated Circuits Inc. aP8942A

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DC CHARACTERISTICS ( T

= 0 to 70℃, VDD = 4.5V, VSS = 0V )

A

Symbol Parameter Min. Typ. Max.

VDD

ISB

IOP

VIH

VIL

IOL

IOH

Operating Voltage 2.6 4.5 5.0 V

Standby current

Operating current



 

1 5

"H" Input Voltage 2.5 3.0 3.5 V

"L" Input Voltage -0.3 0 0.5 V

V

low O/P Current

OUT

V

high O/P Current

OUT





110

-110

Unit Condition

μA

15 mA I/O open





mA

mA

I/O open

VDD=3.0V

VDD=3.0V

Vout=0.3V, VDD=5.0V

Vout=2.5V, VDD=5.0V

ICO

IOH

IOL

∆F/F

C

O/P Current

OUT

O/P high Current

O/P low Current







Frequency Stability -5

-3

-8

8









+5

mA

mA

mA

%

V

COUT

=1.0V

VOH=2.5V, VDD=5.0V

VOL=0.3V, VDD=5.0V

Fosc(5.0V) – Fosc(4.0V)

Fosc(4.5V)

Ver 2.0 Dec 6, 2006

Integrated Circuits Inc. aP8942A

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S1~S

5

TIMING WAVEFORMS

KEY Trigger Mode

S1~S8, SBT

COUT

tKD

tSTPD

STOP
BUSY

tBD

tBH

CPU Parallel Mode

Addr.

SBT

tAS

tSBTW

AC CHARACTERISTICS ( T

Symbol Parameter Min. Typ. Max.

tKD

tKD

t

STPD

Key trigger debounce time 16

Key trigger debounce time – retrigger 24

STOP pulse output delay time

tAH

= 0 to 70℃, VDD = 4.5V, VSS = 0V, 8KHz sampling )

A

 

 

 

256

tSTPW

Unit Note

ms 1

ms 1

μs

t

tBD

tBH

tAS

tAH

t

t

STPW

SBTW

LEDC

STOP pulse width

BUSY signal output delay time

BUSY signal output hold time

Address set-up time 100

Address hold time 100

SBT stroke pulse width 65

LED flash frequency



64

 



100

 

 

 



3



ms 1

100 ns



ns

ns

ns

μs



Hz 2

1

Notes :

1. This parameter is inversely proportional to the sampling frequency.

2. This parameter is proportional to the sampling frequency.

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Integrated Circuits Inc. aP8942A

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OSCILLATOR RESISTANCE TABLE

Sampling Frequency

KHz

22 83 400 5.4
18 108 370 5.9
16 125 350 6.3
15 134 330 6.5
13 158 300 7.0
12 168 280 7.6
11 183 250 8.5
10 202 220 9.5

9 227 200 10.3
8 252 170 11.9
7 296 150 13.8
6 344 120 16.5

R

R

OSC

OSC

KΩ KΩ

100 19.3

91 20.5

Sampling Frequency

KHz

82 22.4

Note: The data in the above tables are within 3% accuracy and measured at VDD = 4.5V. Oscillator

frequency is subjected to IC lot to lot variation.

FREQUENCY AGAINST VDD STABILITY

aP8921A Freqency Stability (Rosc = 293K Ohm)

10.0%

5.0%

0.0%

-5.0%

-10.0%

△F (%)

-15.0%

-20.0%

-25.0%

-30.0%

5.50 5.00 4.50 4.00 3.50 3.00 2.60
VDD (V)

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S1 S2

Speaker

8 ΩSpeaker

TYPICAL APPLICATIONS

4.5~5V

Cin

4.7uF

Rosc

0.1uF

RST

OSC

S3

S8

SBT

VDD

V33

COUT

VOUT1
VOUT2

OUT1

VSS

0.1uF

16 Ω

1KΩ

Cout

1~2uF

8050D

390Ω

Fig. 12 Using 4.5V Battery

Note 1: Two capacitors Cin and Cout must be connected from VDD and V33 pins to VSS to

stabilize the power supply to the chip. When small capacity battery, e.g. AG10, is
used, Cin and Cout may need to be as large as 22uF. However, if Cin and Cout is
too large, the power-up reset generated by 0.1uF at the RST pin may not be function
because it takes longer time for both Cin and Cout to discharge.

Note 2: 16 Ohm speaker will provide lauder and better sound quality when the VOUT speaker

direct drive is used.

Note 3: The value of the 390 Ohm base resistor should be modified according to different Vdd

value, the kind of speaker and NPN transistor.

Note 4: The VPP pin should be leave unconnected for playback.

Ver 2.0 Dec 6, 2006

Integrated Circuits Inc. aP8942A

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BONDING PADS

aP8942A

Fig. 12 Pad Locations

Notes:

1. VPP pad should be not connected during voice playback.

2. Substrate should be connected to the Power GND.

Ver 2.0 Dec 6, 2006