Rainbow Electronics aP89085 User Manual

Integrated Circuits Inc. aP89341/170/085

APLUS MAKE YOUR PRODUCTION A-PLUS

VOICE OTP IC

aP89341 – 341sec
aP89170 – 170sec
aP89085 – 85sec

APLUS INTEGRATED CIRCUITS INC.

Address:

3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
Taiwan 115, R.O.C.

(115)台北市南港區成功路一段 32 號 3樓之 10.

TEL: [phone]
FAX: [phone]

WEBSITE : http: //www.aplusinc.com.tw

Sales E-mail:

[e-mail]

Support E-mail:

[e-mail]

Integrated Circuits Inc. aP89341/170/085

FEATURES

• Standard CMOS process.

• Embedded 8M/4M/2M EPROM.

• 341/170/85 sec Voice Length at 6KHz sampling and 4-bit ADPCM compression.

• Maximum 254 voice groups.

• Combination of voice blocks to extend playback duration.

• 7680 table entries are available for voice block combinations.

• User selectable PCM or ADPCM data compression

• Three triggering modes are available (controlled by M1 and M0 input pins):

- Key Trigger Mode (M1=0, M0=0) - S1 ~ S8 to trigger up to 32 voice groups; SBT

to trigger up to 254 voice groups sequentially.

- CPU Parallel Trigger Mode (M1=0, M0=1) – S[8:1] services as 8-bits address to

trigger up to 254 voice groups with SBT goes HIGH to strobe the address bits.

- CPU Serial Command Mode (M1=1, M0=0) – user commands are clocked serially

into the chip which enable user to fully control the operation of the chip.

• Voice Group Trigger Options: Edge / Level; Hold / Un-hold; Retrigger / Non-retrigger.

• Whole Chip Options: Ramp / No-ramp; Output Options; Long / Short debounce time.

• Optional 16ms or 65us (@ 8KHz sampling rate) selectable debounce time

• RST pin set to HIGH to stop the playback at once

• Three user programmable outputs for STOP pulse, BUSY signal and flashing LED.

• Built-in oscillator to control sampling frequency with an external resistor

• 2.2V – 3.6V single power supply and < 5uA low stand-by current

• PWM Vout1 and Vout2 drive speaker directly

• D/A COUT pin drives speaker through an external BJT

• Development System support voice compilation.

DESCRIPTION

aP89341/170/085 series high performance Voice OTP is fabricated with Standard CMOS process with
embedded 8M/4M/2M bits EPROM. It can store up to 341/170/85 sec voice message with 4-bit
ADPCM compression at 6KHz sampling rate. 8-bit PCM is also available as user selectable option.
Three trigger modes, simple Key trigger mode, Parallel CPU trigger mode and CPU serial command
mode, facilitate different user interface. User selectable triggering and output signal options provide
maximum flexibility to various applications. Built-in resistor controlled oscillator, 8-bit current mode
D/A output and PWM direct speaker driving output minimize the number of external components. PC
controlled programmer and developing software are available.

Ver 2.1 1 Aug 24, 2006

Integrated Circuits Inc. aP89341/170/085

PIN NAMES

PIN

(24-pin)

1 S7 IO6 Trigger pin (I/O pin with internal pull-down)
2 S8 IO7 Trigger pin (I/O pin with internal pull-down)
3 VSS VSS Ground
4 VOUT1 - PWM output to drive speaker directly
5 VOUT2 - PWM output to drive speaker directly
6 VDD VDD Supply voltage
7 AVDD AVDD Analog supply voltage
8 VPP VPP Supply voltage for OTP programming

9 OSC ACLK Oscillator input
10 COUT - D/A current output
11 AVSS AVSS Analog ground
12 OUT3 - Programmable output (I/O pin)
13 OUT2 SIO Programmable output (I/O pin)
14 OUT1 OEB Programmable output (I/O pin)
15 RST DCLK Reset pin (input pin with internal pull-down)
16 SBT PGM Trigger pin (I/O pin with internal pull-down)
17 M1 M1 Mode select pin 1 (input with internal pull-down)
18 M0 M0 Mode select pin 0 (input with internal pull-down)

19 ~ 24 S1~S6 IO0~IO6 Trigger input (I/O pin with internal pull-down)

Playback

Mode

OTP

Program

Mode

Description

Ver 2.1 2 Aug 24, 2006

Integrated Circuits Inc. aP89341/170/085

PIN DESCRIPTIONS

S1 ~ S8

Input Trigger Pins:

- In Key Trigger Mode, S1 to S8 is used to trigger the first 32 out of the total 254 Voice Groups .

- In CPU Parallel Command Mode, S1 to S8 serve as Voice Group address inputs for 254 Voice

Groups with S1 as LSB and S8 as MSB.

- In CPU Serial Command Mode, S1 is Chip Select (SC) pin to initiate the command input. S2 is

the Serial Clock (SCK) pin which clocks the input command and data bits into the chip. S3 is the
Data In (DI) pin in which command and data bits are shifted input into the chip.

- In OTP Programming Mode, S1 to S8 are used as data I/O pins.

SBT

Input Trigger Pin:

- In Key Trigger Mode, this pin is trigger pin to trigger the playback of Voice Groups one by one

sequentially.

- In CPU Parallel Command Mode, this pin is used as address strobe to latch the Voice Group

address input at S1 to S8 and starts the voice playback.

- In OTP Programming Mode, this pin is used as PGM signal.

VDD and AVDD

Power Supply Pins: These two pins must be connected together to the positive power supply.

VSS and AVSS

Power Ground Pins: These two pins must be connected to the power ground.

M0 and M1

Operating Mode Setting Pins:

- M1=0, M0=0 set the chip into Key Trigger Mode

- M1=0, M0=1 set the chip into CPU Parallel Command Mode

- M1=1, M0=0 set the chip into CPU Serial Command Mode

- M1=1, M0=1 set the chip into OTP Programming Mode

VOUT1 and VOUT2

Digital PWM output pins which can drive speaker and buzzer directly for voice playback.

OSC

During voice playback, an external resistor is connect between this pin and the VDD pin to set the
sampling frequency. In OTP Programming Mode, this is the ACLK input signal.

VPP

During voice playback, this pin must be connected together with VDD to the positive power supply
voltage. In OTP Programming Mode, this pin is connected to a separate 6.5V power supply voltage
for EPROM programming.

OUT1, OUT2 and OUT3

- In Key Trigger Mode and CPU Parallel Command Mode, these pins are user programmable pins

for the STOP pulse, BUSY and LED signals.

- In CPU Serial Command Mode, OUT1, OUT2 and OUT3 are fixed as BUSY, POUT and FULL

status output which tell the status of the chip operation. POUT can be further configurable to
BUSYB, 8K, 4K, 2K, 1K, 16Hz, 1M and EMPTY (or FULLB).

- During OTP programming, OUT1 serves as OEB while OUT2 serves as SIO (serial data IO).

COUT

Analog 8-bit current mode D/A output for voice playback

RST

Chip reset in playback mode or DCLK pin in OTP programming mode.

Ver 2.1 3 Aug 24, 2006

Integrated Circuits Inc. aP89341/170/085

VOICE SECTION COMBINATIONS

Voice files created by the PC base developing system are stored in the built-in EPROM of the
aP89341/170/085 chip as a number of fixed length Voice Blocks. Voice Blocks are then selected and
grouped into Voice Groups for playback. Up to 254 Voice Groups are allowed. A Voice Block Table
is used to store the information of combinations of Voice Blocks and then group them together to form
Voice Group.

Chip aP89341 aP89170 aP89085

Memory size 8M bits 4M bits 2M bits

Max no. of Voice Block 2016 992 480

Max. no. of Voice Group 254 254 254

No of Voice Table entries 7680 7680 7680
Voice Length

(@ 6KHz 4-bit ADPCM)

Example of Voice Block Combination

Assume here we have three voice files, they are “How are You?”, Sound Effect and Music. Each of
the voice file is divided into a number of fixed length Voice Block and stored into the memory.

Voice File 1 - “How are You?” is stored in Voice Block B0 to B12.
Voice File 2 - Sound Effect is stored in Voice Block B13 to B15.
Voice File 3 - Music is Voice Block B16 to B40.

Voice Blocks are grouped together using Voice Table to form Voice Group for playback:

Group no. Voice Group contents Voice Table Entries

Group 1 “How are You?” B0 … B12
Group 2 Sound Effect + “How are You?” B13 … B15 + B0 … B12
Group 3 “How are You?” + Music B0 … B12 + B16 … B40

341 sec 170 sec 85 sec

Group 4 Music B16 … B40

Voice Data Compression

Voice File data is stored in the on-chip EPROM as either 4-bit ADPCM or 8-bit PCM format. Voice
data stored as 4-bit ADPCM provides 2:1 data compression which can save 50% of memory space.
On the other hand, voice data are stored as 8-bit PCM format means no data compression is employed
but voice playback quality will be better.

Ver 2.1 4 Aug 24, 2006

Integrated Circuits Inc. aP89341/170/085

Programmable Options

In Key Trigger Mode (M1=0; M0=0) and CPU Parallel Trigger Mode (M1=0; M0=1), user can select
different trigger functions and output signals to be sent out from the pins OUT1, OUT2 and OUT3.

Options that affect all Voice Group playback are called Whole Chip Options. Options that only affect
the playback of individual Voice Group are called Group Options.

Whole Chip Options

• Long (16ms) or short (65us) debounce time at 8KHz sampling rate.

• Ramp-up-down enable or disable:

When COUT is used for playback, Ramp-up-down should be enabled. This function eliminates
the ‘POP’ noise at the begin and end of voice playback.
When VOUT1 and VOUT2 are used to drive speaker directly, Ramp-up-down should be
disabled.

Fig. 1 Ramp-up-down Enable Fig.2 Ramp-up-down Disable

• Output Options:

This option sets up the three output pins OUT1, OUT2 and OUT3 to send out different signals
during voice playback. Four settings are allowed:

Option 1 LED1 LED2 BUSY
Option 2 STOP LED1 LED2
Option 3 LED1 BUSY STOP
Option 4 LED1 BUSY BUSYB

Note: BUSY can be set or reset associated with each Voice Block. Stop plus must be set to

enable in order to have STOP plus to come out at the end of playback.

OUT1 OUT2 OUT3

Fig. 3 Output waveforms

Ver 2.1 5 Aug 24, 2006

Integrated Circuits Inc. aP89341/170/085

Group Options

User selectable options that affect each individual group are called Group Options. They are:

• Edge or Level trigger

• Unholdable or Holdable trigger

• Re-triggerable or non-retriggerable

• Stop pulse disable or enable

Fig. 4 to Fig. 9 show the voice playback with different combination of triggering mode and the
relationship between outputs and voice playback.

Fig. 4 Level, Unholdable, Non-retriggerable

Fig. 5 Level Holdable

Fig. 6 SBT sequential trigger with Level Holdable and Unholdable

Ver 2.1 6 Aug 24, 2006

Integrated Circuits Inc. aP89341/170/085

Fig. 7 Edge, Unholdable, Non-retrigger

Fig. 8 Edge, Holdable

Fig. 9 SBT sequential trigger with Edge Holdable and Unholdable

TRIGGER MODES

There are three trigger modes available for aP89341/170/085 series which are determined by setting
M1 and M2 pins to logic HIGH or LOW.

• Key Trigger Mode (M1=0; M0=0);

• CPU Parallel Trigger Mode (M1=0; M0=1);

• CPU Serial Command Mode (M1=1; M0=0);

Ver 2.1 7 Aug 24, 2006