Rainbow Electronics ADC10321 User Manual

ADC10321
10-Bit, 20MSPS, 98mW A/D Converter with Internal
Sample and Hold

General Description

The ADC10321 is a low power, high performance CMOS
analog-to-digital converter that digitizes signals to 10 bits
resolution at sampling rates up to 25Msps while consuming
a typical 98mW from a single 5V supply. Reference force
and sense pins allow the user to connect an external refer­ence buffer amplifier to ensure optimal accuracy. No missing
codes is guaranteed over the full operating temperature
range. The unique two stage architecture achieves 9.2 Ef­fective Bits with a 10MHz input signal and a 20MHz clock
frequency. Output formatting is straight binary coding.

To ease interfacing to 3V systems, the digital I/O power pins
of the ADC10321 can be tied to a 3V power source, making
the outputs 3V compatible. When not converting, power
consumption can be reduced by pulling the PD (Power
Down) pin high, placing the converter into a low power
standby state, where it typically consumes less than 4mW.
The ADC10321’s speed, resolution and single supply opera­tion makes it well suited for a variety of applications in video,
imaging, communications, multimedia and high speed data
acquisition. Low power, single supply operation ideally suit
the ADC10321 for high speed portable applications, and its
speed and resolution are ideal for charge coupled device
(CCD) input systems.

The ADC10321 comes in a space saving 32-pin TQFP and
operates over the industrial (−40˚C ≤ T
ture range.

≤ +85˚C) tempera-

A

n Guaranteed No Missing Codes
n Tri-State Outputs
n TTL/CMOS or 3V Logic Input/Output Compatible

Key Specifications

n Resolution 10 Bits
n Conversion Rate 20 Msps
n ENOB
n DNL 0.35 LSB (typ)
n Conversion Latency 2 Clock Cycles
n PSRR 56dB
n Power Consumption 98mW (typ)
n Low Power Standby Mode

@

10MHz Input 9.2 Bits (typ)

Applications

n Digital Video
n Communications
n Document Scanners
n Medical Imaging
n Electro-Optics
n Plain Paper Copiers
n CCD Imaging

January 2003

<

4mW (typ)

ADC10321 10-Bit, 20MSPS, 98mW A/D Converter with Internal Sample and Hold

Features

n Internal Sample-and-Hold
n Single +5V Operation
n Low Power Standby Mode

© 2003 National Semiconductor Corporation DS100897 www.national.com

Connection Diagram

ADC10321

Ordering Information

Block Diagram

10089701

Commercial

(−40˚C ≤ T

ADC10321CIVT TQFP

≤ +85˚C) NS Package

A

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10089702

Pin Descriptions and Equivalent Circuits

ADC10321

Pin
No. Symbol Equivalent Circuit

Analog I/O

30 V

31 V

32 V

2V

1V

IN

REF

REF

REF

REF−

+

F

+

S

−

F

S

9 CLK

Description

Analog Input signal to be converted. Conversion
range is V

REF

+

StoV

REF

−

S.

Analog input that goes to the high side of the
reference ladder of the ADC. This voltage should

+

force V

S to be in the range of 2.3V to 4.0V.

REF

Analog output used to sense the voltage near the top
of the ADC reference ladder.

Analog input that goes to the low side of the
reference ladder of the ADC. This voltage should
force V

S to be in the range of 1.3V to 3.0V.

REF−

Analog output used to sense the voltage near the
bottom of the ADC reference ladder.

Converter digital clock input. VINis sampled on the
falling edge of CLK input.

8PD

26 OE

14 thru

19

and

D0 -D9

22 thru

25

3, 7, 28 V

A

Power Down input. When this pin is high, the
converter is in the Power Down mode and the data
output pins are in a high impedance state.

Output Enable pin. When this pin and the PD pin are
low, the output data pins are active. When this pin or
the PD pin is high, the output data pins are in a high
impedance state.

Digital Output pins providing the 10 bit conversion
results. D0 is the LSB, D9 is the MSB. Valid data is
present just after the falling edge of the CLK input.

Positive analog supply pins. These pins should be
connected to a clean, quiet voltage source of +5V. V
and VDshould have a common supply and be
separately bypassed with 10µF to 50µF capacitors in
parallel with 0.1µF capacitors.

A

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Pin Descriptions and Equivalent Circuits (Continued)

Pin

ADC10321

No. Symbol Equivalent Circuit

Description

Positive digital supply pins. These pins should be
connected to a clean, quiet voltage source of +5V. V

5, 10 V

D

and VDshould have a common supply and be
separately bypassed with 10µF to 50µF capacitors in
parallel with 0.1µF capacitors.

Positive supply pins for the digital output drivers.

12, 21 V

I/O

D

These pins should be connected to a clean, quiet
voltage source of +3V to +5V and be separately
bypassed with 10µF capacitors.

4, 27,

29

AGND

The ground return for the analog supply. AGND and
DGND should be connected together close to the
ADC10321 package.

The ground return for the digital supply. AGND and

6, 11 DGND

DGND should be connected together close to the
ADC10321 pacjage.

13, 20 DGND I/O The ground return of the digital output drivers.

A

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ADC10321

Absolute Maximum Ratings (Notes 1,

2)

If Military/Aerospace specified devices are required,

Machine Model 200V

Soldering Temp., Infrared, 10 sec. (Note 6) 235˚C

Storage Temperature −65˚C to +150˚C

please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Positive Supply Voltage (V = V

Voltage on Any I/O Pin −0.3V to (V

) 6.5V

A=VD

or VD) +0.3V)

A

Input Current at Any Pin (Note 3)

Package Input Current (Note 3)

Package Dissipation at T

=

A

See (Note 4)

25˚C

ESD Susceptibility (Note 5)

Human Body Model 1500V

±

25mA

±

50mA

Operating Ratings(Notes 1, 2)

Operating Temperature −40˚C ≤ T

V

Supply Voltage +4.5V to +5.5V

A,VD

V

I/O Supply Voltage +2.7V to 5.5V

D

V

Voltage Range 1.3V to (VA-1.0V)

IN

V

+ Voltage Range 2.3V to (VA-1.0V)

REF

V

− Voltage Range 1.3V to 3.0V

REF

PD, CLK, OE Voltage

−0.3V to + 5.5V

≤ +85˚C

A

Converter Electrical Characteristics

The following specifications apply for VA= +5.0VDC,VD= 5.0VDC,VDI/O = 5.0VDC,V

= 20pF, f

C

L

= 20MHz, RS=25Ω. Boldface limits apply for TA=T

CLK

MIN

to T

MAX

Symbol Parameter Conditions

Static Converter Characteristics

INL Integral Non-Linearity

DNL Differential-Non Linearity

Resolution with No Missing
Codes

Zero Scale Offset Error −6 mV(max)

Full-Scale Error −6 mV(max)

Dynamic Converter Characteristics

f

= 1.0MHz

IN

ENOB Effective Number of Bits

S/(N+D)

Signal-to-Noise Plus
Distortion Ratio

SNR Signal-to-Noise Ratio

THD Total Harmonic Distortion

SFDR

Spurious Free Dynamic
Range

DG Differential Gain Error f

DP Differential Phase Error f

Overrange Output Code V

Underrange Output Code V

= 4.43MHz

f

IN

= 10MHz

f

IN

= 1.0MHz

f

IN

= 4.43MHz

f

IN

= 10MHz

f

IN

= 1.0MHz

f

IN

= 4.43MHz

f

IN

= 10MHz

f

IN

= 1.0MHz

f

IN

= 4.43MHz

f

IN

= 10MHz

f

IN

= 1.0MHz

f

IN

= 4.43MHz

f

IN

= 10MHz

f

IN

= 4.43MHz, f

IN

= 4.43MHz, f

IN

>

V

IN

<

V

IN

= 17.72MHz 0.5 %(max)

CLK

= 17.72MHz 0.5 deg(max)

CLK

+ 1023

REF

− 0

REF

BW Full Power Bandwidth 150 MHz

PSRR

Power Supply Rejection
Ratio

Change in Full Scale with 4.5V to 5.5V
Supply Change

Reference and Analog Input Characteristics

V

IN

Analog Input Range

+ = +3.5VDC,V

REF

− = +1.5VDC,

REF

: all other limits TA= 25˚C(Note 7)

Typical

(Note 8)

±

0.45

±

0.35

Limits

(Note 9)

±

1.0 LSB(max)

±

0.85 LSB(max)

10 Bits

9.5

9.5

9.0

Bits(min)

9.2

59
59

56

dB(min)

57

60
60

58

dB(min)

58

−71

−70

−59

dB(min)

−66

74
72

60

68

56 dB

1.3

4.0

Units

Bits

Bits

dB

dB

dB

dB

dB

dB

dB
dB
dB

V(min)

V(max)

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Converter Electrical Characteristics (Continued)

The following specifications apply for VA= +5.0VDC,VD= 5.0VDC,VDI/O = 5.0VDC,V

= 20pF, f

C

L

ADC10321

= 20MHz, RS=25Ω. Boldface limits apply for TA=T

CLK

MIN

Symbol Parameter Conditions

C

IN

I

IN

R

REF

+ Positive Reference Voltage 3.5 4.0 V(max)

V

REF

V

− Negative Reference Voltage 1.5 1.3 V(min)

REF

(V

REF

(V

REF

Analog VINInput
Capacitance

Input Leakage Current 10 µA

Reference Ladder
Resistance

+) −

Total Reference Voltage 2.0

−)

DC and Logic Electrical Characteristics

The following specifications apply for VA= +5.0VDC,VD= +5.0VDC,VDI/O = 5.0VDC,V

= 20 pF, f

Symbol Parameter Conditions

CLK, OE, PD, Digital Input Characteristics

V

IH

V

IL

I

IH

I

IL

D00 - D13 Digital Output Characteristics

V

OH

V

OL

I

OZ

I

OS

Power Supply Characteristics

I

A

I/O Digital Supply Current

I

D+ID

P

D

= 20MHz, RS=25Ω. Boldface limits apply for TA=T

CLK

MIN

to T

Logical "1" Input Voltage VD= 5.5V 2.0 V(min)

Logical "0" Input Voltage VD= 4.5V 1.0 V(max)

Logical "1" Input Current VIH=V

D

Logical "0" Input Current VIL= DGND −10 µA

Logical "1" Output
Voltage

Logical "0" Output
Voltage

TRI-STATE Output
Current

Output Short Circuit
Current

Analog Supply Current

VDI/O = + 4.5V, I

I/O = + 2.7V, I

V

D

VDI/O = + 4.5V, I

I/O = + 2.7V, I

V

D

V

= DGND

OUT

V

OUT=VD

OUT

OUT

OUT

OUT

= −0.5mA
= −0.5mA

= −1.6mA
= −1.6mA

VDI/O=3V

V

I/O=5V

D

PD = LOW, Ref not included
PD = HIGH, Ref not included

PD = LOW, Ref not included
PD = HIGH, Ref not included

Power Consumption 98 110 mW (max)

+ = +3.5VDC,V

to T

REF

: all other limits TA= 25˚C(Note 7)

MAX

Typical

(Note 8)

Limits

(Note 9)

5pF

1000

+ = +3.5VDC,V

REF

: all other limits TA= 25˚C(Note 7)

MAX

Typical

(Note 8)

Limits

(Note 9)

10 µA

4.0

2.4

0.4

0.4

−10
10

±

12 mA

±

25 mA

14.5

0.5

5

0.2

16 mA(max)

6 mA(max)

− = +1.5VDC,

REF

850

1150

1.0

2.7

− = +1.5VDC,C

REF

Units

Ω(min)

Ω(max)

V(min)

V(max)

L

Units

V(min)
V(min)

V(max)
V(max)

µA
µA

AC Electrical Characteristics

The following specifications apply for VA= +5.0VDC,VDI/O = 5.0VDC,V
=tfc= 5ns, RS=25Ω.CL(data bus loading) = 20 pF, Boldface limits apply for TA=T
25˚C(Note 7)

Symbol Parameter Conditions

f

CLK1

f

CLK2

t

CH

t

CL

Maximum Clock Frequency 25 20 MHz(min)

Minimum Clock Frequency 1 MHz(max)

Clock High Time 23 ns(min

Clock Low Time 23 ns(min)

Duty Cycle 50

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+ = +3.5VDC,V

REF

Typical

(Note 8)

− = +1.5VDC,f

REF

to T

MIN

: all other limits TA=

MAX

CLK

Limits

(Note 9)

45
55

= 20MHz, t

Units

(Limits)

%(min)

%(max)

rc