ADC10154, ADC10158 10-Bit Plus Sign 4 ms ADCs
with 4- or 8-Channel MUX, Track/Hold and Reference
ADC10154, ADC10158 10-Bit Plus Sign 4 ms ADCs with
4- or 8-Channel MUX, Track/Hold and Reference
General Description
The ADC10154 and ADC10158 are CMOS 10-bit plus sign
successive approximation A/D converters with versatile analog input multiplexers, track/hold function and a 2.5V
band-gap reference. The 4-channel or 8-channel multiplexers can be software configured for single-ended, differential
or pseudo-differential modes of operation.
The input track/hold is implemented using a capacitive array and sampled-data comparator.
Resolution can be programmed to be 8-bit, 8-bit plus sign,
10-bit or 10-bit plus sign. Lower-resolution conversions can
be performed faster.
The variable resolution output data word is read in two
bytes, and can be formatted left justified or right justified,
high byte first.
Applications
Y
Process control
Y
Instrumentation
Y
Test equipment
ADC10158 Simplified Block Diagram
Features
Y
4- or 8- channel configurable multiplexer
Y
Analog input track/hold function
Y
0V to 5V analog input range with singlea5V power
supply
Y
b
5V toa5V analog input voltage range withg5V sup-
plies
Y
Fully tested in unipolar (singlea5V supply) and bipolar
g
(dual
Y
Y
Y
Y
Y
5V supplies) operation
Programmable resolution/speed and output data format
Ratiometric or Absolute voltage reference operation
No zero or full scale adjustment required
No missing codes over temperature
Easy microprocessor interface
Key Specifications
Y
Resolution10-bit plus sign
Y
Integral linearity error
Y
Unipolar power dissipation33 mW (max)
Y
Conversion time (10-bitasign)4.4 ms (max)
Y
Conversion time (8-bit)3.2 ms (max)
Y
Sampling rate (10-bitasign)166 kHz
Y
Sampling rate (8-bit)207 kHz
Y
Band-gap reference2.5Vg2.0% (max)
g
1 LSB (max)
TL/H/11225– 1
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor CorporationRRD-B30M75/Printed in U. S. A.
TL/H/11225
Absolute Maximum Ratings (Notes1&3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Positive Supply Voltage (V
Negative Supply Voltage (Vb)
Total Supply Voltage (V
Total Reference Voltage (V
Voltage at Inputs and
OutputsV
Input Current at Any Pin (Note 4)
Package Input Current (Note 4)
Package Dissipation at T
ESD Susceptibility (Note 6)2000V
Soldering Information
N Packages (10 Sec)260
J Packages (10 Sec)300
SO Package (Note 7):
Vapor Phase (60 Sec)215
Infrared (15 Sec)220
Storage Temperature
Ceramic DIP Packages
Plastic DIP and SO Packages
a
a
e
e
AV
DVa)6.5V
a
b
Vb)13V
a
REF
e
25§C (Note 5)500 mW
A
b
b
V
)6.6V
REF
b
b
0.3V to V
b
65§Ctoa150§C
b
40§Ctoa150§C
a
b
a
g
g
6.5V
0.3V
5mA
20 mA
§
§
§
§
Operating Ratings (Notes2&3)
Temperature RangeT
ADC10154CIN, ADC10154CIWM,
ADC10158CIN, ADC10158CIWM
Positive Supply Voltage
a
a
e
(V
Unipolar Negative Supply
Voltage (V
Bipolar Negative Supply
Voltage (V
a
b
V
V
REF
V
REF
V
REF(VREF
C
C
C
C
a
b
e
AV
DVa)4.5 VDCto 5.5 V
b
)DGND
b
)
b
V
AV
AV
a
b
b
V
REF
s
s
T
T
A
s
a
85§C
A
4.5V tob5.5V
b
b
0.05 V
b
b
0.05 V
a
a
0.05 VDCto V
a
a
0.05 VDCto V
b
40§CsT
MIN
b
)0.5 VDCto V
MAX
DC
11V
DC
DC
a
Electrical Characteristics
The following specifications apply for V
unipolar operation or V
apply for T
A
b
e
eb
e
T
T
MIN
to T
J
a
a
e
AV
5.0 VDCfor bipolar operation, and f
; all other limits T
MAX
a
e
ea
DV
e
e
T
A
J
5.0 VDC,V
e
CLK
25§C. (Notes 8, 9, and 12)
SymbolParameterConditions
UNIPOLAR CONVERTER AND MULTIPLEXER STATIC CHARACTERISTICS
The following specifications apply for V
for unipolar operation or V
Boldface limits apply for T
b
eb
A
a
a
e
e
AV
5.0 VDCfor bipolar operation, t
e
e
T
T
J
MIN
to T
MAX
DV
; all other limits T
a
ea
5.0 VDC,V
e
t
r
f
SymbolParameterConditions
AC CHARACTERISTICS
f
CLK
Clock Frequency85.0MHz (Max)
Clock Duty Cycle20% (Min)
t
C
Conversion8-Bit Unipolar Mode161/f
Time
f
CLK
e
8-Bit Bipolar Mode181/f
e
f
CLK
10-Bit Unipolar Mode201/f
e
f
CLK
10-Bit Bipolar Mode221/f
e
f
CLK
t
A
t
CR
t
RC
t
CW
t
WC
t
RW
t
W(WR)
t
WS
t
DS
t
DH
t
WR
t
ACC
tWI,t
t
INTL
Acquisition Time61/f
e
f
CLK
Delay between Falling Edge of
CS
and Falling Edge of RD
Delay betwee Rising Edge
RD and Rising Edge of CS
Delay between Falling Edge
of CS
and Falling Edge of WR
Delay between Rising Edge
of WR
and Rising Edge of CS
Delay between Falling Edge
of RD
and Falling Edge of WR
WR Pulse Width2550ns (Min)
WR High to CLKd2 Low Set-Up Time5ns (Max)
Data Set-Up Time615ns (Max)
Data Hold Time05ns (Max)
Delay from Rising Edge
of WR to Rising Edge RD
Access Time (Delay from FallingC
Edge of RD
Delay from Falling EdgeC
RI
of WR
to Output Data Valid)
or RD to Reset of INT
e
L
e
L
Delay from Falling Edge of CLKd2 to Falling
Edge of INT
e
3 ns and f
e
A
ae
REF
5.000 VDC,V
e
5.0 MHz unless otherwise specified.
CLK
e
T
25§C. (Note 16) (Continued)
J
Typical
(Note 10)
be
REF
Limits
(Note 11)
GND, V
b
(Limit)
e
Units
10kHz (Min)
80% (Max)
5.0 MHz3.2ms (Max)
5.0 MHz3.6ms (Max)
5.0 MHz4.0ms (Max)
5.0 MHz4.4ms (Max)
5.0 MHz1.2ms
05
ns (Min)
05ns (Min)
05ns (Min)
05ns (Min)
05ns (Min)
05ns (Min)
100 pF
100 pF
2545ns (Max)
2540ns (Max)
40ns
GND
CLK
CLK
CLK
CLK
CLK
5
Electrical Characteristics
The following specifications apply for V
for unipolar operation or V
Boldface limits apply for T
SymbolParameterConditions
b
eb
A
a
a
e
e
AV
5.0 VDCfor bipolar operation, t
e
e
T
T
J
MIN
to T
MAX
DV
; all other limits T
a
ea
5.0 VDC,V
e
e
t
r
f
REF
3 ns and f
e
T
A
ae
5.000 VDC,V
e
CLK
e
25§C. (Note 16) (Continued)
J
REF
5.0 MHz unless otherwise specified.
Typical
(Note 10)
be
GND, V
Limits
(Note 11)
b
AC CHARACTERISTICS (Continued)
t1H,t
t
RR
t
P
TRI-STATE Control (Delay fromC
0H
Rising Edge of RD
to Hi-Z State)
Delay between Successive
RD
Pulses
Delay between Last Rising Edge
of RD
and the Next Falling2050ns (Min)
L
e
10 pF, R
e
1kX
L
2035ns (Max)
2550ns (Min)
Edge of WR
C
IN
C
OUT
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications
and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics
may degrade when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND, unless otherwise specified.
Note 4: When the input voltage (V
The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four.
Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
device, T
with BIJ, CIJ and CMJ suffixes 49
and CMJ suffixes 46
Note 6: Human body model, 100 pF capacitor discharged through a 1.5 kX resistor.
Note 7: See AN-450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ or the section titled ‘‘Surface Mount’’ found in any post-1986 National
Semiconductor Linear Data Book for other methods of soldering surface mount devices.
Note 8: Two on-chip diodes are tied to each analog input as shown below. They will forward-conduct for analog input voltages one diode drop below V
Capacitance of Logic Inputs5pF
Capacitance of Logic Outputs5pF
) at any pin exceeds the power supplies (V
IN
e
b
(T
e
150§C. The typical thermal resistance (iJA) of these parts when board mounted follow: ADC10154 with BIN and CIN suffixes 65§C/W, ADC10154
Jmax
C/W, ADC10158 with BIWM and CIWM suffixes 68§C/W.
§
C/W, ADC10154 with BIWM and CIWM suffixes 72§C/W, ADC10158 with BIN and CIN suffixes 59§C/W, ADC10158 with BIJ, CIJ,
§
D
TA)/iJAor the number given in the Absolute Maximum Ratings, whichever is lower. For this
Jmax
k
IN
Vbor V
l
AVaor DVa), the current at that pin should be limited to 5 mA.
IN
, iJAand the ambient temperature, TA. The maximum
Jmax
b
e
GND
Units
(Limit)
supply or
one diode drop greater than Vasupply. Be careful during testing at low Valevels (4.5V), as high level analog inputs (5V) can cause an input diode to conduct,
especially at elevated temperatures, which will cause errors for analog inputs near full-scale. The specification allows 50 mV forward bias of either diode; this
means that as long as the analog V
unselected channel will corrupt the reading of a selected channel. This means that if AV
scale must be
s
g
4.55 VDC.
does not exceed the supply voltage by more than 50 mV, the output code will be correct. Exceeding this range on an
IN
a
and DVaare minimum (4.5 VDC) and Vbis a maximum (b4.5 VDC) full
TL/H/11225– 4
6
Electrical Characteristics (Continued)
Note 9: A diode exists between AVaand DVaas shown below.
To guarantee accuracy, it is required that the AVaand DVabe connected together to a power supply with separate bypass filter at each Vapin.
Note 10: Typicals are at T
Note 11: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 12: One LSB is referenced to 10 bits of resolution.
Note 13: Total unadjusted error includes offset, full-scale, linearity, multiplexer, and hold step errors.
Note 14: For DC Common Mode Error the only specification that is measured is offset error.
Note 15: Channel leakage current is measured after the channel selection.
Note 16: All the timing specifications are tested at the TTL logic levels, V
e
e
T
25§C and represent most likely parametric norm.
J
A
e
0.8V for a falling edge and V
IL
TL/H/11225– 5
e
2.0V for a rising.
IH
Ordering Information
Industrialb40§CsT
ADC10154CINN24A
ADC10154CIWMM24B
ADC10158CINN28B
ADC10158CIWMM28B
s
85§CPackage
A
7
Electrical Characteristics (Continued)
FIGURE 1A. Transfer Characteristic
FIGURE 1B. Simplified Error Curve vs Output Code
TL/H/11225– 6
TL/H/11225– 7
8
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