Rainbow Electronics ADC08832 User Manual
December 1998
ADC08831/ADC08832
8-Bit Serial I/O CMOS A/D Converters with Multiplexer
and Sample/Hold Function
General Description
The ADC08831/ADC08832 are 8-bit successive approximation Analog to Digital converters with 3-wire serial interfaces
and a configurable input multiplexer for 2 channels. The serial I/O will interface to COPS
sors, DSP’s, or shift registers. The serial I/O is configured to
comply with the NSC MICROWIRE
standard.
To minimize total power consumption, the
ADC08831/ADC08832 automatically go into low power
mode whenever they are not performing conversions.
Atrack/holdfunction allows the analog voltage at the positive
input to vary during the actual A/D conversion.
The analog inputs can be configured to operate in various
combination of single-ended, differential, or
pseudo-differential modes. The voltage reference input can
be adjusted to allow encoding of small analog voltage spans
to the full 8-bits of resolution.
™
family, PLD’s, microproces-
™
serial data exchange
Applications
n Digitizing sensors and waveforms
n Process control monitoring
n Remote sensing in noisy environments
n Instrumentation
n Embedded Systems
Features
n 3-wire serial digital data link requires few I/O pins
n Analog input track/hold function
n 2-channel input multiplexer option with address logic
n Analog input voltage range from GND to V
n No zero or full scale adjustment required
n TTL/CMOS input/output compatible
n Superior pin compatible replacement for ADC0831/2
CC
Key Specifications
n Resolution: 8 bits
n Conversion time (f
n Power dissipation: 8.5mW (typ)
n Low power mode 3.0mW (typ)
n Single supply: 5V
n Total unadjusted error:±1LSB
n No missing codes over temperature
=
2 MHz): 4µs (max)
C
DC
ADC08831/ADC08832 8-Bit Serial I/O CMOS A/D Converters with Multiplexer and Sample/Hold
Function
Typical Application
DS100108-44
DS100108-43
COPS™is a trademark of National Semiconductor Corporation.
™
MICROWIRE
TRI-STATE
© 1998 National Semiconductor Corporation DS100108 www.national.com
is a trademark of National Semiconductor Corporation.
™
Connection Diagrams
ADC08831
Wide Body SO Packages
ADC08831
N,M,MM Packages
Ordering Information
DS100108-4
DS100108-2
Temperature Range Package
Industrial (−40˚C ≤ T
≤ +85˚C)
J
ADC08831IN
ADC08832IN
ADC08831IWM,
ADC08832IWM,
ADC08831IM,
ADC08832IM,
ADC08831IMM,
ADC08832IMM,
ADC08832
Wide Body SO Packages
DS100108-3
ADC08832
N,M,MM Packages
DS100108-1
N08E
M14B
M08A
MUA08A
www.national.com 2
Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
Voltage at Inputs and Outputs −0.3V to V
Input Current at Any Pin (Note 4)
Package Input Current (Note 4)
ESD Susceptibility (Note 6)
Human Body Model 2000V
Machine Model 200V
Junction Temperature(Note 5) 150˚C
Storage Temperature Range −65˚ C to 150˚C
) 6.5V
CC
CC
±
+ 0.3V
±
5mA
20 mA
Mounting Temperature
Lead Temp. (soldering, 10 sec)
Infrared (10 sec)
260˚C
215˚C
Operating Ratings(Notes 2, 3)
Temperature Range −40˚C ≤ T
Supply Voltage 4.5 V to 6.0 V
Thermal Resistance (θ
)
jA
SO Package, 8-pin Surface Mount 190˚C/W
MSOP, 8-pin Surface Mount 235˚C/W
SO Package, 14-pin Surface Mount 145˚C/W
N Package, 8-pin 122˚C/W
Clock Frequency 10kHz≤f
≤ +85˚C
J
CLK
≤2MHz
Electrical Characteristics
=
The following specifications apply for V
apply for T
=
=
to T
T
A
T
J
MIN
; all other limits T
MAX
CC
=
+5V
A
, and f
DC
=
=
T
J
V
REF
Symbol Parameter Conditions Typical
CONVERTER AND MULTIPLEXER CHARACTERISTICS
TUE Total Unadjusted Error (Note 10)
Offset Error
DNL Differential NonLinearity
INL Integral NonLinearity
FS Full Scale Error
R
REF
V
IN
Reference Input Resistance (Note 11) 3.5 2.8
Analog Input Voltage (Note 12) (VCC+ 0.05)
DC Common-Mode Error
Power Supply Sensitivity V
On Channel Leakage Current
(Note 13)
=
5V
CC
=
5V
V
CC
On Channel=5V,
Off Channel=0V
On Channel=0V
Off Channel=5V
Off Channel Leakage Current
(Note 13)
On Channel=5V,
Off Channel=0V
On Channel=0V,
Off Channel=5V
DC CHARACTERISTICS
V
IN(1)
V
IN(0)
I
IN(1)
I
IN(0)
V
OUT(1)
V
OUT(0)
I
OUT
I
SOURCE
I
SINK
Logical “1” Input Voltage 2.0 V (min)
Logical “0” Input Voltage 0.8 V (max)
Logical “1” Input Current V
Logical “0” Input Current V
Logical “1” Output Voltage V
Logical “0” Output Voltage V
TRI-STATE Output Current V
Output Source Current V
Output Sink Current V
=
5.0V 0.05 +1 µA (max)
IN
=
0V 0.05 −1 µA (max)
IN
=
4.75V:
CC
=
I
−360 µA 2.4 V (min)
OUT
=
I
−10 µA 4.5 V (min)
OUT
=
4.75V
CC
=
1.6 mA
I
OUT
=
0V
OUT
=
5V
V
OUT
=
0V −6.5 mA (max)
OUT
=
V
OUT
CC
25˚C.
±
10%,
±
5
=
2 MHz unless otherwise specified. Boldface limits
CLK
(Note 8)
±
±
±
±
±
%
0.3
Limits
(Note 9)
±
1 LSB
Units
(Limits)
(max)
0.2 LSB
0.2 LSB
0.2 LSB
0.3 LSB
kΩ (min)
5.9
kΩ (max)
V (max)
(GND − 0.05)
1
±
⁄
4
1
±
⁄
4
1
±
⁄
4
0.2
V (min)
LSB (max)
LSB (max)
LSB (max)
µA (max)
1
−0.2
µA (min)
−1
−0.2
µA (min)
−1
0.2
µA (max)
1
0.4 V (max)
−3.0
3.0
µA (max)
µA (max)
8.0 mA (min)
www.national.com3
Electrical Characteristics (Continued)
=
The following specifications apply for V
apply for T
=
=
to T
T
A
T
J
MIN
; all other limits T
MAX
CC
=
+5V
A
, and f
DC
=
=
T
J
V
REF
Symbol Parameter Conditions Typical
DC CHARACTERISTICS
I
CC
I
CC
Supply Current ADC08831
CLK=high
Supply Current ADC08832
CLK=high (Note 16)
CS=V
CC
CS=LOW
CS=V
CC
CS=LOW
25˚C.
=
2 MHz unless otherwise specified. Boldface limits
CLK
(Note 8)
0.6 1.0 mA (max)
1.7 2.4 mA (max)
1.3 1.8 mA (max)
2.4 3.5 mA (max)
Limits
(Note 9)
Units
(Limits)
Electrical Characteristics
=
The following specifications apply for V
apply for T
=
=
to T
T
A
T
J
MIN
; all other limits T
MAX
CC
=
V
+5 V
REF
DC
=
T
A
J
Symbol Parameter Conditions Typical
f
CLK
Clock Frequency 2 MHz (max)
Clock Duty Cycle
(Note 14)
T
C
t
CA
t
SET-UP
t
HOLD
t
pd1,tpd0
Conversion Time (Not Including MUX
Addressing Time)
Acquisition Time
CS Falling Edge or Data Input
Valid to CLK Rising Edge
Data Input Valid after CLK
Rising Edge
CLK Falling Edge to Output
Data Valid (Note 15)
f
CLK
C
L
Data MSB First
Data LSB First
t
1H,t0H
C
IN
C
IN
C
OUT
TRI-STATE Delay from Rising Edge
of CS to Data Output and SARS Hi-Z
Capacitance of Analog input (Note 17) 13 pF
Capacitance of Logic Inputs 5 pF
Capacitance of Logic Outputs 5 pF
C
L
(see TRI-STATE Test Circuits)
C
L
=
, and t
=
25˚C.
=
t
20 ns unless otherwise specified. Boldface limits
r
f
(Note 8)
=
2MHz 8
=
100 pF:
=
10 pF, R
=
100 pF, R
=
10 kΩ
L
=
2kΩ 180 ns (max)
L
50 ns
Limits
(Note 9)
40
60
1/f
4
1
⁄
2
1/f
25 ns (min)
20 ns (min)
250
200
Units
(Limits)
%
(min)
%
(max)
(max)
CLK
µs (max)
(max)
CLK
ns (max)
ns (max)
www.national.com 4
Dynamic Characteristics
The following specifications apply for V
5V, non-coherent 2048 samples with windowing.
=
CC
Symbol Parameter Conditions Typical
f
S
Sampling Rate ADC08831
ADC08832
SNR Signal-to -Noise Ratio (Note 19) 48.5 dB
THD Total Harmonic Distortion (Note 20) −59.5 dB
SINAD Signal-to -Noise and Distortion 48.0 dB
ENOB Effective Number Of Bits (Note 18) 7.7 Bits
SFDR Spurious Free Dynamic Range 62.5 dB
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed speci-
fications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND=0V
Note 4: When the input voltage V
mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four pins.
Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
Note 6: Human body model, 100 pF capacitor discharged through a 1.5 kΩ resistor. The machine mode is a 200pF capacitor discharged directly into each pin.
Note 7: SeeAN450 “Surface Mounting Methods and Their Effect on Product Reliability” or Linear Data Book section “Surface Mount” for other methods of soldering
surface mount devices.
Note 8: Typicals are at T
Note 9: Guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 10: Total unadjusted error includes offset, full-scale, linearity, multiplexer errors.
Note 11: It is not tested for the ADC08832.
Note 12: For V
forward-conduct for analog input voltages one diode drop below ground or one diode drop greater than V
level analog inputs (e.g., 5V) can cause an input diode to conduct, especially at elevated temperatures, which will cause errors for analog inputs near full-scale. The
spec allows 50 mV forward bias of either diode; this means that as long as the analog V
will be correct. Exceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 V
range will therefore require a minimum supply voltage of 4.950 V
Note 13: Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage current the following two
cases are considered: one, with the selected channel tied high (5 V
measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channel is again measured. The two cases considered for determining on channel leakage current are the same except total current flow through the selected channel is measured.
Note 14: A40%to 60%duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these limits
the minimum time the clock is high or low must be at least 250 ns. The maximum time the clock can be high or low is 60 µs.
Note 15: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in to allow for comparator response time.
Note 16: For the ADC08832 V
Note 17: Analog inputs are typically 300 ohms input resistance to a 13pF sample and hold.
Note 18: Effective Number Of Bits (ENOB) is calculated from the measured signal-to-noise plus distortion ratio (SINAD) using the equation ENOB=(SINAD-1.76)/
6.02.
Note 19: The signal-to-noise ratio is the ratio of the signal amplitude to the background noise level. Harmonics of the input signal are not included in it’s calculation.
Note 20: The contributions from the first 6 harmonics are used in the calculation of the THD.
IN(−)
≥ V
at any pin exceeds the power supplies (V
IN
=
D
=
25˚C and represent the most likely parametric norm.
J
the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Functional Block Diagram) which will
IN(+)
is internally tied to VCC, therefore, for the ADC08832 reference current is included in the supply current.
ref
=
5V, f
(T
2MHz, T
CLK
f
CLK
f
CLK
, unless otherwise specified.
DC
)/θJAor the number given in the Absolute Maximum Ratings, whichever is lower.
JMAX−TA
over temperature variations, initial tolerance and loading.
DC
) and the remaining off channel tied low (0 VDC), total current flow through the off channel is
DC
/11
/13
=
A
25˚C, R
SOURCE
=
50Ω,f
=
IN
(Note 8)
45kHz, V
IN
Limits
(Note 9)
181
153
<
IN
(GND) or V
>
VCC,) the current at that pin should be limited to 5 mA. The 20
IN
, θJAand the ambient temperature, TA. The maximum
JMAX
supply.During testing at low VCClevels (e.g., 4.5V), high
CC
does not exceed the supply voltage by more than 50 mV, the output code
IN
=
5V
P-P,VREF
(Limits)
to5VDCinput voltage
DC
Units
ksps
ksps
=
www.national.com5
Block Diagram
*
For ADC08831 V
Pin names in parentheses refer to ADC08832
pin is available, for ADC08832 DI pin is available, and V
REF
REF
is tied to V
DS100108-47
CC
www.national.com 6
Typical Performance Characteristics The following specifications apply for T
5V, unless otherwise specified.
A
=
25˚C, V
=
=
V
CC
REF
Linearity Error (TUE) vs
Reference Voltage
Power Supply Current vs
Temperature (ADC08831)
DS100108-27
DS100108-35
Linearity Error (TUE) vs
Temperature
Power Supply Current vs
Temperature (ADC08832)
DS100108-15
DS100108-36
Linearity Error (TUE) vs
Clock Frequency
DS100108-14
Power Supply Current
vs Clock Frequency, CS=Low,
ADC08831
DS100108-37
Output Current vs
Temperature
DS100108-33
www.national.com7
Typical Performance Characteristics The following specifications apply for T
5V, unless otherwise specified. (Continued)
A
=
25˚C, V
=
=
V
CC
REF
Spectral Response with 10KHz
Sine Wave Input
DS100108-13
Total Unadjuster Error Plot
Spectral Response with 55 KHz
Sine Wave Input
DS100108-34
Spectral Response with 90 KHz
Sine Wave Input
DS100108-16
Leakage Current Test Circuit
www.national.com 8
DS100108-38
DS100108-5
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