Rainbow Electronics ADC0848 User Manual

December 1994

ADC0844/ADC0848 8-Bit mP Compatible A/D Converters
with Multiplexer Options

General Description

The ADC0844 and ADC0848 are CMOS 8-bit successive
approximation A/D converters with versatile analog input
multiplexers. The 4-channel or 8-channel multiplexers can
be software configured for single-ended, differential or
pseudo-differential modes of operation.

The differential mode provides low frequency input common
mode rejection and allows offsetting the analog range of the
converter. In addition, the A/D’s reference can be adjusted
enabling the conversion of reduced analog ranges with 8-bit
resolution.

The A/Ds are designed to operate from the control bus of a
wide variety of microprocessors. TRI-STATE

output latch-

É

es that directly drive the data bus permit the A/Ds to be
configured as memory locations or I/O devices to the micro­processor with no interface logic necessary.

Block and Connection Diagrams

Features

Y

Easy interface to all microprocessors

Y

Operates ratiometrically or with 5 V
voltage reference

Y

No zero or full-scale adjust required

Y

4-channel or 8-channel multiplexer with address logic

Y

Internal clock

Y

0V to 5V input range with single 5V power supply

Y

0.3×standard width 20-pin or 24-pin DIP

Y

28 Pin Molded Chip Carrier Package

DC

Key Specifications

Y

Resolution 8 Bits

Y

Total Unadjusted Error

Y

Single Supply 5 V

Y

Low Power 15 mW

Y

Conversion Time 40 ms

g

(/2 LSB andg1 LSB

ADC0844/ADC0848 8-Bit mP Compatible A/D Converters with Multiplexer Options

DC

*ADC0848 shown in

DIP Package
CH5-CH8 not included
on the ADC0844

Dual-In-Line Package

TL/H/5016– 2

Top View

Dual-In-Line Package

TL/H/5016– 30

Top View

TRI-STATEÉis a registered trademark of National Semiconductor Corp.

C

1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.

TL/H/5016

Molded Chip Carrier Package

Top View

See Ordering Information

TL/H/5016– 1

TL/H/5016– 29

Absolute Maximum Ratings (Notes1&2)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Supply Voltage (V

Voltage

Logic Control Inputs
At Other Inputs and Outputs

Input Current at Any Pin (Note 3) 5 mA

Package Input Current (Note 3) 20 mA

Storage Temperature

Package Dissipation at T

ESD Susceptibility (Note 4) 800V

) 6.5V

CC

b

0.3V toa15V

b

0.3V to V

CC

b

e

25§C 875 mW

A

65§Ctoa150§C

a

0.3V

Lead Temperature (Soldering, 10 seconds)

Dual-In-Line Package (Plastic) 260
Dual-In-Line Package (Ceramic) 300
Molded Chip Carrier Package

Vapor Phase (60 seconds) 215
Infrared (15 seconds) 220

Operating Conditions (Notes1&2)

Supply Voltage (VCC) 4.5 VDCto 6.0 V
Temperature Range T

ADC0844BCN, ADC0844CCN, 0§CsT
ADC0848BCN, ADC0848CCN
ADC0844BCJ, ADC0844CCJ,
ADC0848BCJ, ADC0848CCJ
ADC0848BCV, ADC0848CCV

MIN

b

40§CsT

s

s

T

T

A

s

A

s

A

DC

MAX

70§C

85§C

C

§

C

§

C

§

C

§

Electrical Characteristics The following specifications apply for V

Boldface limits apply from T

MIN

to T

MAX

; all other limits T

e

e

T

A

25§C.

j

ADC0844BCJ
ADC0844CCJ
ADC0848BCJ

Typ

(Note 5)

ADC0848CCJ

Tested Design

Limit Limit

(Note 6) (Note 7) (Note 6) (Note 7)

Parameter Conditions

e

5VDCunless otherwise specified.

CC

ADC0844BCN, ADC0844CCN
ADC0848BCN, ADC0848CCN
ADC0848BCV, ADC0848CCV

Tested Design

Typ

(Note 5)

Limit Limit

Limit

Units

CONVERTER AND MULTIPLEXER CHARACTERISTICS

Maximum Total V
Unadjusted Error (Note 8)

ADC0844BCN, ADC0848BCN, BCV
ADC0844BCJ, ADC0848BCJ
ADC0844CCN, ADC0848CCN, CCV
ADC0844CCJ, ADC0848CCJ

REF

e

5.00 V

DC

g

g

(/2 LSB

g

1 LSB

(/2

g

1

g

(/2 LSB

g

1 LSB

Minimum Reference 2.4 1.1 2.4 1.2 1.1 kX
Input Resistance

Maximum Reference 2.4 5.9 2.4 5.4 5.9 kX
Input Resistance

Maximum Common-Mode (Note 9) V
Input Voltage

a

0.05 V

CC

CC

a

0.05 V

CC

a

0.05 V

Minimum Common-Mode (Note 9) GNDb0.05 GNDb0.05 GNDb0.05 V
Input Voltage

DC Common-Mode Error Differential Modeg(/16

Power Supply Sensitivity V

CC

e

5Vg5%

g

(/16

g

(/4

g

(/8

g

g

(/16

(/16

g

(/4

g

(/8

g

(/4 LSB

g

(/8 LSB

Off Channel Leakage (Note 10)
Current On Channel

Off Channel

e

5V,

e

0V

b

1

b

0.1

b

1 mA

On Channele0V, 1 0.1 1 mA
Off Channele5V

DIGITAL AND DC CHARACTERISTICS

V

, Logical ‘‘1’’ Input V

IN(1)

Voltage (Min)

V

, Logical ‘‘0’’ Input V

IN(0)

Voltage (Max)

I

, Logical ‘‘1’’ Input V

IN(1)

Current (Max)

e

5.25V 2.0 2.0 2.0 V

CC

e

4.75V 0.8 0.8 0.8 V

CC

e

5.0V 0.005 1 0.005 1 mA

IN

2

Electrical Characteristics The following specifications apply for V

Boldface limits apply from T

MIN

to T

MAX

; all other limits T

e

e

T

A

25§C. (Continued)

j

ADC0844BCJ
ADC0844CCJ
ADC0848BCJ

Typ

(Note 5)

ADC0848CCJ

Tested Design

Limit Limit

(Note 6) (Note 7) (Note 6) (Note 7)

Parameter Conditions

DIGITAL AND DC CHARACTERISTICS (Continued)

I

, Logical ‘‘0’’ Input V

IN(0)

Current (Max)

V

, Logical ‘‘1’’ V

OUT(1)

Output Voltage (Min) I

V

, Logical ‘‘0’’ V

OUT(0)

Output Voltage (Max) I

I

, TRI-STATE Output V

OUT

Current (Max) V

I

, Output Source V

SOURCE

Current (Min)

I

, Output Sink V

SINK

Current (Min)

e

0V

IN

e

4.75V

CC

eb

OUT

eb

I

OUT

e

4.75V 0.4 0.34 0.4 V

CC

e

OUT

e

OUT

e

OUT

e

OUT

e

OUT

ICC, Supply Current (Max) CSe1, V

360 mA 2.4 2.8 2.4 V
10 mA 4.5 4.6 4.5 V

1.6 mA

0V
5V 0.01 3 0..01 0.3 3 mA

0V

V

CC

Open 1 2.5 1 2.3 2.5 mA

REF

b

b

0.005

0.01

b

14

b

1

b

3

b

6.5

16 8.0 16 9.0 8.0 mA

e

5VDCunless otherwise specified.

CC

ADC0844BCN, ADC0844CCN
ADC0848BCN, ADC0848CCN
ADC0848BCV, ADC0848CCV

0.01

14

Tested Design

Limit Limit

b

0.3

b

7.5

Typ

(Note 5)

b

0.005

b

b

b

1 mA

b

3 mA

b

6.5 mA

Limit
Units

AC Electrical Characteristics The following specifications apply for V

otherwise specified. Boldface limits apply from T

MIN

to T

MAX

; all other limits T

e

T

A

Parameter Conditions

e

CC

e

25§C.

j

Typ

(Note 5)

e

r

e

t

f

10 ns unless

5VDC,t

Tested Design

Limit Limit Units

(Note 6) (Note 7)

tC, Maximum Conversion Time (See Graph) 30 40 60 ms

t

, Minimum WR Pulse Width (Note 11) 50 150 ns

W(WR)

t

, Maximum Access Time (Delay from Falling Edge of C

ACC

RD to Output Data Valid) (Note 11)

t1H,t0H, TRI-STATE Control (Maximum Delay from Rising C
Edge of RD

to Hi-Z State) (Note 11)

e

100 pF 145 225 ns

L

L

e

10 pF, R

e

10k 125 200 ns

L

tWI,tRI, Maximum Delay from Falling Edge of WR or RD to (Note 11) 200 400 ns
Reset of INTR

tDS, Minimum Data Set-Up Time (Note 11) 50 100 ns

tDH, Minimum Data Hold Time (Note 11) 0 50 ns

CIN, Capacitance of Logic Inputs 5 pF

C

, Capacitance of Logic Outputs 5 pF

OUT

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.

Note 2: All voltages are measured with respect to the ground pins.

Note 3: When the input voltage (V

limited to 5 mA or less. The 20 mA package input current limits the number of pins that can exceed the power supply boundaries witha5mAcurrent limit to four.

Note 4: Human body model, 100 pF discharged through a 1.5 kX resistor.

Note 5: Typicals are at 25

Note 6: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 7: Design limits are guaranteed by not 100% tested. These limits are not used to calculate outgoing quality levels.

Note 8: Total unadjusted error includes offset, full-scale, linearity, and multiplexer error.

) at any pin exceeds the power supply rails (V

IN

C and represent most likely parametric norm.

§

k

IN

Vbor V

l

Va) the absolute value of the current at that pin should be

IN

3

Note 9: For VIN(b)tVIN(a) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input, which will forward-conduct for analog
input voltages one diode drop below ground or one diode drop greater than V
inputs (5V) can cause this input diode to conduct, especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec allows 50 mV
forward bias of either diode. This means that as long as the analog V
achieve an absolute 0 V
and loading.

Note 10: Off channel leakage current is measured after the channel selection.

Note 11: The temperature coefficient is 0.3%/

to5VDCinput voltage range will therefore require a minimum supply voltage of 4.950 VDCover temperature variations, initial tolerance

DC

C.

§

IN

supply. Be careful during testing at low VCClevels (4.5V), as high level analog

CC

does not exceed the supply voltage by more than 50 mV, the output code will be correct. To

Typical Performance Characteristics

Logic Input Threshold
Voltage vs Supply Voltage

Linearity Error vs V

Output Current vs
Temperature

REF

Power Supply Current vs
Temperature

Conversion Time vs V

SUPPLY

Conversion Time vs
Temperature

Unadjusted Offset Error vs
V

Voltage

REF

TL/H/5016– 3

4

TRI-STATE Test Circuits and Waveforms

t

1H

TL/H/5016– 4

t1H,C

e

10 pF

L

t

0H

Leakage Current Test Circuit

TL/H/5016– 6

t0H,C

e

t

20 ns

r

e

10 pF

L

e

t

20 ns

r

TL/H/5016– 5

TL/H/5016– 7

TL/H/5016– 8

5

Timing Diagrams

Programming New Channel Configuration and Starting a Conversion

Note 1: Read strobe must occur at least 600 ns after the assertion of interrupt to guarantee reset of INTR.

Note 2: MA stands for MUX address.

Using the Previously Selected Channel Configuration and Starting a Conversion

TL/H/5016– 9

TL/H/5016– 10

6