Rainbow Electronics ADC08161 User Manual

ADC08161 500 ns A/D Converter with S/H Function and 2.5V Bandgap Reference

November 1995

General Description

Using a patented multi-step A/D conversion technique, the 8-bit ADC08161 CMOS A/D converter offers 500 ns conversion time, internal sample-and-hold (S/H), a 2.5V bandgap reference, and dissipates only 100 mW of power. The ADC08161 performs an 8-bit conversion with a 2-bit voltage estimator that generates the 2 MSBs and two low-resolution (3-bit) flashes that generate the 6 LBSs.

Input signals are tracked and held by the input sampling circuitry, eliminating the need for an external sample-and-hold. The ADC08161 can perform accurate conversions of full-scale input signals at frequencies from DC to typically more than 300 kHz (full power bandwidth) without the need of an external sample-and-hold (S/H).

For ease of interface to microprocessors, this part has been designed to appear as a memory location or I/O port without the need for external interfacing logic.

Block Diagram

Key Specifications

n Resolution: 8 Bits n Conversion time (t n Full power bandwidth: 300 kHz (typ) n Throughput rate: 1.5 MHz min n Power dissipation: 100 mW max n Total unadjusted error:

): 560 ns max (WR -RD Mode)

CONV

⁄2LSB and±1 LSB max

Features

n No external clock required n Analog input voltage range from GND to V n 2.5V bandgap reference

Applications

n Mobile telecommunications n Hard-disk drives n Instrumentation n High-speed data acquisition systems

DS011149-1

TRI-STATE®is a registeredtrademark of National Semiconductor Corporation.

Absolute Maximum Ratings (Notes 1,

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

Supply Voltage (V Logic Control Inputs −0.3V to V Voltage at Other Inputs and Outputs −0.3V to V Input Current at Any Pin (Note 3) 5 mA Package Input Current (Note 3) 20 mA Power Dissipation (Note 4)

N Package 875 mW WM Package 875 mW

Lead Temperature (Note 5)

N Package (Soldering, 10 sec.) +260˚C

)6V

+ 0.3V

WM Package

(Vapor Phase, 60 sec.) +215˚C

WM Package (Infrared, 15 sec.) +220˚C Storage Temperature −65˚C to +150˚C ESD Susceptibility (Note 6) 750V

Operating Ratings (Note 1) (Note 2)

Temperature Range T

ADC08161BIN, −40˚C ≤ TA≤ 85˚C

ADC08161CIN,

ADC08161BIWM,

ADC08161CIWM Supply Voltage, (V

) 4.5V to 5.5V

MIN

≤ TA≤ T

MAX

Converter Characteristics

The following specifications apply for RD Mode, V

face limits apply for T

to T

MIN

; all other limits T

MAX

5V, V

REF+

5V, and V

GND unless otherwise specified. Bold-

REF−

25˚C.

Symbol Parameter Conditions Typical Limits Units

(Note 7) (Note 8) (Limit)

INL Integral Non Linearity V

REF

⁄

LSB (max)

ADC08161BIN, BIWM

1 LSB (max)

⁄

LSB (max)

TUE Total Unadjusted Error (Note 9) V

ADC08161CIN, CIWM

REF

ADC08161BIN, BIWM

1 LSB (max)

INL Integral Non Linearity V TUE Total Unadjusted Error V

ADC08161CIN, CIWM,

2.5V, All Suffixes

REF

2.5V

REF

ADC08161, All Suffixes

Missing Codes V

5V 0 Bits (max)

REF

2.5V 0 Bits (max)

REF

Reference Input Resistance 700 500 Ω (min)

700 1250 Ω (max)

REF+

REF−

Positive Reference Input Voltage V

REF−

V (min)

V (max) Negative Reference GND V (min) Input Voltage V

REF+

V (max) Analog (Note 10) GND − 0.1 V (min) Input Voltage V

+ 0.1 V (max)

On-Channel Input Current On Channel Input=5V,

Off Channel Input=0V −0.4 −20 µA (max) (Note 11) On Channel Input=0V, Off Channel Input=5V −0.4 −20 µA (max) (Note 11)

PSS Power Supply Sensitivity V

5%,

4.75V

REF

1/16

⁄

LSB (max)

All Codes Tested

Effective Bits V

Full-Power Bandwidth V

4.85 V

20 Hz to 20 kHz

4.85 V

p-p

7.8 Bits

300 kHz

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Converter Characteristics (Continued)

The following specifications apply for RD Mode, V

face limits apply for T

to T

MIN

; all other limits T

MAX

5V, V

Symbol Parameter Conditions Typical Limits Units

THD Total Harmonic Distortion V

S/N Signal-to-Noise Ratio V

IMD Intermodulation Distortion V

VIN

Analog Input Capacitance 25 pF

5V, and V

REF+

4.85 V

p-p

20 Hz to 20 kHz

4.85 V

p-p

20 Hz to 20 kHz

4.85 V

p-p

20 Hz to 20 kHz

25˚C.

GND unless otherwise specified. Bold-

REF−

(Note 7) (Note 8) (Limit)

0.5

50 dB

AC Electrical Characteristics

The following specifications apply for V

limits apply for T

MIN

to T

MAX

5V, t

; all other limits T

10 ns, V

REF+

Symbol Parameter Conditions

Write Time Mode Pin to V

(

Figures 2, 3, 4

Read Time (Time from Rising Edge Mode Pin to V+,(

)

Figure 2

of WR to Falling Edge of RD )

RDW

CONV

CRD

ACCO

ACC1

ACC2

1H,t0H

RD Width Mode Pin to GND (

WR -RD Mode Conversion Time Mode Pin to V+,( (t

WR+tRD+tACC1

)

Figure 2

RD Mode Conversion Time Mode Pin to GND, ( Access Time (Delay from Falling CL≤ 100 pF, Mode Pin to GND 640 900 ns (max) Edge of RD to Output Valid)

(

Figure 1

) Access Time (Delay from CL≤ 10 pF 45 ns Falling Edge of RD to Output Valid) Mode Pin to V

100 pF 50 110 ns (max)

(

Figure 2

,tRD≤ t

) Access Time (Delay from CL≤ 10 pF 25 ns Falling Edge of RD to Output Valid) t

TRI-STATE®Control R (Delay from Rising Edge (

100 pF 30 55 ns (max)

INTL

3kΩ,C

)

10 pF

(

Figures 3, 5

Figures 1, 2, 3, 4, 5

of RD to HI-Z State)

INTL

INTH

Delay from Rising Edge of Mode Pin=V+,C WR to Falling Edge of INT Delay from Rising Edge of C RD to Rising Edge of INT Delay from Rising Edge of C

(

Figures 3, 4

(

Figures 1, 2, 3, 5

)

50 pF, 50 95 ns (max)

50 pF, (

Figure 4

)

WR to Rising Edge of INT

RDY

Delay from CS to RDY Mode Pin=0V, C

3kΩ,(

Figure 1

25˚C.

5V, V

0V unless otherwise specified. Boldface

REF−

ADC08161BIN, ADC08161CIN,

ADC08161BIWM,

ADC08161CIWM

Typical Limit

Units

(Limit)

(Note 7) (Note 8)

100 100 ns (min)

) 350 350 ns (min)

Figure 5

) 200 250 ns (min)

400 400 ns (max)

) 500 560 ns (max)

Figure 1

) 655 900 ns (max)

INTL

)3060 ns (max)

50 pF 520 690 ns (max)

)4595 ns (max)

50 pF, 25 45 ns (max)

)

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AC Electrical Characteristics (Continued)

The following specifications apply for V

limits apply for T

to T

MIN

5V, t

; all other limits T

MAX

Symbol Parameter Conditions

Delay from INT R to Output Valid (

Delay from RD to INT Mode Pin=V+,tRD≤ t

Time between End of RD ( and Start of New Conversion

CSS

CSH

CS Setup Time ( CS Hold Time (

10 ns, V

3kΩ,C

Figure 4

(

Figure 2

)

Figures 1, 2, 3, 4, 5

Figures 1, 2, 3, 4, 5 Figures 1, 2, 3, 4, 5

REF+

25˚C.

100 pF 0 15 ns (max)

5V, V

0V unless otherwise specified. Boldface

REF−

ADC08161BIN, ADC08161CIN,

ADC08161BIWM,

ADC08161CIWM

Typical Limit

Units

(Limit)

(Note 7) (Note 8)

INTL

60 115 ns (max)

)5050 ns (min)

)00ns (max) )00ns (max)

DC Electrical Characteristics

The following specifications apply for V all other limits T

Symbol Parameter Conditions ADC08161BIN, ADC08161CIN, Units

25˚C.

5V unless otherwise specified. Boldface limits apply for T

ADC08161BIWM, ADC08161CIWM

to T

MIN

MAX

(Limit)

Typical Limit (Note 7) (Note 8)

Logic “1” Input Voltage V

5.5 V

CS , WR , RD , A0, A1, A2 Pins

2.0 V (min)

Mode Pin 3.5

Logic “0” Input Voltage V

4.5V

CS , WR , RD , A0, A1, A2 Pins

0.8 V (max)

Mode Pin 1.5

Logic “1” Input Current V

CS , RD , A0, A1, A2 Pins WR Pin

0.005 1

0.1 3 µA (max)

Mode Pin 50 200

Logic “0” Input Current V

CS , RD , WR , A0, A1, A2 Mode Pins −0.005 −2 µA (max)

Logic “1” Output Voltage V

4.75V

−360 µA 2.4 V (min)

OUT

DB0–DB7, OFL , INT

−10 µA 4.5 V (min)

OUT

DB0–DB7, OFL , INT

Logic “0” Output Voltage V

4.75V

1.6 mA 0.4 V (max)

OUT

DB0–DB7, OFL , INT , RDY

TRI-STATE Output Current V

5.0V 0.1 3 µA (max)

OUT

DB0–DB7, RDY

0V −0.1 −3 µA (max)

OUT

DB0–DB7, RDY

Output Source Current V

SOURCE

0V −26 −6 mA (min)

OUT

DB0–DB7, OFL , INT

;

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DC Electrical Characteristics (Continued)

The following specifications apply for V all other limits T

25˚C.

5V unless otherwise specified. Boldface limits apply for T

Symbol Parameter Conditions ADC08161BIN, ADC08161CIN, Units

ADC08161BIWM, ADC08161CIWM

Typical Limit

(Note 7) (Note 8)

Output Sink Current V

SINK

5V 24 7 mA (min)

OUT

DB0–DB7, OFL , INT , RDY I C C

Supply Current CS=WR=RD=0 11.5 20 mA (max)

Logic Output Capacitance 5 pF

OUT

Logic Input Capacitance 5 pF

to T

MIN

MAX

(Limit)

;

Bandgap Reference Electrical Characteristics

The following specifications apply for V

limits T

25˚C.

5V unless otherwise specified. Boldface limits apply for T

MIN

to T

MAX

; all other

Symbol Parameter Conditions Typical Limits Units

(Note 7) (Note 8) (Limit)

REFOUT

Internal Reference Output Voltage “B” Grade 2.5 2.5±1.5

“C” Grade 2.5

∆V

/∆T Internal Reference Temperature 40 ppm/˚C

REF

V (max)

2.0

Coefficient

∆V

/∆ILInternal Reference Load Sourcing (0 ≤ IL≤ +10 mA) 0.01 0.1

REF

/mA (max) Regulation Line Regulation 4.75V ≤ V

I ∆V

REF/∆t

Short Circuit Current V Long Term Stability 200 ppm/kHr Start-Up Time V

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its specified operating ratings. Operating Ratings indicate conditions for which the device is functional, but do not guarantee performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specificationsapply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.

Note 2: All voltages are measured with respect to the GND pin, unless otherwise specified. Note 3: When the input voltage (V

limited to 5 mA or less. The 20 mA package input current specification limits the number of pins that can exceed the power supply boundaries witha5mAcurrent limit to four.

Note 4: The power dissipation of this device under normal operation should never exceed 875 mW (Quiescent Power Dissipation + TTLLoads on the digital outputs). Caution should be taken not to exceed absolute maximum power rating when the device is operating in a severe fault condition (e.g., when any input or output exceeds the power supply). The maximum power dissipation must be derated at elevated temperatures and is dictated by T (package junction to ambient thermal resistance), and TA(ambient temperature). The maximum allowable power dissipation at any temperature is PD

−TA)/θJAor the number given in the Absolute Maximum Ratings, whichever is lower. The table below details T of the ADC08161.

) at any pin exceeds the power supply voltage (V

Part Number T

≤ 5.25V 0.5 6.0 mV (max)

0V 35 mA (max)

REV

:0V→5V, C

220 µF 40 ms

JMAX

GND or V

V+), the absolute value of the current at that pin should be

(maximum junction temperature), θ

JMAX

and θJAfor the various packages and versions

JMAX

max

ADC08161B/CIN 105 51 ADC08161B/CIWM 105 85

Note 5: See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices. Note 6: Human body model, 100 pF discharged through a 1.5 kΩ resistor. Note 7: Typicals are at 25˚C and represent most likely parametric norm. Note 8: Limits are guaranteed to National’s AOQL (Average Output Quality Level). Note 9: Total unadjusted error includes offset, full-scale, and linearity errors. Note 10: Two on-chip diodes are tied to each analog input and are reversed biased during normal operation. One is connected to V

GND. They will become forward biased and conduct when an analog input voltage is equal to or greater than one diode drop above V caution should be exercised when testing with V peratures. This can create conversion errors for analog signals near full-scale. The specification allows 50 mV forward bias on either diode; e.g., the output code will be correct as long as the analog input signal does not exceed the supply voltage by more than 50 mV. Exceeding this range on an unselected channel will corrupt the reading of a selected channel. An absolute analog input signal voltage range of 0V ≤ V

is 4.950V over temperature variations, initial tolerance, and loading.

plied to V

4.5V.Analog inputs with magnitudes equal to 5V can cause an input diode to conduct, especially at elevated tem-

≤ 5V can be achieved by ensuring that the minimum supply voltage ap-

and the other is connected to

or below GND. Therefore,

JMAX

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Rainbow Electronics ADC08161 User Manual

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