Rainbow Electronics ADC08138 User Manual

ADC08131/ADC08134/ADC08138 8-Bit High-Speed
Serial I/O A/D Converters with Multiplexer Options,
Voltage Reference, and Track/Hold Function

December 1994

ADC08131/ADC08134/ADC08138 8-Bit High-Speed Serial I/O A/D Converters

with Multiplexer Options, Voltage Reference, and Track/Hold Function

General Description

The ADC08131/ADC08134/ADC08138 are 8-bit succes­sive approximation A/D converters with serial I/O and con­figurable input multiplexers with up to 8 channels. The serial
I/O is configured to comply with the NSC MICROWIRE
serial data exchange standard for easy interface to the

TM

COPS

family of controllers, and can easily interface with

standard shift registers or microprocessors.

All three devices provide a 2.5V band-gap derived reference
with guaranteed performance over temperature.

A track/hold function allows the analog voltage at the posi­tive input to vary during the actual A/D conversion.

The analog inputs can be configured to operate in various
combinations of single-ended, differential, or pseudo-differ­ential modes. In addition, input voltage spans as small as 1V
can be accommodated.

Applications

Y

Digitizing automotive sensors

Y

Process control/monitoring

Y

Remote sensing in noisy environments

Y

Embedded diagnostics

Ordering Information

Industrial

b

(

40§CsT

s

a

85§C)

A

ADC08131BIN, ADC08131CIN N08E

ADC08134BIN, ADC08134CIN N14A

ADC08138BIN, ADC08138CIN N20A

ADC08134BIWM, ADC08134CIWM M14B

ADC08138BIWM, ADC08138CIWM M20B

Package

Features

Y

Serial digital data link requires few I/O pins

Y

Analog input track/hold function

Y

4- or 8-channel input multiplexer options with address

TM

logic

Y

On-chip 2.5V band-gap reference (g2% over tempera­ture guaranteed)

Y

No zero or full scale adjustment required

Y

TTL/CMOS input/output compatible

Y

0V to 5V analog input range with single 5V power
supply

Key Specifications

Y

Resolution 8 Bits

Y

Conversion time (f

Y

Power dissipation 20 mW (Max)

Y

Single supply 5 VDC(

Y

Total unadjusted error

Y

Linearity Error (V

Y

No missing codes (over temperature)

Y

On-board Reference

e

1 MHz) 8 ms (Max)

C

g

(/2 LSB andg1 LSB

a

REF

e

2.5V)

Connection Diagrams

ADC08138

Dual-In-Line and

Small Outline

Packages

Dual-In-Line and

Small Outline

g

5%)

g

(/2 LSB

2.5Vg1.5% (Max)

ADC08134

Packages

TL/H/10749– 3

TL/H/10749– 2

ADC08131

Dual-In-Line Package

TRI-STATEÉis a registered trademark of National Semiconductor Corporation.

TM

COPS

microcontrollers and MICROWIRETMare trademarks of National Semiconductor Corporation.

C

1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

TL/H/10749

TL/H/10749– 4

Absolute Maximum Ratings (Notes1&3)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Supply Voltage (V

Voltage at Inputs and Outputs

Input Current at Any Pin (Note 4)

Package Input Current (Note 4)

Power Dissipation at T

ESD Susceptibility (Note 6) 1500V

Soldering Information

N Package (10 sec.) 260
SO Package:

Vapor Phase (60 sec.) 215
Infrared (15 sec.) (Note 7) 220

Storage Temperature

) 6.5V

CC

e

25§C (Note 5) 800 mW

A

b

0.3V to V

b

65§Ctoa150§C

CC

g

a

0.3V

g

5mA

20 mA

§

§

§

Operating Ratings (Notes2&3)

Temperature Range T

ADC08131BIN, ADC08131CIN,

ADC08134BIN, ADC08134CIN,

ADC08138BIN, ADC08138CIN,

ADC08134BIWM, ADC08138BIWM,

ADC08134CIWM, ADC08138CIWM

Supply Voltage (V

C

C
C

) 4.5 VDCto 6.3 V

CC

b

40§CsT

MIN

s

s

T

T

A

MAX

s

a

85§C

A

DC

Electrical Characteristics

The following specifications apply for V

Boldface limits apply for T

e

T

A

ea

5VDC,V

CC

e

T

MIN

to T

MAX

J

ea

REF

; all other limits T

2.5 VDCand f

e

CLK

e

e

T

A

25§C.

J

ADC08131,

ADC08134 and

ADC08138 with BIN,

Symbol Parameter Conditions CIN, BIWM or

CIWM Suffixes

Typical Limits

(Note 8) (Note 9)

CONVERTER AND MULTIPLEXER CHARACTERISTICS

Linearity Error V

BIN, BIWM

REF

ea

2.5 V

DC

CIN, CIWM

Full Scale Error V

BIN, BIWM

REF

ea

2.5 V

DC

CIN, CIWM

Zero Error V

BIN, BIWM

REF

ea

2.5 V

DC

CIN, CIWM

Total Unadjusted Error V

BIN, BIWM (Note 10)

REF

ea

5V

DC

CIN, CIWM

Differential Linearity V

R

REF

V

IN

Reference Input Resistance (Note 11) 3.5 kX

Analog Input Voltage (Note 12) (V

REF

ea

2.5 V

DC

1 MHz unless otherwise specified.

Units

(Limits)

g

(/2 LSB (max)

g

1 LSB (max)

g

(/2 LSB (max)

g

1 LSB (max)

g

1 LSB (max)

g

1 LSB (max)

g

(/2 LSB (max)

g

1 LSB (max)

8 Bits (min)

1.3 kX (min)

6.0 kX (max)

a

0.05) V (max)

CC

b

(GND

0.05) V (min)

2

Electrical Characteristics (Continued)

The following specifications apply for V

Boldface limits apply for T

e

T

A

ea

5VDC,V

CC

e

T

MIN

to T

MAX

J

ea

REF

; all other limits T

2.5 VDCand f

e

CLK

e

e

T

A

25§C.

J

ADC08131,

ADC08134 and

ADC08138 with BIN,

Symbol Parameter Conditions CIN, BIWM or

CIWM Suffixes

Typical Limits

(Note 8) (Note 9)

CONVERTER AND MULTIPLEXER CHARACTERISTICS (Continued)

DC Common-Mode Error V

Power Supply Sensitivity V

e

2.5 V

REF

CC

V

REF

ea

ea

DC

5Vg5%,

2.5 V

DC

On Channel Leakage On Channele5V, 0.2
Current (Note 13) Off Channel

e

0V 1

On Channele0V,
Off Channele5V

Off Channel Leakage On Channele5V,
Current (Note 13) Off Channel

e

0V

On Channele0V, 0.2
Off Channel

e

5V 1

DIGITAL AND DC CHARACTERISTICS

V

IN(1)

V

IN(0)

I

IN(1)

I

IN(0)

V

OUT(1)

V

OUT(0)

I

OUT

I

SOURCE

I

SINK

I

CC

Logical ‘‘1’’ Input Voltage V

Logical ‘‘0’’ Input Voltage V

Logical ‘‘1’’ Input Current V

Logical ‘‘0’’ Input Current V

Logical ‘‘1’’ Output Voltage V

Logical ‘‘0’’ Output Voltage V

TRI-STATEÉOutput Current V

Output Source Current V

Output Sink Current V

Supply Current CSeHIGH

ADC08134, ADC08138 3.0 mA (max)

e

5.25V 2.0 V (min)

CC

e

4.75V 0.8 V (max)

CC

e

5.0V 1 mA (max)

IN

e

0V

IN

e

4.75V:

CC

eb

I
I

I

V

360 mA 2.4 V (min)

OUT

eb

10 mA 4.5 V (min)

OUT

e

4.75V 0.4 V (max)

CC

e

1.6 mA

OUT

e

0V

OUT

e

5V 3.0 mA (max)

OUT

e

0V

OUT

e

V

OUT

CC

ADC08131 (Note 16) 6.0 mA (max)

1 MHz unless otherwise specified.

Units

(Limits)

g

(/2 LSB (max)

g

(/4 LSB (max)

mA (max)

b

0.2

b

1

b

0.2

b

1

mA (max)

mA (max)

mA (max)

b

1 mA (max)

b

3.0 mA (max)

b

6.5 mA (min)

8.0 mA (min)

3

Electrical Characteristics (Continued)

The following specifications apply for V

e

T

e

T

T

to T

A

J

MIN

; all other limits T

MAX

CC

ea

A

5VDCand f

e

e

T

J

25§C.

e

1 MHz unless otherwise specified. Boldface limits apply for

CLK

ADC08131,

ADC08134 and

ADC08138 with BIN,

Symbol Parameter Conditions CIN, BIWM or

CIWM Suffixes

Typical Limits

(Note 8) (Note 9)

REFERENCE CHARACTERISTICS

V

OUT Output Voltage ADC08134, 2.5

REF

ADC08138

g

2%

ADC08131 2.5

g

2%

DV

/DT Temperature Coefficient 40 ppm/§C

REF

DV

REF

/DI

Load Regulation Sourcing

L

(Note 17) (0sI

s

L

ADC08134,
ADC08138

a

4 mA)

0.003 0.1

Sourcing

s

s

(0
ADC08131 0.003 0.1

a

I

2 mA)

L

Sinking

s

(b1sI
ADC08134,
ADC08138

0 mA)

L

0.2 0.5

Sinking

s

b

(

1sI

0 mA)

L

ADC08131 0.2 0.5

Line Regulation 4.75VsV

I

SC

Short Circuit Current V

REF

ADC08134,
ADC08138

V

REF

ADC08131 8 25

T

SU

DV

/Dt Long Term Stability 200 ppm/1 kHr

REF

Start-Up Time VCC:0Vx5V

e

C

L

CC

e

0V

e

0V

100 mF

s

5.25V

0.5 6

8 25

20 ms

2.5

2.5

g

g

Units

(Limits)

1.5%

V

1.5%

%/mA

(max)

mV

(max)

mA

(max)

4

Electrical Characteristics (Continued)

The following specifications apply for V

Boldface limits apply for T

Symbol Parameter Conditions

f

CLK

Clock Frequency 10 kHz (min)

e

T

A

ea

5VDC,V

CC

e

T

MIN

to T

MAX

J

ea

REF

; all other limits T

2.5 VDCand t

e

e

t

r

e

e

T

A

J

20 ns unless otherwise specified.

f

25§C.

Typical Limits Units

(Note 8) (Note 9) (Limits)

1 MHz (max)

Clock Duty Cycle 40 % (min)
(Note 14) 60 % (max)

T

C

t

CA

t

SELECT

t

SET-UP

t

HOLD

t

pd1,tpd0

Conversion Time (Not Including f
MUX Addressing Time) 8 ms (max)

Acquisition Time (/2 1/f

CLK High while CS is High 50 ns

CS Falling Edge or Data Input
Valid to CLK Rising Edge

Data Input Valid after CLK
Rising Edge

CLK Falling Edge to Output C
Data Valid (Note 15) Data MSB First 250 ns (max)

e

1 MHz 8 1/f

CLK

e

100 pF:

L

(max)

CLK

(max)

CLK

25 ns (min)

20 ns (min)

Data LSB First 200 ns (max)

t1H,t

C

IN

C

OUT

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed

specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance
characteristics may degrade when the device is not operated under the listed test conditions.

Note 3: All voltages are measured with respect to AGND
Note 4: When the input voltage (V

5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four
pins.

Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
with suffixes BIN, CIN, BIJ, CIJ, BIWM, and CIWM T
parts when board mounted follow: ADC08131 with BIN and CIN suffixes 120
suffixes 80

Note 6: Human body model, 100 pF capacitor discharged through a 1.5 kX resistor.
Note 7: See AN450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ or

soldering surface mount devices.

Note 8: Typicals are at T
Note 9: Guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 10: Total unadjusted error includes zero, full-scale, linearity, and multiplexer error. Total unadjusted error with V

and ADC08138. See Note 16.

Note 11: Cannot be tested for the ADC08131.
Note 12: For V

for analog input voltages one diode drop below ground or one diode drop greater than V
inputs (e.g., 5V) can cause an input diode to conduct, especially at elevated temperatures. This will cause errors for analog inputs near full-scale. The specification
allows 50 mV forward bias of either diode; this means that as long as the analog V
be correct. Exceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 V
range will therefore require a minimum supply voltage of 4.950 V

Note 13: Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage current the following
two cases are considered: one, with the selected channel tied high (5 V
channels is measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channels is again measured. The two
cases considered for determining on channel leakage current are the same except total current flow through the selected channel is measured.

Note 14: A 40% to 60% duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these
limits the minimum time the clock is high or low must be at least 450 ns. The maximum time the clock can be high or low is 100 m s.

Note 15: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to
allow for comparator response time.

Note 16: For the ADC08131 V
reference current (700 mA typical, 2 mA maximum).

Note 17: Load regulation test conditions and specifications for the ADC08131 differ from those of the ADC08134 and ADC08138 because the ADC08131 has the
on-board reference as a permanent load.

TRI-STATE Delay from Rising Edge C

0H

of CS

to Data Output and SARS Hi-Z (see TRI-STATE Test Circuits)

Capacitance of Logic Inputs 5 pF

Capacitance of Logic Outputs 5 pF

) at any pin exceeds the power supplies (V

IN

C/W. ADC08134 with BIWM and CIWM suffixes 140§C/W, ADC08138 with BIWM and CIWM suffixes 91§C/W,

§

e

25§C and represent the most likely parametric norm.

J

t

V

IN(b)

the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward-conduct

IN(a)

IN is internally tied to the on chip 2.5V band-gap reference output; therefore, the supply current is larger because it includes the

REF

e

e

(T

D

J

MAX

e

J

MAX

e

10 pF, R

L

e

C

100 pF, R

L

DGNDe0VDC, unless otherwise specified.

b

TA)/iJAor the number given in the Absolute Maximum Ratings, whichever is lower. For devices

125§C. For devices with suffix CMJ, T

over temperature variations, initial tolerance and loading.

DC

) and the remaining seven off channels tied low (0 VDC), total current flow through the off

DC

e

10 kX

L

e

2kX 180 ns (max)

L

k

(AGND or DGND) or V

IN

J

MAX

J

C/W, ADC08134 with BIN and CIN suffixes 95§C/W, ADC08138 with BIN and CIN

§

does not exceed the supply voltage by more than 50 mV, the output code will

IN

MAX

Linear Data Book

supply. During testing at low VCClevels (e.g., 4.5V), high level analog

CC

50 ns

l

AVCC,) the current at that pin should be limited to

IN

, iJAand the ambient temperature, TA. The maximum

e

150§C. The typical thermal resistances (iJA) of these

section ‘‘Surface Mount’’ for other methods of

ea

5V only applies to the ADC08134

REF

to5VDCinput voltage

DC

5

ADC08138 Simplified Block Diagram

TL/H/10749– 1

6

Typical Converter Performance Characteristics

Linearity Error vs
Reference Voltage

Power Supply Current vs
Temperature (ADC08138,
ADC08134)

Note: For ADC08131 add I

(Note 16) TL/H/10749– 5

REF

Linearity Error vs
Temperature

Output Current vs
Temperature

Typical Reference Performance Characteristics

Load Regulation (3 Typical Parts)

Line Regulation

Linearity Error vs
Clock Frequency

Power Supply Current
vs Clock Frequency

Output Drift
vs Temperature
(3 Typical Parts)

Available
Output Current
vs Supply Voltage

7

TL/H/10749– 6