Rainbow Electronics ADC08060 User Manual
November 2003
ADC08060
8-Bit, 20 MSPS to 60 MSPS, 1.3 mW/MSPS A/D Converter
ADC08060 8-Bit, 60 MSPS, 1.3 mW/MSPS A/D Converter
General Description
The ADC08060 is a low-power, 8-bit, monolithic analog-todigital converter with an on-chip track-and-hold circuit. Optimized for low cost, low power, small size and ease of use,
this product operates at conversion rates of 20 MSPS to 70
MSPS with outstanding dynamic performance over its full
operating range while consuming just 1.3 mW per MHz of
clock frequency. That’s just 78 mW of power at 60 MSPS.
Raising the PD pin puts the ADC08060 into a Power Down
mode where it consumes just 1 mW.
The unique architecture achieves 7.5 Effective Bits with
25 MHz input frequency. The excellent DC and AC characteristics of this device, together with its low power consumption and single +3V supply operation, make it ideally suited
for many imaging and communications applications, including use in portable equipment. Furthermore, the ADC08060
is resistant to latch-up and the outputs are short-circuit proof.
The top and bottom of the ADC08060’s reference ladder are
available for connections, enabling a wide range of input
possibilities. The digital outputs are TTL/CMOS compatible
with a separate output power supply pin to support interfacing with 3V or 2.5V logic. The digital inputs (CLK and PD) are
TTL/CMOS compatible.
The ADC08060 is offered in a 24-lead plastic package
(TSSOP) and is specified over the industrial temperature
range of −40˚C to +85˚C. An evaluation board is available to
assist in the easy evaluation of the ADC08060.
Features
n Single-ended input
n Internal sample-and-hold function
n Low voltage (single +3V) operation
n Small package
n Power-down feature
Key Specifications
n Resolution 8 bits
n Maximum sampling frequency 60 MSPS (min)
n DNL 0.4 LSB (typ)
n ENOB 7.5 bits (typ) at f
n THD −60 dB (typ)
n No missing codes Guaranteed
n Power Consumption
— Operating 1.3 mW/MSPS (typ)
— Power Down Mode 1 mW (typ)
=25MHz
IN
Applications
n Digital imaging systems
n Communication systems
n Portable instrumentation
n Viterbi decoders
n Set-top boxes
Pin Configuration
20006201
© 2003 National Semiconductor Corporation DS200062 www.national.com
Ordering Information
ADC08060
Block Diagram
ADC08060CIMT TSSOP
ADC08060CIMTX TSSOP (tape and reel)
ADC08060EVAL Evaluation Board
Pin Descriptions and Equivalent Circuits
Pin No. Symbol Equivalent Circuit Description
6V
3V
9V
10 V
IN
RT
RM
RB
Analog signal input. Conversion range is VRBto VRT.
Analog Input that is the high (top) side of the reference
ladder of the ADC. Nominal range is 1.0V to V
and VRBinputs define the VINconversion range.
on V
RT
Bypass well. See Section 2.0 for more information.
Mid-point of the reference ladder. This pin should be
bypassed to a clean, quiet point in the analog ground
plane with a 0.1 µF capacitor.
Analog Input that is the low side (bottom) of the
reference ladder of the ADC. Nominal range is 0.0V to
– 1.0V). Voltage on VRTand VRBinputs define the
(V
RT
conversion range. Bypass well. See Section 2.0 for
V
IN
more information.
20006202
. Voltage
A
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Pin Descriptions and Equivalent Circuits (Continued)
Pin No. Symbol Equivalent Circuit Description
Power Down input. When this pin is high, the converter is
23 PD
in the Power Down mode and the data output pins hold
the last conversion result.
ADC08060
24 CLK
13 thru 16
and
D0–D7
19 thru 22
7V
IN
GND Reference ground for the single-ended analog input, VIN.
CMOS/TTL compatible digital clock Input. V
on the falling edge of CLK input.
Conversion data digital Output pins. D0 is the LSB, D7 is
the MSB. Valid data is output just after the rising edge of
the CLK input.
Positive analog supply pin. Connect to a clean, quiet
1, 4, 12 V
A
voltage source of +3V. V
µF ceramic chip capacitor for each pin, plus one
should be bypassed with a 0.1
A
10 µF capacitor. See Section 3.0 for more information.
18 DR V
D
Power supply for the output drivers. If connected to VA,
decouple well from V
.
A
17 DR GND The ground return for the output driver supply.
2, 5, 8, 11 AGND The ground return for the analog supply.
is sampled
IN
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Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required,
ADC08060
Soldering Temperature, Infrared,
10 seconds (Note 6) 235˚C
Storage Temperature −65˚C to +150˚C
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
Driver Supply Voltage (DR V
Voltage on Any Input or Output Pin −0.3V to V
Reference Voltage (VRT,VRB)V
CLK, OE Voltage Range
Digital Output Voltage (V
Input Current at Any Pin (Note 3)
Package Input Current (Note 3)
Power Dissipation at T
) 3.8V
A
)V
D
+ 0.3V
A
to AGND
A
−0.3V to
+ 0.3V)
(V
A
) DR GND to DR V
OH,VOL
±
25 mA
±
50 mA
= 25˚C See (Note 4)
A
A
D
Operating Ratings (Notes 1, 2)
Operating Temperature Range −40˚C ≤ T
Supply Voltage (V
Driver Supply Voltage (DR V
Ground Difference |GND - DR GND| 0V to 300 mV
Upper Reference Voltage (V
Lower Reference Voltage (V
V
Voltage Range VRBto V
IN
) +2.7V to +3.6V
A
) +2.4V to V
D
) 1.0V to (VA+ 0.1V)
RT
) 0Vto(VRT− 1.0V)
RB
ESD Susceptibility (Note 5)
Human Body Model
Machine Model
2500V
250V
Converter Electrical Characteristics
The following specifications apply for VA=DRVD= +3.0VDC,VRT= +1.9V, VRB= 0.3V, CL= 10 pF, f
duty cycle. Boldface limits apply for T
J=TMIN
to T
Symbol Parameter Conditions
: all other limits TA= 25˚C (Notes 7, 8)
MAX
Typical
(Note 9)
DC ACCURACY
INL Integral Non-Linearity
DNL Differential Non-Linearity
±
0.5
±
0.4
Missing Codes 0 (max)
FSE Full Scale Error 18
ZSE Zero Scale Offset Error 26
ANALOG INPUT AND REFERENCE CHARACTERISTICS
V
IN
C
IN
R
IN
Input Voltage 1.6
VINInput Capacitance
RINInput Resistance
V
= 0.75V +0.5
IN
Vrms
(CLK LOW) 3 pF
(CLK HIGH) 4 pF
>
1MΩ
BW Full Power Bandwidth 200 MHz
V
V
V
V
R
I
RT
RB
RT
RB
REF
REF
Top Reference Voltage 1.9
Bottom Reference Voltage 0.3
Reference Delta 1.6
Reference Ladder Resistance VRTto V
RB
Reference Ladder Current 7.3
220
CLK, PD DIGITAL INPUT CHARACTERISTICS
V
IH
V
IL
I
IH
Logical High Input Voltage DR VD=VA= 3.3V 2.0 V (min)
Logical Low Input Voltage DR VD=VA= 2.7V 0.8 V (max)
Logical High Input Current VIH=DRVD=VA= 3.3V 10 nA
= 60 MHz at 50%
CLK
Limits
(Note 9)
±
1.3 LSB (max)
+1.0
−0.9
±
28 mV (max)
±
35 mV (max)
V
RB
V
RT
V
A
1.0 V (min)
− 1.0 V (max)
V
RT
0 V (min)
1.0 V (min)
2.3 V (max)
150 Ω (min)
300 Ω (max)
5.3 mA (min)
10.6 mA (max)
≤ +85˚C
A
RT
Units
(Limits)
LSB (max)
LSB (min)
V (min)
V (max)
V (max)
A
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Converter Electrical Characteristics (Continued)
The following specifications apply for VA=DRVD= +3.0VDC,VRT= +1.9V, VRB= 0.3V, CL= 10 pF, f
duty cycle. Boldface limits apply for T
J=TMIN
to T
Symbol Parameter Conditions
CLK, PD DIGITAL INPUT CHARACTERISTICS
I
IL
C
IN
Logical Low Input Current VIL= 0V, DR VD=VA= 2.7V −50 nA
Logic Input Capacitance 3 pF
DIGITAL OUTPUT CHARACTERISTICS
V
OH
V
OL
High Level Output Voltage VA=DRVD= 2.7V, IOH= −400 µA 2.6 2.4 V (min)
Low Level Output Voltage VA=DRVD= 2.7V, IOL= 1.0 mA 0.4 0.5 V (max)
DYNAMIC PERFORMANCE
f
IN
f
ENOB Effective Number of Bits
SINAD Signal-to-Noise & Distortion
SNR Signal-to-Noise Ratio
SFDR Spurious Free Dynamic Range
THD Total Harmonic Distortion
HD2 2nd Harmonic Distortion
HD3 3rd Harmonic Distortion
IMD Intermodulation Distortion
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
IN
f
1
f
2
POWER SUPPLY CHARACTERISTICS
I
A
DR I
Analog Supply Current
Output Driver Supply Current
D
DC Input 25 31 mA (max)
f
IN
DC Input 0.3 1 mA (max)
f
IN
DC Input 25.3 32 mA (max)
I
A
DRI
+
Total Operating Current
D
f
IN
PD = Low
CLK Low, PD = Hi 0.2
: all other limits TA= 25˚C (Notes 7, 8)
MAX
Typical
(Note 9)
= 4.4 MHz, VIN= FS − 0.25 dB 7.6 Bits
= 10 MHz, VIN= FS − 0.25 dB 7.6 7.1 Bits (min)
= 25 MHz, VIN= FS − 0.25 dB 7.5 Bits
= 29 MHz, VIN= FS − 0.25 dB 7.4 Bits
= 4.4 MHz, VIN= FS − 0.25 dB 47 dB
= 10 MHz, VIN= FS − 0.25 dB 47 44.5 dB (min)
= 25 MHz, VIN= FS − 0.25 dB 47 dB
= 29 MHz, VIN= FS − 0.25 dB 46 dB
= 4.4 MHz, VIN= FS − 0.25 dB 47 dB
= 10 MHz, VIN= FS − 0.25 dB 47 44.6 dB (min)
= 25 MHz, VIN= FS − 0.25 dB 47 dB
= 29 MHz, VIN= FS − 0.25 dB 46 dB
= 4.4 MHz, VIN= FS − 0.25 dB 64 dBc
= 10 MHz, VIN= FS − 0.25 dB 63 dBc
= 25 MHz, VIN= FS − 0.25 dB 60 dBc
= 29 MHz, VIN= FS − 0.25 dB 54 dBc
= 4.4 MHz, VIN= FS − 0.25 dB −64 dBc
= 10 MHz, VIN= FS − 0.25 dB −63 dBc
= 25 MHz, VIN= FS − 0.25 dB -57 dBc
= 29 MHz, VIN= FS − 0.25 dB −54 dBc
= 4.4 MHz, VIN= FS − 0.25 dB -70 dBc
= 10 MHz, VIN= FS − 0.25 dB −65 dBc
= 25 MHz, VIN= FS − 0.25 dB -64 dBc
= 29 MHz, VIN= FS − 0.25 dB −54 dBc
= 4.4 MHz, VIN= FS − 0.25 dB −72 dBc
= 10 MHz, VIN= FS − 0.25 dB −70 dBc
= 25 MHz, VIN= FS − 0.25 dB -68 dBc
= 29 MHz, VIN= FS − 0.25 dB −65 dBc
= 11 MHz, VIN= FS − 6.25 dB
= 12 MHz, VIN= FS − 6.25 dB
-55 dBc
= 10 MHz, VIN=FS−3dB 25 mA
= 10 MHz, VIN=FS−3dB 4.4 mA
= 10 MHz, VIN=FS−3dB,
29.4
= 60 MHz at 50%
CLK
Limits
(Note 9)
ADC08060
Units
(Limits)
mA (max)
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Converter Electrical Characteristics (Continued)
The following specifications apply for VA=DRVD= +3.0VDC,VRT= +1.9V, VRB= 0.3V, CL= 10 pF, f
duty cycle. Boldface limits apply for T
ADC08060
J=TMIN
to T
Symbol Parameter Conditions
: all other limits TA= 25˚C (Notes 7, 8)
MAX
Typical
(Note 9)
POWER SUPPLY CHARACTERISTICS
DC Input 76 96 mW (max)
f
= 10 MHz, VIN=FS−3dB,
PC Power Consumption
IN
PD = Low
88 mW
CLK Low, PD = Hi 0.6 mW
PSRR
PSRR
Power Supply Rejection Ratio
1
Power Supply Rejection Ratio
2
FSE change with 2.7V to 3.3V change
in V
A
SNR change with 200 mV at 200 kHz
on supply
54 dB
45 dB
AC ELECTRICAL CHARACTERISTICS
f
C1
f
C2
t
CL
t
CH
t
OH
t
OD
Maximum Conversion Rate 70 60 MHz (min)
Minimum Conversion Rate 20 MHz
Minimum Clock Low Time 6.7 ns (min)
Minimum Clock High Time 6.7 ns (min)
Output Hold Time CLK Rise to Data Invalid 4.4 ns
Output Delay CLK Rise to Data Valid 8.2 12 ns (max)
Pipeline Delay (Latency) 2.5 Clock Cycles
t
AD
t
AJ
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = AGND = DR GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, less than AGND or DR GND, or greater than V
should be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input
current of 25 mA to two.
Note 4: The absolute maximum junction temperature (T
junction-to-ambient thermal resistance (θ
TSSOP, θ
this device under normal operation will typically be about 180 mW (88 mW quiescent power +12 mW reference ladder power). The values for maximum power
dissipation listed above will be reached only when the ADC08060 is operated in a severe fault condition (e.g., when input or output pins are driven beyond the power
supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through ZERO Ohms.
Note 6: See AN-450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book, for other methods of soldering surface mount devices.
Note 7: The analog inputs are protected as shown below. Input voltage magnitudes up to V
However, errors in the A/D conversion can occur if the input goes above DR V
voltage must be ≤2.6V
Sampling (Aperture) Delay CLK Fall to Acquisition of Data 1.5 ns
Aperture Jitter 2 ps rms
A
max) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the
), and the ambient temperature (TA), and can be calculated using the formula PDMAX=(TJmax − TA)/θJA. In the 24-pin
is 92˚C/W, so PDMAX = 1,358 mW at 25˚C and 435 mW at the maximum operating ambient temperature of 85˚C. Note that the power consumption of
JA
to ensure accurate conversions.
DC
JA
J
+ 300 mV or to 300 mV below GND will not damage this device.
or below GND by more than 100 mV. For example, if VAis 2.7VDCthe full-scale input
D
A
= 60 MHz at 50%
CLK
Limits
(Note 9)
or DR VD), the current at that pin
Units
(Limits)
20006207
Note 8: To guarantee accuracy, it is required that VAand DR VDbe well bypassed. Each supply pin must be decoupled with separate bypass capacitors.
Note 9: Typical figures are at T
Level).
www.national.com 6
= 25˚C, and represent most likely parametric norms. Test limits are guaranteed to National’s AOQL (Average Outgoing Quality
J
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