Rainbow Electronics ADC08038 User Manual

January 1995

ADC08031/ADC08032/ADC08034/ADC08038 8-Bit
High-Speed Serial I/O A/D Converters with Multiplexer
Options, Voltage Reference, and Track/Hold Function

ADC08031/ADC08032/ADC08034/ADC08038 8-Bit High-Speed Serial I/O A/D Converters with

Multiplexer Options, Voltage Reference, and Track/Hold Function

General Description

The ADC08031/ADC08032/ADC08034/ADC08038 are
8-bit successive approximation A/D converters with serial I/
O and configurable input multiplexers with up to 8 channels.
The serial I/O is configured to comply with the NSC
MICROWIRE
terface to the COPS

TM

serial data exchange standard for easy in-

TM

family of controllers, and can easily

interface with standard shift registers or microprocessors.

The ADC08034 and ADC08038 provide a 2.6V band-gap
derived reference. For devices offering guaranteed voltage
reference performance over temperature see ADC08131,
ADC08134 and ADC08138.

A track/hold function allows the analog voltage at the posi­tive input to vary during the actual A/D conversion.

The analog inputs can be configured to operate in various
combinations of single-ended, differential, or pseudo-differ­ential modes. In addition, input voltage spans as small as 1V
can be accommodated.

Applications

Y

Digitizing automotive sensors

Y

Process control monitoring

Y

Remote sensing in noisy environments

Y

Instrumentation

Y

Test systems

Y

Embedded diagnostics

Ordering Information

s

Industrial (b40§CsT

ADC08031BIN, ADC08031CIN N08E

ADC08032BIN, ADC08032CIN N08E

ADC08034BIN, ADC08034CIN N14A

ADC08038BIN, ADC08038CIN N20A

ADC08031BIWM, ADC08031CIWM,
ADC08032BIWM, ADC08032CIWM, M14B
ADC08034BIWM, ADC08034CIWM

ADC08038BIWM, ADC08038CIWM M20B

a

85§C) Package

A

Features

Y

Serial digital data link requires few I/O pins

Y

Analog input track/hold function

Y

2-, 4-, or 8-channel input multiplexer options with ad­dress logic

Y

0V to 5V analog input range with single 5V power
supply

Y

No zero or full scale adjustment required

Y

TTL/CMOS input/output compatible

Y

On chip 2.6V band-gap reference

Y

0.3×standard width 8-, 14-, or 20-pin DIP package

Y

14-, 20-pin small-outline packages

Key Specifications

Y

Resolution 8 bits

Y

Conversion time (f

Y

Power dissipation 20mW (max)

Y

Single supply 5VDC(g5%)

Y

Total unadjusted error

Y

No missing codes over temperature

TRI-STATEÉis a registered trademark of National Semiconductor Corporation.

TM

COPS

microcontrollers and MICROWIRETMare trademarks of National Semiconductor

Corporation.

e

1 MHz) 8ms (max)

C

g

(/2 LSB andg1LSB

C

1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

TL/H/10555

Connection Diagrams

ADC08038

ADC08032

Dual-In-Line Package

ADC08032

Small Outline Package

TL/H/10555– 2

TL/H/10555– 4

ADC08034

TL/H/10555– 3

ADC08031

Dual-In-Line Package

TL/H/10555– 5

ADC08031

Small Outline Package

TL/H/10555– 30

TL/H/10555– 31

2

Absolute Maximum Ratings (Notes1&3)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Supply Voltage (V

Voltage at Inputs and Outputs

Input Current at Any Pin (Note 4)

Package Input Current (Note 4)

Power Dissipation at T

ESD Susceptibility (Note 6) 1500V

Soldering Information

N Package (10 sec.) 260
SO Package:

Vapor Phase (60 sec.) 215
Infrared (15 sec.) (Note 7) 220

Storage Temperature

) 6.5V

CC

e

25§C (Note 5) 800 mW

A

b

0.3V to V

b

65§Ctoa150§C

CC

g

a

0.3V

g

5mA

20 mA

§

§

§

Operating Ratings (Notes2&3)

Temperature Range T

ADC08031BIN, ADC08031CIN,

ADC08032BIN, ADC08032CIN,

ADC08034BIN, ADC08034CIN,

ADC08038BIN, ADC08038CIN,

ADC08031BIWM, ADC08032BIWM,

ADC08034BIWM, ADC08038BIWM

ADC08031CIWM, ADC08032CIWM,

ADC08034CIWM, ADC08038CIWM

C

C
C

Supply Voltage (V

) 4.5 VDCto 6.3 V

CC

b

40§CsT

MIN

s

s

T

T

A

MAX

s

a

85§C

A

DC

Electrical Characteristics

The following specifications apply for V

apply for T

e

e

T

T

A

J

MIN

to T

e

CC

; all other limits T

MAX

ea

V

REF

5VDC, and f

e

e

T

A

J

e

1 MHz unless otherwise specified. Boldface limits

CLK

25§C.

ADC08031, ADC08032,

ADC08034 and

ADC08038 with BIN,

Symbol Parameter Conditions CIN, BIWM or

CIWM Suffixes

Typical Limits

(Note 8) (Note 9)

CONVERTER AND MULTIPLEXER CHARACTERISTICS

Total Unadjusted Error (Note 10)

BIN, BIWM
CIN, CIWM

Differential
Linearity

R

REF

V

IN

Reference Input Resistance (Note 11) 3.5 kX

Analog Input Voltage (Note 12) (V

DC Common-Mode Error

Power Supply Sensitivity V

V

CC

REF

e

5Vg5%,

e

4.75V

On Channel Leakage On Channele5V, 0.2
Current (Note 13) Off Channel

e

0V 1

On Channele0V,
Off Channel

e

5V

Off Channel Leakage On Channele5V,
Current (Note 13) Off Channel

e

0V

On Channele0V, 0.2
Off Channel

e

5V 1

g

(/2 LSB (max)

g

1 LSB (max)

8 Bits (min)

1.3 kX (min)

6.0 kX (max)

a

0.05) V (max)

CC

b

(GND

0.05) V (min)

g

(/4 LSB (max)

g

(/4 LSB (max)

b

0.2

b

1

b

0.2

b

1

Units

(Limits)

mA (max)

mA (max)

mA (max)

mA (max)

3

Electrical Characteristics (Continued)

The following specifications apply for V

apply for T

e

e

T

T

A

J

MIN

to T

e

CC

; all other limits T

MAX

ea

V

REF

5VDC, and f

e

e

T

A

J

CLK

25§C.

e

1 MHz unless otherwise specified. Boldface limits

ADC08031, ADC08032,

ADC08034 and

ADC08038 with BIN,

Symbol Parameter Conditions CIN, BIWM or

CIWM Suffixes

Typical Limits

(Note 8) (Note 9)

DIGITAL AND DC CHARACTERISTICS

V

IN(1)

V

IN(0)

I

IN(1)

I

IN(0)

V

OUT(1)

V

OUT(0)

I

OUT

I

SOURCE

I

SINK

I

CC

Logical ‘‘1’’ Input Voltage V

Logical ‘‘0’’ Input Voltage V

Logical ‘‘1’’ Input Current V

Logical ‘‘0’’ Input Current V

Logical ‘‘1’’ Output Voltage V

Logical ‘‘0’’ Output Voltage V

TRI-STATEÉOutput Current V

Output Source Current V

Output Sink Current V

Supply Current

ADC08031, ADC08034, CS

e

5.25V 2.0 V (min)

CC

e

4.75V 0.8 V (max)

CC

e

5.0V 1 mA (max)

IN

e

0V

IN

e

4.75V:

CC

eb

I
I

I

V

360 mA 2.4 V (min)

OUT

eb

10 mA 4.5 V (min)

OUT

e

4.75V

CC

e

1.6 mA

OUT

e

0V

OUT

e

5V 3.0 mA (max)

OUT

e

0V

OUT

e

V

OUT

CC

e

HIGH 3.0 mA (max)

and ADC08038
ADC08032 (Note 16) 7.0 mA (max)

REFERENCE CHARACTERISTICS

V

OUT Nominal Reference Output V

REF

OUT Option

REF

Available Only on 2.6 V
ADC08034 and ADC08038

Units

(Limits)

b

1 mA (max)

0.4 V (max)

b

3.0 mA (max)

b

6.5 mA (min)

8.0 mA (min)

4

Electrical Characteristics (Continued)

The following specifications apply for V

apply for T

Symbol Parameter Conditions

f

CLK

e

e

T

T

A

J

MIN

to T

Clock Frequency 10 kHz (min)

e

CC

; all other limits T

MAX

ea

V

REF

5VDC, and t

e

A

e

e

t

20 ns unless otherwise specified. Boldface limits

r

25§C.

f

e

T

J

Typical Limits Units

(Note 8) (Note 9) (Limits)

1 MHz (max)

Clock Duty Cycle 40 % (min)
(Note 14) 60 % (max)

T

C

t

CA

t

SELECT

t

SET-UP

t

HOLD

t

pd1,tpd0

Conversion Time (Not Including f
MUX Addressing Time) 8 ms (max)

Acquisition Time (/2 1/f

CLK High while CS is High 50 ns

CS Falling Edge or Data Input
Valid to CLK Rising Edge

Data Input Valid after CLK
Rising Edge

CLK Falling Edge to Output C
Data Valid (Note 15) Data MSB First 250 ns (max)

e

1 MHz 8 1/f

CLK

e

100 pF:

L

(max)

CLK

(max)

CLK

25 ns (min)

20 ns (min)

Data LSB First 200 ns (max)

t1H,t

C

IN

C

OUT

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.

Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed

specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance
characteristics may degrade when the device is not operated under the listed test conditions.

Note 3: All voltages are measured with respect to AGND

Note 4: When the input voltage V

5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four
pins.

Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
with suffixes BIN, CIN, BIJ, CIJ, BIWM, and CIWM T
parts when board mounted follow: ADC08031 and ADC08032 with BIN and CIN suffixes 120
BIN and CIN suffixes 80
CIWM suffixes 140

Note 6: Human body model, 100 pF capacitor discharged through a 1.5 kX resistor.

Note 7: See AN450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ or

soldering surface mount devices.

Note 8: Typicals are at T

Note 9: Guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 10: Total unadjusted error includes offset, full-scale, linearity, multiplexer.

Note 11: Cannot be tested for the ADC08032.

Note 12: For V

for analog input voltages one diode drop below ground or one diode drop greater than V
inputs (e.g., 5V) can cause an input diode to conduct, especially at elevated temperatures, which will cause errors for analog inputs near full-scale. The spec allows
50 mV forward bias of either diode; this means that as long as the analog V
correct. Exceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 V
range will therefore require a minimum supply voltage of 4.950 V

Note 13: Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage current the following
two cases are considered: one, with the selected channel tied high (5 V
channels is measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channels is again measured. The two
cases considered for determining on channel leakage current are the same except total current flow through the selected channel is measured.

Note 14: A 40% to 60% duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these
limits the minimum time the clock is high or low must be at least 450 ns. The maximum time the clock can be high or low is 100 ms.

Note 15: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to
allow for comparator response time.

Note 16: For the ADC08032 V

TRI-STATE Delay from Rising Edge C

0H

of CS

to Data Output and SARS Hi-Z (see TRI-STATE Test Circuits)

Capacitance of Logic Inputs 5 pF

Capacitance of Logic Outputs 5 pF

at any pin exceeds the power supplies (V

IN

C/W. ADC08031 with BIWM and CIWM suffixes 140§C/W, ADC08032 with BIWM and CIWM suffixes 140§C/W, ADC08034 with BIWM and

§

C/W, ADC08038 with BIWM and CIWM suffixes 91§C/W.

§

e

25§C and represent the most likely parametric norm.

J

t

V

IN(b)

the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward-conduct

IN(a)

IN is internally tied to VCC, therefore, for the ADC08032 reference current is included in the supply current.

REF

e

e

(T

D

J

MAX

e

J

MAX

e

10 pF, R

L

e

C

100 pF, R

L

DGNDe0VDC, unless otherwise specified.

b

TA)/iJAor the number given in the Absolute Maximum Ratings, whichever is lower. For devices

125§C. For devices with suffix CMJ, T

over temperature variations, initial tolerance and loading.

DC

) and the remaining seven off channels tied low (0 VDC), total current flow through the off

DC

e

10 kX

L

e

2kX 180 ns (max)

L

k

(AGND or DGND) or V

IN

J

MAX

J

MAX

C/W, ADC08034 with BIN and CIN suffixes 95§C/W, ADC08038 with

§

Linear Data Book

supply. During testing at low VCClevels (e.g., 4.5V), high level analog

CC

does not exceed the supply voltage by more than 50 mV, the output code will be

IN

50 ns

l

VCC,) the current at that pin should be limited to

IN

, iJAand the ambient temperature, TA. The maximum

e

150§C. The typical thermal resistances (iJA) of these

section ‘‘Surface Mount’’ for other methods of

to5VDCinput voltage

DC

5

Typical Performance Characteristics

Linearity Error vs
Reference Voltage

Power Supply Current vs
Temperature (ADC08038,
ADC08034, ADC08031)

Note: For ADC08032 add I

REF

Leakage Current Test Circuit

Linearity Error vs
Temperature

Output Current vs
Temperature

Linearity Error vs
Clock Frequency

Power Supply Current
vs Clock Frequency

TL/H/10555– 6

TL/H/10555– 7

6

TRI-STATE Test Circuits and Waveforms

t

1H

t

0H

t

1H

t

0H

TL/H/10555– 8

Timing Diagrams

Data Input Timing

*To reset these devices, CLK and CS must be simultaneously high for a period of t

standards ADC0831/2/4/8.

Data Output Timing

ADC08031 Start Conversion Timing

or greater. Otherwise these devices are compatible with industry

SELECT

TL/H/10555– 11

TL/H/10555– 10

TL/H/10555– 9

TL/H/10555– 12

7

Timing Diagrams (Continued)

ADC08031 Timing

*LSB first output not available on ADC08031.

LSB information is maintained for remainder of clock periods until CS

ADC08032 Timing

ADC08034 Timing

TL/H/10555– 13

goes high.

TL/H/10555– 14

TL/H/10555– 15

8