Microsoft, Windows, and Windows XP are registered trademarks of Microsoft Corporation. Red Hat and Red Hat Linux are registered
trademarks of Red Hat, Inc. Linux is a registered trademark of Linus Torvalds. All other trademarks, registered trademarks, service
marks, and trade names are the property of their respective owners.
About this manual....................................................................................................................................................................... 7
Where to get more product information ............................................................................................................................... 8
General specifications......................................................................................................................................................................... 12
Main features of the 5500/5600 series processor and the 5520 chipset ...............................................................................16
Special features...........................................................................................................................................................................16
Recovery from AC power loss........................................................................................................................................................... 16
PC health monitoring ................................................................................................................................................................16
Fan status monitor with firmware control...................................................................................................................................... 16
Environmental temperature control ................................................................................................................................................ 17
ACPI features ...............................................................................................................................................................................17
Slow blinking LED for suspend-state indicator.............................................................................................................................. 17
Main switch override mechanism.................................................................................................................................................... 17
Power supply...............................................................................................................................................................................18
Super I/O......................................................................................................................................................................................18
Overview of the Nuvoton WPCM450 controller .................................................................................................................18
Control panel connectors/IO ports ........................................................................................................................................19
Back panel connectors/IO ports....................................................................................................................................................... 19
Headers and connectors.......................................................................................................................................................... 21
Front control panel JF1 header......................................................................................................................................................... 21
Power connectors ................................................................................................................................................................................ 24
Fan headers........................................................................................................................................................................................... 25
Power LED/speaker ............................................................................................................................................................................. 25
System management bus .................................................................................................................................................................. 26
Power SMB (I2C) connector.............................................................................................................................................................. 27
I2C Bus to PCI-Express slots............................................................................................................................................................... 28
SAS enable (SB5520DT1-SAS only)................................................................................................................................................. 29
Onboard LED indicators .......................................................................................................................................................... 29
SAS heartbeat LED............................................................................................................................................................................... 30
SAS error LED ....................................................................................................................................................................................... 30
Onboard power LED........................................................................................................................................................................... 30
Rear I/O POST code LEDs.................................................................................................................................................................. 31
SATA and SAS connections...................................................................................................................................................... 31
Processors and heatsinks......................................................................................................................................................... 32
Starting the BIOS setup utility................................................................................................................................................. 37
About the setup utility ........................................................................................................................................................................ 37
Main menu ................................................................................................................................................................................. 38
Security menu ............................................................................................................................................................................59
Exit menu ....................................................................................................................................................................................62
How to recover the AMIBIOS image ............................................................................................................................................... 63
Boot sector recovery from a USB device........................................................................................................................................ 63
Boot sector recovery from an IDE CD-ROM.................................................................................................................................. 63
Boot sector recovery from a serial port (serial flash) .................................................................................................................. 64
Appendix A: BIOS Beep Codes and Checkpoints........................................................................................67
Appendix B: Installing the Windows OS........................................................................................................71
Installing the Windows operating system to a RAID system........................................................................................... 71
5
6
Table of Contents
About this manual
This manual describes the RadiSys Procelerant® SB5520DT1 motherboard. This manual is
intended for professional technicians, system integrators, and knowledgeable personal
computer users.
The manual is organized as follows:
Chapter 1, Introduction, on page 9 describes the features, specifications, and performance
of the motherboard and provides detailed information about the chipset.
Chapter 2, Hardware Reference, on page 19 provides hardware reference information.
Chapter 3, BIOS Configuration, on page 37 includes an introduction to the BIOS and
provides detailed information on running the CMOS Setup utility.
Chapter A, BIOS Beep Codes and Checkpoints, on page 67 lists BIOS POST error codes.
Chapter B, Installing the Windows OS, on page 71 provides instructions for installing the
Windows operating system.
PREFACE
Safety notices
Electrostatic discharge
WARNING! This product contains static-sensitive components and should be handled with care.
Failure to employ adequate anti-static measures can cause irreparable damage to components.
To avoid electrostatic discharge (ESD) damage, the following precautions are strongly
recommended.
Keep each module/PCB in its ESD shielding bag until you are ready to install it.
Before touching a module, attach an ESD wrist strap to your wrist and connect its other end
to a known ground.
Handle the module only in an area that has its working surfaces, floor coverings, and chairs
connected to a known ground.
Hold modules only by their edges and mounting hardware. Avoid touching PCB
components and connector pins.
For further information on ESD, visit www.esda.org.
7
Preface
Lithium cell battery
WARNING!
When replacing the battery on the motherboard, use only lithium cell battery type CR2032.
Using any other battery may damage the board.
Do not use a conductive instrument to remove the battery.
Dispose of the spent battery promptly. Do not recharge, disassemble, or incinerate the battery.
Keep the battery away from children.
Where to get more product information
For additional product information, visit the Embedded Server product pages on the RadiSys
Web site at www.radisys.com for access to datasheets, product documentation, BIOS releases,
and drivers.
8
INTRODUCTION
1
The Procelerant SB5520DT1 motherboards support the Intel® 5500/5600 Series Processors,
the first dual-processor platform with Intel QuickPath Interconnect (QPI) Technology. With dual
Intel 5520 IOH chips built in, the SB5520DT1 motherboard offers enhanced system
performance with increased bandwidth, as well as unprecedented scalability optimized for highperformance computing- and graphics-intensive applications.
Major features of the SB5520DT1 motherboard include:
Support for one or two Intel 5500/5600 series processors
Two IOH36D I/O hubs providing 72 PCI Express 2.0 lanes in six slots (SAS) or seven slots
(SATA)
I/O slot configurations designed to maximize the number of high-performance accelerator
cards that can be installed
Optional integrated SAS controller to support up to 1.2 Gbps to an array of drives
Two integrated Gbit server-class Ethernet controllers with copper interconnects
Integrated IPMI management subsystem with third 10/100 Ethernet controller
Integrated video controller to provide management/configuration console display
Product models
Contact your RadiSys representative for updates on supported or recommended processors.
The SB5520DT1 motherboard is available in two models: SB5520DT1-SAS and
SB5520DT1-SATA. The two models are almost identical, except that the SB5520DT1-SAS model
includes a SAS 2.0 controller on the motherboard.
Table 1. Differences between SB5520DT1 models
SB5520DT1-SASSB5520DT1-SATA
SATA2 (I CH10R)YesYes
LSI SAS 2.0 2008 controller (with SAS ports 0–7)YesNo
Throughout this manual, the product will be referred to as the “SB5520DT1” or “motherboard.”
If information applies only to a certain model, the specific name of the model will be used, such
as “SB5520DT1-SAS.”
9
1
Introduction
JBT1
CPU2
CPU1
Jl2C1
JPL1
JPS1
JPB1
FAN3
JFI
FAN2
FAN1
JD1
FAN6
JSMB1
JL1
FAN4
USB7
USB6
FAN5
KB
MOUSE
JPW2
JPW1
JPW3
JPI2C
FAN7
I-SATA3
I-SATA2
I-SATA5
I-SATA4
I-SATA1
I-SATA0
SAS0-3SAS4-7
USB8/9
JPG1
COM2
SATA-SPGIO-0
SATA-SPGIO-1
FAN8
JI2C2
VGA
COM1
USB0/1
IPMI LAN
USB
2/3
4/5
LAN2
LAN1
JOH1
P2 DIMM3A
P2 DIMM3B
P2 DIMM2A
P2 DIMM2B
P2 DIMM1A
P2 DIMM1B
P1 DIMM1B
P1 DIMM1A
P1 DIMM2B
P1 DIMM2A
P1 DIMM3A
P1 DIMM3B
Intel 5520
(IOH-36D-2)
Intel 5520
(IOH-36D-1)
Intel ICH10R
(South Bridge)
Battery
SLOT7 PCI-E 2.0 X8
SLOT6 PCI-E 2.0 X8
SLOT5 PCI-E 2.0 X16
SLOT3 PCI-E 2.0 X16
SLOT2 PCI-E 2.0 X4
SLOT1 PCI-E 2.0 X16
SLOT4 PCI-E 2.0 X4
Buzzer
SPI
DP5
BMC
LAN CTRL
LSI
SAS2008
SAS FLASH
DP1
POST CODE
LEDs
BMC HEARTBEAT
BIOS
LEDS2
(not populated on
SB5520DT1-SAS)
Board layout
Figure 1. SB5520DT1 layout: top view
10
Notes:
Jumpers not indicated are for test purposes only.
The location of pin 1 is indicated by a red square:
When DP1 is on, the onboard power connection is on. Make sure to unplug the power
cables before removing or installing components.
1
Board layout
ARNING! To prevent damage to the power supply or motherboard, use a power supply
W
that contains a 24-pin and two 8-pin power connectors. Be sure to connect these
connectors to the 24-pin (JPW1) and the two 8-pin (JPW2 and JPW3) power connectors
on the motherboard. Failure to do so will v oid the manuf acturer’ s warr ant y on your power
supply and motherboard.
To avoid system overheating, be sure to provide adequate air flow to the system.
BuzzerOnboard buzzer/internal speaker
(SPI) BIOSOnboard BIOS
COM1Backplane serial port
FAN 1-8System/CPU fan headers (fans 7–8: CPU fans)
JD1PWR LED/speaker header (pins 1–3: PWR LED, pins 4–7: speaker)
JF1Front panel connector
JL1 Chassis intrusion header
JOH1Overheat LED header
JPI2C
Power supply SMBus I
2
C header
JPW1, JPW2/JPW324-pin ATX PWR, 8-pin secondary PWR (see the warning on page 11)
KB/MSPS2 keyboard/mouse
LAN1/2, Dedicated LANG-LAN (RJ45) ports
I-SATA0–I-SATA5(Intel South Bridge) SATA ports
SAS Ports 0–3, 4–7
Fan status monitor with firmware control
CPU/chassis temperature monitors
Platform Environment Control Interface (PECI) ready
Thermal Monitor 2 (TM2) support
CPU fan auto-off in sleep mode
CPU slow-down on temperature overheat
Pulse Width Modulation (PWM) fan control
CPU thermal trip support for processor protection, power LED
Power-up mode control for recovery from AC power loss
Auto-switching voltage regulator for CPU cores
System overheat/fan fail LED Indicator and control
Chassis intrusion detection
12
1
Table 5. SB5520DT1 specifications
ItemDescription
ACPI features
Onboard I/O
Slow blinking LED for suspend state indicator
Main switch override mechanism
ACPI Power Management
Intel ICH10R supports six SATA2 ports (with RAID0, RAID1, RAID10, RAID5 sup-
ported in the Windows OS Environment and RAID0, RAID1, RAID10 supported in
the Linux OS)
Intel 82576 Gigabit Ethernet controller supports dual Giga-bit LAN ports
One VGA Port supported by the Nuvoton WPCM450 controller
Two COM ports: one COM port on rear I/O, one onboard COM port header
PS/2 mouse and PS/2 keyboard ports
10 USB 2.0 ports: six ports on the rear I/O, two internal type-A ports, and two
onboard headers for front panel accessible ports
Super I/O: Nuvoton W83527HG
LSI SAS2 2008 controller supports eight SAS ports (SB5520DT1-SAS only)
IPMI 2.0 with full KVM support
Other
Console redirection
Onboard fan speed control by thermal management through the BIOS
CD/diskette utilitiesBIOS flash upgrade utility and device drivers
DimensionsExt. ATX 12.00" (L) x 13.00" (W) (304.80 mm x 330.20 mm)
Board layout
13
1
Introduction
Figure 2. Block diagram
14
1
Figure 3. Processor and slot positions
Chipset overview
Chipset overview
Built on the Intel 5500/5600 series processor and the 5520 chipset, the SB5520DT1
motherboard provides the performance and feature set required for dual-processor-based highend systems that are optimized for high-performance computing (HPC) and clustering servers.
The SB5520DT1 chipset consists of dual 5520 IO hubs and an ICH10R (South Bridge). With the
Intel QuickPath Interconnect (QPI) controller built in, the Intel 5500 Series Processor is the first
dual-processing platform to offer the next generation point-to-point system interconnect
interface. This interface replaces the current Front Side Bus Technology, substantially enhancing
system performance and scalability.
The 5520 IO Hub connects to each processor through an independent QPI link. Each link
consists of 20 pairs of unidirectional differential lanes for transmitting and receiving signals and a
differential forwarded clock. A full-width QPI link pair provides 84 signals.
15
1
Introduction
Each Intel 5520 supports up to 36 PCI Express Gen2 lanes with peer-to-peer read and write
transactions. The ICH10R provides up six SATA ports and 10 USB connections.
In addition, the SB5520DT1 chipset also offers a wide range of RAS (Reliability, Availability and
Serviceability) features. These features include memory interface ECC, x4/x8 Single Device Data
Correction (SDDC), Cyclic Redundancy Check (CRC), parity protection, out-of-band register
access through SMBus, memory mirroring, memory sparing, and Hot-plug support on the PCIExpress Interface.
Main features of the 5500/5600 series processor and the 5520 chipset
Up to six processor cores in each processor and up to 12 MB shared cache among cores
Two full-width Intel QPI links, with up to 6.4 GT/s of data transfer rate in each direction
Support for virtualization Technology and Integrated Management Engine
Point-to-point cache coherent interconnect, fast/narrow unidirectional links, and concurrent
bi-directional traffic
Error detection through CRC and error correction through link level retry
Special features
Recovery from AC power loss
The BIOS provides a setting for you to determine how the system will respond when AC power
is lost and then restored to the system. You can choose for the system to remain powered off
(in which case you must hit the power switch to turn it back on) or for the system to
automatically return to a power- on state. See the BOOT feature on page 40 to change this
setting. The default setting is Last State.
PC health monitoring
This section describes the PC health monitoring features of the SB5520DT1. All have an
onboard System Hardware Monitor chip that supports PC health monitoring. An onboard voltage
monitor continuously scans these onboard voltages: CPU1 Vcore, CPU2 Vcore, CPU1 Vtt, CPU2
Vtt, CPU1 DIMM, CPU2 DIMM, 1.1V, 1.5V, 1.8V, 3.3V, 12V, 5V, 3.3 Vsb, and VBAT. Once a
voltage becomes unstable, a warning is given or an error message is sent to the screen. The
user can adjust the voltage thresholds to define the sensitivity of the voltage monitor.
Fan status monitor with firmware control
The PC health monitor can check the RPM status of the cooling fans. The onboard CPU and
chassis fans are controlled by the BIOS Thermal Management (refer to Hardware health
monitor on page 50).
16
1
Environmental temperature control
The thermal control sensor monitors the CPU temperature in real time and turns on the thermal
control fan whenever the CPU temperature exceeds a user-defined threshold. The overheat
circuitry runs independently from the CPU. Once the sensor detects that the CPU temperature is
too high, it automatically turns on the thermal fan control to prevent any overheat damage to
the CPU. The onboard chassis thermal circuitry can monitor the overall system temperature and
alert users when the chassis temperature is too high.
W
ARNING! To avoid system overheating, be sure to provide adequate air flow to the
system.
ACPI features
The ACPI (Advanced Configuration and Power Interface) specification defines a flexible and
abstract hardware interface that provides a standard way to integrate power management
features throughout a PC system, including its hardware, operating system and application
software. This enables the system to automatically turn on and off peripherals such as
CD-ROMs, network cards, hard disk drives, and printers.
In addition to enabling operating system-directed power management, ACPI provides a generic
system event mechanism for plug and play and an operating system-independent interface for
configuration control. ACPI leverages the plug-and-play BIOS data structures while providing a
processor architecture-independent implementation that is compatible with operating systems
that implement some form of ACPI.
ACPI features
Slow blinking LED for suspend-state indicator
When the CPU goes into a suspend state, the chassis power LED starts blinking to indicate that
the CPU is in suspend mode. When the user presses any key, the CPU wakes up and the LED
automatically stops blinking and remains on.
Main switch override mechanism
When an ATX power supply is used, the power button can function as a system suspend button
to make the system enter a SoftOff state. The monitor is suspended and the hard drive spins
down. Pressing the power button again causes the whole system to wake up. During the SoftOff
state, the ATX power supply provides power to keep the required circuitry in the system alive. In
case the system malfunctions and you want to turn off the power, press and hold the power
button for four seconds. This option can be set in the Power section of the BIOS Setup routine.
17
1
Introduction
Power supply
As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates.
The SB5520DT1 can accommodate 24-pin ATX power supplies. Although many power supplies
generally meet the specifications required by the CPU, some are inadequate. In addition, the
two 12V 8-pin power connections are also required to ensure adequate power supply to the
system. Also your power supply must supply 1.5A for the Ethernet ports.
W
ARNING! To prevent damage to the power supply or motherboard, use a power supply
that contains a 24-pin and two 8-pin power connectors. Be sure to connect these
connectors to the 24-pin (JPW1) and the two 8-pin (JPW2 and JPW3) power connectors
on the motherboard for adequate power supply to your system. Failure to do so will void
the manufacturer’s warranty on your power supply and motherboard.
It is strongly recommended that you use a high quality power supply that meets ATX power
supply Specification 2.02 or above. It must also be SSI compliant (for more information, refer to
the Web site at http://www.ssiforum.org). Additionally, in areas where noisy power transmission
is present, you may choose to install a line filter to shield the computer from noise. It is
recommended that you also install a power surge protector to help avoid problems caused by
power surges.
Super I/O
The Super I/O provides two high-speed, 16550 compatible serial communication ports
(UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable baud rate
generator, complete modem control capability and a processor interrupt system. Both UARTs
provide legacy speed with baud rate of up to 115.2 Kbps as well as an advanced speed with
baud rates of 250 K, 500 K, or 1 Mb/s, which support higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Configuration and Power
Interface), which includes support of legacy and ACPI power management through an SMI or
SCI function pin. It also features auto power management to reduce power consumption.
Overview of the Nuvoton WPCM450 controller
The Nuvoton WPCM450 controller is a baseboard management controller (BMC) that supports
the 2D/VGA-compatible graphics core with the PCI interface, virtual media, and keyboard, video,
and mouse redirection (KVMR) modules. With blade-oriented Super I/O capability built in, the
WPCM450 BMC is ideal for legacy-reduced server platforms.
The BMC interfaces with the host system through a PCI interface to communicate with the
graphics core. It supports USB 2.0 and 1.1 for remote keyboard/mouse/virtual-media
emulation. It also provides LPC interface to control Super I/O functions. The BMC is connected
to the network through an external Ethernet PHY module.
The BMC communicates with onboard components using six SMBus interfaces, fan control, and
Platform Environment Control Interface (PECI).
18
HARDWARE REFERENCE
COM port 1
VGAUSB
IPMI LANLAN 1
LAN 2USBBMC
heartbeat
POST
code
LEDs
Mouse
Keyboard
2
34
65
1
This chapter describes the hardware components of the SB5520DT1 motherboard. For the
location of each component on the motherboard, refer to Board layout on page 10.
Control panel connectors/IO ports
The I/O ports are color coded in conformance with the PC 99 specification. See the picture
below for the colors and locations of the various I/O ports.
Back panel connectors/IO ports
2
Figure 4. Back panel I/O port locations
ATX PS/2 keyboard and PS/2 mouse ports
The ATX PS/2 keyboard and PS/2 mouse are located on the IO backplane.
Two COM connections (COM1 & COM2) are located on the motherboard. COM1 is located on
the backplane IO panel to provide serial connection support for the motherboard.
Video connector
A video (VGA) connector is located next to COM1 on the IO backplane. This connector is used
to provide video display.
1
5
Table 7. Serial port pin definitions
Pin #DefinitionPin #Definition
1DCD6DSR
2RXD7RTS
3TXD8CTS
4DTR9RI
5Ground10N/A
Table 8. VGA pin definitions
Pin #DefinitionPin #Definition
1RED9+5V (fused)
6
2GREEN10GND
3BLUE11Not used
11
4Not used12SDA
5GND13HSYNC
15
10
6RED_RTN14VSYNC
7GREEN_RTN15SCL
8BLUE_RTN
Universal serial bus (USB)
Six Universal Serial Bus ports (USB0/1, 2/3, and 4/5) are located on the I/O back panel.
Additionally, four USB connections (USB 6, 7, and 8/9) are on the motherboard to provide front
chassis access. (Cables are not included.)
20
Table 9. USB pin definitions
Pin #Definition
1+5V
2Data–
3Data+
4Ground
5N/A
2
Headers and connectors
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
Vcc
Vcc
Vcc
Vcc
Ground
Ground
1920
Vcc
X
Ground
NMI
X
Vcc
PWR Fail LED
NIC2 LED
Ethernet ports
Two Ethernet ports (LAN 1/LAN2) are located at on the IO backplane. In addition, a dedicated
LAN is also located on the SB5520DT1 to provide KVM support for IPMI 2.0. All these ports
accept RJ45 type cables.
Note: For LAN LED information, refer to the Onboard LED indicators on page 29.)
Table 10. LAN ports pin definitions
Pin #Definition
1TxD+
2TxD–
3RxD+
1
8
475 AC termination
575 AC termination
6RxD–
775 AC termination
875 AC termination
Headers and connectors
Front control panel JF1 header
JF1 contains header pins for various buttons and indicators that are normally located on a
control panel at the front side of the chassis. These connectors are designed specifically for use
with RadiSys server chassis. See the figure below for the descriptions of the various control
panel buttons and LED indicators. Refer to the following section for descriptions and pin
definitions.
Figure 5. JFI header pins
21
2
Hardware Reference
NMI button
The non-maskable interrupt button header is located on pins 19 and 20 of JF1.
Table 11. NMI button pin definitions (JF1)
Pin #Definition
19Control
20Ground
Power LED
The power LED connection is located on pins 15 and 16 of JF1.
Table 12. Power LED pin definitions (JF1)
Pin #Definition
15+3. 3V
16Ground
HDD LED
The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable here to indicate
HDD activity.
Table 13. HDD LED pin definitions (JF1)
Pin #Definition
13+3. 3V
14HD active
NIC1/NIC2 LED indicators
The NIC (Network Interface Controller) LED connection for GLAN port 1 is located on pins 11
and 12 of JF1, and the LED connection for GLAN Port 2 is on pins 9 and 10. Attach the NIC LED
cables to display network activity.
Table 14. GLAN1/2 LED pin definitions (JF1)
Pin #Definition
9/11VCC
10/12Ground
22
2
Headers and connectors
Overheat (OH)/fan fail LED
Connect an LED cable to the OH/fan fail connections on pins 7 and 8 of JF1 to provide
advanced warnings for chassis overheat/fan failure.
Table 15. OH/fan fail pin definitions (JF1)
Pin #Definition
7VCC
8OH/Fan Fail LED
Table 16. OH/fan fail indicator status
StateDefinition
OffNormal
OnOverheat
FlashingFan fail
Power fail LED
The power fail LED connection is located on pins 5 and 6 of JF1.
Table 17. PWR fail LED pin definitions (JF1)
Pin #Definition
5VCC
6Ground
Reset button
The reset button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset
switch on the computer case.
Table 18. Reset button pin definitions (JF1)
Pin #Definition
3Reset
4Ground
Power button
The power button connection is located on pins 1 and 2 of JF1. Momentarily contacting both
pins will power on or off the system. This button can also be configured in the BIOS to function
as a suspend button. To turn off the power in suspend mode, press the button for at least four
seconds.
Table 19. Power button pin definitions (JF1)
Pin #Definition
1Signal
2Ground
23
2
Hardware Reference
24 12
13 1
8 4
5 1
Power connectors
A 24-pin main power supply connector (JPW1) and two 8-pin CPU PWR connectors (JPW2 and
JPW3) on the motherboard. These power connectors meet the SSI EPS 12V specification. In
addition to the 24-pin ATX power connector, the 12V 8-pin CPU PWR connectors at JPW2/JPW3
must also be connected to your power supply.
W
that contains a 24-pin and two 8-pin power connectors. Be sure to connect these
connectors to the 24-pin (JPW1) and the two 8-pin (JPW2 and JPW3) power connectors
on the motherboard. Failure to do so will v oid the manuf acturer’ s warr ant y on your power
supply and motherboard.
ARNING! To prevent damage to the power supply or motherboard, use a power supply
Table 20. ATX Power 24-pin connector pin definitions
This motherboard has eight CPU/system fan headers (Fan 1 to Fan 8) on the motherboard. All
these 4-pin fans headers are backward compatible with the traditional 3-pin fans. However, fan
speed control is available only for 4-pin fans. The fan speeds are controlled by the BIOS under
Thermal Management. (The default setting is Disabled.) For details, refer to Hardware health
monitor on page 50.
Chassis intrusion
A chassis intrusion header is located at JL1 on the motherboard. Attach an appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened.
Headers and connectors
Table 22. Fan header pin definitions
Pin #Definition
1Ground
2+12V
3Tachometer
4PWR modulation
Power LED/speaker
On the JD1 header, pins 1–2 are used for power LED indication, and pins 4–7 are for the
speaker. See the tables below. Note that the speaker connector pins (4-7) are for use with an
external speaker. If you want to use the onboard speaker, you should close pins 6-7 with a
jumper.
The JOH1 header is used to connect an LED indicator to provide warnings of chassis
overheating or fan failure. This LED will blink when a fan failure occurs.
SATA-SGPIO 0/1 headers
Two SATA-SGPIO (General Purpose Input/Output) headers (SATA-SGPIO-0/SATA-SGPIO-1) are
located on the motherboard. These headers support serial link interfaces for the onboard SATA
connectors.
Table 25. Overheat LED pin definitions
Pin #Definition
1+3.3V
2OH active
Table 26. OH/fan fail LED indications
StateMessage
SolidOverheat
BlinkingFan fail
System management bus
A System Management Bus (SMB) header is located at JSMB1 on the motherboard. Connect
an appropriate cable here to use the SMB connection on your system.
Power System Management Bus (I2C) connector (JPI2C) monitors power supply, fan status and
system temperature.
Jumper block settings
Jumper shunts can be used to create shorts between two pins to change the function of the
jumper block (header) on the motherboard. See Board layout on page 10 for jumper block
locations. Pin 1 is identified with a square solder pad on the printed circuit board.
Note: When a two-pin jumper shunt is used, the circuit is “closed.” When the jumper shunt is
removed, the circuit is “open.”
Jumper block settings
Table 29. PWR SMB pin definitions
Pin #Definition
1Clock
2Data
3PWR Fail
4Ground
5+3.3V
Figure 6. Jumper blocks and shunts
27
2
Hardware Reference
1
3
1
3
GLAN enable/disable
Use JPL1 to enable or disable GLAN port1/GLAN port2 on the motherboard.
CMOS clear
JBT1 is used to clear CMOS. Instead of pins, this “jumper” consists of contact pads to prevent
the accidental clearing of CMOS. To clear CMOS, use a metal object such as a small screwdriver
to touch both pads at the same time to short the connection. Always remove the AC power cord
from the system before clearing CMOS.
Note: For an ATX power supply, you must completely shut down the system, remove the AC
power cord and then short JBT1 to clear CMOS.
Table 30. GLAN Enable jumper settings
Pin #Definition
1–2Enabled (default)
2–3Disabled
I2C Bus to PCI-Express slots
Use jumpers JI2C1 and JI2C2 to connect the System Management Bus (I2C) to PCI-Express
slots in order to improve PCI slot performance. These two jumpers are to be set at the same
time. The default setting is Closed to enable the connections.
VGA enable
Jumper JPG1 allows you to enable video connections on the motherboard.
Table 31. I2C for PCI-E Slots jumper settings
Jumper SettingDefinition
ClosedEnabled (default)
OpenDisabled
Table 32. VGA enable jumper settings
Jumper SettingDefinition
Pins 1–2Enabled (default)
Pins 2–3Disabled
28
2
SAS enable (SB5520DT1-SAS only)
1
3
JPS1 allows you to enable or disable SAS connectors. The default position is on pins 1 and 2 to
enable SAS.
Onboard LED indicators
GLAN LEDs
Two LAN ports (LAN 1/LAN 2) are located on the IO backplane of the motherboard. Each
Ethernet LAN port has two LEDs. The green LED indicates activity, while the other link LED may
be green, amber or off to indicate the speed of the connections. See the tables below for more
information.
Onboard LED indicators
Table 33. SAS enable/disable jumper settings
Jumper SettingDefinition
Pins 1–2Enabled (default)
Pins 2–3Disabled
Table 34. LAN 1/LAN 2 activity LED (left) LED state
IPMI dedicated LAN LEDs
In addition to LAN 1/LAN 2, an IPMI Dedicated LAN is also located on the IO backplane of the
SB5520DT1. The amber LED on the right indicates activity, while the green LED on the left
indicates the speed of the connection. See the table below for more information.
LED ColorStatusDefinition
GreenFlashingActive
Table 35. LAN 1/LAN 2 link LED (right) LED state
LED ColorDefinition
OffNo connection or 10 Mbps
Green100 Mbps
Amber1 Gbps
Table 36. IPMI LAN link LED (left) and activity LED (right)
ColorStatusDefinition
Link (left)Green: Solid100 Mbps
OffNo connection
Activity (right)Amber: BlinkingActive
29
2
Hardware Reference
BMC activity LED
A BMC heartbeat LED is located at DP5 on the motherboard. When DP5 is blinking, BMC
(Baseboard Management Controller) is active. In addition to DP5, there is a blue BMC
Heartbeat LED visible from the rear of the chassis through the I/O panel. See the tables below
for more information.
LEDDefinition
DP5 Green: BlinkingBMC is active
BMC Heartbeat Blue: BlinkingBMC is active
SAS heartbeat LED
A SAS heartbeat LED is located at LEDS2. When LEDS2 is on, SAS functions normally. Refer to
the table below for details.
LEDDefinition
Green: OnSAS: Normal
Table 37. BMC activity LED indicator LED settings
Table 38. SAS heartbeat LED indicator settings
SAS error LED
A SAS error LED is located at LEDS2. When LEDS2 is on, an error has occurred with SAS
connections. Refer to the table below for details.
Table 39. SAS error LED indicator LED settings
LEDDefinition
Red: OnSAS error occurs
Onboard power LED
An onboard power LED is located at DP1 on the motherboard. When this LED is on, the system
is on. Be sure to turn off the system and unplug the power cord before removing or installing
components. See the table below for more information.
LEDDefinition
OffSystem off
Green steadySystem power on
Green blinkingSystem in standby
Table 40. Onboard PWR LED settings
(PWR cable not connected)
30
2
Rear I/O POST code LEDs
POST code 20hPOST code 0AhPOST code 33h
7
1
Eight POST code LEDs in a 4x2 array display the codes written to I/O location 80h during BIOS
POST for diagnostic or debug support. The left column of 4 LEDs represents the upper four bits,
and the right column of 4 LEDs represents the lower four bits; the top LEDs are the LSBs.
The following figure shows some examples.
See Chapter A, BIOS Beep Codes and Checkpoints, on page 67 for related information.
SATA and SAS connections
Six serial ATA (SATA) connectors (SATA 0–5) are located on the motherboard. In addition to six
SATA ports, eight SAS connections are also located on the SB5520DT1-SAS. These serial link
connections provide faster data transmission than the connections of traditional parallel ATA. The
SATA connectors are supported by the Intel ICH10R. The SAS connectors on the SB5520DT1SAS are supported by the LSI SAS 2 controller.
For SATA RAID Configuration instructions, refer to the Intel SATA HostRAID User’s Guide.
For instructions on SAS RAID configuration, refer to the LSI MegaRAID User’s Guide.
31
2
Hardware Reference
Processors and heatsinks
See General specifications on page 12 for information about the Intel 5500/5600 series
processors.
W
ARNING: When handling the processor package, avoid placing direct pressure on the
label area of the fan.
Notes:
Always connect the power cord last, and always remove it before adding, removing, or
changing any hardware components. Be sure to install the processor into the CPU socket
before you install the CPU heatsink.
Make sure to install the motherboard into the chassis before you install the CPU heatsink
and heatsink fans.
When purchasing a motherboard without a 5500/5600 Series processor preinstalled, make
sure that the CPU socket plastic cap is in place, and none of the CPU socket pins are bent;
otherwise, contact your RadiSys representative immediately.
Processor installation
1. Press the socket clip to unlock it.
2. Gently lift the socket clip to free the load plate.
32
2
Processors and heatsinks
3. Lift and swing open the load plate.
4. Holding the plastic cap as shown, remove it from the CPU socket.
5. Holding the CPU between your thumb and index finger, align the CPU keys (the cutouts)
with the socket keys.
33
2
Hardware Reference
6. Once the CPU and socket are aligned, carefully lower the CPU straight down into the socket.
W
against the surface of the socket or its pins.
ARNING: To avoid damaging the CPU or the socket, be careful not to rub the CPU
7.With the CPU seated in the socket, inspect the four corners of the CPU to make sure that
the CPU is properly installed.
8. Once the CPU is securely seated on the socket, lower the CPU load plate to the socket.
9. Swing the socket clip down, and gently push it into the locked position.
W
ARNING: Be sure to save the plastic cap. If shipment of the motherboard becomes
necessary, the plastic cap must be properly installed; otherwise, the socket pins will be
damaged.
34
2
Heatsink installation
#1
#2
This procedure demonstrates how to install a passive heatsink. To install an active heatsink
(“fansink”), plug the fan’s power connector into the nearest fan header after completing step 3.
Refer to the board layout diagram on page 10 for fan header locations.
Important: Do not apply thermal grease to the heatsink or the CPU, because the required
amount has already been applied.
1. Place the heatsink on top of the CPU, so that the four mounting holes are aligned with
Processors and heatsinks
those on the retention mechanism.
2. Install two screws (#1 and #2 in the illustration), and tighten them until just snug. To avoid
possible damage to the CPU, do not fully tighten the screws yet.
3. Install the other two screws, and tighten them until just snug.
4. Finish the installation by fully tightening all four screws.
35
2
Hardware Reference
Heatsink removal
WARNING: Removal of the CPU or the heatsink is not recommended; however, if you do
need to remove the heatsink, please follow these instructions to help prevent damage to
the CPU and other components.
1. Unplug the power cord from the power supply.
2. Disconnect the heatsink fan wires from the CPU fan header.
3. Using a screwdriver, loosen and remove heatsink screws #1 and #2; then loosen and
4. Holding the heatsink as shown in the installation procedure, gently wiggle the heatsink to
5. Once the heatsink is loosened, remove it from the CPU socket.
Note: Before reinstalling the heatsink, gently clean the surface of the CPU and the heatsink to
remove the old thermal grease, and then reapply the proper amount of thermal grease to the
CPU and heatsink.
remove the remaining two screws.
loosen it from the CPU.
Be careful not to use excessive force when wiggling the heatsink.
Memory
See “Installing memory modules” in Chapter 3, Installing Options in the RMS420 Server Setup
guide for detailed instructions.
See General specifications on page 12 for information about the memory types supported.
36
BIOS CONFIGURATION
The SB5520DT1 motherboard uses the American Megatrends (AMI) BIOS with RadiSys
extensions. The AMI ROM BIOS is stored in a Flash EEPROM. Using the AMI BIOS setup utility,
you can easily display and modify the system configurations.
This chapter describes the basic navigation of the BIOS setup utility screens and each BIOS
item.
Starting the BIOS setup utility
To enter the BIOS setup utility, press the Delete key during system boot. The system BIOS setup
screens and menu options are the standard AMI BIOS screens with SB5520DT1 extensions.
Use the up, down, left, and right arrow keys on your keyboard to navigate through the menu
options.
Note: In most cases, the Delete key invokes the AMI BIOS setup utility. Other machines may
use a different key, such as F1 or F2.
After you have completed the BIOS settings, press F10 or use the commands on the Exit menu
to save changes. Press Esc to go immediately to the Exit menu.
3
W
ARNING! Do not upgrade the BIOS unless your system has a BIOS-related issue.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall
RadiSys be liable for direct, indirect, special, incidental, or consequential damages arising
from a BIOS update. If you have to update the BIOS, do not shut down or reset the
system while the BIOS is updating. This is to avoid possible boot failure.
About the setup utility
The setup utility contains three main frames:
Menu frame – Organizes related BIOS items into functional groups. Select a menu to
display and configure its related BIOS items.
Left frame – Displays the BIOS items contained in the selected menu. Items that you can
configure appear as blue text, which changes to white when selected. Throughout this
chapter, options that appear in bold are default settings. Read-only items appear as gray text.
Right frame – Displays the key legend, which describes the keys that you can use to
navigate the setup screens. Most of these keys can be used at any time. Above the key
legend is an area reserved for a text message that can accompany an item selected in the
left frame.
Note: The AMI BIOS has default text messages built in. RadiSys retains the option to
include, omit, or change any of these text messages.
37
3
BIOS Configuration
Main Advanced Security Boot Exit
System Time [11:19:59]
System Date [Thu 04/30/2009]
When you first enter the setup utility, the Main menu is selected. The options that appear on the
Main menu are described below.
Figure 8. Main menu
BIOS SETUP UTILITY
System Overview
V02.67 (C)Copyright 1985-2009, American Megatrends, Inc.
BIOS itemUsage
System Overview
System Time/System Date Use this option to change the system time and date. Highlight System Time or
38
RadiSys SB5520DT1
VersionThis item displays the BIOS revision used in your system.
Build DateThis item displays the date when this BIOS was completed.
Processor
CPU TypeThis item displays the type of CPU used in the motherboard.
SpeedThis item displays the speed of the CPU detected by the BIOS.
Physical CountThis item displays the number of processors installed in your system as detected by
Logical CountThis item displays the number of CPU cores installed in your system as detected by
Table 42. Main menu options
System Date using the arrow keys. Enter new values using the keyboard and press
Enter. The date must be entered in Day MM/DD/YY format. The time must be
entered in HH:MM:SS format.
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
the BIOS.
the BIOS.
3
BIOS itemUsage
MainAdvancedSecurity Boot Exit
BOOT Feature Processor & Clock Options Advanced Chipset Control IDE / SATA Configuration PCI/PnP Configuration SuperIO Device Configuration Remote Access Configuration Hardware Health Configuration ACPI Configuration IPMI Configuration Event Log Configuration
System Memory
Populated SizeThis item displays the installed memory size detected by the BIOS.
Available SizeThis item displays the available memory detected by the BIOS.
Advanced menu
The Advanced menu displays a number of submenus. Use the up and down arrows to navigate
the submenus; press Enter to display and configure submenu items.
Advanced menu
Table 42. Main menu options
Figure 9. Advanced menu
BIOS SETUP UTILITY
Advanced Settings
V02.67 (C)Copyright 1985-2009, American Megatrends, Inc.
39
3
BIOS Configuration
BOOT feature
BIOS itemUsage
Quick BootIf enabled, this option skips certain tests during POST to reduce the time needed for
Quiet BootThis option allows the bootup screen options to be modified between POST
AddOn ROM Display
Mode
Bootup Num-LockThis feature selects the power-on state for the Num Lock key. The options are Off
PS/2 Mouse SupportThis feature enables support for the PS/2 mouse. The options are Disabled, Enabled
Wait For 'F1' If ErrorThis forces the system to wait until the F1 key is pressed if an error occurs. The
Hit 'Del' Message DisplayThis feature displays the message “Press DEL to run Setup” during POST. The
Watch Dog FunctionIf enabled, the watchdog timer allows the system to reboot when it is not reset by
Power Button FunctionIf set to Instant_Off, the system powers off immediately when you press the power
Restore on AC Power Loss Use this feature to set the power state after a power outage. Select Power-Off for the
Interrupt 19 CaptureInterrupt 19 is the software interrupt that handles the boot disk function. When this
Table 43. BOOT Feature submenu
system boot. The options are Enabled and Disabled.
messages or the OEM logo. Select Disabled to display the POST messages. Select
Enabled to display the OEM logo instead of the normal POST messages. The options
are Enabled and Disabled.
This controls the display, during the boot sequence, of Option ROM messages from
the BIOS of add-on devices. The options are Force BIOS (display) and Keep Current
(do not display).
and On.
and Auto.
options are Disabled and Enabled.
options are Enabled and Disabled.
software for more than 5 minutes. The options are Enabled and Disabled.
button. If set to 4_Second_Override, the system powers off when you press the
power button for four seconds or longer. The options are Instant_Off and
4_Second_Override.
system power to remain off after a power loss. Select Power-On for the system
power to be turned on after a power loss. Select Last State to allow the system to
resume its last state before a power loss. The options are Power-On, Power-Off and
Last State.
item is set to Enabled, the ROM BIOS of the host adaptors (any PCI storage devices)
captures Interrupt 19 at boot and allows the drives that are attached to these host
adaptors to function as bootable disks. If this item is set to Disabled, the ROM BIOS
of the host adaptors does not capture Interrupt 19, and the drives attached to these
adaptors do not function as bootable devices. The options are Enabled and
Disabled.
40
3
Advanced menu
Processor and clock options
Table 44. Processor & Clock Options submenu
BIOS itemUsage
CPU RatioIf set to Manual, this option enables you to set the ratio between the CPU Core Clock
and the FSB Frequency. The options are Auto and Manual.
Note: If an invalid ratio is entered, the AMI BIOS will restore the setting to the
previous state.
Ratio CMOS Setting
(available when CPU Ratio
is set to Manual)
Clock Spread SpectrumSelect Enabled to use the Clock Spectrum feature, which allows the BIOS to attempt
Hardware Prefetcher
(available when supported
by the CPU)
Adjacent Cache Line
Prefetch
(available when supported
by the CPU)
Intel Virtualization
Technology
(available when supported
by the CPU)
Execute-Disable Bit
Capability
(available when supported
by the OS and the CPU)
Simultaneous MultiThreading
(available when supported
by the CPU)
Active Processor CoresSelect Enabled to use a processor’s second core and beyond. The options are All, 1
Intel EIST TechnologyEIST (Enhanced Intel SpeedStep Technology) allows the system to automatically
Press “+” or “-” on your keyboard to set the ratio between the CPU Core clock and
the FSB Frequency. The default setting for the CPU installed in your motherboard is
[18].
to reduce the level of Electromagnetic Interference caused by the components
whenever needed. The options are Disabled and Enabled.
If set to Enabled, the hardware prefetcher prefetches streams of data and instructions
from the main memory to the L2 cache in a forward or backward direction to
improve CPU performance. The options are Disabled and Enabled.
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The CPU
fetches both cache lines for 128 bytes if Enabled.
Select Enabled to use the feature of Virtualization Technology to allow one platform
to run multiple operating systems and applications in independent partitions,
creating multiple virtual systems in one physical computer. The options are Enabled
and Disabled.
Note: If there is any change to this setting, you will need to power off and restart the
system for the change to take effect. Refer to Intel’s web site for detailed information.
Select Enabled to use Execute Disable Bit, which allows the processor to designate
areas in the system memory where an application code can execute and where it
cannot. This prevents a worm or virus from flooding illegal codes to overwhelm the
processor or damage the system during an attack. The default is Enabled. Refer to
Intel and Microsoft Web sites for more information.
Select Enabled to use the Simultaneous Multi-Threading Technology, which adds a
second thread to each core, often improving CPU performance. The options are
Disabled and Enabled.
and 2. Refer to Intel’s Web site for more information.
adjust processor voltage and core frequency in an effort to reduce power
consumption and heat dissipation. The options are Disabled and Enabled. Refer to
Intel’s Web site for detailed information.
41
3
BIOS Configuration
BIOS itemUsage
Intel TurboMode
Technology
(available when Intel EIST
Technology is enabled)
C1E SupportSelect Enabled to use the Enhanced Halt State feature. C1E significantly reduces the
Intel C-STATE TechIf enabled, C-State is set by the system automatically to either C2, C3, or C4 state.
C-State package limit
setting
(available when Intel CState Tech is enabled)
C3 StateThis feature enables you to set the C3 State for the 5000 Series Processor. The
C6 StateThis feature enables you to set the C6 State for the 5000 Series Processor. The
C1 Auto DemotionWhen enabled, the CPU conditionally demotes C3, C6 or C7 requests to C1 based
C3 Auto DemotionWhen enabled, the CPU conditionally demotes C6 or C7 requests to C3 based on
ACPI T StateSelect Enabled to report processor throttling in the ACPI. The options are Disabled
DCA Technology
(available when supported
by the CPU)
DCA Prefetch DelayA DCA Prefetch is used with TOE components to prefetch data in order to shorten
Select Enabled to use the Turbo Mode, which allows the processor to increase
temporarily the speed of a core beyond the CPU’s overall rated speed. The options
are Enabled and Disabled.
CPU's power consumption by reducing the CPU's clock cycle and voltage during a
Halt State. The options are Disabled and Enabled.
The options are Disabled and Enabled.
If set to Auto, the AMI BIOS will automatically set the limit on the C-State package
register. The options are Auto, C1, C3, C6, and C7.
options are Disabled, ACPI 2, and ACPI 3.
options are Disabled and Enabled.
on un-core auto-demote information. The options are Disabled and Enabled.
un-core auto-demote information. The options are Disabled and Enabled.
and Enabled.
This feature accelerates the performance of TOE devices. A TOE device is a
specialized, dedicated processor that is installed on an add-on card or a network card
to handle some or all packet processing of this add-on card. For this motherboard,
the TOE device is built inside the ESB 2 South Bridge chip. The options are Enabled
and Disabled.
execution cycles and maximize data processing efficiency. Prefetching too frequently
can saturate the cache directory and delay necessary cache accesses. This feature
reduces or increases the frequency the system prefetches data. The options are [8],
[16], [32], [40], [48], [56], [64], [72], [80], [88], [96], [104], [112], and [120].
42
3
Advanced menu
Advanced chipset control
Table 45. Advanced Chipset Control submenu
BIOS itemUsage
QPI & IMC Configuration
QPI Links SpeedThis feature sets QPI’s data transfer speed. The options are Slow-mode, and Full
Speed.
QPI FrequencyThis feature sets the desired QPI frequency. The options are Auto, 4.800 GT,
5.866GT, 6.400 GT.
QPI L0s and L1This enables the QPI power state to low power. L0s and L1 are automatically selected
by the motherboard. The options are Disabled and Enabled.
Memory FrequencyThis feature forces a DDR3 frequency slower than what the system has detected. The
available options are Auto, Force DDR-800, Force DDR-1066, and Force DDR-1333.
Memory Mode The options are Independent, Channel Mirror, Lockstep, and Sparing:
Independent – All DIMMs are available to the operating system.
Channel Mirror – The motherboard maintains two identical copies of all data in
memory for redundancy.
Lockstep – The motherboard uses two areas of memory to run the same set of
operations in parallel.
Sparing – A preset threshold of correctable errors is used to trigger failover. The
spare memory is put online and used as active memory in place of the failed
memory.
Demand Scrubbing A memory error-correction scheme where the processor writes corrected data back
into the memory block from where it was read by the processor. The options are
Enabled and Disabled.
Patrol Scrubbing A memory error-correction scheme that works in the background looking for and
correcting resident errors. The options are Enabled and Disabled.
43
3
BIOS Configuration
BIOS itemUsage
Throttling – Closed Loop /
Throttling – Open Loop
Intel VT-dSelect Enabled to enable Intel’s Virtualization Technology support for Direct I/O VT-d,
SR-IOV SupportSingle Root I/O Virtualization is an industry-standard mechanism that allows devices
NUMA SupportSelect Enabled to use the feature of Non-Uniform Memory Access to improve CPU
Intel I/OATThe Intel I/OAT (I/O Acceleration Technology) significantly reduces CPU overhead by
Active State Power
Management
USB FunctionsThis feature enables you to decide the number of onboard USB ports to be enabled.
Table 45. Advanced Chipset Control submenu (Continued)
Throttling improves reliability and reduces power in the processor by automatic
voltage control during processor idle states. Available options are Disabled and
Enabled. If Enabled, the following DIMM-related items appear:
Hysteresis Temperature (Closed Loop only) – Temperature Hysteresis is the
temperature lag (in degrees Celsius) after the set DIMM temperature threshold is
reached before Closed Loop Throttling begins. The options are Disabled, 1.5°C,
3.0°C, and 6.0°C.
Guardband Temperature (Closed Loop only) – This is the temperature that
applies to the DIMM temperature threshold. Each step is in increments of 0.5°C.
The default is [006]. Press “+” or “-” to change this value.
Inlet Temperature – This is the temperature detected at the chassis inlet. Each
step is in increments of 0.5°C. The default is [070]. Press “+” or “-” to change this
value.
Temperature Rise – This is the temperature rise to the DIMM thermal zone. Each
step is in 0.5°C increment. The default is [020]. Press “+” or “-” to change this
value.
Air Flow – This is the air flow speed to the DIMM modules. Each step is one mm/
sec. The default is [1500]. Press “+” or “-” to change this value.
Altitude – This feature defines how many meters above or below sea level the
system is located. The options are Sea Level or Below, 1–300, 301–600, 601–
900, 901–1200, 1201–1500, 1501–1800, 1801–2100, 2101–2400, 2401–2700, and
2701–3000.
DIMM Pitch – This is the physical space between each DIMM module. Each step
is in 1/1000 of an inch. The default is [400]. Press “+” or “-” to change this value.
which reports the I/O device assignments to VMM through the DMAR ACPI Tables.
This feature offers fully-protected I/O resource-sharing across the Intel platforms,
providing greater reliability, security and availability in networking and data sharing.
The settings are Enabled and Disabled.
to advertise their capability to be simultaneously shared among several virtual
machines. SR-IOV is capable of partitioning a PCI function into several virtual
interfaces for sharing the resources of a PCI Express (PCIe) device under a virtual
environment. The options are Disabled and Enabled.
performance. The options are Enabled and Disabled.
leveraging CPU architectural improvements, freeing resources for other tasks. The
options are Disabled and Enabled.
Select Enabled to start Active-State Power Management for signal transactions
between L0 and L1 Links on the PCI Express Bus. This maximizes power saving and
transaction speed. The options are Enabled and Disabled.
The Options are Disabled, 2 USB ports, 4 USB ports, 6 USB ports, 8 USB ports, 10
USB ports and 12 USB ports.
44
3
Advanced menu
Table 45. Advanced Chipset Control submenu (Continued)
BIOS itemUsage
USB 2.0 ControllerThis feature displays the current USB controller used in the motherboard.
Legacy USB Support Select Enabled to use Legacy USB devices. If this item is set to Auto, Legacy USB
support is automatically enabled if a legacy USB device is installed on the
motherboard. The settings are Disabled, Enabled and Auto.
IDE/SATA configuration
When this submenu is selected, the AMI BIOS automatically detects the presence of the IDE
devices and displays the following items.
Table 46. IDE/SATA Configuration submenu
BIOS itemUsage
SATA#1 ConfigurationSelecting Compatible sets SATA#1 to legacy compatibility mode, while selecting
Enhanced sets SATA#1 to native SATA mode. The options are Disabled, Compatible
and Enhanced.
Configure SATA#1 asThis feature enables you to select the drive type for SATA#1. The options are IDE,
RAID and AHCI. When RAID is selected, the ICH RAID Code Base option appears.
When AHCI is selected, the SATA AHCI option appears.
ICH RAID Code Base
(available when Configure
SATA#1 as RAID is
selected)
SATA#2 Configuration
(available when Configure
SATA#1 as IDE is selected)
IDE Detect Timeout (sec)Use this feature to set the time-out value for the BIOS to detect the ATA and ATAPI
Select Intel to enable Intel's SATA RAID firmware to configure Intel's SATA RAID
settings. Select Adaptec to enable Adaptec's SATA RAID firmware to configure
Adaptec's SATA RAID settings. The options are Intel and Adaptec.
Selecting Enhanced sets SATA#2 to native SATA mode. The options are Disabled, and
Enhanced.
devices installed in the system. The options are 0 (sec), 5, 10, 15, 20, 25, 30, and 35.
45
3
BIOS Configuration
BIOS itemUsage
Primary IDE Master/Slave,
Secondary IDE Master/
Slave, Third IDE Master,
and Fourth IDE Master
These settings enable you to set the parameters of Primary IDE Master/Slave,
Secondary IDE Master/Slave, and Third and Fourth IDE Master slots. Press Enter to
view and set detailed options. The items included in the submenu are:
Type – Select the type of device connected to the system. The options are Not
Installed, Auto, CD/DVD and ARMD.
LBA/Large Mode – LBA (Logical Block Addressing) is a method of addressing data
on a disk drive. In the LBA mode, the maximum drive capacity is 137 GB. For drive
capacities over 137 GB, your system must be equipped with a 48-bit LBA mode
addressing. If not, contact your manufacturer or install an ATA/133 IDE controller
card that supports 48-bit LBA mode. The options are Disabled and Auto.
Block (Multi-Sector Transfer) – Block Mode boosts the IDE drive performance by
increasing the amount of data transferred. Only 512 bytes of data can be transferred per interrupt if Block Mode is not used. Block Mode allows transfers of up
to 64 KB per interrupt. Select Disabled to allow data to be transferred from and to
the device one sector at a time. Select Auto to allow data to be transferred from
and to the device multiple sectors at a time if the device supports it. The options
are Auto and Disabled.
PIO Mode – The IDE PIO (Programmable I/O) Mode programs timing cycles
between the IDE drive and the programmable IDE controller. As the PIO mode
increases, the cycle time decreases. The options are Auto, 0, 1, 2, 3, and 4.
Select Auto to allow the AMI BIOS to automatically detect the PIO mode.
Use this value if the IDE disk drive support cannot be determined.
Select 0 to allow the AMI BIOS to use PIO mode 0. It has a data transfer
rate of 3.3 MBs.
Select 1 to allow the AMI BIOS to use PIO mode 1. It has a data transfer
rate of 5.2 MBs.
Select 2 to allow the AMI BIOS to use PIO mode 2. It has a data transfer
rate of 8.3 MBs.
Select 3 to allow the AMI BIOS to use PIO mode 3. It has a data transfer
rate of 11.1 MBs.
Select 4 to allow the AMI BIOS to use PIO mode 4. It has a data transfer
bandwidth of 32-Bits. Select Enabled to enable 32-Bit data transfer.
DMA Mode – Select Auto to allow the BIOS to automatically detect IDE DMA
mode when the IDE disk drive support cannot be determined.
Slave, Third IDE Master,
and Fourth IDE Master
(continued)
S.M.A.R.T. For Hard disk drives – Self-Monitoring Analysis and Reporting
32Bit Data Transfer – Select Enable to enable the function of 32-bit IDE data
Advanced menu
Select SWDMA0 to allow the BIOS to use Single Word DMA mode 0. It has
a data transfer rate of 2.1 MBs.
Select SWDMA1 to allow the BIOS to use Single Word DMA mode 1. It has
a data transfer rate of 4.2 MBs.
Select SWDMA2 to allow the BIOS to use Single Word DMA mode 2. It has
a data transfer rate of 8.3 MBs.
Select MWDMA0 to allow the BIOS to use Multi Word DMA mode 0. It has
a data transfer rate of 4.2 MBs.
Select MWDMA1 to allow the BIOS to use Multi Word DMA mode 1. It has
a data transfer rate of 13.3 MBs.
Select MWDMA2 to allow the BIOS to use Multi-Word DMA mode 2. It has
a data transfer rate of 16.6 MBs.
Select UDMA0 to allow the BIOS to use Ultra DMA mode 0. It has a data
transfer rate of 16.6 MBs. It has the same transfer rate as PIO mode 4 and
Multi Word DMA mode 2.
Select UDMA1 to allow the BIOS to use Ultra DMA mode 1. It has a data
transfer rate of 25 MBs.
Select UDMA2 to allow the BIOS to use Ultra DMA mode 2. It has a data
transfer rate of 33.3 MBs.
Select UDMA3 to allow the BIOS to use Ultra DMA mode 3. It has a data
transfer rate of 66.6 MBs.
Select UDMA4 to allow the BIOS to use Ultra DMA mode 4. It has a data
transfer rate of 100 MBs.
Select UDMA5 to allow the BIOS to use Ultra DMA mode 5. It has a data
transfer rate of 133 MBs.
Select UDMA6 to allow the BIOS to use Ultra DMA mode 6. It has a data
transfer rate of 133 MBs. The options are Auto, SWDMAn, MWDMAn, and
UDMAn.
Technology (SMART) can help predict impending drive failures. Select Auto to
allow the AMI BIOS to automatically detect hard disk drive support. Select
Disabled to prevent the AMI BIOS from using the S.M.A.R.T. Select Enabled to
allow the AMI BIOS to use the S.M.A.R.T. to support hard drive disk. The options
are Disabled, Enabled, and Auto.
transfer. The options are Enabled and Disabled.
47
3
BIOS Configuration
PCI/PnP configuration
BIOS itemUsage
Clear NVRAMThis feature clears the NVRAM during system boot. The options are No and Yes.
Plug & Play OSSelecting Yes allows the OS to configure plug and play devices. (This is not required
PCI Latency TimerThis feature sets the latency timer of each PCI device installed on a PCI bus. Select 64
PCI IDE BusMasterWhen enabled, the BIOS uses PCI bus mastering for reading/writing to IDE drives.
PCIe I/O PerformanceSome add-on cards perform faster with the coalesce feature, which limits the
PCI-E Slots 1–7 x8This feature allows you to Enable or Disable any of the PCI slots. The options are
Load Onboard LAN1
Option ROM/Load
Onboard LAN2 Option
ROM
Load Onboard SAS Option
ROM
Table 47. PCI/PnP Configuration submenu
for system boot if your system has an OS that supports plug and play.) Select No to
allow the AMI BIOS to configure all devices in the system.
to set the PCI latency to 64 PCI clock cycles. The options are 32, 64, 96, 128, 160,
192, 224 and 248.
The options are Disabled and Enabled.
payload size to 128 MB; other cards that have a payload size of 256 MB inhibit the
coalesce feature. Refer to your add-on card user guide for the appropriate setting.
The options are 256 MB and 128 MB.
Enable and Disable.
Select Enabled to enable the onboard LAN1 or LAN2 Option ROM. This is for
booting the computer using a network interface. The options are Enabled and
Disabled.
Select Enabled to enable the onboard SAS Option ROM. This is for booting the
computer using a SAS drive or array. The options are Enabled and Disabled.
Super IO device configuration
Table 48. Super IO Device Configuration submenu
BIOS itemUsage
Serial Port1 AddressThis option specifies the base I/O port address and the Interrupt Request address of
Serial Port 1. Select Disabled to prevent the serial port from accessing any system
resources. When this option is set to Disabled, the serial port becomes physically
unavailable. Select 3F8/IRQ4 to allow the serial port to use 3F8 as its I/O port
address and IRQ 4 for the interrupt address. The options are Disabled, 3F8/IRQ4,
3E8/IRQ4, 2E8/IRQ3 and 2F8/IRQ3.
48
3
Advanced menu
Remote access configuration
Table 49. Remote Access Configuration submenu
BIOS itemUsage
Remote Access This allows you to enable the Remote Access feature. The options are Disabled and
Enabled. If Remote Access is set to Enabled, the following BIOS items appear.
Serial Port NumberThis feature enables you to decide which serial port is to be used for Console
Redirection. The options are COM 1 and COM 2.
Base Address, IRQThis item displays the based address and IRQ of the serial port specified above. The
default setting for COM1 is 3F8/IRQ4, and for COM 2 is 2F8/IRQ3.
Serial Port ModeThis feature enables you to set the serial port mode for Console Redirection. The
options are 115200 8, n 1; 57600 8, n, 1; 38400 8, n, 1; 19200 8, n, 1; and 9600 8, n,
1.
Flow ControlThis feature enables you to set the flow control for Console Redirection. The options
are None, Hardware, and Software.
Redirection After BIOS
POST
Terminal TypeThis feature enables you to select the target terminal type for Console Redirection.
VT-UTF8 Combo Key
Support
Sredir Memory Display
Delay
Select Disabled to turn off Console Redirection after Power-On Self-Test (POST).
Select Always to keep Console Redirection active all the time after POST. (Note: This
setting may not be supported by some operating systems.) Select Boot Loader to
keep Console Redirection active during POST and Boot Loader. The options are
Disabled, Boot Loader, and Always.
The options are ANSI, VT100, and VT-UTF8.
A terminal keyboard definition that provides a way to send commands from a remote
console. Available options are Enabled and Disabled.
This feature defines the length of time in seconds to display memory information.
The options are No Delay, Delay 1 Sec, Delay 2 Sec, and Delay 4 Sec.
49
3
BIOS Configuration
Hardware health monitor
This feature enables you to monitor system health and review the status of each item as
displayed.
BIOS itemUsage
CPU Overheat AlarmThis option enables you to select the CPU Overheat Alarm setting, which determines
CPU 1 Temperature/CPU 2
Temperature/System
Tem perature
Table 50. Hardware Health Monitor submenu
when the CPU OH alarm will be activated to provide warning of possible CPU
overheat.
WARNING! Any temper ature that ex ceeds the CPU threshold temper ature
predefined by the CPU manufacturer may result in CPU overheat or
system instability. When the CPU temperature reaches this predefined
threshold, the CPU and system cooling fans will run at full speed.
To avoid possible system overheating, be sure to provide adequate
airflow to your system.
The options are:
The Early Alarm – Select this setting if you want the CPU overheat alarm (includ-
ing the LED and the buzzer) to be triggered as soon as the CPU temperature
reaches the CPU overheat threshold as predefined by the CPU manufacturer.
The Default Alarm – Select this setting if you want the CPU overheat alarm
(including the LED and the buzzer) to be triggered when the CPU temperature
reaches about 5°C above the threshold temperature as predefined by the CPU
manufacturer. This gives the CPU and system fans additional time needed for CPU
and system cooling. In both the alarms, take immediate action as shown for CPU
1 Temperature/ CPU 2 Temperature on page 51
This feature displays current temperature readings for the CPUs and the system.
50
3
Table 50. Hardware Health Monitor submenu (Continued)
BIOS itemUsage
The following items are displayed for your reference only:
CPU 1 Temperature/ CPU
2 Temperature
The CPU Temperature feature will display the CPU temperature status as detected by
the BIOS:
Low – This level is considered as the normal operating state. The CPU temperature is
well below the CPU temperature tolerance. The motherboard fans and CPU will run
normally as configured in the BIOS (Fan Speed Control).
User intervention: No action required.
Medium – The processor is running warmer. This is a precautionary level and
generally means that there may be factors contributing to this condition, but the CPU
is still within its normal operating state and below the CPU temperature tolerance.
The motherboard fans and CPU will run normally as configured in the BIOS. The fans
may adjust to a faster speed depending on the Fan Speed Control settings.
User intervention: No action is required. However, consider checking the CPU fans
and the chassis ventilation for blockage.
High – The processor is running hot. This is a caution level since the CPU’s
temperature tolerance has been reached (or has been exceeded) and may activate
an overheat alarm. The system may shut down if it continues for a long period to
prevent damage to the CPU.
Advanced menu
User intervention: If the system buzzer and overheat LED has activated, take action
immediately by checking the system fans, chassis ventilation and room temperature
to correct any problems.
Notes:
The CPU thermal technology that reports absolute temperatures (Celsius/Fahren-
heit) has been upgraded by Intel in its newer processors. Each CPU is embedded
by unique temperature information that the motherboard can read. This tempera-
ture threshold or tolerance has been assigned at the factory and is the baseline
used by the motherboard to determine which action to take during different CPU
temperature conditions (for example, increasing CPU fan speed or triggering the
overheat alarm). Since CPUs can have different temperature tolerances, the
installed CPU can now send information to the motherboard about what its tem-
perature tolerance is, and not the other way around. This results in better CPU
thermal management.
RadiSys has leveraged this feature by assigning a temperature status to certain
thermal conditions in the processor (Low, Medium and High). This makes it easier
for you to understand the CPU’s temperature status, instead of just seeing a
temperature reading (for example, 25°C). For more information on thermal
management, refer to Intel’s Web site.
To avoid possible overheating, be sure to provide adequate airflow to the system.
System TemperatureThe system temperature will be displayed (in degrees in Celsius and Fahrenheit) as it
is detected by the BIOS.
Fan Speed ReadingsThis feature displays the fan speed readings from Fan1 through Fan8.
51
3
BIOS Configuration
BIOS itemUsage
Fan Speed Control Modes This feature enables you to decide how the system controls the speed of the eight
Fan Speed Control Modes
(continued)
Table 50. Hardware Health Monitor submenu (Continued)
onboard fans. With the fan speed control set to disabled, all the fans run at full
speed. Setting the fan speed control to enabled gives you the ability to customize the
fan speed control, including the fan speed input source and the fan speed ramp
profile.
Each of the eight onboard fans can be independently controlled by one of three
input sources: CPU1 temperature, CPU2 temperature, or system temperature. The
fan speed ramp profile for each of the input sources is configurable by specifying the
minimum and maximum for the fan PWM operating range as well as the minimum
and maximum CPU temperature or system temperature. The BIOS setup options are
listed below along with a chart explaining the fan speed implementation:
Fan 1 Control Source Select – CPU1, CPU2, or System Temp
Fan 2 Control Source Select – CPU1, CPU2, or System Temp
Fan 3 Control Source Select – CPU1, CPU2, or System Temp
Fan 4 Control Source Select – CPU1, CPU2, or System Temp
Fan 5 Control Source Select – CPU1, CPU2, or System Temp
Fan 6 Control Source Select – CPU1, CPU2, or System Temp
Fan 7 Control Source Select – CPU1, CPU2, or System Temp
Fan 8 Control Source Select – CPU1, CPU2, or System Temp
CPU1 Tcontrol Min Value – The PECI count below Tcontrol indicating the start of
the fan speed ramp profile. For example, a value of 20 translates to [Tcontrol –20].
CPU1 Tcontrol Max Value – The PECI count above Tcontrol indicating the end of
the fan speed ramp profile. For example, a value of 5 translates to [Tcontrol + 5].
CPU1 Fan Speed Min Value – The minimum fan speed based on a 256 point
scale. Minimum recommended PWM is 20% or [050]
CPU1 Fan Speed Max Value – The maximum fan speed based on a 256 point
scale. Full speed is [255].
CPU2 Tcontrol Min Value – The PECI count below Tcontrol indicating the start of
the fan speed ramp profile. For example, a value of 20 translates to [Tcontrol –20].
CPU2 Tcontrol Max Value – The PECI count above Tcontrol indicating the end of
the fan speed ramp profile. For example, a value of 5 translates to [Tcontrol + 5].
CPU2 Fan Speed Min Value – The minimum fan speed based on a 256 point
scale. Minimum recommended PWM is 20% or [050].
CPU2 Fan Speed Max Value – The maximum fan speed based on a 256 point
scale. Full speed is [255].
System Temp Min Value – The system temperature value indicating the start of the
fan speed ramp profile.
System Temp Max Value – The system temperature value indicating the end of the
fan speed ramp profile.
System Fan Speed Min Value – The minimum fan speed based on a 256 point
scale. Minimum recommended PWM is 20% or [050].
System Fan Speed Max Value The maximum fan speed based on a 256 point
scale. Full speed is [255].
52
3
Table 50. Hardware Health Monitor submenu (Continued)
CPU1/CPU2 Tcontrol Max
System Temp Max
Overheat
Alarm
CPU PECI
Count or
Temp (°C)
BIOS itemUsage
Advanced menu
Fan PWM
CPU1/CPU2/SYS
Fan Speed Max
CPU1/CPU2/SYS
Fan Speed Min
CPU1
System Temp Min
/CPU2 Tcontrol Min
Voltage ReadingsThe following voltage readings are displayed:
Use this feature to configure Advanced Configuration and Power Interface (ACPI) power
management settings for your system.
BIOS itemUsage
ACPI Aware O/SEnable ACPI support if it is supported by the OS to control ACPI through the
ACPI Version FeaturesThe options are ACPI v1.0, ACPI v2.0 and ACPI v3.0. Refer to ACP’s Web site for
PS2 KB/MS Wake UpSelect Enable to wake up the system using either the PS2 keyboard or mouse (if
ACPI APIC SupportSelect Enabled to include the ACPI APIC Table Pointer in the RSDT (Root System
APIC ACPI SCI IRQWhen this item is set to Enabled, APIC ACPI SCI IRQ is supported by the system. The
Headless ModeThis feature is used to enable the system to function without a keyboard, monitor, or
High Performance Event
Timer
Table 51. ACPI Configuration submenu
operating system. Otherwise, disable this feature. The options are Yes and No.
further explanation: http://www.acpi.info.
equipped) when the system is in the S3 (Sleep) or S4 (Hibernate) state. The options
are Enabled and Disabled.
Description Table) pointer list. The options are Enabled and Disabled.
options are Enabled and Disabled.
mouse attached. The options are Enabled and Disabled.
Select Enabled to activate the High Performance Event Timer (HPET). The HPET
produces periodic interrupts at a much higher frequency than a real-time clock (RTC)
does in synchronizing multimedia streams and providing smooth playback. The
HPET also reduces the dependency on other timestamp calculation devices, such as
an x86 RDTSC Instruction embedded in the CPU. The High Performance Event Timer
replaces the 8254 Programmable Interval Timer. The options are Enabled and
Disabled.
54
IPMI configuration
Intelligent Platform Management Interface (IPMI) is a set of common interfaces that IT
administrators can use to monitor system health and to manage the system as a whole. For
more information on the IPMI specifications, visit Intel’s Web site.
Table 52. IPMI Configuration submenu
BIOS itemUsage
IPMI Firmware RevisionThis item displays the current IPMI firmware revision.
Status of BMCBaseboard Management Controller (BMC) manages the interface between system
management software and platform hardware. This is an informational feature that
returns the status code of the BMC micro controller.
3
Advanced menu
View BMC system event log
This feature displays the BMC System Event Log (SEL). It shows the total number of entries of
BMC system events.
Table 53. View BMC System Event Log submenu
BIOS itemUsage
[Entry Number]To view an event, select an Entry Number and press Enter to display the
information as shown in the screen:
Total Number of Entries
SEL Entry Number
SEL Record ID
SEL Record Type
Timestamp, Generator ID
Event Message Format User
Event Sensor Type
Event Sensor Number
Event Dir Type
Event Data
Clear BMC System Event Log Select OK and press Enter to clear the BMC system log. Select Cancel to keep the
BMC System log. The options are OK and Cancel.
W
ARNING: Any cleare d information is unrecov erable. Make absolutely
sure that you no longer need any data stored in the log before clearing
the BMC Event Log.
Tab le 54on page 56 lists sensors and related system events.
00hCP U1 Te mp01: Temperature Temperature = DataOver heat warning
01hCPU2 Temp02: VoltageTemperature = Data
02hSys Temp03: CurrentTemperature = Data
03hCPU1 Vcore04: FanVoltage = Data × 0.008 Threshold warning
04hCPU2 Vcore05: Chassis IntrusionVoltage = Data × 0.008
05h3.3V06: Platform Security Breach Voltage = Data × 0.016
06h5V07: ProcessorVoltage = Data × 0.024
07h12V08: Power SupplyVoltage = Data × 0.096
08h–12V09: Power UnitVoltage = Data × 0.148 – 16.92
09h1.5V0A: Cooling DeviceVoltage = Data × 0.016
0Ah5VSB0C: MemoryVoltage = Data × 0.024
0BhVBAT0D: Drive SlotVoltage = Data × 0.016
0ChFan10F: POST ErrorRPM = 1,350,000 ÷ Data
0DhFan2—RPM = 1,350,000 ÷ Data
0EhFan3—RPM = 1,350,000 ÷ Data
0FhFan4—RPM = 1,350,000 ÷ Data
10hFan5—RPM = 1,350,000 ÷ Data
11h Fan6—RPM = 1,350,000 ÷ Data
12h Fan7/CPU1—RPM = 1,350,000 ÷ Data
13h Fan8/CPU2—RPM = 1,350,000 ÷ Data
14h Power Supply—1 (healthy) or 0PSU health warning
44h Intrusion—1 (intrusion) or 0Intrusion alert
Table 54. Sensors and SEL data
(high nonrecoverable,
high critical,
high noncritical,
normal,
low noncritical,
low critical,
low nonrecoverable)
56
3
Advanced menu
Set LAN configuration
Set this feature to configure the IPMI LAN adapter with a network address.
Table 55. Set LAN Configuration submenu
BIOS itemUsage
Channel NumberEnter the channel number for the SET LAN Config command. This is initially set to
[01]. Press “+” or “-” to change the channel number.
Channel Number StatusThis feature returns the channel status for the selected channel number. The status is
“Channel Number is OK” or “Wrong Channel Number.”
IP Address SourceSelect the source of this machine's IP address. If Static is selected, you must
manually enter the IP address of the machine. If DHCP is selected, the BIOS searches
for a DHCP (Dynamic Host Configuration Protocol) server in the network it is
attached to, and requests the next available IP address. The options are DHCP and
Static. If DHCP is selected, the following items will display:
IP Address – Enter the IP address for this machine. This should be in decimal and
in dotted quad form. The value of each three-digit number separated by dots
should not exceed 255.
Subnet Mask – Subnet masks tell the network which subnet this machine
belongs to. The value of each three-digit number separated by dots should not
exceed 255.
Gateway Address – This is the IP address of the gateway in the network. This is
usually a router.
Mac Address – The BIOS will automatically enter the Mac address of this
machine; however it may be overridden. Mac addresses are 6 two-digit hexadecimal numbers (Base 16, 0 – 9, A, B, C, D, E, F) separated by dots. (for example,
00.30.48.D0.D4.60).
SET PEF configuration
Table 56. SET PEF Configuration submenu
BIOS itemUsage
PEF SupportSelect Enabled to enable the function of Platform Event Filter (PEF). The PEF
interprets BMC events and perform actions based on predetermined settings or
events under IPMI 1.5 specifications (for example, powering the system down or
sending an alert when a triggering event is detected). The default is Disabled.
PEF Action Global Control
(available if PEF Support is
enabled)
Alert Startup Delay
(available if PEF Support is
enabled)
PEF Alert Startup Delay
(available if Alert Startup
Delay is enabled)
These are the different actions based on BMC events. The options are Alert, Power
Down, Reset System, Power Cycle, OEM Action, Diagnostic Interface.
This feature inserts a delay during startup for PEF alerts. The options are Enabled and
Disabled.
This feature enables you to select the delay time setting for PEF Alerts after power-up
from S4, S5 or Reset. The options are No Delay, 30 Sec., 60 Sec., 1.5 Min., and 2.0
Min.
57
3
BIOS Configuration
BIOS itemUsage
Startup Delay
(available if PEF Support is
enabled)
PEF Startup Delay
(available if Startup Delay
is enabled)
Event Message for PEF
Action
(available if PEF Support is
enabled)
BMC Watch Dog Timer
Action
BMC Watch Dog TimeOut
[Min:Sec]
Table 56. SET PEF Configuration submenu (Continued)
Select Enable to enable startup delay support. The options are Enabled and
Disabled.
This feature enables you to select the delay time setting after PEF startup. The
options are No Delay, 30 Sec., 60 Sec., 1.5 Min., and 2.0 Min.
Select Enable to enable Event Messages for PEF action. For more information, refer
to the IPMI 1.5 Specification on Intel’s Web site. The options are Disabled and
Enabled.
This feature allows the BMC to reset or power down the system if the OS hangs or
crashes. The options are Disabled, Reset System, Power Down, Power Cycle.
This is a timed delay in minutes or seconds before a power down or system reset
due to an OS failure. The options are [5 Min], [1 Min], [30 Sec], and [10 Sec].
58
3
Event log configuration
Main Advanced Security Boot Exit
Supervisor Password :Not Installed
User Password :Not Installed
Change Supervisor Password
Change User Password
Boot Sector Virus Protection [Disabled]
Security menu
The AMI BIOS provides a Supervisor and a User password. If you use both passwords, you must
set the Supervisor password first.
Security menu
Table 57. Event Log Configuration submenu
BIOS itemUsage
View Event LogUse this option to view the System Event Log.
Mark all events as readThis option marks all events as read. The options are OK and Cancel.
Clear event logThis option clears the Event Log memory of all messages. The options are OK and
Cancel.
PCI Error LogUse this option to enable PCI error (PERR) logging. The options are Yes and No.
Figure 10. Security menu
BIOS SETUP UTILITY
Security Settings
BIOS itemUsage
Supervisor Password This item indicates if a Supervisor password has been entered for the system. “Not
User PasswordThis item indicates if a user password has been entered for the system. “Not
Change Supervisor
Password
V02.67 (C)Copyright 1985-2009, American Megatrends, Inc.
Table 58. Security menu options
Installed” means a Supervisor password has not been used.
Installed” means that a user password has not been used.
Select this feature and press Enter to access the submenu, and then enter a new
Supervisor Password.
59
3
BIOS Configuration
BIOS itemUsage
User Access Level
(available when Supervisor
Password is set)
Change User PasswordSelect this feature and press Enter to access the submenu, and then enter a new
Clear User Password
(available only when User
Password has been set)
Password CheckThis item enables you to check a password after it has been entered. The options are
Boot Sector Virus
Protection
Table 58. Security menu options (Continued)
The Options are Full Access, View Only, Limited, and No Access:
Full Access – This feature grants the user full read and write access to the setup
utility.
View Only – This feature enables the user to access the setup utility but not to
change settings.
Limited – This feature enables the user to change only limited fields.
No Access – This feature prevents the user from accessing the setup utility.
User Password.
This item enables you to clear a user password after it has been entered.
Setup and Always.
When Enabled, the AMI BIOS displays a warning when any program (or virus) issues
a Disk Format command or attempts to write to the boot sector of the hard disk
drive. The options are Enabled and Disabled.
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3
Boot menu
MainAdvanced Security Boot Exit
Boot Device Priority Hard Disk Drives Removable Drives CD/DVD Drives
Boot menu
Use this menu to configure boot settings.
Figure 11. Boot menu
BIOS SETUP UTILITY
Boot Settings
V02.67 (C)Copyright 1985-2009, American Megatrends, Inc.
BIOS submenuUsage
Boot Device PriorityThis feature enables you to specify the sequence of priority for the boot device. The
Hard Disk DrivesThis feature enables you to specify the boot sequence from all available hard disk
Removable DrivesThis feature enables you to specify the boot sequence from available removable
CD/DVD DrivesThis feature enables you to specify the boot sequence from available CD/DVD drives
Table 59. Boot menus options
settings are 1st boot device, 2nd boot device, 3rd boot device, 4th boot device, 5th
boot device and Disabled.
drives. The settings are Disabled and a list of all hard disk drives that have been
detected (for example, 1st Drive, 2nd Drive, 3rd Drive, and so on).
1st Drive – [SATA: XXXXXXXXX]
drives. The settings are 1st boot device, 2nd boot device, and Disabled.
1st Drive – [USB: XXXXXXXXX]
2nd Drive
(for example, 1st Drive, 2nd Drive, and so on).
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3
BIOS Configuration
Main Advanced Security Boot Exit
Save Changes and Exit
Discard Changes and Exit
Discard Changes
Load Optimal Defaults
Load Failsafe Defaults
Exit menu
When you are ready to save or discard your changes, select the Exit menu.
Figure 12. Exit menu
BIOS SETUP UTILITY
Exit Options
V02.67 (C)Copyright 1985-2009, American Megatrends, Inc.
BIOS itemUsage
Save Changes and ExitWhen you have completed your system configuration changes, select this option
Discard Changes and Exit Select this option and press Enter to leave the BIOS setup utility without making any
62
Discard ChangesSelect this option and press Enter to discard all changes and to return to the BIOS
Load Optimal DefaultsTo set this feature, select this option from the Exit menu and press Enter. Select OK to
Load Fail-Safe DefaultsSelect this option from the Exit menu and press Enter. The fail-safe settings are
Table 60. Exit menu options
from the Exit menu and press Enter to leave the BIOS setup utility. This option
reboots the computer so the new system configuration parameters can take effect.
permanent changes to the system configuration. This option reboots the computer.
setup utility.
allow the AMI BIOS to automatically load optimal defaults to the BIOS settings. The
optimal settings are designed for maximum system performance, but may not be the
best for all computer applications.
designed for maximum system stability, but not for maximum performance.
3
BIOS recovery
WARNING! Do not upgrade the BIOS unless your system has a BIOS-related issue.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall
RadiSys be liable for direct, indirect, special, incidental, or consequential damages arising
from a BIOS update. If you need to update the BIOS, do not shut down or reset the
system while the BIOS is updating. This is to avoid possible boot failure.
How to recover the AMIBIOS image
An AMIBIOS flash chip consists of a boot sector block and a main BIOS code block (a main
BIOS image). The boot sector block contains critical BIOS code, including memory detection
and recovery code, to be used to flash a new BIOS image if the original BIOS image is
corrupted. When the system is powered on, the boot sector code executes first. Once it is
completed, the main BIOS code continues with system initialization and completes the bootup
process.
Note: The BIOS recovery described below is used when the main BIOS block crashes. However,
when the BIOS boot sector crashes, you will need to send the motherboard back to RadiSys for
RMA repairs.
BIOS recovery
Boot sector recovery from a USB device
This feature enables you to recover a BIOS image using a USB device (no additional utilities
required). You can download the BIOS image into a USB flash device and name the file
“SUPER.ROM” for the recovery process to load the file. A USB flash device such as a USB flash
drive, a USB CDROM or a USB CDRW device can be used for this purpose.
1. Insert the USB device that contains the new BIOS image (the ROM files) saved in a root
directory into your USB drive.
2. While turning the power on, press and hold the Ctrl and Home keys until the USB Access
LED Indicator comes on. This might take a few seconds.
3. Once the USB drive LED is on, release the Ctrl and Home keys. AMIBIOS issues beep codes
to indicate that the BIOS ROM file is being updated.
4. When BIOS flashing is completed, the computer reboots. Do not interrupt the flashing
process until it is completed.
Boot sector recovery from an IDE CD-ROM
This process is almost identical to the process of boot sector recovery from a USB device, except
that the BIOS image file is loaded from a CD-ROM. Use a CD-R or CD-RW drive to burn the
BIOS image file to a CD, and name the file “SUPER.ROM” for the recovery process to load the
file.
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3
BIOS Configuration
Boot sector recovery from a serial port (serial flash)
This process, also known as serial flash, enables you to use a serial port to load a BIOS image
for boot sector recovery. This feature is usually used for embedded systems that rely on a serial
port for remote access and debugging.
Requirements
To use serial flash for boot sector recovery, you must meet the following requirements.
The target system (the system that needs BIOS updates) must have a serial port and serial
flash support embedded in the BIOS image file.
The host system should also have a serial port and a terminal program that supports
XModem Transfer protocol (for example, Hyper Terminal for the Windows operating systems
and minicom for Linux/FreeSBD).
You must have a null modem serial cable
1. Connect a null modem serial cable between the target system and the host system that
runs the terminal program.
2. Make sure that the new BIOS image file is accessible on the host system.
3. Start the terminal program on the host system and create a new connection. Use the
following communication parameters for the new connection.
4. Power on your system, and click the Connect button in the Hyper Terminal. The terminal
displays the following instructions:
5. Follow the instructions on the screen to update the BIOS:
A. At the prompt, press the spacebar to update the BIOS.
B. When asked to confirm BIOS updating, press Y to confirm BIOS updates.
C. Press Y again to begin flashing BIOS remotely.
Note: Be sure to complete steps A–C quickly because you will have a second or less to do
so.
6. Once you’ve completed the instructions, a screen is displayed to indicate that remote
flashing is starting and the new BIOS file is being uploaded.
64
3
BIOS recovery
7.To use Hyper Terminal to transfer the XModem protocol, follow the instructions below to
complete XModem transfers.
A. From the Transfer menu, select Send File.
B. Specify the location of the ROM file and select XModem as the protocol.
C. Press Send to start ROM file extraction.
Once the ROM file extraction is completed, the message “New BIOS received OK” appears:
8. Once remote BIOS flash is completed, the system reboots.
Note: AMIBIOS Serial Flash will work with any terminal communications program that
supports VT-100 and XModem protocols, including protocols designed for GNU/LINUX and
BSD operating systems such as minicom. It is recommended that the terminal program be
configured to use the CR/LF style of line termination.
65
3
BIOS Configuration
66
BIOS BEEP CODES AND CHECKPOINTS
A
Errors may occur during the POST (Power-On Self-Test) routines, which are performed each
time the system is powered on. These errors can be:
Non-fatal, which typically allow the system to continue with the boot-up process. The error
messages usually appear on the screen.
Fatal, which do not allow the system to proceed with the boot-up procedure. If a fatal error
occurs, you should consult with your system manufacturer for possible repairs.
Fatal errors are usually communicated through a series of audible beeps.
Table 61. POST BIOS error beep codes
Beeps Description
1
Memory refresh timer error
3
Base memory read/write test error
6
Keyboard controller BAT command failure
7
General exception (processor exception interrupt) error
8
Display memory (system video adapter) error
1
Reseat the memory, or replace it with modules known to be good.
2
Eliminate the possibility of interference by a malfunctioning add-in card. Remove all expansion cards except the
1
1
2
2
3
video adapter.
If beep codes are generated when all other expansion cards are absent, consult your RadiSys representative.
If beep codes are not generated when all other expansion cards are absent, one of the add-in cards is caus-
ing the malfunction. Insert the cards back into the system one at a time until the problem happens again.
This will reveal the malfunctioning card.
3
If the system video adapter is an add-in card, reseat or replace it. If the video adapter is an integrated part of
the system board, the board itself may be faulty.
Checkpoint Description
03Disable NMI, Parity, video for EGA, and DMA controllers. Initialize BIOS, POST, Runtime data area.
Also initialize BIOS modules on POST entry and GPNV area. Initialized CMOS as mentioned in the
Kernel Variable “wCMOSFlags.”
04Check CMOS diagnostic byte to determine whether battery power is OK and CMOS checksum is
OK. Verify CMOS checksum manually by reading storage area. If the CMOS checksum is bad,
update CMOS with power-on default values, and clear passwords. Initialize status register A.
Initializes data variables that are based on CMOS setup questions. Initializes both the 8259compatible PICs in the system
05Initializes the interrupt controlling hardware (generally PIC) and interrupt vector table.
Table 62. POST code checkpoints
67
A
BIOS Beep Codes and Checkpoints
Checkpoint Description
06Do R/W test to CH-2 count reg. Initialize CH-0 as system timer. Install the POSTINT1Ch handler.
Enable IRQ-0 in PIC for system timer interrupt.
Traps INT1Ch vector to “POSTINT1ChHandlerBlock.”
07Fixes CPU POST interface calling pointer.
08Initializes the CPU. The BAT test is being done on KBC. Program the keyboard controller command
byte is being done after Auto detection of KB/MS using AMI KB-5.
C0Early CPU Init Start — Disable Cache — Init Local APIC
C1Set up boot strap processor Information.
C2Set up boot strap processor for POST.
C5Enumerate and set up application processors.
C6Re-enable cache for boot strap processor.
C7Early CPU Init Exit.
0AInitializes the 8042 compatible Key Board Controller.
0BDetects the presence of PS/2 mouse.
0CDetects the presence of Keyboard in KBC port.
0ETesting and initialization of different Input Devices. Also, update the Kernel Variables.
Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1. Uncompress all
available language, BIOS logo, and Silent logo modules.
13Early POST initialization of chipset registers.
20Relocate System Management Interrupt vector for all CPU in the system.
24Uncompress and initialize any platform specific BIOS modules. GPNV is initialized at this
checkpoint.
2AInitializes different devices through DIM.
2CInitializes different devices. Detects and initializes the video adapter installed in the system that have
optional ROMs.
2EInitializes all the output devices.
31Allocate memory for ADM module and uncompress it. Give control to ADM module for
initialization. Initialize language and font modules for ADM. Activate ADM module.
33Initializes the silent boot module. Set the window for displaying text information.
37Displaying sign-on message, CPU information, setup key message, and any OEM specific
information.
38Initializes different devices through DIM. USB controllers are initialized at this point.
39Initializes DMAC-1 & DMAC-2.
3AInitialize RTC date/time.
3BTest for total memory installed in the system. Also, Check for DEL or ESC keys to limit memory test.
Display total memory in the system.
3CMid-POST initialization of chipset registers.
40Detect different devices (parallel ports, serial ports, and coprocessor in CPU, etc.) successfully
installed in the system and update the BDA, EBDA, etc.
Table 62. POST code checkpoints (Continued)
68
A
Table 62. POST code checkpoints (Continued)
Checkpoint Description
52Updates CMOS memory size from memory found in memory test. Allocates memory for Extended
BIOS Data Area from base memory. Programming the memory hole or any kind of implementation
that needs an adjustment in system RAM size if needed.
60Initializes NUM-LOCK status and programs the KBD typematic rate.
75Initialize Int-13, and prepare for IPL detection.
78Initializes IPL devices controlled by BIOS and option ROMs.
7CGenerate and write contents of ESCD in NVRAM.
84Log errors encountered during POST.
85Display errors to the user and gets the user response for error.
87Execute BIOS setup if needed / requested. Check boot password if installed.
8CLate POST initialization of chipset registers.
8DBuild ACPI tables (if ACPI is supported).
8EProgram the peripheral parameters. Enable/Disable NMI as selected.
90Initialization of system management interrupt by invoking all handlers.
Note: This checkpoint comes right after checkpoint 20h.
A1Clean-up work needed before booting to OS.
A2Takes care of runtime image preparation for different BIOS modules. Fill the free area in F000h
segment with 0FFh. Initializes the Microsoft IRQ Routing Table. Prepares the runtime language
module. Disables the system configuration display if needed.
A4Initialize runtime language module. Display boot option popup menu.
A7Displays the system configuration screen if enabled. Initialize the CPU’s before boot, which includes
the programming of the MTRR’s.
A9Wait for user input at config display if needed.
AAUninstall POST INT1Ch vector and INT09h vector.
ABPrepare BBS for Int 19 boot. Init MP tables.
ACEnd of POST initialization of chipset registers. De-initializes the ADM module.
B1Save system context for ACPI. Prepare CPU for OS boot including final MTRR values.
00Passes control to OS Loader (typically INT19h).
69
A
BIOS Beep Codes and Checkpoints
70
INSTALLING THE WINDOWS OS
After all hardware components have been installed, you must first configure Intel South Bridge
RAID settings before you install the Windows operating system and other software drivers. To
configure RAID settings, refer to RAID configuration documentation.
Installing the Windows operating system to a RAID system
1. Insert the Windows operating system CD into the CD-ROM drive. The system starts booting
up from CD.
2.Press F6 when the message “Press F6 if you need to install a third party SCSI or RAID driver”
appears.
3. When the Windows setup screen appears, press S to specify additional device(s).
4. Insert the driver disk “Intel AA RAID XP/2003/2008/Vista Driver for ICH10R” into drive A
and press Enter.
5. Choose the Intel(R) ICH10R SATA RAID Controller from the list indicated in the Windows OS
Setup Screen, and press Enter.
B
6. Press Enter to continue the installation process.
If you need to specify any additional devices to be installed, do so at this time. Once all
devices are specified, press Enter to continue with the installation.
7.From the Windows setup screen, press Enter.
The Windows setup automatically loads all device files and then continues the operating
system installation.
8. After the operating system installation is completed, the system automatically reboots.
71
B
Installing the Windows OS
72
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