Radio Shack 26-3501, 26-3503 Service Manual

TRS-80 Pocket

Computer and

Cassette

Interface

Catalog Number:

JJJOJ

f

TABLE

SPECIFICATIONS

1.

2. BLOCK DIAGRAM

3. LSI SIGNAL DESCRIPTIONS

A. BEFORE SERVICING

CASSETTE

5.

CASSETTE OPERATION

6.

CHFCK

7

8. CIRCUIT DIAGRAM PARTS 4 SIGNALS POSITION

9. PARTS LISr FOR 26-3501

10. PARTS

TAPE & INTERFACE

PROGRAM

Operation

Operation P.C.B

Key i < i I „.
Key P.C.

26-3503

26-3503 P.C.B

circuit diagram

B

uicoil <iiagi<un

USr FOR

76-.1501

CONTENTS

OF

l

3

jq

]4

14

I5

22

28

23

24

^

27

g?

28

gg

SPECIFICATIONS

1.

l;J

E3 Ld CEl 3

ca ®

i

ee

L*J

l«J

m

h

ra S GH 1

ta

LX3

[f]

Xi

[vi rj

JLI

1

[-_

(i

I .

Display

•

Display tube: LI-80I7JI.

•

Display method 5»

• Display capacity: 24 columm (alphanumeric; and tymboh)

"

dot

matrix liquid crystal

5

6pc

ssl

Loj

KMMVWIt ->YS

>

fNUH

7

I4"i

(T

i

<

ra cr

)

)

m m m ia

s

s' *: «^

i«j

3 E

is e

ej ce

Basic

functions

Computational rapid

Comptiia:ional method:

Capacities:

1 2 dt^ifsof mantissa ind 2 digits of

ty

According lo

1'iogram memory;

Data

W^pw

Inpui buffer:

Buffers:

Arithmetic

functions

Acd (*). Subtract [-% Multiply

Tngonometric functions:

Inverse trigonometric fur.ctlonr

Logarithmic

hxponenial

Ar&uiar transformations:

S-quotO

Slgniim

Absolut e value:

Integration:

Kxccoticn of arithmetic operation is commanded

fuactom:

tunciom:

r..'! ;\tr.i ,1 ni.

fnnrtlnn:

Data buffer.

l-'uncliona)

Subroutine buffer; 4

"FOR NLXT" statement buffer: 4 stages

(+),

maiheirntiral

formula

M24 steps, max

memory

memory;

program;

buffer. 16 stages (but 15 napes

Divide (,<). Power raising

SIN (sine).

ASN (line

Fixed

20 nxmoilei

Flexible memory ^commonly usable »it!i ire

1

memories, max

78

£ ktniti. as ttepc,

I

SO steps

stages

8

stages

(cosine).

COS

'

). ACS (cosine'

LOG (common logarithm).

(exponential)

\i\?

(decimal

DMS

(lexageMiinl notation

DEG

notation to sexagesimal notation).

J

SCN

rVBS(|X0

INT

ENTKR

by ilie

exponent.

(with priority consideration

miv

fur

parenthesis)

(A)

TAN (tangent)

1

AT\ (tangent

).

(natural logarr.hni

LN

tu decimal nuiation)

key.

mi

function)

iiinnot

y

arid judge

prog

'

|ln|

Editorial

Cursor shift:

lmetlinn:

Deletion:

Line control:

functions

INS

DEL

I (down).

(right).

T

<

(up)

(left)

Programming language

W

BASIC (Beginner's

Power

source

Battery;

Ra<t*ry liiV J00 hours

Power conJump ion: 0.01 1

Automaitc

powei

All p«pose

shutofl: About 6 rainules

Miscellaneous

Data protection:

Peripheral unit: Audio

Optional

PhyMcal iimenaora:

Weight:

For torapttfr frttili of optratna ttw

Program memory, dau mcmaiy. re$er*e program memory

program memory)
26-3503

17S(W)

Afprox. I70g(0.37 lbs) ...

Aceiox.

Symbolic Initruction

Four MR44

OMMtte

(audio cauei ic interface)

x 70(D) x 44(11) mm

240b

<m«rcury ba«eri*s)

unit (recording/Tending (if rfi* prrgram Trmory. dali mentnry and

26-3501

(0.5J lbO

TRS-80

(with

Pockt

Code)

<6.8<W)

x 2.7(D) x

batUri**) _. 2G-3S03

Computer, rrfii to fh« Qwntr't Minunt.

1.7(H)

inches)

MMf*t

y>

s

z

iit

o

a

2bs,b**j

£5

^ct*

£

nz

:h-ih

h-.h

<

6

.

* "

S 12 T.

i

il

r i

VII

1

<k H

CV-IV

KtHI-iniU

<

I'

<3=±

.-_— ,. ...

B*ae

><

S5

System configuration (see the s/stem block

system consists

The

CPUI(SC43I77)« I

1.

CPUU(SC43l7S)x I

2.

4K-bltRAM(rOM4)*x3)

3.

4. Display chip

2ANDga(e<TC4011UrJP*l)

5.

2AMJ20H(K4yivUCx

6.

lnvwter(TC4069BPx I)

7.
S. Quard Analog Switch
o.

ITD(34-di8it FhMdot

10. Key

11. Crystal (CSB2560)

(he following components:

of

with

(SC43I23

« 3.

I)

Miiltiplover (TCdOAtBP)

LCD)

Duilt-in RAN)

diagram)

Brief overview

The CPUs are

provided

of CPU I and CPU II

with internal ROM.and

the

CPUs

have

following assignments

ihe

CPU I

Key input rostine

Acknowledgement

the remaining

of

program

instruction

One

additional incoiporatton

Pio&aiii

CdSSCtlt tuillfol MdUlUClil

Cummand

Pointer control

one program

to

Interpreter:

execute italciiuul

ilateimnt

(leserved)

step

v -irii'i lit mrinutl opentnn

Piw.resumt

Clouk Hup

•

The CPU I

don* (or Iho loiuitl of aritlunebco': operation* (i.e., control of arithmetic

-

i I ' .

the information lo be displayed, but

tlon in proper

ly receives

changes data, depending on
does net perform any decision by itself.

Actions of

Eg-

iu.ii;;i,

or interpret the cyntnx of the BASIC instruction for

sequence

execution

CPUI and

ia read key-ii data ur read

and

instructions from CPU I

tPUU

control

centred

(tie

instruction to be

deciding

CPU"

acts to provide

the situation. Although it shares eA«.uiio>! fum-lions

the lime of key data entry.

at

not perfiwm

I doei

instruction

via

any execution

codelo the fPL II

transfer

the

buffer

CPU

Display proceHing routine

Input buffer

Cunipuiaiional result

Rprngnitlor: nf

execute*] fiom the RAM, and decides

sequence,

what is to be executed, or determine* and prepare*

By itself. Il only arranges ihedata and inlorma-

via

the buffer. On

and executes

trr'T

Ai >Uim>tit H'jlirc

Character geritiatoi

(arctic

routine

Print tontine

Qj,uei

printer (reserved)

I'oiver

"t I

Clojk nop

is to be

what

Jots, and its

CPU D constant-

memorieingof

Uteothet

operations

arithmetical

hind.

pei each infraction or ex-

and tieifoiai* some auxiliary CPU rolcs.it

irt

kvv

u

ni

For

ui'. il operation of ihe Pocket Computet, the

(Input buffer) after Information is put through

ruction

imtmction <

this

(display! is transferred to

code

display)

and executes dlisplay processing

thoCPt-

confirms the completion of the vak hy ihe CPU

uislructlon code (key code) a

the kcybwitd and converted into the

1

11 vis

the transfer

11

before lermimtirg their

butler. As CPU D

Upon

the

completion of this processing, it notitlei CPU

function!.

written

instruction code by

isceivei this inctmciion. CPU II ther

(mo

the RAM in

the display chip

CPU I, then this inst-

I,

decodes

and

CPU I

Overview of RAM

Three C-MOS RAMs (I

described

•

below:

Mapol4K-bf. RAM

orostor*

Rtnnn

Prog'am

tipihlpmowflfv

—3

103OD/ie>

chips. 4K bin

001

IMfi

each) plus RAM Incorporated In the

display

chip aie used in

ihii Pticket Computet, ai

1«7?

FOR

-

KEXT

q-.-k.

£ i

^04

isgg

Fined

b*oume

HiKli

mmonei <¥Y

Aithojgrt

memories. i( is

fixed memories (W. X. Y

RAM

aiea is

also

usee I'm the subroutine sack. FOR NhXT

mainly shar*d

. Z).

by

prog-air., daia and reserve program

ihe

staiemert slack and

.

Map

the KAK1 incorporated xi Ihc Jispluy chip

of

Tl.cic

t.cns:

are lincc

IK-Ii.t

KAMs (12S bytes each)

incorporated

in each display chip (SC431 25). willi the

following

condguio-

DISPLAY CHIP 1

IJOIJ

8-digil display buffet

two
(MS

I2S

8-digtt display

4€

byln

arithmetical result, during arithmetical

Fixed memory

loial

The

Trarufci btffc:

fiO-step input

buffer

of

8-digt display

memory of

buffe

buffer

is

176

bvies (fiorr the display chip 2 and 31 is used asa fixed memories. A—V (22 memories).

used

as J

operations.

1 r-iemcy

IfefllH

DISPLAY (HIP 3

8-digit

Fixed memories

display

buffer

(A—K. 1 1 memories]

display data buffer during

DISPLAY CHIP 3

Sdijui display buffet

Fixed

(L—

V. 1 1

displaying and also used as a

I '

•

memories

memories''

buffet

iretrwry for

Itanster

o liyies (I memory

buffer

equivalent

or f>spl;ty

i

Chip 1 is used as a

transfer buffer for

transactions of instruction*,

and CPU B.

Input

buffer

Remlining HO Syt>s (1(1 me-iioi-ipt e-yiivilent) nf Display Chip I kuserl I'm the inroil buffet as follow*:

information

I Any

2.

dispJayconieiis are stored by CPU 1.

Be

When

3.

4

an arithmetical instruction is emered. its piocedute is stored in ibis suffer by

lions according to the procedure.

When

a program or reserve program is to be recorded or read out during the execution nf the tassctlc control

action tikes place through this input buffer.

tnlered

through

the keyboard is stored in this buffet, allowing up to

CPU Dselecii

and

data.

HO

steps.

CPU I. and CPU II

let

ween CPU

performs

nstruction.

I

open*

Overview of

Display

The coniems til fhr

cliaric*«l etides. ihey

*

Designation of 'he display

IJie rolkwitigsiru.'tureii observed

A« K? W A*

itaptoy AS indicated by CPU I is reoeiwd

arc transferred to the display buffer

*/

1

\

F

1

1

1

F

i-n

in the display buffer

JfCOCPt

\

il- 114 ii> tit 113

X O I) 1

x

HiidPiV

I .0

I

bat*—

I

by CPU II via ih* input buffer

in the Diiplay (hip lluuugh the

m the Display Chip.

Tlu-.c arc

buffer in Ifce

hg: tiitiplay

'VI 111

SI

II

ss

Sll

SI7
sis

adjiess data bus.

8 * 40*320

Display Chip.

numerical

"'

nnnin

bill

"4"

"'DOilD

»»Din«n

M+

BDD1D

"'

"S

DDDID

H7Qaa«D

SI

S2 S3

ind are ccnvericd

(40 tyies)

S4 S5

respective

into

of area in the display

(1 1 II

Aifcli e>i

The numeral

bus.

data

display butler

addieis "OUQJOUOO" io

"Oioo"

"4"

(to be displayed by

hirst, the segnwni Si isvkned with the

above

(see

for icgmcm

52

1

)

p

rm

in n[ i)

|

11104 1)102 MO*

A5- A5-0

illustration).

store daia "tOOT. In ihe same

and ihe

second 4-bttdaia 'OOQi"issioted

loijniog

1H02

CPU II) is cotiTcrtcd into He lele.am

To store the second 4 biis of

'S33

•-'

T

|i

IHOI

address A8-AI "OOOOOOCO"

thedaia. only A5 in the address in turned *l "

manner, address "OOOOtXlOl"

with the addies

character code and earned

to store iheday DNM-DIOI

is sefected for storing the Prst 4-bit data

"1X101001)1".

(hrouah on the address

'1000"

mike i he

in

in the

—

Timing

MSP

HA

HI

H2

H3

114

Hi

116

H?

SI

Signal*

for Displaying

i mi-

ruiJiruuinjinjinjiiiJinjinj

j

~u

U

LT

"4'

t_zz£:

m

—

—i_n

n

JT_r
_TLr

_r

XMWA.

v//$/r

ar

i-l

"

l,M'

V

IHU*

*^-^*

HA: Ucek frequency for me counter.

Mgndl.Hl-HV.geneiaicdliom CPU D.

Wiih

DSIP:

The dam MOtcd in the displa) buffet beamed

thf <!i*pl*y. IW and lit »rr cnpgfH tor Si

high level wf lhi» itgnal.pioc*siinft of display

Sl~S40).

mis signal

.lllitivl

^r^r

counted and decoded to perToim iynchiorUzation

It

operation

through

Si ~S40

W for S?. etc , tlm.ugh Rn

indicated (RAM data designated by HI~-118 is »*m out on

ii

(illustrated ibuve)tobc fed to the LCD. (

-

S40.)

wliJi

UK

lb indicate

common

"4"

un

Overview of Power supply

l}i>;i

GNU

MHHX*

'iX

voltage

.1

RtlitonMiwr

be caused by a slight

the

230K!2 put

after servicing rhc LCD or changing some

s

angle (from vertical) while

10

regular the vullage

I'D

I

due to the influence nf the LSI.

TOllS,

r

Oand

adjusting

ovpisp

voltage variation

foi VDISP.

-4.29V

i«np«»iLue*iiO

The FhorniMur \i provided

%

c pun

The liquid crystal reference voltage VDISP is generated by the above circuity lo avoid bluncd ehaiaden

that

tion*

referencevollaff- VDISP}.

a. VDD
b. The gate

C.

generated

is

voltage

to compensate foi lemptvawre

Ref*ren« voltage

VIlKPr I n<u vnliag* fcw

VA: llim

VM: Inlerrrediilevollage fur common and *gment signals

VB: Law voltage lor

NOTE:

VA, VM

Adjustment ot relerence voltage VDISP
VDISP had been precisely adjusted to -3,74V at an ambient temperature of 2G

al If it is

components, he sure to look it ihe Display from a 30

1 he

pot.

cegnde display performance (which would

might

m CPU II. referenced to VGG.

of MOS FET i& controlled by

VDlSPit

vuli

age for segment signals(SI-S40t

VBbejune

and

necessary

variaiion.

aiviicc by resistor combinations to provide VA, VM and VB-

Rmnmnn

segment

lo

tignaUtH' —117) fiv

signals.

pulses, with jii amplitude of several

rcacjusi

the

VOISP

*0'

-V

cr contrast

h the liquid crystal

Hyo poiiiion

varia-

VA

VM

v»

VDISP

)

3. LSI SIGNAL DESCRIPTIONS

SC43177

Pin No.

Signal

i

(CPU

name

F4a

I)

IntOui De&flptftM

Oul

Out

3

4

b

7

8

9

10

11 RESET In All

12

F3a

Fla

Vr.f;

v,

l( .

Xin In Basic clock (pulse signal, 256kH? 1

TESTI

test:

RjWa Oui RAM Data

Out

Out

In Source

In

Chip Enable signal ( RAM3 Mlect signal

Chip Enable signal (RAM2 *•!«« signal)
Chip Enable signal (RAMI

tnable signal

Chip

usage)

During display: Low

Dining icad-iu: turns moiiicntaiily high

voltage

(

"

1

"

select signal)

Display chip 1 select ligrial

voliage of baiteivl

Connected it. GND

Reset Switch input

Normally

During disptoy* High

but turns low when the All Kesri Switch b preyed.

high

Read/Wiitc

signal

Pickings key causes it to morr*.«nlari}y 5.1

.lor input buffer and Irmsfer buffer

**

-^

low

13

14

15

16

17

18

19

20

2)

22

23
24

DIOl

DI02
DI03
DI03

D7a

B6a

B3a

Ma

B3a
B2a

Bla

In'Oul

In-

In' Out

In.' Out

Out

Out

Out

Oui

Oui

Oul

Out
Oui

30 GND In

40 51 Ga

41

42

Sn

Si

Oui Busy signal to CPU ll (High during

Out

Out

On

l>ila HtRIfor address detignation of the input buffer am

Ditnlav

During read-in Low •»

and

Phio

1 ,

During dismay:

Addtess Bus (for

Display Chip

Dining

icad-m 'Trnuini

Source voltage (0V)

display: Low

During
During toad in: tutiu itiuiticnliiiily lugli

Strobe signal. RAM Addrcts signal

Kay
Key Stfrtbo signal. RAM Address

High

address designation of the input buffer ind r

1).

\\\\\ \\

\_\_\_V_i_\_\_

execution

signal

_

_ _

1 L

CPU t)

in

1 irmsfer buffer m RAM and

fanslet buffer in RAM

Morient arv erncrationOnling display

-

rnrn

10

^

J

~

HdNo. Signal pjiw

In' Out Description

43 SI 3 Out

44 SI 2 Out

4S
46

SI

1

Out Dining

SIO Out Pressing

47 59 Out

48

49

SO 56

51 S5 Out

52

58 Out

S7 Out

Oul

S4

Out

53 S3 Out

54 S2 Out

55

56

57

kil In Key input signal

Ki2
K13 In Owing display:

In

58 KM In Pressing

5<)

SI 6b

(KiS)

In Busy signal of CPU 11 (high

SC43178(CPUII)

Strobe -LiM.il

Key

display High

a key causes it to momentarily go low

Low

causes

a key

During dijpUy: Low

n to momentarily go high

during execution t>f CPU H>

J*

Pin No. Siinal Ini'Out

1 P4 Out

2

4

F3
F2

Fl

Oul

Out
Out

Bu/.«i signal

tha

Whert

".Tier ih*

Chip fcnible signal 1

ChipEmble signal)

Chip Enable signal (Display

During display: Low

Duung tend-in Tmm tikiniciilai ily h-gh

5

6

7

e Xin

li RESEr In All Reset Switch

12

Vc,c.

V,;r.

WW

Out

In
In

In Basic click (Pulse signal.

Oul

Foi liquid crystal drive vullige

Source wluge(**-" voltage

RAM Data Read/Write

During display High

Dining read-in-

Description

—

buzicr it off: Low 1

High

iv on

bWBW

Display

chip 3 select sienall

Display chip 2

256kHz)

input

signal

Turn* iiiuiiicitiailly luw

select signal I

chip 1 aelecl signal)

preparation i.Vdd *

Ihe

of

battery)

C25rni

'

f^_

-

""

I

1

1 I—

___.-- -_

Vc;c>

**

[~

1

nnNo

Signal name In/Oiu

1

DwtfjpttWi

men

14

lb

I?

IE
19

20

21

22

23

24

25

26 MSP

27

IB
29

DI03

OIOZ

DIOt

B8b
B7b
B6b
BSb
D4t
B3b

B2b
Bib

HA

VM
VA

GND

In/Out
In/Out

In/Out
In/Out

Out
Out
On!
Oui

Out

l>.ita Bus (for data transaction between RAM and

Dunne iea.Hn. Turns low

Address

Duringdisplay Blb» high. B2b Mow,

Bus (for address

B7b«low. BSb=low

l>urtng read-In: Turns momentarily

Oui
Out

Oil!

Oui Display sijna'(fommiui signal

Oui Display command

display- High

Dining

execution: Low

During

In

In

In

LCD display vnhagff (Intermediate

display voltage (High voltage of

LCD

Supply voltage (OVl

signal

-

_^_^

designaiion

couniiug pulser

Generated during

display ehipl

\\\\\\\\

display chip!

of the

B3b=bw. B4b-lov. BSb=high B6b

high

display

voltage

the segmeni lignal)

of

the segment signal)

=

hieh.

*i

05m

r

30

^1

32
33
34
35

36

3?
38

39

40

41

144

H?
Hi

Ht>

H2

115

HI

Vmsp

Vb

510

S15

SI

42 SI 3

43 .,

Out

Oui

common signals

LCD

(backplate)

Oui

Out
Out

Out

OU!

In

In

LCD display voltage

LCD display

voltage (Low vdiage of ihe segment signal)

Out Busy signal to the CIV 1 (Ilijh

During display: Low _^**^

Out

b

Out

Otit

Out

RcuoiJ signal tw the

Remote signal to the MT.

RiKy tibial i" r*inier.

Expansion signal

During display:

Low

vrltage of ihe common signal)

Low

I

during execution in CPU II)

cassette tape and prinl idala.

^^—

-*"

12

.

PinNu Signa

49

54 SI Out Fnrtymhnl display (SHIFT DFC., KaUCVAD, P.FSFKVF, PKO

55 Kit

56

name In 'Out Description

S6 Out Fot DEF symbol display

waveform

Same

In CPU 1

(SI 6a)

Ki? In F.ipantion signal

BusysfgnaHHighuuiingexecutiujiinCPUl)

as the segment signal

(engaged" low, aoi engaged:

lilgfi)

To b* cimrwcifd to SI 2 (CPU 11).

57

58 Ki4

59

60

H3

hi 5

Ki6

in Primer Busy signal

A'litll lIlC i^lilllCI

LuW

In Puntei connection identifying iignal.

Low when ihe pimtei

In

In

(asset to recall signal

OM

key

input

signal.

i> IIVH opcuttil

is not connected.

IC Pin-out

ic-toiiuBr

HJu*t i-«npui

'""14

13

18 II ID

p-tsmvo NASI*

nnnnnnn

iwlr )

J K

in

|<

ip

mvn

1 lltS

'

,(

''

14

id )

H I? tl io >

nnnnnnn

RUN)

lay k^J

,fPl„r^1„,

uul1iljul!ju

I

n:*umn'

'Quiii

AMD-Oft Klcti wit >

A

*

zS>^~

'

CM)

c>

UUUUlJUU

THOBflBP

tfiwi </il«lridl »*ilili

(

IN

'«n

l%*

qui

M

bUt™

c,„

°"1

*»

>

in

in

'

I.N

:

(iNI'

13

.

.

.

4.

Disassembly procedure

Remove

1

1 From (he sere* sule. leparate the upper

the lower cabinet (they are

points, A, B and

Repot ring procodure

] . The

exposed

can

Replacement

2.

If the key primed board is

3.

metic piiiilcd

alter

the CPU 1 b

lemming sciew(c).

4. The hey

board, so

Replacement of the LSI

Only

1

2. Be sure to

if

rubber with Ute

Bcsurc tocut each pinof the

?.

screws (i) and I screws (b).

2

latched togeihei at ihiee

C).

the CPU 11 is

ol

jihiwetic

ftintod

the lower

of

printed board from

possible.

to

be

bii'-i' of lK« at

after the removal

check the arithmetic

buaid lies to be bent at a right angle

removing the screws )d) anc (el.

possible

printed bontd can be

y«.

i ilonl *plll

«

fine soldering

very

first remove the

the LSI

removed

s

heal

the bizzrr Is

if

dismounted by

i In* he/ lops.

pencil should

primed board fiotn the

key

while

the key ptlnted

of the wittering pencil.

defeciive

checked, the arith-

BEFORE

cabinet item

SERVICING

board will be

cabinet. You

the back.

Inspection ol

removed after

removing

be used

tot

9

replacing

gcrrws (f> and 1

the LSI.

LkcI

screws

uppei cabinet. If the LSI on the key

board Is on the upper

cibinci. there is a

K. a

Tale care as you remove rtie printed

<$>

primed boird is to be

poistbUity of deforming the key

-

removed,

Measuring current consumption

source volnge 4.72V

tVwer

Cuitem

consumption:

After pressing the (IN key Under
After

pressing the OFF key: Under

ftSQuA

1 2(iA

5. CASSETTE

For details of operation and connection, refer to -Jie

Notes on suitable

While Radio Slack's CTK-SOA is the intended

1. Cassettes

2. Mic input jack must

Eaiphone output must

3.

4. Allowable distortion is

oi upciMecl tjpci can te used.

recorders

lia«

an

Hjvb

-1

%%. *ith frequency

cassette Recorder, oiheri can b*

oipui impedance of IK or leas, wiih a

an output impedance

TAPE &

INTERFACE

Owner's Manual for the TRS-80 Pocket

used The following

sensitivity level ofat least

of I

or less and an outpu: level nf 1 volt

OK

response from?to

4k

H?

Computer

totes

-tmV.

or more.

wy

Im> hclpl'ii

14

Recording

Recording method

CASSETTE OPERATION

6.

Recording formal of pi opam or reserve program

=

Check

1

2"8

~

3

sum code (after

steps of program

fcnd

code

recording.

of

4 Tim gap. composed of all

data to be Input is

*'

-

5

All

Is" sre recorded

tap« lit alto ii uwd for

=

6

Program or reserve program nam* is frwlfcaied

7=

File name

R=Data memory is mriicaied with r-iK rorle

9 Area for

data memory.

one

every s

steps or one data memory.

or reserve

peered

program

"Is", is inserted ai each line to

in

ll<c input buffet.

for a period of about 6 wCondf in order lo avoid non-record able area located

cuing

the recording head.

of

cm

Data memory recording formal

I

(ill

up Hie lull 80 steps, during which time

/

the next SO

at the beginning

steps

of

of

the

Kecording method

Data

"0"

ind

"1"

pata »

PATA J

are identified by changing The. frequency of the recording signal (F4"»

_r

lbi

15

:kiic

IkM/

.

Recording Mgrul I

F4"

) ^ncralion circuit

4" »

f.-

CfliMiM Ininlacc utwttc

to

mafclmon cucun

SlJ

HA

jULfiiLTLriJiJirLrLrirLnnr

Re

F4

juuuifiniuui

co.d.

9

^.."uinjijiriiijui^^

JUUUUUUUl

(F**>

Signal waveform at the tin* of recording

Whan a wording *leml"r*k 1« h# recorded. SI 5 k vet low and «8n»i F4 (clock pulseof-4kH/lis

When a recording ligral

reverse sinnal of HA (clock pulse

This signilh supplied to

"0"

is in be recorded. SIS is set high and K4 output is inhibited

.»:'

= 2kHz) is carried on lite recording

the MIC jack of !he tape recorder via the modulation

signal |

circuit

during that peiiod

the Cassette Interface.

oJ

.iiiiput du-ini thai period.

which time the

U

Reproduction

Output

through

signal from the

terminal

Ki5

CPU II

ot

EAR

CPU II.

of the tape recorder is amplified and shaped m the

jack

MS

w

C»CV>T

Jl! M'U

Schmitt circuit, to

wv-

Arvpli'icr

circuit

be input to

h^>

CPU

II

16

Remote

control

The Cassette Inletfate will coltrci the RKMOTE Jack automatically

O.M7pF

.

«Ki«

V7

rl

KIMOTI-

O

(SU)

*feG

(iMI>

1'ne U'-452XPisa

"A" outputs a pulse

pulw which

accut ding to the curie nt flow 10 ihe coil, and b auivatfil when

mono-siablemultmbraUHHo perform tiiggei and resel

which KitepenrifM rtn

thp limp

ointtaiH OfCR

u dependent on the tine constant of CR at the ruing

"A" b

(or record, playback and

deactivated

and

from

fraction!

a' the tailing edge

edge of ihe input signal- The relay operates ON and

active

verify

commands.

the sirgle chip).

mput ctgnil,

of the

when "B*'

and "ti" outputs a

KtCUW.

OH-

s u

QA

QR

Startup ol

Activa'ian

\

i:«ictt* to itort

>,<

of the

. ,.,-tt- .

relay

runnng)

r"---"

Tmmtoolion ul ihc

—

/

"LT

\

Oeaetivacior ot the telev

(cassette

nopruonir-q)

to

c<»cirt jj-rdin.i

17

Testing the Cassette Interface

Writing.

1

Firn enter tesi flats 10

No. Read

'«t data into the Pocket Computor

check tlu Interfact,

in Display

^^^^"^

Remarks

1 ImodeHmodeI

2 NEW
3 ENTER

4

5 P.

6

7

8 L#|SHFTi?AT|SHFT|

1 shftI 2

»LSHFTJ?A» SHFT ;A<204>

r>Tl-K|

i

1 SHFTI X

; A(204> X: 1. 3

9 int(k)

10 Sill

I]

12

13 MODFJ ::.(->

14

15

AI204) : A(204|

bNItK

MODEl

SHFTl

16

1

ENTER

|SK

1

ISPi!

I

|

=

100 A(?041=lflO_ RUM

^

NEW_

>

Z; _ RESERVE

tf»AT;A(204t

Z:P.

TAT;

TAT

;

A(204)_

A(204)

KlIN

KlIN

Z; PRINT *

X.

X: INPUT =?AT;A(204)

:

A(204)

>

RESERVE

RESERVE

RESERVE

RESERVE

RfcSCRVE

RESERVE

RESERVE
RESERVE
RESERVE

RESERVE

1U0

Dhplcy RF-SF.RVF m.ide

—

Checking

2.

the Cassette Interface

Amuires ihat iiep I hut already been executed.

No. Read in

1 OFF

**

•

3

4 [TUT] 5*

5

iploy

Di

Remarks

Connect tiicCwseUc

Interface to the lape

recorder

Connect the Pocket

Computer

Cassette

RUN Mako suic

th# dKphy (u«fMfH»F|

ke/)

>

RL'N Pimtijn Tjuc

In the

Inurface.

that RL'N » un

'

coiieciy.

16

.

Nu.

Read in Display Remarks

6 > RUN Pr«a» RHC aad PLAY

huimn.

'

7
H RUN nie casseliewill run ami

SHMJ Z

1

|KNThR|

PRIN1 *TAT;AI2(W|_

RUN

produce *ouid

9

10

11

12

13

14

15 1 Mtl-I

16

1 SHFT 1 X

ENTER

I

IHNTtR| R\

|

l|SK]

>

•

>

>

#TAT;A(204)

INPUT

> RUN The

AUU4> RUN

RUN

RUN

r: n

usiclic

The

tnnnd mill

Ke*'ind

beginning .>f tht

Press Pl.AYbuuon.

wi'l slop and

ct%tt.

tape

(tie

to the

recording.

RUN

'11

RUN

if

L&aetlc

produce

GUMIWW0

sound

\

mo.

sound.

will

wi'l

case.

iuii and

siopanO

17 RUN 100. Push STOPbouon.

18 fOFFl

19 Disconnect

Inspection

I.

lfcassettestm!torunatStep6.

1.

If cassette fails to run or no jouml is heard at

2.

3. If cassette does not stop at

4. If no

Repeal the procedure

U.

When

1

repeat Ihe procedure frum Step 5 after emetine. "A(204)=100". If ihc tame indkatixn remains on Ike display even after

this

2. When 'MOO.' is not displayed at Step 16, repeal operation from Step 10. If the specific

display, repeal ihe

display

reqnii-'td if any

is

sound

"5

detailed

.

even

following conditions occur*

of

Step

SicpO.

heard

s

inspection ii

after this, detailed inspection Is required.

Step

at

ihc following

it"

"

» displayed at

required.

procedlM

1 3.

occur*:

Step

front Step 5 after entering "Af204l= 1

repeat operation fnim Step 10. If ihe saine indication is Mill on the display.

13,

8.

00".

If the specific indication is not to ippe-ar on the

castes.

Mfotlon doe* Ml

ani:sand

appear on the

10

A

Repairing

P'(W)f»m

No. Read in

1

i|off|)

[ON]

2

3

'

4

s RUN o

I

the Cassette Interface

fcNItP

1

Us?

1

1 N T

U . 1

t>

ibe following

>

> RUN

CS.TA

# i)

i i ii

r i

procedures ioe>v»luaie the Cassette Ititertaie

Displjv

HUN

RUN o oCSjSHKTlf

•

A (201)

|

Plug Tape rwuiuVi

lak|

c

1

KtM

OTI

:

P

U 5 E 1

A

PLAY MX STOP

o o

o o O o o Make sure

o

o o THa lap* ttirtc tnnin

o

ReaMika

t onnei't

Interlace.

Uelermine recording

loca'.iiin oi> the tape.

docs not

jnJ u'cording

be heard.

l ompuier io

liul

111;

run.

tound will

upe

h > RUN

7 > RUN

K

>

KL'N

o o o o

o o

o o o o

9 CLO.? (SHFTlTA Cl.O/fA RUN o o o

trVI!-K

iU

1

11

12 RUN

lOFFl

13

|

> RUN o o o Sound and tape \>ill Mop

RUN o o o o

1

0=

Cunneciedor

activated

Hie Miutiil will

tlie

upe will stop wlteu

">*' is displayed.

RewjiJ lupe

ning!)! ihc

cext.it

to tic begin-

ICUHUDK.

and

ine display ccnietiis will

disappear,

.oiinl

aid

duced.

'apt will

will be

s'.an

pro-

when">"isdispaycd.

2G

)

|NOTES]

1. Check

2. Check
J. Kr»

the Compuw.il th* cassette tape

the recording circiii! of the Interface ifno

sound

audible with that tape, check the

lecordinR circuit

ihe

No.

|

1

s

IbtSIcK

z

i

i

»5and 12 pins ot

TCXSJHBP lor t>«ii watert

• Stcrmnalol

audible a> Step

ft

of the Interface.

Read in Display

RUN

-

l^

1

<l'

Ihe inlor

keeps running in Step 3,

recording sound is audible at Step

playback anoihei recorded tape

ID,

reproducing circuit of the Intetface. If

RUN_ RUN

Dim

KUI*

RUN

No tap*

kbcokdor soufiu is

Reco'dinff

recorder motion.

sound ceases

to run in Step S.ot the

fab

to check il sound isiuciblr

sound

Ketnaiks

auuimc.

"10."

and

RUN

1(1111 1

._.-.. 1- In

diiuiptia

—

' <«ord«ig

J. A. In A* J.ln <X .!_ „__

—h*—

'ina.ipjjy

reco-ding

^"— "p

Indnplav

—

recording

tape does nor slop in Slep 6.

S.

audible with the jecond tape,

is

is displayed foi about 1 second.

—f—

with that tape If tound is not

"|" incDiaim

indHDlav

check

A;tiw»tion ot tht riliv

(cs»cite top* io

»10BinolTC4528an

«1 ••rn-mal i* f*io >»I«y

Cassette ONjOFF conitol must be pioperly

start tunning)

-»fU- Imsecmm j

L>eact^3tK"> oi in« r*iav

(gasaeiio Ldpe lu tiw)

executed when the above signals ate

observed during cxeiutwn of program.

21

—

1

*

CHECK

7.

1

2

3

l

f>

8

1

8

Xw\

IALL RESET)

8/8 lENTERl 5

1 modbI

1 F

2

,SMK1| S ISHET1 IKNTHRI 2

8 B E E P

]MODfc!

10 G R A

11

12

18

14

1:,

IS

I :

[Shi-

1

iMOIH-i

|SHFT| 7

'NOUH'SHFTliSPCl ii I 4 7

1CLI RAD

r 1 f-r

lENTER, S

18 [Enter'

ie {OFF]

20

si

32

23

24
26
en

i>7

2fi

29

30

'

i

as

S3

34

8fi

36

87

ax

.10

40

PROGRAM

READ

•

ISHF7I (1 h [SHU

JS1IFTI 2 ISHFTJ P

dIeNTErI

Isi'tl u 1 4

i|

:-

i.k

1

IN

^^^^~

.

8 [entek|

'1

[ENTER)

(fcNlfc-fcl

—

•

"

i

;

-

ENTfeRl

1 2 3 t 5

• r k

T

z

:

n

ii

1 i |

i i

( 1 V

K

1 ' 1 1

1

i :

'

z

e

i

^»

.-

i

2

3

'-

..»

--

S

J5

(i

-.

r

T

E

1

4

,

* 1

1

1 i

1 N

*

L

r k

1

—

p

i 1 1

T

7

1

—

1

1

7

1

-

I N 1

2

i
1

1

' '

1

l>

SP L A Y

i i

—*—

—i

l

' ^

| L_

I

1
i

t 1

u

i i

•

1

—

10

s

»

()

i

1

I

II 1!

K,

13

1* .. 1' 17 islie

i

5

15

5 5 5 5 5

w

'

1

T

s'

)|;i|is|z3 U

j J J

^ f t 1

i

• 1

E

SVMBOI.

SHFT Dill RAD GfAH

'

^

f

<G>

(Ul

o

Co)

DEF

o

o o

< i

*_*

o

(O) o o

' '

O

o

'vj

o

TRO

JrUK

'.-.

W

O

O

O

_";.

'.

J

o

G

i~

"

O o

bQU>

laavtt

play'rec

stw RBCn

t

1

1

.

' *

I

1

!

32

.

r

Circuit Diagram

I

"J

'Of

or

I'liirl"!

BUSV >l«v!

8. CIRCUIT

- -

C HE-

Hie

i.?Fi

DIAGRAM

PARTS

i

ss

i fir (!:

>

1

*

i

1

»»

Or

lvt

<n

EK

M-min

!>*

cm

*»ai4liM,

I

'

"""

Ki>; i «.

$11

SIB <B->ll.ir>

til

cpu

!S

•

. |w

TTTT

Pivwl

( ii

*»

t>-

D

mil'
I'HH

HHt,

II.

.

ft

"»

Ufa

I*

FKL

i . .i

...-!.

o

ZI

o

:0-

:0

23

ii n

:

V V V

fl

—

i»

ii

'

v

-

B

gyggyij **'

?v

V" V

SIGNALS POSITION

S

Via f

-Mi

:

.

IDI

11

LIS

f

~ I

-

Operation

«•<---'->©

w

§

J*

1

o*f

So

—

KI9

1

WD

J

SM

1

KH

1

j,

9NB5- *H«r**6*«*ttW«M6*

IP

P. C.B.

m

fi*y

K*OMF

ilOOWir

Hi HZ H)

* *3

«X)U

_—

AS

AI m W

«tb MO!

.

B

W *

U*L

n

jr

nw*&*toam**t*FnH*9*bfii

ilAi ri

TOP

M BH IM M>

VIE*

«*' >ni M

mi it **»*

±-»iwoo«

•i"->.\

<*«0

fSOKQ

'herniate*'}

&tfr»WB

To KEY

ID

5i» Ml

fim m

Vm era

BM PW

PC « lit NO*

BOTTCM VIE*

»•

*

..

to

J

1

/J

*

!/«1

^.^

M

M A6

M

Hb

HJ

•'

AI

W

24

Key

Circuit

sunn

\i

| M'l.ftl ill :

!'i|

••

23

& & 6 & & O O

iftinmiu

I

^

H

D

= 3

-

fl 8

-

In

3

I

• • 1

: •!

23D ;

""'""I

liB

.

Q a t

ioa a

"a 9

a

flOM

s

s

c

C

J

"<•"

1

iPP

BB 8

-

n

g
3 Q 3 3 1!

3

3

a i

3

sua

00. 00 D

S 2

DO

cccp

KeyP.C.B.

Ml

W M M

S3

4u

IB W?

*

»*

* S*

•«

S. J* &. &B S* l4<

Q

->•

( n J» &

D D

&

-V U} to

•»

Z%

H

EQQQEJE1F1QE1Q

QEQQD

E

#ft

Q Q

(+>

op

Q Q

w

•

MH 1*

loci;

-

3

*

S

i Dicrui

nio.i

&>

sit rn

E ?

**

~*t ry

*B

*l

H

*i i*

B

I D'gFLAY .3 1(1

E

SEIOOt

MP

fR-U-l

D

D

m

B

-

nit,

B

a

26

P

-

.

Interface Circuit

Diagram

KtUJM> "»ul _

IPl'l

1H10)

can

U

O

Interface P.C.B.

27

]

9. PARTS LIST FOR

Ret

Nr>

1 Special

2

3 Bottom cablet
4 InsuUto' sheet

5 T^ne for interface loclc plats

A 1

7 Lid tor interface

Special screw (M2X

Morfsnt lor*4<

3t'c«(M2

9

10 Special

11

12

13

14

IB

to

17
'8

19

BlJ2?tt

«r»iw (M2

Scnr*)M2 x

All reset

Cushion 'or reset

Flexible wire

Conrwcicr

Rubber connector tot

LCD

Tape for

Frame tor

20 Filter lor

Description

sc*e«v (M2 * 131

a

plme

lock plate

< 9)

x 5)

5)

twitch

switch

(22 on) AtAi.2621

18pi-.J 'o'C

LCD

LCD

LCD

« Display niask

22

23
2d

25

26

27
zh

29
30

31

32
33 Battery terminal (-)

<4

36 fliockci fot

36 1
3?

38

39

Display

Key rubber
Ground sonno
Key
Key

Key
Kay
Kwy
Key

Salter/

Battery terminal!*!

So»w(M2 x4)

op cabinet

Lid tor connector

Flexible

Soft

tL'r

f

lop 08

top (1

(Left n»lvesl

key)

7

key) (Right lidlvo)

ioplSHFT)<2CpcVl

lop (ENTER) HO

top (Njmeial)

iop(CL! <20pcS/1setI

terminal (-*, —

boinmcaMnct

vnre(Bnin)

esse

26-3501

RS

Location

AHD15S5

AH13-I587

AZ-5633

AHB-9P,!V)

Ana

90S1 PTPEH1C0

AZ5634

ADA-0314

AHLMS8B

7073

B

AHD-1689

AHO-1690

AS-U692

'-<'>-

\HR

w«tt«

a

Interface

LCD

sell

pcs/1 set) AK-4220

AJ 0031

ART-2985

AL1180

AHB9953
ART2986

AQO430

ART-2987

ART-2991

\h~ ?<ms

—

-"

— *

ana 6623

AK-4274

AK-4276

AK4219

AK-4221

AK4222

-9954

AHB

AHB-9955

AMBQ0S6 OT

AHD-1G91

AHB-9957

AZ-5635

ADA0315

AW

2522 QCNW

AZ-5036

Manufacturer

Pa'i Number

Lx-H*;iU84UtJZZ

LX

3Z1032CCZZ

HDECA1765CCZZ

P7FTI

i

135SCCZ2

2CCZZ

LCH351091CCZZ

GFTAA1?46CCZZ

XBPSD2OP09OOO
RALMaiOOBCCZZ
LX-BZ10SOCCZ2

XTPSD20P05000

QCNTM1036CCZZ

PCUSS10S1CCZZ

QCNW

QCNCW

1136CCZZ

WD3CC0I

PGUM51190CCZZ

VVLLF8017JE

PTPEH1033CCZZ
LANGK1290CCZZ
PPILWI230CCZZ
HDECA1527CCZZ

PFiLwi??acr:77

PGUMM1264CCZZ

Mcnnct

oooccsz

JKNBZ1515CC04
JKNBZ1515CC05
JKNBZ1516CC02

JKNBZl

r*6C0CM

JKNBZ1621CC01

JKNBZ1622CCQ1

0TAN2l?R7^r7Z
QTANZ1292CCZZ

ANZI250CCZZ

XUSSOZCP040QO

LANU11336CCZZ

CCA3B2381CC01

GFTAA124SCCZZ

1 137CCZZ

UBAGC1230CCZZ

1

28

B

No. [

40

41

Description

Bad

90 Al 10-9961 HBDCE1341CC2Z

-1

Bcuey urmlnil

PCB

(Key unit) AX

(-,

PC B (CPU unitl

Template AHB-OQ5Q LPLTP1070CC7?

lahnl

Nam*

Cstxm

resistor

RS

Location

AHB-9958

8546

AX-8547 DUNTK5568CCZZ

AHB99G0 TLAB21205CCZZ

AN0583CBa

Menufoe lure'

Number

P»t

QTANZI293CCZZ
DUNTK5567CCZZ

RR-DZ10Q6CCZZ

1/BW 143K Zh

Carben resislor

I/8W 12. 7K 2*

Cabon resistor

1/8W 21 K

Variable resistor 125010 AP-710S

C*p*-itnr (Flertrnlytir)

lOO^F 10V -807-20%

Co.iokv

220PP

Diode.

Trie miner iisok)

LSI (Display thiol

LSI (CPU-1). SC43177 AX> 3033
LSI tCPU-71. Sr.4.tl7n

IC, TC401

TC4019P

IC

TC4066P

IC,

TC4069P

IC,

LSI (Ram)

Sdidresatoi

1/8W I.6M9I1P1 6%

Carbon resistoi

1/3W 100 ohm

Carbon resistor

1/BW 22K 5%

Cabon resistor

1/BW 1CK 5%

Carbon resistor

1/BW 1G0K 5%

Carbon resistor

I/8W 1Mohm 594

Cation Resistor

1/8W 4.7K

Fc

ru
ih

Carbon rtsitlor

1/SW 470K

2%

(CerCTtit)

50V itO*

DS1688L1 AOX 1405 VHDOS158BL11

TC/312S

1UBP

5*

5%

5*6

AN0584C6B

AN03Q8CfiB

Arnnszjcp

ACC271KJCP

AT-1218

AXX3032 V1liSC431

AXX-3034

AMX-4439

flMX-4440 VHiTC40»9P/

AMX-4441

AMX-4442

AX> 3C3^

ANCS36EBB

AN0I32E6B VRD ST2BY101J

AN0311E6B

AN0281EBB

AN0371EBB

AN0445EBB

AN07A7EBB VRD-ST2RY477J

AN0423E8B VRD ST2BY*7*J

RRDZ10D7CCZZ

RRDZ100BCCZZ

RVR-MB5100CZZ
VCEAAU1AW107O

vr*YPLnMB?31<

VHH154KD-5/1

25/1

VHISC43I 77/1
VHJSC431 78/ 1

VHiTC4Q11UBPl

C4056P/

VHi 1

VHiTC4069PM
VHiTC5514PM

VBC-MT26G I65J

VRD ST2BY223J

VRD ST2BYI03J

VRD

ST2BY104J

VRO-ST28YI05J

1

1

29

Rel.

No.

40

41 BatWy Wrniml

Badge flMh.yyei

PCB(Keytmt»

PCBICPUunit)

Template

Name label

Carbon

resistor

Deicripiion

4>,

-I AHB-9958

RS

1 OC^on

AX-8546

AX-8547

AHB-9959

AHB9960

AN0583CBB

Manufacturer

Part

Number

HBDGE134

1CC2Z

QTANZ1293CCZZ

DUNTK5567CCZZ

OUNTK5558CCZZ
LPLTP1070CC77

TLABZ13fl«;rf:77

RP-DZ1006CCZZ

B

Fc

(if

m

th

CO

^~

.« „

Carbon reiiitor

1/BW

12.7K 2%

Carbon resistor

1/BW 21K 2%

VariaWeresislcr

Capacita (Electrolvticl

IDOyf IOV-8lV-2(Bi

Capacitor

2;op= 50V ro-.

Diode. DS1588L1
Thc-mistct I160K)

LSI

LSI tCPU-1). SC43177

1 ^1

Lol lul

IC, TC401 1UB&

IC, 1

IC.

l

IC. TC4069P

LSI (Ram)

Sdirl resitTor

I/8W 1 6Mohm 9fe

Carbon

1/BW lOOo-vn

Carbon resistor

1/BW

Caroon resistor

1/8W 10K 5%

Carbon resistor

1/8W ICOK 5%

Carbon resistor

1/8W IMohm

Carbon Resiitot

1/8W

Carbon resistor

1/8W 4

{Cersmicl

(Display

nni 1 11

J

U-^l,

040191*

TC4066P

resltlor

22K S%

4.7K 5*

70K 5%

(250X1

TC43I2S

OltW

PTAMTO

jO*»JI /O

6%

5%

AM0&84CBB

RR-DZI007CCZZ

AN03O8CBB RR-DZ1008CCZZ

AP7105

ACC105ZJCP

ACC221KJCP

ADX1405

AT-1218

AXX-3032

AXX-3033
AXX-3034

AMX-4439
AMX-444Q

AMX-4441

AMX-4442

AXX

3035

AN0536EBB

RVR-MB510QCZZ

VCEAA1I1AW107O

VCKVPU1HB221K

VHDDS1588L1

VHHISaRD-SM

VHiSC*3125/
VHJSC43177/

VHtSC43 1 /8/-1

VH.TC4011UBP1

VHiTC401

VHJ7C4066P/-1
VHiTC40S9P/-l

VMJTC5514P/1

VRC-MT26G165J

9P/-1

AN0132EBB VPDST2BY101J

AN031IE6B

AN0281

EBB

VPD S12BY223J

VRDST2BY103J

AN0371EBB VRO ST2BY104J

AN0445EBB

VRD-S72BY105J

AN0247EBB VRD ST2BY472J

AN0423EBB VPO-ST?BY474J

1

1

1

29

Rpf

v-

Description

Transistor 2SC4S8KS AA2SC458KS

MOS FET 2SJ40

Cacaciiot

O.laF

Crvti4l (256

Capacitor

lOOpF

Capacitor

lOOOOpF

Capacitor (Tintiiuml

1/tF 10V

Carbon

(T;m&Jurnt

10V +80/-2O%

kH-|

(Tantalum)

ilOW

50V

{Tantalum)

:20%

25V

+8Q/-2Q*.

resistor

RS Manufacture-

Location Part Number

AMX-4443 VS2SJ4 0-///-1

ACC104ZCTP

AMX.2780 RC^SPI0?4CC7Z

ACClOIKJCP

ACC103MFTM

ACC105ZCTP

AN0396EBB

1/8W 220K 5%

Capacitor (Cframicl

lOOOpF

50V

il(Wt

ACC102KJCP

VS2SC458KS/I

RC.?7inOBCCZZ

VCKYPU1HB10IK

VCTYPU1EX103M

RC-SZ1Q07CCZZ

VRD-ST2BV224J

VCKYPU1HB102K

-)

30

EXPLODED V I EWC

26-3501)

r

«*,

31

1

10. PARTS

Ret.

No.

1

2
3

4 Battary lid
5

6

7 Connector

a

9

10

1

12
13

14 fop pohnei

Bottom cabinet

Special screw (M2 >

Rubber foot

Screw (M2 x

Plug

with wire*

ScriwlM2x5»

HoU«»

Battery letmlnaH-J

Battery

Decoration

Oecoratiori panel B

Capacitor (Electrolytic)

10»P

Capacitor (Mylar)

O.C047,mF

Capacitor (MylaO

0.047iiF 50V

Capacitor

0.01/*F

Capacitor

O.lMF

D,ode.D$1588L1

Relay AB-8127

IC,TC4069P

(C, TC4G26BP

Carbon iesi si

1/8W 10K 6%

Carbon resistor

1/8W lOOK

1

Carbon remittor

1/8W 1Mohm

Carbon remittor

1/SW 1BK 5%

Carbon iciiitoi

1/BW 22K

i

-

CaiDon resistor

1/6W 270 ohm

Carbon

l/BW 470K b%

LIST FOR 26-3503

Dctuitxivii

8) AHD-159? LX-BZ1038CCZZ

01 AMD-

(9 pin)

lock Dlaie

*b<

termmaH+!

panel A ART-2992

iGv+ao7-2o%

50V 110%

+10%

(Tantill

25V ±20%

(Tinuil

J20*

12V

>

5*

5%

6%

6*

resistor

RS

Location

Wan:ifartu'er

Pari Number

AZ5637 GCABA2389CCZZ

AF-0?<U fil Ffif. 101 7C.C77

ADB036C GFTAB1247CC2Z

1593 XTC3D20PGCO0O

AW-2523 QPLGJ1008CCZZ

AJ-HM3 qcncmuwcuqi

AHD 1594 XTBSD20P0500O

LHLOZ1 153CCZZ

AHB-9962

AHB-9963

QTANZ1266CCZZ

QTANZ1072CCZZ
HDECA1775CCZZ

AR1 -P993 HDfCA177€CC7?

A25G39 GCABB2300CCZZ

ACC106ZDAP

ACC4/2KJMP

ACC473KJMP

ACC103MFTP

VCEAAUICW 106G

VCQYKU1HM472K

VCQYKU1HM473K

VCTYPU1EX103M

ACC104MD1P VCTYPUINXICMM

ADX-1405

VHDDS1589L1

VH.N R57 11 //-I

AMX-4442 VHiTC4069P,'

AMX4444 VMiTC4528BP-1

AN0281EBB VROST2BY103J

AN0371EB8 VRD-ST2BY104J

AN0445E8B
AN0303EBB VRD ST2BY183J

VH D-ST2BY105J

AN03HEBB VRD-5T2BY223J

AN0155EBB

AN0423EBB

VRD-ST2BY271J

VRD-ST2BY474J

*)

1

1

32

Re'

NO.

Description

Carton resistor

1«VI

550K 5%

resistor

Carton

l.'4W 33

Transiitor
T.arwiitor 7SC453KS AA2SC458KS

oft

m 5%

2SA733 AA2SA733

RS

Location

ANCM29EB9

AN0Q87EEB

Manjfaclurei

Part Number

VRD-ST2BY564J

VRD-ST2EY330J

VS2SA733-/M
VS2SC458KSM

33

EXPLODED

V I

EWr

26-3503;

34