Quectel AG521R-NA User Manual

AG521R-NA QuecOpen
Hardware Design
Automotive Module Series
Version: 1.0.0
Date: 2021-01-26
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Quectel Wireless Solutions Co., Ltd.
Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com
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General Notes
Quectel offers the information as a service to its customers. The information provided is based upon customers’ requirements. Quectel makes every effort to ensure the quality of the information it makes available. Quectel does not make any warranty as to the information contained herein, and does not accept any liability for any injury, loss or damage of any kind incurred by use of or reliance upon the information. All information supplied herein is subject to change without prior notice.
Disclaimer
While Quectel has made efforts to ensure that the functions and features under development are free from errors, it is possible that these functions and features could contain errors, inaccuracies and omissions. Unless otherwise provided by valid agreement, Quectel makes no warranties of any kind, implied or express, with respect to the use of features and functions under development. To the maximum extent permitted by law, Quectel excludes all liability for any loss or damage suffered in connection with the use of the functions and features under development, regardless of whether such loss or damage may have been foreseeable.
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Copyright
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The information contained here is proprietary technical information of Quectel Wireless Solutions Co., Ltd. Transmitting, reproducing, disseminating and editing this document as well as using the content without permission are forbidden. Offenders will be held liable for payment of damages. All rights are reserved in the event of a patent grant or registration of a utility model or design.
Copyright © Quectel Wireless Solutions Co., Ltd. 2020. All rights reserved.
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About the Document
Revision History
Version
Date
Author
Description
-
2020-04-04
Leon HUANG/ Alex ZHANG/ Evan SHEN/
Creation of the document
1.0
2021-01-26
Charlie Bao/ Jacky CHEN/ Evan SHEN
Preliminary
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Contents
About the Document ................................................................................................................................................... 3
Contents ....................................................................................................................................................................... 4
Table Index .................................................................................................................................................................. 6
Figure Index ................................................................................................................................................................ 8
1 Introduction ...................................................................................................................................................... 10
1.1. Safety Information .................................................................................................................................. 11
2 Product Concept ............................................................................................................................................... 12
2.1. General Description ................................................................................................................................ 12
2.2. Key Features ........................................................................................................................................... 13
2.3. Functional Diagram ................................................................................................................................ 15
2.4. Evaluation Board .................................................................................................................................... 16
3 Application Interfaces ...................................................................................................................................... 17
3.1. General Description ................................................................................................................................ 17
3.2. Pin Assignment ....................................................................................................................................... 18
3.3. Pin Description ....................................................................................................................................... 19
3.4. Operating Modes .................................................................................................................................... 35
3.5. Power Saving .......................................................................................................................................... 35
3.5.1. Sleep Mode ................................................................................................................................. 35
3.5.1.1. USB Application with USB Remote Wakeup Function .................................................. 36
3.5.1.2. USB Application without USB Remote Wakeup Function ............................................. 36
3.5.1.3. USB Application without USB Suspend Function.......................................................... 37
3.5.2. Airplane Mode ............................................................................................................................ 38
3.6. Power Supply .......................................................................................................................................... 38
3.6.1. Power Supply Pins ...................................................................................................................... 38
3.6.2. Decrease Voltage Drop................................................................................................................ 39
3.6.3. Reference Design for Power Supply ........................................................................................... 40
3.6.4. Monitor the Power Supply .......................................................................................................... 40
3.7. Power on and off Scenarios .................................................................................................................... 40
3.7.1. Turn on Module with PWRKEY ................................................................................................ 40
3.7.2. Turn on Module with PON_1 ..................................................................................................... 42
3.7.3. Turn off Module .......................................................................................................................... 43
3.7.3.1. Turn off Module Using PWRKEY ................................................................................. 43
3.7.3.2. Turn off Module Using API Interface ............................................................................. 44
3.8. Reset the Module .................................................................................................................................... 44
3.9. (U)SIM Interfaces ................................................................................................................................... 46
3.10. USB Interfaces ........................................................................................................................................ 48
3.11. UART Interfaces ..................................................................................................................................... 50
3.12. I2S and I2C Interfaces ............................................................................................................................ 52
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3.13. SDIO Interface ........................................................................................................................................ 53
3.14. SPI Interfaces .......................................................................................................................................... 56
3.15. RGMII Interface ..................................................................................................................................... 57
3.16. WLAN and BT Interfaces* ..................................................................................................................... 60
3.17. ADC Interfaces ....................................................................................................................................... 63
3.18. USB_BOOT Interface ............................................................................................................................. 64
3.19. GPIO Interfaces ...................................................................................................................................... 64
4 Antenna Interfaces............................................................................................................................................ 66
4.1. Main/Rx-diversity Antenna Interface ..................................................................................................... 66
4.1.1. Pin Definition .............................................................................................................................. 66
4.1.2. Operating Frequency ................................................................................................................... 66
4.1.3. Reference Design of RF Antenna Interfaces ............................................................................... 67
4.1.4. Reference Design of RF Layout ................................................................................................. 68
4.2. Antenna Installation ................................................................................................................................ 70
4.2.1. Antenna Requirements ................................................................................................................ 70
4.2.2. Recommended RF Connector for Antenna Installation .............................................................. 71
5 Reliability, Radio and Electrical Characteristics ........................................................................................... 72
5.1. Absolute Maximum Ratings ................................................................................................................... 72
5.2. Power Supply Ratings ............................................................................................................................. 72
5.3. Operation and Storage Temperatures ...................................................................................................... 73
5.4. Current Consumption .............................................................................................................................. 73
5.5. RF Output Power .................................................................................................................................... 75
5.6. RF Receiving Sensitivity ........................................................................................................................ 76
5.7. Electrostatic Discharge ........................................................................................................................... 77
5.8. Thermal Consideration ........................................................................................................................... 77
6 Mechanical Dimensions .................................................................................................................................... 80
6.1. Mechanical Dimensions .......................................................................................................................... 80
6.2. Recommended Footprint ........................................................................................................................ 82
6.3. Top and Bottom Views............................................................................................................................ 83
7 Storage, Manufacturing and Packaging ......................................................................................................... 84
7.1. Storage .................................................................................................................................................... 84
7.2. Manufacturing and Soldering ................................................................................................................. 85
7.3. Packaging ................................................................................................................................................ 86
8 Appendix A References .................................................................................................................................... 88
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Table Index
Table 1: Frequency Bands of AG521R-NA QuecOpen® Module .............................................................................. 12
Table 2: Key Features ................................................................................................................................................ 13
Table 3: I/O Parameters Definition ............................................................................................................................ 19
Table 4: Pin Description ............................................................................................................................................ 20
Table 5: Alternate Functions of Multiplexing Pins .................................................................................................... 31
Table 6: Overview of Operating Modes .................................................................................................................... 35
Table 7: VBAT and GND Pins ................................................................................................................................... 38
Table 8: PWRKEY Pin Description ........................................................................................................................... 40
Table 9: PON_1 Pin Description ............................................................................................................................... 42
Table 10: RESET Pin Description ............................................................................................................................. 44
Table 11: Pin Definition of (U)SIM Interface ............................................................................................................ 46
Table 12: Pin Description of USB Interface .............................................................................................................. 48
Table 13: Pin Definition of UART1 Interface ............................................................................................................ 50
Table 14: Pin Definition of BT UART Interface ........................................................................................................ 50
Table 15: Pin Definition of Debug UART Interface .................................................................................................. 51
Table 16: Logic Levels of Digital I/O ........................................................................................................................ 51
Table 17: Pin Definition of I2S Interface ................................................................................................................... 52
Table 18: Pin Definition of I2C Interface .................................................................................................................. 53
Table 19: Pin Definition of SDIO Interface ............................................................................................................... 53
Table 20: Pin Definition of SPI Interfaces ................................................................................................................. 56
Table 21: Parameters of SPI Interface Timing ........................................................................................................... 56
Table 22: Pin Definition of RGMII Interface ............................................................................................................ 57
Table 23: Pin Definition of WLAN and BT Interfaces .............................................................................................. 60
Table 24: Pin Definition of ADC Interfaces .............................................................................................................. 63
Table 25: Characteristic of ADC Interface................................................................................................................. 63
Table 26: Pin Definition of USB_BOOT Interface .................................................................................................... 64
Table 27: Pin Definition of GPIOs ............................................................................................................................ 65
Table 28: Pin Definition of Main/Rx-diversity Antenna Interfaces ........................................................................... 66
Table 29: Module Operating Frequencies .................................................................................................................. 66
Table 30: Antenna Requirements ............................................................................................................................... 70
Table 31: Absolute Maximum Ratings ...................................................................................................................... 72
Table 32: Power Supply Ratings ................................................................................................................................ 72
Table 33: Operation and Storage Temperatures ......................................................................................................... 73
Table 34: Module Current Consumption (25 °C, 3.8 V Power Supply) .................................................................... 74
Table 35: RF Output Power ....................................................................................................................................... 75
Table 36: RF Receiving Sensitivity (Unit: dBm) ....................................................................................................... 76
Table 37: Electrostatic Discharge Characteristics ...................................................................................................... 77
Table 38: Recommended Thermal Profile Parameters .............................................................................................. 85
Table 39: Related Documents .................................................................................................................................... 88
Table 40: Terms and Abbreviations ........................................................................................................................... 88
Table 41: Description of Different Coding Schemes ................................................................................................. 91
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Table 42: GPRS Multi-slot Classes ........................................................................................................................... 91
Table 43: EDGE Modulation and Coding Schemes .................................................................................................. 91
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Figure Index
Figure 1: Functional Diagram for AG521R-NA QuecOpen® .................................................................................... 16
Figure 2: Pin Assignment (Top View) ....................................................................................................................... 18
Figure 3: Sleep Mode Current Consumption Diagram .............................................................................................. 36
Figure 4: Sleep Mode Application with USB Remote Wakeup ................................................................................. 36
Figure 5: Sleep Mode Application without USB Remote Wakeup ............................................................................ 37
Figure 6: Sleep Mode Application without Suspend Function .................................................................................. 38
Figure 7: Power Supply Limits during Burst Transmission ....................................................................................... 39
Figure 8: VBAT Reference Design ............................................................................................................................ 39
Figure 9: 12/24 V Power Supply System Reference Design ..................................................................................... 40
Figure 10: Turn on the Module Using Driving Circuit .............................................................................................. 41
Figure 11: Turn on the Module Using Keystroke ...................................................................................................... 41
Figure 12: Power-on Timing ...................................................................................................................................... 42
Figure 13: Turn on the Module using PON_1 ........................................................................................................... 43
Figure 14: Power-off Timing ..................................................................................................................................... 43
Figure 15: Reference Circuit of RESET by Using Driving Circuit ........................................................................... 45
Figure 16: Reference Circuit of RESET by Using Button ......................................................................................... 45
Figure 17: Timing of Resetting Module .................................................................................................................... 45
Figure 18: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector ...................................... 47
Figure 19: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector ........................................ 47
Figure 20: Reference Circuit of USB 2.0 Application ............................................................................................... 49
Figure 21: Reference Circuit of USB 3.0 Application ............................................................................................... 49
Figure 22: Reference Circuit with Translator Chip.................................................................................................... 51
Figure 23: Reference Circuit with Transistor Circuit ................................................................................................ 52
Figure 24: Reference Circuit of I2S and I2C Application with Audio Codec ........................................................... 53
Figure 25: Reference Design of SDIO Interface for eMMC Application .................................................................. 55
Figure 26: SPI Timing ............................................................................................................................................... 56
Figure 27: Simplified Block Diagram for Ethernet Application ................................................................................ 58
Figure 28: Reference Circuit of RGMII Interface with PHY Application ................................................................. 59
Figure 29: Reference Circuit for Connection with WLAN&BT PHY....................................................................... 62
Figure 30: Reference Circuit of USB_BOOT Interface............................................................................................. 64
Figure 31: Reference Circuit of RF Antenna Interfaces ............................................................................................ 68
Figure 32: Microstrip Design on a 2-layer PCB ........................................................................................................ 68
Figure 33: Coplanar Waveguide Design on a 2-layer PCB........................................................................................ 69
Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) ..................................... 69
Figure 35: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) ..................................... 69
Figure 36: Description of the HFM Connector .......................................................................................................... 71
Figure 37: Referenced Heatsink Design (Heatsink at the Top of the Module) .......................................................... 78
Figure 38: Referenced Heatsink Design (Heatsink at the Backside of Customers’ PCB) ......................................... 78
Figure 39: Module Top and Side Dimensions ........................................................................................................... 80
Figure 40: Module Bottom Dimensions (Top View) ................................................................................................. 81
Figure 41: Recommended Footprint (Top View) ....................................................................................................... 82
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Figure 42: Top View of the Module ........................................................................................................................... 83
Figure 43: Bottom View of the Module ..................................................................................................................... 83
Figure 44: Recommended Reflow Soldering Thermal Profile .................................................................................. 85
Figure 45: Tape Specifications .................................................................................................................................. 87
Figure 46: Reel Specifications ................................................................................................................................... 87
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1 Introduction
QuecOpen® is an application solution where the module acts as a main processor. With the development of communication technology and the ever-changing market demands, more and more customers have realized the advantages of QuecOpen® solution. Especially, its advantage in reducing the product cost is greatly valued by customers. With QuecOpen® solution, development flow for wireless application and hardware design will be simplified. Main features of QuecOpen® solution are listed below:
Simplifies the development of embedded applications, and shortens product development cycle Simplifies circuit design, and reduces product cost Decreases the size of terminal products Reduces power consumption Supports remote upgrade of firmware over the air Improves products’ cost-performance ratio, and enhances products’ competitiveness
This document, describing AG521R-NA QuecOpen® module and its air interface and hardware interfaces connected to your applications, informs you of the interface specifications, electrical and mechanical details, as well as other related information of the module.
With the application notes and user guides provided separately, you can easily use the module to design and set up mobile applications.
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1.1. Safety Information
The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers’ failure to comply with these precautions.
Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving.
Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft.
Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities.
Cellular terminals or mobiles operating over radio signal and cellular network cannot be guaranteed to connect in certain conditions, such as when the mobile bill is unpaid or the (U)SIM card is invalid. When emergent help is needed in such conditions, use emergency call if the device supports it. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. In an emergency, the device with emergency call function cannot be used as the only contact method considering network connection cannot be guaranteed under all circumstances.
The cellular terminal or mobile contains a transceiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV sets, radios, computers or other electric equipment.
In locations with explosive or potentially explosive atmospheres, obey all posted signs and turn off wireless devices such as mobile phone or other cellular terminals. Areas with explosive or potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, and areas where the air contains chemicals or particles such as grain, dust or metal powders.
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2 Product Concept
2.1. General Description
AG521R-NA QuecOpen module is a baseband processor platform based on ARM Cortex A7 kernel. The maximum dominant frequency is up to 1.497 GHz.
AG521R-NA QuecOpen module is a series of automotive-grade LTE-FDD/LTE-TDD/WCDMA/GSM wireless communication modules with receive diversity. It provides data connectivity on LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA, EDGE and GPRS networks. It also provides GNSS function (optional) and audio function to meet specific application demands.
AG521R-NA QuecOpen contains global main bands to meet varied market demands.
Engineered to meet the demanding requirements in automotive applications and other harsh operating conditions, the module offers a premium solution for high performance automotive and intelligent transportation system (ITS) applications, such as fleet management, onboard vehicle telematics, in-car entertainment systems, emergency calling, and roadside assistance.
With a compact profile of 38.0 mm × 42.0 mm × 2.65 mm, the module can meet almost all requirements for automobile applications. It is an SMD type module which can be embedded into applications through its 400 LGA pins.
Table 1: Frequency Bands of AG521R-NA QuecOpen® Module
Network Type
AG521R-NA QuecOpen Module
LTE-FDD (with Rx-diversity)
2 × 2 MIMO: B2/B4/B5/B7/B12/B13/B14/B25/B26/B29 1)/B66/B71
WCDMA (with Rx-diversity)
B2/B4/B5
GSM
No supported
GNSS
GPS, GLONASS, BeiDou, Galileo, QZSS
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1.
1)
LTE-FDD B29, B30 and B32 support Rx only.
2.2. Key Features
The following table describes detailed features of the module.
Table 2: Key Features
Feature
Details
Power Supply
VBAT_BB/VBAT_RF:
Supply voltage: 3.3–4.3 V Typical supply voltage: 3.8 V
Transmitting Power
Class 3 (24dBm +1/-3 dB) for WCDMA bands Class 3 (23 dBm ±2 dB) for LTE-FDD bands Class 3 (23 dBm ±2 dB) for LTE-TDD bands
LTE Features
Support up to 3 × CA Cat 12 LTE FDD and TDD Support 1.4/3/5/10/15/20 MHz RF bandwidth Support Multiuser 2 × 2 MIMO in DL direction FDD: Max 600 Mbps (DL)/100 Mbps (UL)
UMTS Features
Support 3GPP R8 DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA Support QPSK, 16-QAM and 64-QAM modulation DC-HSDPA: Max 42 Mbps (DL) HSUPA: Max 5.76 Mbps (UL) WCDMA: Max 384 kbps (DL)/384 kbps (UL)
Internet Protocol Features
Support TCP/UDP/PPP/FTP/HTTP/NTP/PING/QMI/HTTPS/
MMS/FTPS/SSL protocols
Support PAP and CHAP used for PPP connections
SMS
Text and PDU modes Point to point MO and MT SMS cell broadcast SMS storage: ME by default
(U)SIM Interfaces
Support USIM/SIM card: 1.8/3.0 V
Audio Features
Provide one digital audio interface: I2S interface GSM: HR/FR/EFR/AMR/AMR-WB WCDMA: AMR/AMR-WB
NOTE
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LTE: AMR/AMR-WB Support echo cancellation and noise suppression
I2S Interface
Used for external codec function
PCM Interface
Used for external BT function Support 16-bit linear data format Support long frame sync and short frame sync Support master and slave modes, but must be the master in long frame sync
USB Interfaces
USB 3.0 and 2.0 interfaces (slave mode by default; support USB master
mode), with maximum transmission rates up to 5 Gbps on USB 3.0 and 480 Mbps on USB 2.0
Used for AT command communication, data transmission, firmware
upgrade, software debugging, and voice over USB*
Support USB serial drivers for: Windows 7/8/8.1/10, Linux 2.6~5.4, and
Android 4.x/5.x/6.x/7.x/8.x/9.x
UART Interfaces
UART1:
Baud rate reach up to 921600 bps, 115200 bps by default Support RTS and CTS hardware flow control
BT UART:
Baud rate reach up to 921600 bps, 115200 bps by default Support RTS and CTS hardware flow control
Debug UART:
Used for Linux console and log output, 115200 bps baud rate
SDIO Interface
Support eMMC 4.5.1
SPI Interfaces
Support master mode only Maximum clock frequency rate: 50 MHz
I2C Interface
Compliant with I2C specification version 3.0 Multi-master is not supported Used for codec configuration by default
RGMII Interface
Support 10/100/1000 Mbps
Wireless Connectivity Interface*
PCIe (Gen2) interface for WLAN UART & PCM interfaces for Bluetooth*
Rx-diversity
Support LTE/WCDMA Rx-diversity
Antenna Interfaces
Main antenna interface (ANT_MAIN) Rx-diversity antenna interface (ANT_DIV) GNSS antenna interface (ANT_GNSS)
Physical Characteristics
Dimensions: (38.0 ±0.2) mm × (42.0 ±0.2) mm × (2.65 ±0.2) mm Weight: approx. 9.23 g
Temperature Range
Operation temperature range: -35 °C to +75 °C 1)
Extended temperature range: -40 °C to +85 °C
2)
eCall temperature range: -40 °C to +90 °C 3)
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Storage temperature range: -40 °C to +95 °C
Firmware Upgrade
USB 2.0 interface DFOTA
RoHS
All hardware components are fully compliant with EU RoHS directive
1. 1) Within operation temperature range, the module is 3GPP compliant, and emergency call can be dialed out
with a maximum power and data rate.
2. 2) Within extended temperature range, the module remains fully functional and retains the ability to establish
and maintain functions such as voice, SMS, data transmission and emergency call, without any unrecoverable malfunction. Radio spectrum and radio network will not be influenced, while one or more specifications, such as P
out
, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature
returns to the normal operating temperature level, the module will meet 3GPP specifications again.
3. 3) Within eCall temperature range, the emergency call function must be functional until the module is broken.
When the ambient temperature is between 75 °C and 90 °C and the module temperature has reached the threshold value, the module will trigger protective measures (such as reduce power, decrease throughput and unregister the device) to ensure the full function of emergency call.
4. “*” means under development.
2.3. Functional Diagram
The following figure shows a block diagram of the module and illustrates the major functional parts.
Power management Baseband LPDDR4X + NAND flash Radio frequency Peripheral interfaces
NOTES
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Baseband
PMIC
Transceiver
NAND
LPDDR4
ANT_GNSS
VBAT_BB
PWRKEY
ADCx2
VREG_UIM1
RESET_N
38.4M XO
Control
Control
L2&L5
SAW
QLINK
Audio
SPKs MICs PCM PCIeUSB2.0&3.0 SPIx2 UARTx2 I2Cx2 SDIORGMII (U)SIMx2GPIOsI2S
VREG_UIM2
VDD_EXT
NET_STATUS
LED
DRx
SAWs
MMPA
QLNA*2
DP12T
Diplexer
Duplexers, SAWs
and Qualplexers
2G PA+DP16T
Diplexer
QLNA*2
...
...
...
...
...
...
L1
SAW
Diplexer
ANT_DIV
...
ANT_MAIN
VBAT_RF
APT or ET
Figure 1: Functional Diagram for AG521R-NA QuecOpen®
2.4. Evaluation Board
To help you develop applications conveniently with the module, Quectel supplies the evaluation board (EVB), USB data cables, a pair of earphones, antennas and other peripherals to control or test the module. For more details, see document [1].
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3 Application Interfaces
3.1. General Description
The module is designed with 400 LGA pins that can be connected to cellular application platforms. Module interfaces are described in detail in the following sub-chapters:
Power supply (U)SIM interfaces USB 2.0/3.0 interface UART interfaces I2S and I2C interfaces SDIO interface SPI interfaces RGMII interface WLAN and BT interfaces* ADC interfaces USB_BOOT interface GPIO interfaces
“*” means under development.
NOTE
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3.2. Pin Assignment
Power Pins
GND Pins RESVRVED Pins
PCIe Pins
I2S Pins
(U)SIM Pins
USB Pins
SPI Pins
SDIO Pins RGMII Pins
306
305
304
303
302
301
300
299
298
297
296
295
294
293
292
291
290
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
196
RESERVED
RESERVED
193
190
RESERVED
184
RESERVED
187
IMU_INT2
181
IMU_PWR_EN
178
RESERVED
175
RESERVED
172
GND
169
IMU_INT1
166
RESERVED
163
RESERVED
160
GND
157
RESERVED
154
RESERVED
151
GND
148
GND
145
GND
142
RESERVED
139
RESERVED
138
GND
137
GND
141
GND
140
GND
144
GND
143
ANT_MAIN
147
GND
146
GND
150
GND
149
GND
153
GND
152
RESERVED
156
GND
155
GND
159
GND
158
GND
161
RESERVED
162
GND
164
GND
165
GND
167
GND
168
GND
171
GND
170
ANT_DIV
GND
174
173
GND
176
GND
177
GND
179
GND
RESERVED
180
GND
182
GND
182
183
GND
185
GND
186
188
RESERVED
GND
189
191
GND
192
GND
194
GND
195
GND
198
GND
197
RESERVED
199
GND
200
RESERVED
201
GND
202
GND
203
GND
204
RESERVED
205
RESERVED
206
RESERVED
GND
207
208
GND
209
GND
210
SPI1_MOSI
211
GND
212
GND
213
SPI1_CS
214
GND
GND
215
GND
216
SPI1_CLK
217
GND
218
GND
219
SPI1_MISO
220
GND
221
GND
222
WLAN_PWR_EN1
223
RESERVED
224
RESERVED
225
WLAN_PWR_EN2
226
RESERVED
227
RESERVED
228
WLEN_EN
229
RESERVED
230
GND
231
WLAN_SLP_CLK
232
GND
GND
233
234
GND
GND
235
RESERVED
236
RESERVED
237
GND
GND
238
RESERVED
239
RESERVED
240
GND
241
VBAT_BB
242
VBAT_BB
243
GPIO6
244
VBAT_BB
245
ADC1
246
GPIO7
246
247
ADC0
248
PON_1
249
GPIO8
250
USIM1_RST
251
USIM1_VDD
252
RESERVED
253
USIM1_CLK
254
USIM1_DATA
255
USIM1_DET
258
USIM2_DET
257
USIM2_DATA
256
USIM2_VDD
259
USIM2_CLK
260
USIM2_RST
261
I2S_DOUT
262
I2S_SCK
263
I2S_DIN
264
RESERVED
265
I2S_WS
266
RESERVED
267
RESERVED
268
RESERVED
269
RESERVED
270
RESERVED
271
RESERVED
272
RESERVED
1
RESERVED
2
RESERVED
3
RESERVED
4
RESERVED
RESERVED5RESERVED
6
RESERVED
9
RESERVED
8
RESET
7
PWRKEY
10
RGMII_MD_IO
11
RGMII_MD_CLK
12
GND
13
RGMII_RX_0RGMII_RX_0
14
RGMII_RX_1
15
RGMII_CTL_RX
RGMII_RX_1
16
RGMII_RX_2
17
RGMII_RX_3
18
GND
19
RGMII_CK_RX
20
RGMII_TX_0
21
RGMII_CTL_TX
22
RGMII_TX_1
23
RGMII_TX_2
24
RGMII_CK_TX
25
RGMII_TX_3
GND
26
GND
27
RGMII_PWR_EN
28
RGMII_PWR_IN
29
RGMII_INT
30
PCIE_WAKE
31
RGMII_RSTRGMII_RST
32
PCIE_RX_M
33
GND
34
PCIE_RX_P
35
RESERVED
36
PCIE_CLKREQ
37
RESERVED
38
PCIE_REFCLK_M
39
PCIE_RST
40
PCIE_REFCLK_M
41
RESERVED
42
GND
43
RESERVED
44
PCIE_TX_M
45
EMMC_PWR_EN
46
PCIE_TX_P
47
SDC1_CLK47SDC1_CLK
48
SDC1_CMD
49
SDC1_DATA_0
50
SDC1_DATA_1
51
SDC1_DATA_2
52
SDC1_DATA_3
53
SDC1_DATA_4
54
EMMC_RST
55
SDC1_DATA_558SDC1_DATA_7
56
SDC1_DATA_6
57
RESERVED
59
BT_UART_TXD
60
SDIO_VDD
61
BT_UART_RTS61BT_UART_RTS
63
BT_UART_RXD
62
BT_UART_CTS
65
RESERVED
64
RESERVED
66
BT_EN
67
COEX_UART_RXD
68
VDD_EXT
69
COEX_UART_TXD
70
UART1_TXD
71
UART1_CTS
72
UART1_RXD
73
PCM_SYNC
74
UART1_RTS
75
PCM_CLK
76
PCM_IN
78
PCM_OUT
77
CDC_RST
79
I2C1_SCL
80
I2C1_SDA
81
I2S_MCLK
82
RESERVED
83
USB_BOOT
84
USB_VBUS
85
USB_DP
86
GND
87
USB_DM
88
USB_SS_RX_M
89
RESERVED
90
USB_SS_RX_P
91
USB_SS_TX_M
92
GND
93
USB_SS_TX_P
94
RESERVED
95
DR_SYNC
96
RESERVED
97
RESERVED
98
GND
99
RESERVED
100
GPIO1
101
GPIO2
102
GPIO3
103
RESERVED
104
GPIO4
103
105
RESERVED
106
RESERVED
107
DBG_TXD
108
RESERVED
109
VBAT_RF
110
DBG_RXD
111
VBAT_RF
112
VBAT_RF
113
RESERVED
114
VBAT_RF
115
GND
115
GND
116
GPIO5
117
GND
118
GND
119
RESERVED
120
GND
121
GND
122
RESERVED
123
RESERVED
124
GND
125
GND
126
GND
127
GND
128
GND
129
GND
130
GND
131
GND
132
RESERVED
133
GND
134
GND
135
GND
136
RESERVED
273
RESERVED
275
RESERVED
274
RESERVED
276
VDD_WIFI_VM
277
VDD_WIFI_VH
278
RESERVED
279
RESERVED
280
RESERVED
281
RESERVED
282
RESERVED
283
RESERVEDRESERVED
284
RESERVEDRESERVED
285
RESERVEDRESERVED
286
RESERVED
287
RESERVEDRESERVED
288
RESERVED
289
RESERVED
398
GND
397
GND
400
GND
GND
399
GND
307
GND
308
GND
309
GND
310
GND
311
GND
312
GND
313
GND
314
GND
315
GND
GND
324
GND
323
GND
322
GND
321
GND
320
GND
319
GND
318
GND
317
GND
316
GND
326
GND
325
GND
327
GND
328
GND
329
GND
330
GND
331
GND
332
GND
333
GND
334
GND
335
GND
336
GND
337
GND
338
GND
339
GND
340
GND
341
GND
342
GND
344
GND
343
GND
345
GND
346
GND
347
GND
348
GND
349
GND
350
GND
351
GND
352
GND
353
GND
354
GND
355
GND
356
GND
357
GND
358
GND
359
GND
360
GND
361
GND
362
GND
363
GND
364
GND
365
GND
366
GND
367
GND
368
GND
369
GND
370
GND
371
GND
372
GND
373
GND
374
GND
375
GND
376
GND
377
GND
378
GND
379
GND
380
GND
381
GND
382
GND
383
GND
384
GND
385
GND
386
GND
387
GND
388
GND
389
GND
390
GND
391
GND
392
GND
393
GND
394
GND
395
GND
396
Figure 2: Pin Assignment (Top View)
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1. Keep all RESERVED pins and unused pins unconnected.
2. GND pins should be connected to ground in the design.
3.3. Pin Description
The following tables show the pin definition of the module and the alternate functions of multiplexing pins.
Table 3: I/O Parameters Definition
Type
Description
AI
Analog input
AO
Analog output
B
Bidirectional digital with CMOS input
DI
Digital input
DO
Digital output
H
High level
IO
Bidirectional
L
Low level
OD
Open drain
PD
Pull down
PI
Power input
PO
Power output
PU
Pull up
R
Slew-rate limited
S
Schmitt trigger input
NOTES
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Table 4: Pin Description
Power Supply
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
VBAT_BB
241, 242, 244
PI
Power supply for the module’s baseband part
Vmax = 4.3 V Vmin = 3.3 V Vnorm = 3.8 V
It must be provided with sufficient current up to 0.8 A.
VBAT_RF
109, 111, 112, 114 235, 236 238, 239
PI
Power supply for the module’s RF part
Vmax = 4.3 V Vmin = 3.3 V Vnorm = 3.8 V
It must be provided with sufficient current up to 2 A.
VDD_EXT
68
PO
1.8 V output power supply for external circuits
Vnorm = 1.8 V IOmax = 50 mA
Power supply for
external GPIO’s pull up
circuits.
LDO_2P7
57
PO
Output power supply for SD card
Vnorm = 2.95 V
If unused, keep it open.
VDD_WIFI_V M
276
PO
Power supply for Wi-Fi
Vnorm = 1.35 V
If unused, keep it open.
VDD_WIFI_VH
277
PO
Power supply for Wi-Fi
Vnorm = 1.95 V
If unused, keep it open.
GND
12, 18, 26, 33, 42, 86, 92, 98, 115, 117, 118, 120, 121, 124–131, 133–135, 137, 138, 140, 141, 144–151, 153, 155, 156, 158, 159, 160, 162, 164, 165, 167, 168, 171–174, 176, 177, 180, 182, 183, 185, 186, 189, 191, 192, 194, 195, 198, 199, 201–203, 206, 208, 209, 211, 212, 215, 217, 218, 220, 221, 230, 232, 233, 234, 237, 240, 307–400
Turn on/off
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
PWRKEY
7
DI
Turn on/off the module
VIHmax = 1.89 V VIHmin = 1.17 V VILmax = 0.63 V
Internally pulled up to
1.8 V. Active low.
PON_1
248
DI
Pulling it high will turn on the module automatically
Valid trigger range:
0.78–1.89 V. Active high
RESET
8
DI
Reset the module
VIHmax = 1.89 V VIHmin = 1.17 V VILmax = 0.63 V
Internally pulled up to
1.8 V. Active low.
(U)SIM Interfaces
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
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USIM1_VDD
251
PO
(U)SIM1 card power supply
IOmax = 50 mA For
1.8 V (U)SIM:
Vmax = 1.9 V Vmin = 1.7 V
For 3.0 V (U)SIM:
Vmax = 3.05 V Vmin = 2.7 V
Either 1.8 V or 3.0 V is supported by the module automatically. If unused, keep it open.
USIM1_DATA
254
IO
(U)SIM1 card data
For 1.8 V (U)SIM: VILmax = 0.36 V VIHmin = 1.26 V VOLmax = 0.4 V VOHmin = 1.44 V
For 3.0 V (U)SIM:
VILmax = 0.57 V VIHmin = 2.0 V VOLmax = 0.4 V VOHmin = 2.28 V
If unused, keep it open.
USIM1_CLK
253
DO
(U)SIM1 card clock
For 1.8 V (U)SIM:
VOLmax = 0.4 V VOHmin = 1.44 V
For 3.0 V (U)SIM:
VOLmax = 0.4 V VOHmin = 2.28 V
If unused, keep it open.
USIM1_RST
250
DO
(U)SIM1 card reset
For 1.8 V (U)SIM:
VOLmax = 0.4 V VOHmin = 1.44 V
For 3.0 V (U)SIM:
VOLmax = 0.4 V VOHmin = 2.28 V
If unused, keep it open. USIM1_DET
255
DI
(U)SIM1 card hot-plug detect
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
1.8 V power domain. If unused, keep it open.
USIM2_VDD
256
PO
(U)SIM2 card power supply
For 1.8 V (U)SIM:
Vmax = 1.9 V Vmin = 1.7 V
For 3.0 V (U)SIM:
Vmax = 3.05 V Vmin = 2.7 V
Either 1.8 V or 3.0 V is supported by the module automatically. If unused, keep it open.
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IOmax = 50 mA
USIM2_DATA
257
IO
(U)SIM2 card data
For 1.8 V (U)SIM: VILmax = 0.36 V VIHmin = 1.26 V VOLmax = 0.4 V VOHmin = 1.44 V
For 3.0 V (U)SIM:
VILmax = 0.57 V VIHmin = 2.0 V VOLmax = 0.4 V VOHmin = 2.28 V
If unused, keep it open.
USIM2_CLK
259
DO
(U)SIM2 card clock
For 1.8 V (U)SIM:
VOLmax = 0.4 V VOHmin = 1.44 V
For 3.0 V (U)SIM:
VOLmax = 0.4 V VOHmin = 2.28 V
If unused, keep it open.
USIM2_RST
260
DO
(U)SIM2 card reset
For 1.8 V (U)SIM:
VOLmax = 0.4 V VOHmin = 1.44 V
For 3.0 V (U)SIM:
VOLmax = 0.4 V VOHmin = 2.28 V
If unused, keep it open. USIM2_DET
258
DI
(U)SIM2 card hot-plug detect
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
1.8 V power domain. If unused, keep it open.
USB Interfaces
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
USB_VBUS
84
DI
USB connection detect
Vmax = 5.25 V Vmin = 3.0 V Vnorm = 5.0 V
USB_DP
85
AI/ AO
USB differential data bus (+)
Compliant with USB
2.0 standard specification. Require differential impedance of 90 Ω.
USB_DM
87
AI/ AO
USB differential data bus (-)
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USB_SS_TX_P
93
AO
USB 3.0 super-speed transmit (+)
Compliant with USB
3.0 standard specification. Require differential impedance of 90 Ω.
USB_SS_TX_M
91
AO
USB 3.0 super-speed transmit (-)
USB_SS_RX_P
90
AI
USB 3.0 super-speed receive (+)
USB_SS_RX_M
88
AI
USB 3.0 super-speed receive (-)
GPIO Interfaces
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
GPIO1
100
IO
General-purpose input/output
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V VOLmax = 0.45 V VOHmin = 1.35 V
1.8 V power domain. If unused, keep them open.
GPIO2
101
IO
General-purpose input/output
GPIO3
102
IO
General-purpose input/output
GPIO4
104
IO
General-purpose input/output
GPIO5
116
IO
General-purpose input/output
GPIO6
243
IO
General-purpose input/output
GPIO7
246
IO
General-purpose input/output
GPIO8
249
DO
General-purpose output
VILmin = TBD VILmax = 0.63 V VIHmin = 0.9 V VIHmax = TBD VOLmax = 0.36 V VOHmin = 1.44 V
UART1 Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
UART1_CTS
71
DO
UART1 clear to send
VOLmax = 0.45 V VOHmin = 1.35 V
1.8 V power domain. Can be configured to GPIOs. If unused, keep them open.
UART1_RTS
74
DI
UART1 request to send
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
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UART1_TXD
70
DO
UART1 transmit
VOLmax = 0.45 V VOHmin = 1.35 V
UART1_RXD
72
DI
UART1 receive
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
BT UART Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
BT_UART_TXD
59
DO
BT UART transmit
VOLmax = 0.45 V VOHmin = 1.35 V
1.8 V power domain. Can be configured to GPIO. If unused, keep them open.
BT_UART_RXD
63
DI
BT UART receive
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
BT_UART_RTS
61
DI
BT UART request to send
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
BT_UART_CTS
62
DO
BT UART clear to send
VOLmax = 0.45 V VOHmin = 1.35 V
Debug UART Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
DBG_RXD
110
DI
Debug UART receive
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
1.8 V power domain.
DBG_TXD
107
DO
Debug UART transmit
VOLmax = 0.45 V VOHmin = 1.35 V
I2C1 Interface (for Codec Configuration by Default)
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
I2C1_SCL
79
OD
I2C1 serial clock
External pull-up resistor is required.
1.8 V only. Can be configured to GPIO. If unused, keep them open.
I2C1_SDA
80
OD
I2C1 serial data
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I2S Interface (for Codec Configuration by Default)
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
CDC_RST
77
DO
Codec reset
VOLmax = 0.45 V VOHmin = 1.35 V
1.8 V power domain. Can be configured to GPIO. If unused, keep them open.
I2S_MCLK
81
DO
Clock output for codec
VOLmax = 0.45 V VOHmin = 1.35 V
I2S_WS
265
IO
I2S word select
VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
I2S_SCK
262
DO
I2S clock
VOLmax = 0.45 V VOHmin = 1.35 V
I2S_DIN
263
DI
I2S data in
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
I2S_DOUT
261
DO
I2S data out
VOLmax = 0.45 V VOHmin = 1.35 V
PCM Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
PCM_SYNC
73
IO
PCM data frame sync
VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
1.8 V power domain. Can be configured to GPIO. If unused, keep them open.
PCM_CLK
75
IO
PCM clock
VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
PCM_IN
76
DI
PCM data input
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
PCM_OUT
78
DO
PCM data output
VOLmax = 0.45 V VOHmin = 1.35 V
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PCIe Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
PCIE_REFCLK_ P
40
AO
PCIe reference clock (+)
Require differential impedance of 95 Ω. If unused, keep them open.
PCIE_REFCLK_ M
38
AO
PCIe reference clock (-)
PCIE_TX_M
44
AO
PCIe transmit (-)
PCIE_TX_P
46
AO
PCIe transmit (+)
PCIE_RX_M
32
AI
PCIe receive (-)
PCIE_RX_P
34
AI
PCIe receive (+)
PCIE_CLKREQ
36
IO
PCIe clock request
VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
1.8 V power domain If unused, keep them open.
PCIE_RST
39
DO
PCIe reset
VOLmax = 0.45 V VOHmin = 1.35 V
PCIE_WAKE
30
DI
PCIe wakeup
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
RGMII Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
RGMII_MD_IO
10
IO
RGMII MDIO management data
Power domain determined by RGMII_PWR_IN
If unused, keep them open.
RGMII_MD_ CLK
11
DO
RGMII MDC management clock
RGMII_RX_0
13
DI
RGMII receive data bit 0
RGMII_RX_1
14
DI
RGMII receive data bit 1
RGMII_CTL_RX
15
DI
RGMII receive control
RGMII_RX_2
16
DI
RGMII receive data bit 2
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RGMII_RX_3
17
DI
RGMII receive data bit 3
RGMII_CK_RX
19
DI
RGMII receive clock
RGMII_TX_0
20
DO
RGMII transmit data bit 0
RGMII_CTL_TX
21
DO
RGMII transmit control
RGMII_TX_1
22
DO
RGMII transmit data bit 1
RGMII_TX_2
23
DO
RGMII transmit data bit 2
RGMII_CK_TX
24
DO
RGMII transmit clock
RGMII_TX_3
25
DO
RGMII transmit data bit 3
RGMII_PWR_ EN
27
DO
Enable external LDO to supply power to RGMII_PWR_IN
VOLmax = 0.45 V VOHmin = 1.35 V
1.8 V power domain. If unused, keep it open.
RGMII_PWR_IN
28
PI
Power input for internal RGMII circuit
1.8/2.5 V power supply input. If RGMII is not be used, connect it to VDD_EXT.
RGMII_INT
29
DI
RGMII PHY interrupt output
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
1.8 V power domain. If unused, keep them open. RGMII_RST
31
DO
Reset output for RGMII PHY
VOLmax = 0.45 V VOHmin = 1.35 V
SDIO Interface (for eMMC by default)
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
SDIO_VDD
60
PI
SDIO power supply
connect it to VDD_EXT.
SDC1_DATA_0
49
IO
SDIO data bit 0
VOLmax = 0.45 V VOHmin = 1.4 V VILmin = -0.3 V VILmax = 0.58 V VIHmin = 1.27 V VIHmax = 2.0 V
1.8 V power domain for eMMC applications. If unused, keep it open.
SDC1_DATA_1
50
IO
SDIO data bit 1
SDC1_DATA_2
51
IO
SDIO data bit 2
SDC1_DATA_3
52
IO
SDIO data bit 3
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SDC1_CMD
48
IO
SDIO command
SDC1_DATA_4
53
IO
SDIO data bit 4
VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
1.8 V power domain Can be configured to GPIOs. If unused, keep them open.
SDC1_DATA_5
55
IO
SDIO data bit 5
SDC1_DATA_6
56
IO
SDIO data bit 6
SDC1_DATA_7
58
IO
SDIO data bit 7
SDC1_CLK
47
DO
SDIO clock
VOLmax = 0.45 V VOHmin = 1.4 V
1.8 V power domain for eMMC applications. If unused, keep it open.
EMMC_RST
54
DO
eMMC reset
VOLmax = 0.45 V VOHmin = 1.35 V
1.8 V power domain. If unused, keep it open.
EMMC_PWR_E N
45
DO
eMMC power supply enable control
VOLmax = 0.45 V VOHmin = 1.35 V
1.8 V power domain. If unused, keep it open.
SPI Interfaces
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
SPI1_CLK
216
DO
SPI1 clock
VOLmax = 0.45 V VOHmin = 1.35 V
1.8 V power domain. If unused, keep them open. Can be configured into GPIOs.
SPI1_CS
213
DO
SPI1 chip select
VOLmax = 0.45 V VOHmin = 1.35 V
SPI1_MISO
219
DI
SPI1 master-in salve-out
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
SPI1_MOSI
210
DO
SPI1 master-out slave-in
VOLmax = 0.45 V VOHmin = 1.35 V
ADC Interfaces
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
ADC0
247
AI
General-purpose ADC interface
Voltage Range: 0–1.875 V
If unused, keep it open.
ADC1
245
AI
General-purpose ADC interface
Voltage Range: 0–1.875 V
If unused, keep it open.
Other Interface Pins
Automotive Module Series
AG521R-NA QuecOpen Hardware Design
AG521R-NA_QuecOpen_Hardware_Design 29 / 104
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
USB_BOOT
83
DI
Force the module into emergency download mode
1.8 V power domain. If unused, keep it open.
BT_EN
66
DO
BT function enable control
VOLmax = 0.45 V VOHmin = 1.35 V
DR_SYNC
95
DO
Navigation 1PPS time sync output
VOLmax = 0.45 V VOHmin = 1.35 V
IMU_INT1
169
DI
IMU interrupt 1
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
1.8 V power domain. Can be configured to GPIOs. If unused, keep them open.
IMU_INT2
187
DI
IMU interrupt 2
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
IMU_PWR_EN
181
DO
IMU power enable control
VOLmax = 0.45 V VOHmin = 1.35 V
WLAN Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
WLAN_PWR_ EN2
225
DO
WLAN power supply enable control 2
VOLmax = 0.45 V VOHmin = 1.35 V
1.8 V power domain. If unused, keep them open.
1.8 V power domain. If unused, keep them open.
WLAN_PWR_ EN1
222
DO
WLAN power supply enable control 1
VOLmax = 0.45 V VOHmin = 1.35 V
WLAN_EN
228
DO
WLAN enable
VOLmax = 0.45 V VOHmin = 1.35 V
COEX_UART_ RXD
67
DI
LTE&WLAN/BT coexistence receive
VILmin = -0.3 V VILmax = 0.63 V VIHmin = 1.17 V VIHmax = 2.1 V
COEX_UART_ TXD
69
DO
LTE&WLAN/BT coexistence transmit
VOLmax = 0.45 V VOHmin = 1.35 V
WLAN_SLP_ CLK
231
DO
WLAN sleep clock
VOLmax = 0.45 V VOHmin = 1.35 V
RF Antenna Interfaces
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