Quantum QT60168, QT60248 User Manual

lQ QProx™ QT60168, QT60248

z Second generation charge-transfer QMatrix technology z Keys individually adjustable for sensitivity, response

time, and many other critical parameters

z Panel thicknesses to 50mm through any dielectric z 16 and 24 touch key versions z 100% autocal for life - no adjustments required z SPI slave interface z Adjacent key suppression feature z Synchronous noise suppression feature z Spread-spectrum modulation - high noise immunity z Mix and match key sizes & shapes in one panel z Low overhead communications protocol

z FMEA compliant design features

z Negligible external component count z Extremely low cost per key z +3 to +5V single supply operation z 32-pin lead-free TQFP package

16, 24 KEY QM

VSS

VDD

VSS

VDD

X6 SCK

32 31 30 29 282726 25

817

QT60248 QT60168

TQFP-32

10 11 161514

VREF

S SYNC

/RST

SMP

ATRIX

Y2A

Y1A

DRDY

Y0A

MOSI

™ IC

Y2B

MISO

Y1B1

Y0B

n/c

VSS

VDD

SYNC

VDD

APPLICATIONS

y Security keypanels

y Industrial keyboards

These digital charge-transfer (“QT”) QMatrix™ ICs are designed to detect human touch on up to 16 or 24 keys when used with a scanned, passive X-Y matrix. They will project touch keys through almost any dielectric, e.g. glass, plastic, stone, ceramic, and even wood, up to thicknesses of 5 cm or more. The touch areas are defined as simple 2-part interdigitated electrodes of conductive material, like copper or screened silver or carbon deposited on the rear of a control panel. Key sizes, shapes and placement are almost entirely arbitrary; sizes and shapes of keys can be mixed within a single panel of keys and can vary by a factor of 20:1 in surface area. The sensitivity of each key can be set individually via simple functions over the serial port by a host microcontroller. Key setups are stored in an onboard eeprom and do not need to be reloaded with each powerup.

These devices are designed specifically for appliances, electronic kiosks, security panels, portable instruments, machine tools, or similar products that are subject to environmental influences or even vandalism. They permit the construction of 100% sealed, watertight control panels that are immune to humidity, temperature, dirt accumulation, or the physical deterioration of the panel surface from abrasion, chemicals, or abuse. To this end they contain Quantum-pioneered adaptive auto self-calibration, drift compensation, and digital filtering algorithms that make the sensing function robust and survivable.

These devices feature continuous FMEA self-test and reporting diagnostics, to allow their use in critical consumer appliance applications, for example ovens and cooktops.

Common PCB materials or flex circuits can be used as the circuit substrate; the overlying panel can be made of any non-conducting material. External circuitry consists of only a few passive parts. Control and data transfer is via an SPI port.

These devices makes use of an important new variant of charge-transfer sensing, transverse charge-transfer, in a matrix format that minimizes the number of required scan lines. Unlike older methods, it does not require one IC per key.

y Appliance controls

y Outdoor keypads

y ATM machines y Touch-screens

y Automotive panels

y Machine tools

AVAILABLE OPTIONS

C to +1050C

Lead-FreePart Number# KeysT

YesQT60168-ASG16-40 YesQT60248-ASG24-400C to +1050C

QT60248-AS R4.02/0405

Contents

1 Overview

1.1 Part differences

1.2 Enabling / Disabling Keys

2 Hardware & Functional

2.1 Matrix Scan Sequence

2.2 Disabling Keys; Burst Paring

2.3 Response Time

2.4 Oscillator

2.5 Sample Capacitors; Saturation

2.6 Sample Resistors

2.7 Signal Levels

2.8 Matrix Series Resistors

2.9 Key Design

2.10 PCB Layout, Construction

2.11 Power Supply Considerations

2.12 Startup / Calibration Times

2.13 Reset Input

2.14 Spread Spectrum Acquisitions

2.15 Detection Integrators

2.16 FMEA Tests

2.17 Wiring

3 Serial Communications

3.1 DRDY Pin

3.2 SPI Communications

3.3 Command Error Handling

4 Control Commands

4.1 Null Command - 0x00

4.2 Enter Setups Mode - 0x01

4.3 Cal All - 0x03

4.4 Force Reset - 0x04

4.5 General Status - 0x05

4.6 Report 1st Key - 0x06

4.7 Report Detections for All Keys - 0x07

4.8 Report Error Flags for All Keys - 0x0b

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2.10.1 LED Traces and Other Switching Signals

2.10.2 PCB Cleanliness

Table 2-1 Basic Timings

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Table 2.2 - Pin Listing

Figure 2.7 Wiring Diagram

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Table 4.1 Bits for key reporting and numbering

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3 3 3 3 3 3 3 4 4 4 4

5 Setups

5 5 6 6 6 6 6 6 6 7 7 7 8 8

9 10 10

6 Specifications

10 11 11 11 12 12 12

7 Appendix

12 13 13 13 13

4.9 Report FMEA Status - 0x0c

4.10 Dump Setups Block - 0x0d

4.11 Eeprom CRC - 0x0e

4.12 Return Last Command - 0x0f

4.13 Internal Code - 0x10

4.14 Internal Code - 0x12

4.15 Data Set for One Key - 0x4k

4.16 Status for Key ‘k’ - 0x8k

4.17 Cal Key ‘k’ - 0xck

4.18 Command Sequencing

Table 4.2 Command Summary

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5.1 Negative Threshold - NTHR

5.2 Positive Threshold - PTHR

5.3 Drift Compensation - NDRIFT, PDRIFT

5.4 Detect Integrators - NDIL, FDIL

5.5 Negative Recal Delay - NRD

5.6 Positive Recalibration Delay - PRD

5.7 Burst Length - BL

5.8 Adjacent Key Suppression - AKS

5.9 Oscilloscope Sync - SSYNC

5.10 Mains Sync - MSYNC

5.11 Burst Spacing - BS

5.12 Lower Signal Limit - LSL

5.13 Host CRC - HCRC

Table 5.1 Setups Block

Table 5.2 Key Mapping

Table 5.3 Setups Block Summary

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6.1 Absolute Maximum Electrical Specifications

6.2 Recommended operating conditions

6.3 DC Specifications

6.4 Timing Specifications

6.5 Mechanical Dimensions

6.6 Marking

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7.1 8-Bit CRC Algorithm

7.2 1-Sided Key Layout

7.3 PCB Layout

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13 13 13 13 13 13 14 14 14 14 16 18 18 18 18 19 19 19 20 20 20 20 20 21 21 22 22 23 24 24 24 24 24 24 25 26 26 27 27

2 QT60248-AS R4.02/0405

1 Overvie

QMatrix devices are digital burst mode charge-transfer (QT) sensors designed specifically for matrix geometry touch controls; they include all signal processing functions necessary to provide stable sensing under a wide variety of changing conditions. Only a few external parts are required for operation. The entire circuit can be built within a few square centimeters of single-sided PCB area. CEM-1 and FR1 punched, single-sided materials can be used for possible lowest cost. The PCB’s rear can be mounted flush on the back of a glass or plastic panel using a conventional adhesive, such as 3M VHB 2-sided adhesive acrylic film.

1.2 Enabling / Disabling Keys

The NDIL parameter is used to enable and disable keys in the matrix. Setting NDIL = 0 for a key disables it (Section 5.4). At no time can the number of enabled keys exceed the maximum specified for the device in the case of the QT60168.

On the QT60168, only the first 2 Y lines (Y0, Y1) are operational by default. On the QT60168, to use keys located on line Y2, one or more of the pre-enabled keys must be disabled simultaneously while enabling the desired new keys. This can be done in one Setups block load operation.

Figure 1-1 Field flow between X and Y elements

overlying panel

element

QMatrix parts employ transverse charge-transfer ('QT') sensing, a technology that senses changes in electrical charge forced across an electrode by a pulse edge (Figure 1-1). QMatrix devices allow for a wide range of key sizes and shapes to be mixed together in a single touch panel.

The devices use an SPI interface to allow key data to be extracted and to permit individual key parameter setup. The interface protocol uses simple single byte commands and responds with single byte responses in most cases. The command structure is designed to minimize the amount of data traffic while maximizing the amount of information conveyed.

In addition to normal operating and setup functions the device can also report back actual signal strengths and error codes.

QmBtn software for the PC can be used to program the operation of the IC as well as read back key status and signal levels in real time.

The QT60168 and QT60248 are electrically identical with the exception of the number of keys which may be sensed.

element

1.1 Part differences

Versions of the device are capable of a maximum of 16 or 24 keys (QT60168, QT60248 respectively).

These devices are identical in all respects, except that each is capable of only the number of keys specified. These keys can be located anywhere within the electrical grid of 8 X and 3 Y scan lines.

Unused keys are always pared from the burst sequence in order to optimize speed. Similarly, in a given part a lesser number of enabled keys will cause any unused acquisition burst timeslots to be pared from the sampling sequence to optimize acquire speed. Thus, if only 14 keys are actually enabled, only 14 timeslots are used for scanning.

2 Hardware & Functional

2.1 Matrix Scan Sequence

The circuit operates by scanning each key sequentially, key by key. Key scanning begins with location X=0 / Y=0 (key #0). X axis keys are known as rows while Y axis keys are referred to as columns. Keys are scanned sequentially by row, for example

the sequence X0Y0 X1Y0 .... X7Y0, X0Y1, X1Y1... etc. Keys are

also numbered from 0..24. Key 0 is located at X0Y0. A table of key numbering is located on page 22.

Each key is sampled in a burst of acquisition pulses whose length is determined by the Setups parameter BL (page 20), which can be set on a per-key basis. A burst is completed entirely before the next key is sampled; at the end of each burst the resulting signal is converted to digital form and processed. The burst length directly impacts key gain; each key can have a unique burst length in order to allow tailoring of key sensitivity on a key by key basis.

2.2 Disabling Keys; Burst Paring

Keys that are disabled by setting NDIL =0 (Section 5.4, page

19) have their bursts pared from the scan sequence to save time. This has the consequence of affecting the scan rate of the entire matrix as well as the time required for initial matrix calibration.

Reducing the number of enabled keys also reduces the time required to calibrate an individual key once the matrix is initially calibrated after power-up or reset, since the total cycle time is proportional to the number of enabled keys.

Keys that are disabled report as follows:

Signal = 0 Reference = 0 Low-signal error flag (provided LSL >0) Calibrating flag for key set only just after device reset or

after a CAL command, for one scan cycle only Failed calibration error for key always set Detect flag for key never set

See also Section 4.16 notes.

2.3 Response Time

The response time of the device depends on the scan rate of the keys (Section 5.11), the number of keys enabled (Section

5.4), the detect integrator settings (Section 5.4), the serial polling rate by the host microcontroller, and the time required to do FMEA tests at the end of each scan (~5ms).

3 QT60248-AS R4.02/0405

For example:

NKE = Number of keys enabled = 20 FDIL = Fast detect integrator limit = 5 BS = Burst spacing = 0.5ms FMEA = FMEA test time = 5ms NDIL = Norm detect integrator Limit = 2 HPR = Host polling rate = 10ms

The worst case response time is computed as:

Tr = ((((NKE + FDIL) * BS) + FMEA) * NDIL) + HPR

For the above example values:

Tr = ((((20 + 5) * 0.5ms) + 5ms) * 2) + 10ms = 45ms

2.4 Oscillator

The oscillator is internal to the device. There is no facility for external clocking.

2.5 Sample Capacitors; Saturation

The charge sampler capacitors on the Y pins should be the values shown. They should be X7R or NP0 ceramics or PPS film. The value of these capacitors is not critical but 4.7nF is recommended for most cases.

Cs voltage saturation is shown in Figure 2-1. This nonlinearity is caused by excessively negative voltage on Cs inducing conduction in the pin protection diodes. This badly saturated signal destroys key gain and introduces a strong thermal coefficient which can cause 'phantom' detection. The cause of this is usually from the burst length being too long, the Cs value being too small, or the X-Y coupling being too large. Solutions include loosening up the interdigitation of key structures, separating X and Y lines on the PCB more, increasing Cs, and decreasing the burst length.

Increasing Cs will make the part slower; decreasing burst length will make it less sensitive. A better PCB layout and a looser key structure (up to a point) have no negative effects.

Cs voltages should be observed on an oscilloscope with the matrix layer bonded to the panel material; if the Rs side of any Cs ramps more negative than -0.25 volts during any burst (not counting overshoot spikes which are probe artifacts), there is a potential saturation problem.

Figure 2-2 shows a defective waveform similar to that of 2-1, but in this case the distortion is caused by excessive stray capacitance coupling from the Y line to AC ground, for example from running too near and too far alongside a ground trace, ground plane, or other traces. The excess coupling causes the charge-transfer effect to dissipate a significant portion of the received charge from a key into the stray capacitance. This phenomenon is more subtle; it can be best detected by increasing BL to a high count and watching what the waveform does as it descends towards and below -0.25V. The waveform will appear deceptively straight, but it will slowly start to flatten even before the -0.25V level is reached.

A correct waveform is shown in Figure 2-3. Note that the bottom edge of the bottom trace is substantially straight (ignoring the downward spikes).

Unlike other QT circuits, the Cs capacitor values on QT60xx8 devices have no effect on conversion gain. However they do affect conversion time.

Unused Y lines should be left open.

2.6 Sample Resistors

There are 3 sample resistors (Rs) used to perform single-slope ADC conversion of the acquired charge on each Cs capacitor. These resistors directly control acquisition gain: larger values of Rs will proportionately increase signal gain. Values of Rs can range from 380K ohms to 1M ohms. 470K ohms is a reasonable value for most purposes.

Unused Y lines do not require an Rs resistor.

2.7 Signal Levels

Quantum’s QmBtn™ software makes it is easy to observe the absolute level of signal received by the sensor on each key. The signal values should normally be in the range from 250 to 750 counts with properly designed key shapes and values of Rs. However, long adjacent runs of X and Y lines can also artificially boost the signal values, and induce signal saturation: this is to be avoided. The X-to-Y coupling should come mostly from intra-key electrode coupling, not from stray X-to-Y trace coupling.

QmBtn software is available free of charge on Quantum’s website.

The signal swing from the smallest finger touch should preferably exceed 10 counts, with 15 being a reasonable target. The signal threshold setting (NTHR) should be set to a value guaranteed to be less than the signal swing caused by the smallest touch.

Figure 2-1 VCs - Non-Linear During Burst

(Burst too long, or Cs too small, or X-Y capacitance too large)

Figure 2-2 VCs - Poor Gain, Non-Linear During Burst

(Excess capacitance from Y line to Gnd)

Figure 2-3 Vcs - Correct

4 QT60248-AS R4.02/0405

Figure 2-4 X-Drive Pulse Roll-off and Dwell Time

X drive

Dwell time

Y gate

Lost charge due to inadequate settling before end of dwell time

Figure 2-5 Probing X-Drive Waveforms With a Coin

Increasing the burst length (BL) parameter will increase the signal strengths as will increasing the sampling resistor (Rs) values.

2.8 Matrix Series Resistors

The X and Y matrix scan lines should use series resistors (referred to as Rx and Ry respectively) for improved EMI performance.

X drive lines require them in most cases to reduce edge rates and thus reduce RF emissions. Typical values range from 1K to 20K ohms.

Y lines need them to reduce EMC susceptibility problems and in some extreme cases, ESD. Typical Y values range around 1K ohms. Y resistors act to reduce noise susceptibility problems by forming a natural low-pass filter with the Cs capacitors.

It is essential that the Rx and Ry resistors and Cs capacitors be placed very close to the chip. Placing these parts more than a few millimeters away opens the circuit up for high frequency interference problems (above 20MHz) as the trace lengths between the components and the chip start to act as RF antennae.

Figure 2-6 Recommended Key Structure

‘T’ should ideally be similar to the complete thickness the fields need to penetrate to the touch surface. Smaller dimensions will also work but will give less signal strength. If in doubt, make the pattern coarser.

The upper limits of Rx and Ry are reached when the signal level and hence key sensitivity are clearly reduced. The limits of Rx and Ry will depending on key geometry and stray capacitance, and thus an oscilloscope is required to determine optimum values of both.

The upper limit of Rx can vary depending on key geometry and stray capacitance, and some experimentation and an oscilloscope are required to determine optimum values.

Dwell time is the duration in which charge coupled from X to Y is captured. Increasing Rx values will cause the leading edge of the X pulses to increasingly roll off, causing the loss of captured charge (and hence loss of signal strength) from the keys (Figure 2-4). The dwell time of these parts is fixed at 375ns. If the X pulses have not settled within 375ns, key gain will be reduced; if this happens, either the stray capacitance on the X line(s) should be reduced (by a layout change, for example by reducing X line exposure to nearby ground planes or traces), or, the Rx resistor needs to be reduced in value (or a combination of both approaches).

One way to determine X line settling time is to monitor the fields using a patch of metal foil or a small coin over the key (Figure 2-5). Only one key along a particular X line needs to be observed, as each of the keys along that X line will be identical. The 250ns dwell time should be exceed the observed 95% settling of the X-pulse by 25% or more.

In almost all case, Ry should be set equal to Rx, which will ensure that the charge on the Y line is fully captured into the Cs capacitor.

2.9 Key Design

Circuits can be constructed out of a variety of materials including flex circuits, FR4, and even inexpensive single-sided CEM-1.

The actual internal pattern style is not as important as is the need to achieve regular X and Y widths and spacings of sufficient size to cover the desired graphical key area or a little bit more; ~3mm oversize is acceptable in most cases, since the key’s electric fields drop off near the edges anyway. The overall key size can range from 10mm x 10mm up to 100mm x 100mm but these are not hard limits. The keys can be any shape including round, rectangular, square, etc. The internal pattern

5 QT60248-AS R4.02/0405

can be as simple as a single bar of Y within a solid perimeter of X, or (preferably) interdigitated as shown in Figure 2-6.

For better surface moisture suppression, the outer perimeter of X should be as wide as possible, and there should be no ground planes near the keys. The variable ‘T’ in this drawing represents the total thickness of all materials that the keys must penetrate.

See Figure 2-6 and page 27 for examples of key layouts.

See Section 2.16 for guidance about potential FMEA problems with small key shapes.

2.10 PCB Layout, Construction

It is best to place the chip near the touch keys on the same PCB so as to reduce X and Y trace lengths, thereby reducing the chances for EMC problems. Long connection traces act as RF antennae. The Y (receive) lines are much more susceptible to noise pickup than the X (drive) lines.

Even more importantly, all signal related discrete parts (R’s and C’s) should be very close to the body of the chip. Wiring between the chip and the various R’s and C’s should be as short and direct as possible to suppress noise pickup.

Ground planes and traces should NOT be used around the keys and the Y lines from the keys. Ground areas, traces, and other adjacent signal conductors that act

as AC ground (such as Vdd and LED drive lines etc) will absorb the received key signals and reduce signal-to-noise ratio (SNR) and thus will be counterproductive. Ground planes around keys will also make water film effects worse.

solder joints, causing signal drift and resultant false detections or transient losses of sensitivity or instability. Conformal coatings will trap in existing amounts of moisture which will then become highly temperature sensitive.

The designer should specify ultrasonic cleaning as part of the manufacturing process, and in cases where a high level of humidity is anticipated, the use of conformal coatings after cleaning to keep out moisture.

2.11 Power Supply Considerations

As these devices use the power supply itself as an analog reference, the power should be very clean and come from a separate regulator. A standard inexpensive LDO type regulator should be used that is not also used to power other loads such as LEDs, relays, or other high current devices. Load shifts on the output of the LDO can cause Vdd to fluctuate enough to cause false detection or sensitivity shifts.

A single ceramic 0.1uF bypass capacitor should be placed very close to supply pins 3, 4, 5 and 6 of the IC. Pins 18, 20, and 21 do not require bypassing.

Vdd can range from +3 to +5 nominal. The device enters reset below 2.8V via an internal LVD circuit. See Section 2.13.

2.12 Startup / Calibration Times

The devices require initialization times as follows:

Normal cold start to ability to communicate:

4ms - Normal initialization from any type of reset

22ms - Initialization from reset where the Setups were previously modified.

Calibration time per key vs. burst spacings for 16 and 24 enabled keys:

Table 2-1 Basic Timings

Ground planes, if used, should be placed under or around the QT chip itself and the associated R’s and C’s in the circuit, under or around the power supply, and back to a connector, but nowhere else.

See page 27 for an example of a 1-sided PCB layout.

2.10.1 LED Traces and Other Switching Signals

Digital switching signals near the Y lines will induce transients into the acquired signals, deteriorating the SNR perfomance of the device. Such signals should be routed away from the Y lines, or the design should be such that these lines are not switched during the course of signal acquisition (bursts).

LED terminals which are multiplexed or switched into a floating state and which are within or physically very near a key structure (even if on another nearby PCB) should be bypassed to either Vss or Vdd with at least a 10nF capacitor of any type, to suppress capacitive coupling effects which can induce false signal shifts. Led terminals which are constantly connected to Vss or Vdd do not need further bypassing.

2.10.2 PCB Cleanliness

All capacitive sensors should be treated as highly sensitive circuits which can be influenced by stray conductive leakage paths. QT devices have a basic resolution in the femtofarad range; in this region, there is no such thing as ‘no clean flux’. Flux absorbs moisture and becomes conductive between

Burst Spacing,

To the above, add the initialization time from above (4ms or 22ms) to get the total elapsed time from reset, to the ability to report key detections over the serial interface. Disabled keys are subtracted from the burst sequence and thus the cal time is shortened. The scan time should be measured on an oscilloscope.

Keys that cannot calibrate for some reason require 5 full cal cycles before they report as errors. The device can report back during the calibration interval that the key(s) affected are still in calibration via status function bits. Errors can be observed after a cal cycle using the 0x8k command (see Section 4.16).

Cal Time, ms,

16 keys

Cal Time, ms,

24 keys

2281760.50

3092310.75

3902861.00

4723421.25

5533971.50

6344521.75

7155072.00

7975632.25

8786182.50

9596732.75

1,0407283.00

2.13 Reset Input

The /RST pin can be used to reset the device to simulate a power down cycle, in order to bring the part up into a known

6 QT60248-AS R4.02/0405

state should communications with the part be lost. The pin is active low, and a low pulse lasting at least 10µs must be applied to this pin to cause a reset.

To provide for proper operation during power transitions the devices have an internal LVD set to 2.7 volts.

The reset pin has an internal 30K ~ 80K resistor. A 2.2µF capacitor plus a diode to Vdd can be connected to this pin as a traditional reset circuit, but this is not required.

A Force Reset command, 0x04 is also provided which generates an equivalent hardware reset.

If an external hardware reset is not used, the reset pin may be connected to Vdd or left floating.

2.14 Spread Spectrum Acquisitions

QT60xx8 devices use spread-spectrum burst modulation. This has the effect of drastically reducing the possibility of EMI effects on the sensor keys, while simultaneously spreading RF emissions. This feature is hard-wired into the device and cannot be disabled or modified.

Spread spectrum is configured as a frequency chirp over a wide range of frequencies for robust operation.

2.15 Detection Integrators