Quantum QT1103 Technical data

lQ

This datasheet is applicable to all revision 3 chips

QT

OUCH

™ 10-KEY S

QT1103

ENSOR

IC

The QT1103 is designed for low cost appliance, mobile, and consumer
electronics applications.

QTouch™ technology is a type of patented charge-transfer sensing

SYNC/LP

DETECT

VSS

SNS7K

SNS7

SNS6K

SNS6

24 23 222120 19 18 17

SNS5K

method well known for its robust, stable, EMC-resistant characteristics.
It is the only all-digital capacitive sensing technology in the market
today. This technology has over a decade of applications experience
spanning thousands of designs.

QTouch circuits are renowned for simplicity, reliability, ease of design,
and cost effectiveness.

QTouch™ sensors employ a single reference capacitor tied to two pins
of the chip for each sensing key; a signal trace leads from one of the
pins to the sensing electrode which forms the key. The sensing

SNS8

SNS8K

SNS9

SNS9K

N/C

/CHANGE

1W

RX

25
26
27
28
29
30

31

32

QT1103

16
15
14
13
12

11

10

9

electrode can be a simple solid shape such as a rectangle or circle. An
LED can be placed near or inside the solid circle for illumination.

The key electrodes can be designed into a conventional Printed Circuit
Board (PCB) or Flexible Printed Circuit Board (FPCB) as a copper

12345

SS

VDD

OSC

/RST

67

N/C

8

SNS0

SNS1

SNS0K

pattern, or as printed conductive ink on plastic film.

AT A GLANCE

Number of keys: 1 to 10
Technology: Patented spread-spectrum charge-transfer (one-per-key mode)
Key outline sizes: 5mm x 5mm or larger (panel thickness dependent); widely different sizes and shapes possible
Key spacings: 6mm or wider, center to center (panel thickness, human factors dependent)
Electrode design: Single solid or ring shaped electrodes; wide variety of possible layouts
Layers required: One layer substrate; electrodes and components can be on same side
Substrates: FR-4, low cost CEM-1 or FR-2 PCB materials; polyamide FPCB; PET films, glass

†

Electrode materials: Copper, silver, carbon, ITO, Orgacon
Panel materials: Plastic, glass, composites, painted surfaces (low particle density metallic paints possible)
Adjacent Metal: Compatible with grounded metal immediately next to keys
Panel thickness: Up to 50mm glass, 20mm plastic (key size dependent)
Key sensitivity: Settable via change in reference capacitor (Cs) value
Outputs: RS-232 based

serial output, capable of single-wire operation

Moisture tolerance: Good
Power: 2.8V ~ 5.0V
Package: 32-pin 5 x 5mm QFN RoHS compliant
Signal processing: Self-calibration, auto drift compensation, noise filtering, AKS™
Applications: Portable devices, domestic appliances and A/V gear, PC peripherals, office equipment
Patents: AKS™ (patented Adjacent Key Suppression)

QTouch™ (patented Charge-transfer method)

†

Orgacon is a registered trademark of Agfa-Gevaert N.V

ink (virtually anything electrically conductive)

SNS5
SNS4K
SNS4
SNS3K
SNS3
SNS2K
SNS2
SNS1K

AVAILABLE OPTIONS

A

0

C to +850C

LQC

32-QFNT

QT1103-ISG-40

Copyright © 2006-2007 QRG Ltd

QT1103_3R0.03_0607

Contents

1 Overview

1.1 Differences With QT1101

1.2 Parameters

1.3 Wiring

2 Device Operation

2.1 Reset and Startup Time

2.2 Option Resistors

2.3 DETECT Pin

2.4 /CHANGE Pin

2.5 SYNC/LP Pin

2.6 AKS™ Function Pins

2.7 MOD_0, MOD_1 Inputs

2.8 Fast Detect Mode

...........................................

1.2.1 Introduction

1.2.2 Burst Operation

1.2.3 Self-calibration

1.2.4 Autorecalibration

1.2.5 Drift Compensation

1.2.6 Detection Integrator Confirmation

1.2.7 Spread-spectrum Operation

1.2.8 Sync Mode

1.2.9 Low Power (LP) Mode

1.2.10 Adjacent Key Suppression (AKS™)

1.2.11 Outputs

1.2.12 Simplified Mode

.......................................

.....................................

.....................................

.......................................

...........................................

......................................

......................................

2.5.1 Introduction

2.5.2 Sync Mode

2.5.3 Low Power (LP) Mode

......................................

.....................................

.....................................

..............................

...................................

...................................

..................................

.................................

........................

............................

...............................

......................

..................................

....................................

...............................

....................................

...............................

.................................

...............................

...................................

2.9 Simplified Mode

3

2.10 Unused Keys

3

2.11 Serial 1W Interface

3
3
3
3
3
3
3
3
3
3
4
4
4
5
8
8
8
8
8
8
8
8
8
9
9
9

2.11.1 Introduction

2.11.2 Basic 1W Operation

2.11.3 LP Mode Effects on 1W

2.11.4 2W Operation

3 Design Notes

3.1 Oscillator Frequency

3.2 Spread-spectrum Circuit

3.3 Cs Sample Capacitors - Sensitivity

3.4 Rsns Resistors

3.5 Power Supply

3.6 PCB Layout and Construction

4 Specifications

4.1 Absolute Maximum Specifications

4.2 Recommended Operating Conditions

4.3 AC Specifications

4.4 DC Specifications

4.5 Signal Processing

4.6 Idd Curves

4.7 LP Mode Typical Response Times

4.8 Mechanical Dimensions

4.9 Part Marking

4.10 Moisture Sensitivity Level (MSL)

5 Datasheet Control

5.1 Changes

5.2 Numbering Convention

.......................................

.....................................

......................................

.......................................

.....................................

........................................

...................................

....................................

................................

...................................

..............................

............................

..................................

................................

.............................

......................

....................................

..........................

.......................

....................

..................................

..................................

.................................

......................

..............................

.......................

...................................

..............................

10
10
10
10
10
11
11
11
11
12
12
12
12
12
13
13
13
13
13
14
15
18
19
20
20
21
21
21

LQ

QT1103_3R0.03_0607

1 Overvie

w

1.1

Differences With QT110

The QT1103 is a general replacement device for the highly
popular QT1101. It has all of the same features as the older
device but differs in the following ways:

• Rs resistors on each channel eliminated

• Up to 4x more sensitive for a given value of Cs

• Shorter burst lengths, less power for a given value of

Cs

• ‘Burst A and B’ only mode for up to eight keys, with
less power

• ‘Burst B’ only mode for up to four keys, with less
power than ‘Burst A and B’ mode

• Requires an external reset signal

The QT1103 should be used instead of the QT1101 for new
designs due to a simpler circuit, lower power and lower cost.

1.2 Parameters

1.2.1 Introduction

The QT1103 is an easy to use, ten touch-key sensor IC
based on Quantum’s patented charge-transfer (‘QT’)
principles for robust operation and ease of design. This
device has many advanced features which provide for
reliable, trouble-free operation over the life of the product.

1.2.2 Burst Operation

The device operates in ‘burst mode’. Each key is acquired
using a burst of charge-transfer sensing pulses whose count
varies depending on the value of the reference capacitor Cs
and the load capacitance Cx. In LP mode, the device sleeps
in an ultra-low current state between bursts to conserve
power. The keys signals are acquired using three successive
bursts of pulses:

Burst A: Keys 0, 1, 4, 5
Burst B: Keys 2, 3, 6, 7
Burst C: Keys 8, 9

Bursts always operate in C-A-B sequence.

1.2.3 Self-calibration

On power-up, all ten keys are self-calibrated within 300ms
(typical) to provide reliable operation under almost any
conditions.

1

1.2.5 Drift Compensation

Drift compensation operates to correct the reference level of
each key slowly but automatically over time, to suppress
false detections caused by changes in temperature, humidity,
dirt and other environmental effects.

1.2.6 Detection Integrator Confirmation

Detection Integrator (DI) confirmation reduces the effects of
noise on the QT1103. The DI mechanism requires
consecutive detections over a number of measurement
bursts for a touch to be confirmed and indicated on the
outputs. In a like manner, the end of a touch (loss of signal)
has to be confirmed over a number of measurement bursts.
This process acts as a type of ‘debounce’ against noise.

A per-key counter is incremented each time the key has
exceeded its threshold and stayed there for a number of
measurement bursts. When this counter reaches a preset
limit the key is finally declared to be touched.

For example, if the limit value is six, then the device has to
exceed its threshold and stay there for six measurement
bursts in succession without going below the threshold level,
before the key is declared to be touched. If on any
measurement burst the signal is not seen to exceed the
threshold level, the counter is cleared and the process has to
start from the beginning.

In normal operation, the start of a touch must be confirmed
for six measurement bursts and the end of a touch for three.
In a special ‘Fast Detect‘ mode (available via jumper
resistors) (Tables 1.2 and 1.6), confirmation of the start of a
touch requires only three and the end of a touch requires two
measurement bursts.

Fast detect is only available when AKS is disabled.

1.2.7 Spread-spectrum Operation

The bursts operate over a spread of frequencies, so that
external fields will have minimal effect on key operation and
emissions are very weak. Spread spectrum operation works
with the DI mechanism to dramatically reduce the probability
of false detection due to noise.

1.2.8 Sync Mode

The QT1103 features a Sync mode to allow the device to
slave to an external signal source, such as a mains signal
(50/60Hz), to limit interference effects. This is performed
using the SYNC/LP pin. Sync mode operates by triggering
three sequential acquire bursts, in sequence C-A-B from the
Sync signal. Thus, each Sync pulse causes all ten keys to be
acquired (see Section 2.5.2, page 8).

1.2.4 Autorecalibration

The device can time out and recalibrate each key
independently after a fixed interval of continuous touch
detection, so that the keys can never become ‘stuck on’ due
to foreign objects or other sudden influences. After
recalibration the key will continue to function normally. The
delay is selectable to be either 10s, 60s, or infinite (disabled).

The device also autorecalibrates a key when its signal
reflects a sufficient decrease in capacitance. In this case the
device recalibrates after ~2 seconds so as to recover normal
operation quickly.

Lq

1.2.9 Low Power (LP) Mode

The device features an LP mode for microamp levels of
current drain with a slower response time, to allow use in
battery operated devices. On detection of touch, the device
automatically reverts to its normal mode and asserts the
DETECT pin active to wake up a host controller. The device
remains in normal, full acquire speed mode until another
pulse is seen on its SYNC/LP pin, upon which it goes back to
LP mode (see Optimization of LP Mode, page 9).

When eight or fewer keys are required, current drain in LP
mode can be further reduced by choosing appropriate
channels on the QT1103 (see the end of Section 2.5.3,
page 8).

3 QT1103_3R0.03_0607

1.2.10 Adjacent Key Suppression (AKS™)

AKS™ is a Quantum-patented feature that can be enabled
via a resistor strap option. AKS works to prevent multiple
keys from responding to a single touch, a common complaint
about capacitive touch panels. This can happen with closely
spaced keys, or with control surfaces that have water films on
them.

AKS operates by comparing signal strengths from keys within
a group of keys to suppress touch detections from those that
have a weaker signal change than the dominant one.

The QT1103 has two different AKS groupings of keys,
selectable via option resistors. These groupings are:

• AKS operates in three groups of keys

• AKS operates over all ten keys

These two modes allow the designer to provide AKS while
also providing for shift or function operations.

If AKS is disabled, all keys can operate simultaneously.

1.2.11 Outputs

The QT1103 has a serial output using one or two wires,
RS-232 data format, and automatic baud rate detection. A
simple protocol is employed.

The QT1103 operates in slave mode, i.e. it only sends data
to the host after receiving a request from the host.

An additional /CHANGE (state changed) signal allows the
use of the serial interface to be optimised, rather than being
polled continuously.

1.2.12 Simplified Mode

To reduce the need for option resistors, the simplified
operating mode places the part into fixed settings with only
the AKS feature being selectable. LP mode is also possible
in this configuration. Simplified mode is suitable for most
applications.

Lq

4 QT1103_3R0.03_0607

1.3 Wiring

23

Table 1.1 Pin Descriptions

If UnusedNotesFunctionTypeNamePin

Spread spectrum driveSpread spectrumODSS1

OscillatorIOSC4

I/OSNS06

I/OSNS18

I/OSNS210

I/OSNS312

I/OSNS516

I/OSNS618
I/OSNS6K19
I/OSNS720

‡

Sense pin and

option select

Sense pin and

option select

Sense pin and

option select

Sense pin and

option select

Sense pin and

option select

Sense pin and

option select

Sense pin and

mode select

Sense pin and mode

or option select

State changedOD/CHANGE30

Resistor to Vdd and optional

spread spectrum RC network

To Cs0 and/or
option resistor

To Cs1 and/or

option resistor*

To Cs2 and/or

option resistor*

To Cs3 and/or

option resistor*

To Cs5 and/or

option resistor *

To Cs6 and/or

option resistor*

To Cs6 + Key and/or

mode resistor

To Cs7 and/or mode resistor

or option resistor*

0 = a key state has changed

Requires pull-up

†

†

100k resistor to Vss

-Active low resetReset inputI/RST2

-+2.8 ~ +5.0VPowerPVdd3

-

-Leave open--n/c5

Open or

option resistor*

OpenTo Cs0 + KeySense pinI/OSNS0K7

Open or

option resistor*

OpenTo Cs1 + KeySense pinI/OSNS1K9

Open or

option resistor*

OpenTo Cs2 + KeySense pinI/OSNS2K11

Open or

option resistor*

OpenTo Cs3 + KeySense pinI/OSNS3K13
OpenTo Cs4Sense pinI/OSNS414
OpenTo Cs4 + KeySense pinI/OSNS4K15

Open or

option resistor*

OpenTo Cs5 + KeySense pinI/OSNS5K17

Open or

option resistor*

Open or

mode resistor

Open or mode resistor

resistor*

OpenTo Cs7 + KeySense pinI/OSNS7K21

-0VGroundPVss22

Vdd or Vss**Rising edge sync or LP pulseSync In or LP InISYNC/LP

OpenSee Table 1.4Detect StatusO/ODDETECT24
OpenTo Cs8Sense pinI/OSNS825
OpenTo Cs8 + KeySense pinI/OSNS8K26
OpenTo Cs9Sense pinI/OSNS927
OpenTo Cs9 + KeySense pinI/OSNS9K28
Open---n/c29

100k resistor to Vss

-Requires pull-up to Vdd1W mode serial I/OI/OD1W31

VddInput for 2W mode2W ReceiveIRX32

†

†

or option

Pin Type

I CMOS input only
I/O CMOS I/O
OD CMOS open drain output
I/OD CMOS input or open drain output
O/OD CMOS push-pull or open-drain output (option selected)
P Ground or power

Notes

†

Mode resistor is required only in Simplified mode (see Figure 1.2)

* Option resistor is required only in Full Options mode (see Figure 1.1)

‡

Pin is either Sync or LP depending on options selected (functions SL_0, SL_1, see Figure 1.1)

** See text

Lq

5 QT1103_3R0.03_0607

Figure 1.1 Connection Diagram - Full Options (32-QFN Package)

KEY 3

KEY 4

KEY 5

KEY 6

KEY 7

KEY 8

KEY 9

Vunreg

RESET IN

SYNC or LP

DETECT OUT

Voltage Reg

Keep these parts

close to the IC

MOD_1
V / V

DD SS

1M

R

SNS3

R

SNS4

OUT_D

V / V

DD SS

1M

R

SNS5

SL_0
V / V

DD SS

1M

R

SNS6

SL_1
V / V

DD SS

1M

SNS7

R

R

SNS8

R

SNS9

Pull-up not required for push-pull mode
See Detect pin mode table

Vdd

100K

C

S3

C

S4

C

S5

C

S6

C

S7

C

S8

C

S9

*100nF

12

SNS3

13

SNS3K

14

SNS4

15

SNS4K

16

SNS5

17

SNS5K

18

SNS6

19

SNS6K

20

21

25

26

27

SNS9

28

2

23

SYNC/LP

24

DETECT

SNS7
SNS7K

SNS8
SNS8K

SNS9K

/RST

VDD

*Note: One bypass capacitor to be tightly wired between
Vdd and Vss. Follow regulator manufacturer’s
recommendations for input and output capacitors.

11

10

9

8

7

6

4

1

32

31

30
29
5

Keep these parts

close to the IC

C

S2

1M

C

S1

1M

C

S0

1M

VDD

Rb1

Rb2

Css

100K

100K
100K

Vdd

Vdd

Vdd

3

VDD

QT1103
32-QFN

VSS

22

SNS2K

SNS2

SNS1K

SNS1

SNS0K

SNS0

OSC

SS

RX
1W

/CHANGE

N.C.

N.C.

R

R

R

SNS2

SNS1

SNS0

MOD_0

VV

DD SS

/

AKS_1

VV

DD SS

/

AKS_0

VV

DD SS

/

Recommended Rb1, Rb2 Value

With Spread-Spectrum

Vdd Range Rb1 Rb2

2.8 ~ 2.99V 12K 27K

3.0 ~ 3.59V 12K 22K

3.6 ~ 5V 15K 27K

No Spread-Spectrum

Vdd Range Rb1 Rb2

2.8 ~ 2.99V 15K dni

3.0 ~ 3.59V 18K dni

3.6 ~ 5V 20K dni
dni = do not install

2W DATA
DATA
/CHANGE

KEY 2

KEY 1

KEY 0

Table 1.2
AKS / Fast-Detect Options

Table 1.3
Max On-Duration

Table 1.4
Detect Pin Drive

Table 1.5
SYNC/LP Function

Lq

FAST-DETECTAKS MODEAKS_0AKS_1

OffOffVssVss
EnabledOffVddVss
OffOn, in 3 groupsVssVdd
OffOn, globalVddVdd

MAX ON-DURATION MODEMOD_0MOD_1

10 seconds to recalibrateVssVss
60 seconds to recalibrateVddVss
Infinite (disabled)VssVdd
(reserved)VddVdd

DETECT PIN MODEOUT_D

Open drain, active lowVss
Push-pull, active highVdd

SYNC/LP PIN MODESL_0SL_1

SyncVssVss
LP mode: 70ms response timeVddVss
LP mode: 110ms response timeVssVdd
LP mode: 190ms response timeVddVdd

6 QT1103_3R0.03_0607

Figure 1.2 Connection Diagram - Simplified Mode (32-QFN Package)

KEY 3

KEY 4

KEY 5

KEY 6

KEY 7

KEY 8

KEY 9

Vunreg

RESET IN

LP IN

DETECT OUT

Voltage Reg

Keep these parts

close to the IC

C

S3

R

SNS3

C

S4

R

SNS4

C

R

SNS5

SNS6

SNS7

SNS8

SNS9

S5

C

S6

C

S7

C

S8

C

S9

R

R

R

R

SMR

1M

*100nF

12

13

14

15

16

17

18

19

20
21

25

26

27

28

2

23

24

VDD

SNS3
SNS3K

SNS4
SNS4K

SNS5
SNS5K

SNS6
SNS6K

SNS7
SNS7K

SNS8
SNS8K

SNS9
SNS9K

/RST

SYNC/LP
DETECT

*Note: One bypass capacitor to be tightly wired between
Vdd and Vss. Follow regulator manufacturer’s
recommendations for input and output capacitors.

Keep these parts

11

C

10
9

C

8

7

C

6

close to the IC

R

S2

R

S1

S0

1M

VDD

SNS2

SNS1

R

SNS0

AKS_0

VV

DD SS

/

Recommended Rb1, Rb2 Values

3

VDD

SNS2K

SNS1K

SNS0K

QT1103

SNS2

SNS1

SNS0

32-QFN

Rb1

4

OSC

Rb2

100K

100K
100K

Css

Vdd
Vdd

Vdd

VSS

22

SS

RX
1W

/CHANGE

N.C.

N.C.

1

32

31

30

29

5

KEY 2

KEY 1

KEY 0

With Spread-Spectrum

Vdd Range Rb1 Rb2

2.8 ~ 2.99V 12K 27K

3.0 ~ 3.59V 12K 22K

3.6 ~ 5V 15K 27K

No Spread-Spectrum

Vdd Range Rb1 Rb2

2.8 ~ 2.99V 15K dni

3.0 ~ 3.59V 18K dni

3.6 ~ 5V 20K dni
dni = do not install

2W DATA
DATA
/CHANGE

Table 1.6
AKS Resistor Options

FAST-DETECTAKS MODEAKS_0

EnabledOffVss

OffOn, globalVdd

Table 1.7
Functions in Simplified
Mode

SYNC/LP pin
Max on-duration delay
Detect Pin

Suggested regulator manufacturers:

• Toko (XC6215 series)

• Seiko (S817 series)

• BCDSemi (AP2121 series)

Re Figures 1.1 and 1.2 check the following sections for the variable component values:

• Section 3.3, page 12: Cs capacitors (C

• Section 3.4, page 12: Sample resistors (R

S

)

SNS

)

• Section 3.5, page 12: Voltage levels

• Section 3.2, page 12: Css capacitor

Lq

110ms LP function; sync not available
60 seconds
Push-pull, active high

7 QT1103_3R0.03_0607