z 8 completely independent QT touch sensing fields
z Designed for low-power portable applications
z 100% autocal for life - no adjustments required
z Direct outputs - either encoded or ‘per key’
z Fully debounced results
z 2.8V ~ 5.0V single supply operation
z 45µA current typ @ 3V in 360ms LP mode
z AKS™ Adjacent Key Suppression
z Spread spectrum bursts for superior noise rejection
z Sync pin for excellent LF noise rejection
z 10ms ‘fast mode’ for use in slider applications
z Pb-free packages: 32-QFN and 48-SSOP
APPLICATIONS
MP3 players
Mobile phones
PC peripherals
Television controls
8 KEY QT
25
OUT_0
26
OUT_1
27
OUT_2
28
OUT_3
29
OUT_4
30
OUT_5
31
OUT_6
OUT_7
32
Pointing devices
Remote controls
OUCH
DETECT
24 23 222120 19 18 17
1
23456 78
SS
SYNC/LP
VSS
QT1080
32-QFN
VDD
/RST
™ S
SNS7K
SNS7
N.C.
OSC
SNS6K
SNS6
SNS0
SNS0K
ENSOR
SNS5K
SNS5
16
SNS4K
15
SNS4
14
SNS3K
13
SNS3
12
SNS2K
11
SNS2
10
SN1K
9
SNS1
IC
QT1080 charge-transfer (“QT’”) QTouch IC is a self-contained digital controller capable of detecting near-proximity or touch on up to 8
electrodes. It allows electrodes to project independent sense fields through any dielectric such as glass or plastic. This capability
coupled with its continuous self-calibration feature can lead to entirely new product concepts, adding high value to product designs. The
devices are designed specifically for human interfaces, like control panels, appliances, gaming devices, lighting controls, or anywhere a
mechanical switch or button may be found; they may also be used for some material sensing and control applications.
Each of the channels operates independently of the others, and each can be tuned for a unique sensitivity level by simply changing a
corresponding external Cs capacitor.
AKS™ Adjacent Key Suppression (patent pending) suppresses touch from weaker responding keys and allows only a dominant key to
detect, for example to solve the problem of large fingers on tightly spaced keys.
Spread spectrum burst technology provides superior noise rejection. These devices also have a SYNC/LP pin which allows for
synchronization with additional similar parts and/or to an external source to suppress interference, or, an LP (low power) mode which
conserves power.
By using the charge transfer principle, this device delivers a level of performance clearly superior to older technologies yet is highly
cost-effective.
This part is available in both 32-QFN and 48-SSOP lead-free packages.
The QT1080 is an easy to use, 8 touch-key sensor IC based
on Quantum’s patented charge-transfer principles for robust
operation and ease of design. This device has many
advanced features which provide for reliable, trouble-free
operation over the life of the product.
Burst operation: The device operates in ‘burst mode’. Each
key is acquired using a burst of charge-transfer sensing
pulses whose count varies depending on the value of the
reference capacitor Cs and the load capacitance Cx. In LP
mode, the device sleeps in an ultra-low current state
between bursts to conserve power. The keys signals are
acquired using two successive bursts of pulses:
Burst A: Keys 0, 1, 4, 5
Burst B: Keys 2, 3, 6, 7
Bursts always operate in A-B sequence.
Self-calibration: On power-up, all 8 keys are self-calibrated
within 350 milliseconds (typical) to provide reliable operation
under almost any conditions.
Auto-recalibration: The device can time out and recalibrate
each key independently after a fixed interval of continuous
touch detection, so that the keys can never become ‘stuck
on’ due to foreign objects or other sudden influences. After
recalibration the key will continue to function normally. The
delay is selectable to be either 10s, 60s, or infinite
(disabled).
The device also auto-recalibrates a key when its signal
reflects a sufficient decrease in capacit ance. In this case the
device recalibrates after ~2 seconds so as to recover normal
operation quickly.
Drift compensation operates to correct the reference level
of each key slowly but automatically over time, to suppress
false detections caused by changes in temperature,
humidity, dirt and other environmental effects.
The drift compensation is asymmetric: in the increasing
capacitive load direction the device drifts more slowly than in
the decreasing direction. In the increasing direction, the rate
of compensation is 1 count of signal per 2 seconds; in the
opposing direction, it is 1 count every 500ms.
Detection Integrator (‘DI’) confirmation reduces the
effects of noise on the QT1080 outputs. The ‘detect
integrator’ mechanism requires consecutive detections over
a number of measurement bursts for a touch to be confirmed
and indicated on the outputs. In a like manner, the end of a
touch (loss of signal) has to be confirmed over a number of
measurement bursts. This process acts as a type of
‘debounce’ against noise.
In normal operation, both the start and end of a touch must
be confirmed for 6 measurement bursts. In a special ‘Fast
Detect‘ mode (available via jumper resistors), confirmation of
the start of a touch requires only 2 sequential detections, but
confirmation of the end of a touch is still 6 bursts.
Fast detect is only available when AKS is disabled.
Spread Spectrum operation: The bursts operate over a
spread of frequencies, so that external fields will have
minimal effect on key operation and emissions are very
weak. Spread spectrum operation works with the ‘detect
integrator’ (DI) mechanism to dramatically reduce the
probability of false detection due to noise.
Sync Mode: The QT1080 features a Sync mode to allow the
device to slave to an external signal source, such as a mains
signal (50/60Hz), to limit interference effects. This is
performed using the SYNC/LP pin. Sync mode operates by
triggering two sequential acquire bursts, in sequence A-B
from the Sync signal (see above); thus, each Sync pulse
causes all 8 keys to be acquired.
Low Power (LP) Mode: The device features an LP mode for
microamp levels of current drain with a slower response
time, to allow use in battery operated devices. On detection
of touch, the device automatically reverts to its normal mode
and asserts the DETECT pin active to wake up a host
controller. The device remains in normal, full acquire speed
mode until another pulse is seen on its SYNC/LP pin, upon
which it goes back to LP mode.
AKS™ Adjacent Key Suppression is a patent-pending
feature that can be enabled via jumper resistors. AKS works
to prevent multiple keys from responding to a single touch, a
common complaint about capacitive touch panels. This can
happen with closely spaced keys, or with control surfaces
that have water films on them.
AKS operates by comparing signal strengths from keys
within a group of keys to suppress touch detections from
those that have a weaker signal change than the dominant
one.
The QT1080 has two different AKS groupings of keys,
selectable via option resistors. These groupings are:
y AKS operates in two groups of 4 keys.
y AKS operates over all 8 keys.
These two modes allow the designer to provide AKS while
also providing for shift or function operations.
If AKS is disabled, all keys can operate simultaneously.
Outputs: There are two output modes: one per key, and
binary coded.
One per key outputs:
key. This mode has two output drive options, push-pull and
open-drain. The outputs can also be made either active-high
or active-low. These options are set via external
configuration resistors.
Binary coded outputs:
one possible key in detect. If more than one key is detecting,
only the first one touched will be indicated.
Simplified Mode: To reduce the need for option resistors,
the simplified operating mode places the part into fixed
settings with only the AKS feature being selectable. LP
mode is also possible in this configuration. Simplified mode
is suitable for most applications.
In this mode there is one output pin per
In this mode, 3 output lines encode for
lQ
2QT1080 R11.03/0905
1.1 - Wiring
Table 1.1 Pinlist
32-QFN
Pin
5
-
48-SSOP
Pin
OscillatorIOSC374
38, 39, 40,
41, 42
I/OSNS0436
I/OSNS1458
I/OSNS24710
I/OSNS3112
I/OSNS4314
I/OSNS5516
I/OSNS6718
I/OSNS6K819
I/OSNS7920
11, 12, 13,
14, 15, 16
2123
‡
Pin Type
ICMOS input only
I/OCMOS I/O
OCMOS push-pull output
ODCMOS open drain output
O/ODCMOS push pull or open-drain output (option selected)
PwrPower / ground
Sense pin and
option select
Sense pin and
option select
Sense pin and
option select
Sense pin and
option select
Sense pin and
option select
Sense pin and
option select
Sense pin and
option select
Sense pin and
mode select
Sense pin and mode
or option select
Out 2O/ODOUT_22727
Out 3O/ODOUT_32828
Resistor to Vdd and optional
spread spectrum RC network
To Cs0 and/or
option resistor
To Cs1 and/or
option resistor*
To Cs2 and/or
option resistor*
To Cs3 and/or
option resistor*
To Cs4 and/or
option resistor*
To Cs5 and/or
option resistor*
To Cs6 and/or
option resistor*
To Cs6 + Key and/or
mode resistor
†
To Cs7 and/or mode resistor
or option resistor*
Also, binary coded output 2
In binary coded mode, these
pins are clamped internally to
Vss
100K resistor to VssSpread spectrum driveSpread spectrumODSS331
†
If UnusedNotesFunctionTypeName
-Leave open--n/c34 -
VddActive low resetReset inputI/RST352
-+2.8 ~ +5.0VPowerPwrVdd363
-
-Leave open--n/c
Option resistor
OpenTo Cs0 + KeySense pinI/OSNS0K447
Open or
option resistor*
OpenTo Cs1 + KeySense pinI/OSNS1K469
Open or
option resistor*
OpenTo Cs2 + KeySense pinI/OSNS2K4811
Open or
option resistor*
OpenTo Cs3 + KeySense pinI/OSNS3K213
Open or
option resistor*
OpenTo Cs4 + KeySense pinI/OSNS4K415
Open or
option resistor*
OpenTo Cs5 + KeySense pinI/OSNS5K617
Open or
option resistor*
Open or
mode resistor
Open or mode
†
or option
resistor
resistor*
OpenTo Cs7 + KeySense pinI/OSN7K1021
-Leave open--n/c
-0VGroundPwrVss1722
-Leave open--n/c18, 19, 20 -
Vdd or VssRising edge sync or LP pulseSync In or LP InISYNC/LP
OpenActive = any key in detectDetect StatusO/ODDETECT2224
-Leave open--n/c23, 24 OpenAlso, binary coded output 0Out 0O/ODOUT_02525
OpenAlso, binary coded output 1Out 1O/ODOUT_12626
Open
Open
OpenOut 4O/ODOUT_42929
Mode resistor is required only in Simplified mode (see Figure 1.2)
* Option resistor is required only in Full Options mode (see Figure 1.1)
‡
Pin is either Sync or LP depending on options selected (functions SL_0, SL_1, see Figure 1.1)
lQ
3QT1080 R11.03/0905
Figure 1.1 Connection Diagram - Full Options; Shown for 32-QFN Package
KEY 3
KEY 4
KEY 5
KEY 6
KEY 7
Vunreg
R
SNS3
10K
R
SNS4
10K
R
SNS5
10K
R
SNS6
R
SNS7
10K
10K
4.7nF
4.7nF
4.7nF
4.7nF
4.7nF
*4.7uF
C
S3
C
S4
C
S5
C
S6
C
S7
+2.8 ~ +5V
Voltage Reg
2.2K
R
S3
Vdd / Vss
2.2K
R
S4
Vdd / Vss
2.2K
R
S5
Vdd / Vss
2.2K
R
S6
Vdd / Vss
2.2K
R
S7
Vdd / Vss
MOD_1
POL
OUT_D
SL_0
SL_1
*4.7uF
VDD
*100nF
3
SNS3
SNS3K
SNS4
SNS4K
SNS5
SNS5K
SNS6
SNS6K
SNS7
SNS7K
VDD
12
1M
13
14
1M
15
16
1M
17
18
1M
19
20
1M
21
2
/RST
QT1080
*Note: One bypass cap to be tightly wired
between Vdd and Vss. Follow manufacturer’s
recommendations for input and output capacitors.
11
SNS2K
SNS2
SNS1K
SNS1
SNS0K
SNS0
OSC
10
9
8
7
6
4
MOD_0
1M
AKS_1
1M
AKS_0
1M
VDD
Rb1
Rb2
32-QFN
1
SS
OUT_7
OUT_6
OUT_5
OUT_4
OUT_3
OUT_2
OUT_1
OUT_0
32
31
30
29
28
27
26
25
SYNC or LP IN
DETECT OUT
22
23
24
VSS
SYNC/LP
DETECT
4.7nF
R
2.2K
2.2K
2.2K
S2
C
S2
4.7nF
R
S1
C
S1
4.7nF
R
S0
C
S0
Vdd / Vss
Vdd / Vss
Vdd / Vss
Recommended Rb1, Rb2 Values
Vdd Range Rb1 Rb2
2.8 ~ 3.59V 12K 22K
3.6 ~ 5V
15K 27K
100nF
R
SNS2
10K
R
SNS1
10K
R
SNS0
10K
OUT_7
OUT_6
OUT_5
OUT_4
OUT_3
OUT_2
OUT_1
OUT_0
OUT_0
KEY 2
KEY 1
KEY 0
Table 1.2
AKS / Fast-Detect Options
Table 1.3
Max On-Duration
Table 1.4
Polarity & Output
Table 1.5
SYNC/
LP Function
FAST-DETECTAKS MODEAKS_0AKS_1
OffOffVssVss
EnabledOffVddVss
OffOn, in 2 groupsVssVdd
OffOn, globalVddVdd
MAX ON-DURATION MODEMOD_0MOD_1
10 seconds (nom) to recalibrateVssVss
60 seconds (nom) to recalibrateVddVss
Infinite (disabled)VssVdd
(reserved)VddVdd
OUT_n, DETECT PIN MODEPOLOUT_D
Binary coded, active high, push-pullVssVss
Direct, active low, open-drainVddVss
Direct, active high, push-pullVssVdd
Direct, active low, push-pullVddVdd
SYNC/LP PIN MODESL_0SL_1
SyncVssVss
LP mode: 110ms nom response timeVddVss
LP mode: 200ms nom response timeVssVdd
LP mode: 360ms nom response timeVddVdd
lQ
4QT1080 R11.03/0905
Figure 1.2 Connection Diagram - Simplified Mode; Shown for 32-QFN
SMR resistor installed between SNS6K and SNS7.
KEY 3
KEY 4
KEY 5
KEY 6
KEY 7
DETECT OUT
Vunreg
R
SNS3
10K
R
SNS4
10K
R
SNS5
10K
R
SNS6
10K
R
SNS7
10K
LP IN
4.7nF
4.7nF
4.7nF
4.7nF
4.7nF
*4.7uF
C
S3
C
S4
C
S5
C
S6
C
S7
+2.8 ~ +5V
Voltage Reg
R
S3
2.2K
R
S4
2.2K
R
S5
2.2K
R
S6
2.2K
R
S7
2.2K
SMR
*4.7uF
VDD
*100nF
3
SNS3
SNS3K
SNS4
SNS4K
SNS5
SNS5K
SNS6
SNS6K
SNS7
SNS7K
VDD
12
13
14
15
16
17
18
19
1M
20
21
2
/RST
QT1080
*Note: One bypass cap to be tightly wired
between Vdd and Vss. Follow manufacturer’s
recommendations for input and output capacitors.
SNS2K
SNS2
SNS1K
SNS1
SNS0K
SNS0
OSC
11
10
9
8
7
6
4
AKS_0
1M
Vdd / Vss
VDD
Rb1
Rb2
Recommended Rb1, Rb2 Values
4.7nF
R
S2
2.2K
4.7nF
R
S1
2.2K
4.7nF
R
S0
2.2K
Vdd Range Rb1 Rb2
2.8 ~ 3.59V 12K 22K
3.6 ~ 5V
R
10K
C
S2
R
10K
C
S1
R
10K
C
S0
15K 27K
SNS2
KEY 2
SNS1
KEY 1
SNS0
KEY 0
32-QFN
22
23
24
VSS
SYNC/LP
DETECT
SS
OUT_7
OUT_6
OUT_5
OUT_4
OUT_3
OUT_2
OUT_1
OUT_0
1
32
31
30
29
28
27
26
25
100nF
OUT_7
OUT_6
OUT_5
OUT_4
OUT_3
OUT_2
OUT_1
OUT_0
OUT_0
Table 1.6
AKS Resistor Options
Table 1.7
Functions in Simplified Mode
Output Drive,
SYNC/LP pin
Max on-duration delay
Detect Pin
Polarity
FAST-DETECTAKS MODEAKS_0
EnabledOffVss
OffOn, globalVdd
Direct outputs, push-pull, active high
200ms nom LP function; sync not available
60 seconds (nom)
Active high on any detect
lQ
5QT1080 R11.03/0905
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