Quantum Q250, Q280 Technical Reference Manual

Q200

Series™

Intelligent Disk Drives

Technical Reference Manual

For Q250, Q280

Disk Drives

Q200

SERIES

tm

INTELLIGENT DISK DRIVES

Q250jQ280

DISK

DRIVES

Technical

Publication

Reference

No.

REV

A

Manual

81-45528

PREFACE

This
the
technicians

integrating

Quantum
products

or

Additional

following~manuals:

Publication
Quantum

Quantum

ANSI

Quantum

Representative,

spare
Publication

manual

Q250

contains

and

and
them

reserves

without

improvements

information

No.

81-45233
81-45416

X3.131-1986

publications

parts.

No

Q280

engineers

the

in

or

81-45528

rigid

into

incurring

units

may

technical

disk

evaluating

systems.

right

to
any

previously

on

the

Title
Q250/Q280

Q200
Small

may

be

Series

Computer

be

ordered

Rev.

reference

drives.

make

changes

obligation

Q250

Disk

and

Drives.

Programmer's

System

requested

from

KL587

UL/CSA/VDE

information

Information

or

maintaining

to

sold

or

Q280

Interface

from

Quantum

and/or

incorporate

shipped.
is

given

OEM

Manual

Manual

your

Quantum

in

describing

is

intended

the

drives,

improvements

such

in

the

(SCSI)

Sales

the

same

manner

for

or

to

its

changes

as

CSA

certification

VDE

Model
material

Q250

and

shipment.

~arranty

and

representative.

Quantum

The
and
u.S.

service

product

is

the

Patents

Copyright
Q200
AIRLOCK

Printed

Series

is
in

UL

recognition

certification

and

Q280

workmanship

The

warranty

further

center

described

subject

are

1987

Quantum

and

a

registered

DisCache

U.S.A.

granted

disk

details

All

requests

herein

of

allowed

expected

granted

under

granted

WARRANTY

drives

for

a

period

includes

can

for

in

your

area.

PATENTS

is

pending

to

issue

Corporation.

are

trademarks

trademark

under

File

per

are

warranted

parts
be

obtained

service

covered

in

All

of

Quantum

Nos.
File

of

one

and

by

patent

1987.
rights

of

File

No.
LR496896-8
No.

11342-3250-1002

against

year

labor.

from

should

u.S.

be

Patent

applications

reserved.

Quantum

Corporation.

E78016

and

defects

from

your

This

date

is

Quantum

directed

No.

Corporation.

LR496896-11

in

of

a

limited

sales

to

the

4,538,193,

from

which

ii

PREFACE

TAB

L E o F

CON

TEN

T S

. .

ii

SECTION

1.1

1.2

Features
Logic

SECTION

2.1

Head

2.1.1

2.1.2

2.1.3

2.1.4

2.1.S

2.1.6

2.1.7

2.2

Drive

2.2.

2.2.2

2.2.3

2.2.4

2.2.S

2.2.6

2.2.7

2.2.8

2.3

PCB

2.3.1

2.3.2

2.3.3

2.3.4

2.3.S

2.3.6

2.3.7

2.3.8

2.3.9

2.3.10

2.4

2.S

2.6

Power-Up
Read
write

1.

INTRODUCTION .

. . . . . .

Conventions

2.

PRINCIPLES

Disk

Assembly
Base
Disk
Rotary
Headstack

Automatic
DC

Drive

Air

Electronics.

1

Disk
Simplified
SCSI
SCSI
SCSI
Power
Shorting
Flex

Functional

Power-On-Reset
Motor
Electronic
S080
Servo
Actuator
Read/Write
FYLO
DICEY
Microprocessor

Sequence/Recalibration.

Command

Command

..

casting
Stack

Assembly.

positioner

Assembly.
Actuator

Motor.

Filtration.

Format

Explanation--Block

Bus

Physical

Bus

Signal

Bus

Timing.

Requirements.

Plug

Circuit

Elements.

Control

Return

SCSI

Bus

Control,

Positioning

Circuit.

Timing

Data

Controller

Controller

Sequence.

Sequence.

OF

OPERATION

(HDA)

. . . . . .

Assembly.

..

. . .

. . . .

Assembly

(Actuator)

. . . . . . . . . .

Lock

(AIRLOCK)

. . . . .

...

.

..

. .

.

..............

. . . . . . . . .

Interface.

Descriptions

.

..
. . .

Options.

............

......

..

.

....................

.

..

(POR)

and

Circuit

Spring.

Controller.

AMC

and

...............

Servo

.

Warm

. . .
. . .

AGC.

circuit.

. . . . . . . . . . . .

IC,

and

IC.

and

EPROM

. . . . . . . .

.

..

.

..
..

.........

.........

.........

..

Diagram

......

...........

...........

Reset

..

. . .

.

..

xtal

........

.........

.

..........

...........

. . .

. . . . . . . .

. . . . . . . .

.

......

.

......

.......

.......

.......

.......

.

......

. .

........

.

.....

......

..
.

.....

..

..

Oscillators

..

......

.

.

1-1

1-1

1-2

2-1

2-1
2-1
2-2
2-2
2-2
2-2
2-2
2-3
2-4
2-4
2-4
2-8
2-10
2-11

2-14
2-16
2-19
2-19
2-19
2-20
2-21
2-21
2-23
2-27
2-27
2-29
2-30
2-32
2-32
2-33
2-33

SECTION

3.

ENGINEERING

DRAWINGS

.

iii

3-1

.

SECTION

4.

APPLICATIONS . .

. . . . . .

4-1

4.1

4.2

4.3

Special

4.1.1

4.1.2

Errors

4 • 2 • 1

4.2.2

4.2.3

4.2.4

Grounding,

SECTION

5.1

5.2

5.3

5.4

5.5

Maintenance
Level
Level
Connector
PCB

5.5.1

5.5.2

5.5.3

SECTION

6.1

6.2

Spare
Reference

Considerations.

-REQ/-ACK
Hints
and
Errors.
Allocating
Creating
Updating

5.

MAINTENANCE.

1

Maintenance.

2

Maintenance.

Waveforms

Special
Techniques
Test

6.

PARTS

Parts

Handshake.

for

Software

Media

Defects.

. . . . . . . . . . . . . .

Replacement
the
the

Electrostatic

Precautions.

Maintenance.

and

Techniques.

Test

and

Connector

LISTS

List

Parts

...

....

List(s)

. . . . .

Driver

writers

. . . . . . . .

Sectors.
Defect
Drive

Lists.

Using

the

Discharges,

. .

. . . . . . . . .

. . . . . . . . .

. . .

. . . .

..

. . . . . . . .

Equipment

Waveform

J5

Signals.

...............

Descriptions

.

.

..

..
..

.

. . . . . .

Defect

and

Lists

EMI

..

..

............

.

.........

........

. . . . . .

.

......

...

.......

.....

. .

.

.....

..

..

....

.

....

.

...

...

...

..

. •

.•

..

. .

4-1
4-1
4-3
4-5

4 - 5

4-6
4-8
4-9
4-10

5-1
5-1

5-1
5-2
5-2
5-2
5-2
5-3
5-4

6-1
6-1
6-2

iv

LIS

T

o F

FIG

U

RES

2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9

2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17

3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12

4-1
4-2
4-3
4-4
4-5

Exploded
Inside
Disk
Electronics
J1
SCSI
SCSI
Drive
General
Connector

5080
5080
Servo
Read
DICEY

Power-Up
Read
write

Printed
Schematic,
Schematic,
Schematic,
Printed
Schematic,
Schematic,
Schematic,
Printed
Schematic,
Schematic,
Schematic,

-REQ/-ACK
Buffer
In-Line
In-Line
Sparing

View

Format:

Connector.

Bus.
Bus

Startup

PCB

Conceptual
Interface

AMC

Circuit

Block

Command

Command

Circuit

Circuit

Circuit

Full

Sparing
Sparing

of

View

Timing

Locations

Sequence.

Handshake.

. . . . . .

of

Drive,

Wedges,

Block

. . . . . .

Typical

Current

Layout;

and

ADC

Waveforms

Diagram.

Sequence.

Sequence

PCB-7,
PCB-7,
PCB-7,

PCB-8,
PCB-8,
PCB-8,

PCB-9,
PCB-9,
PCB-9,

and

Field-Found

Showing

Sectors,

Diagram

Circuit

Diagram

Profile

Plug,

Block

Diagram

Circuit

. . . . .

.. ..

Board

Board

Board

Empty
of
Overflow

Parts

Sheet

Sheet

Sheet

Parts
Sheet
Sheet
Sheet

Parts
Sheet
Sheet
Sheet

Q250/Q280
Ratios.

Defective

..

Air

..
..

of

. . . . • . . . . . . . . . . . .

Terminator

Diagram.

. . . . . . .

Waveforms.

. . . . . . . . .

. .

..

. . . . .

Locations

1

· ·

2

· · · · · · · ·

3

· · · ·

Locations

1

·

2

· · ·

3

·

·

Locations

1

·

2

·

3

· · ·

Sectors.

of

Defective

Defective

......

Filtration.

and

Tracks.

............

.....

a

Signal

. . . .

. . . .

..

. . . . .

...

· ·

· · · · · ·

·

·

· · · ·

·

Line

..

and

.........

· . . . . . . . . 2

...

.

..

.

(PCB-7)

· ·

·

· · · ·

(PCB-8)

·

· ·

·

· ·

(PCB-9)

·

. . . . . .

. . . . . . . .

.....

.......

......

· . . . . . . .

· .

..

· . . .

· . . . . .

· . . . . .

· .

..

· . . . . . .

·

· ·

·

·

· ·

· ·

· · ·

·

· · · ·

· · · ·

·

·

· ·

· ·

·

· · ·

· · · · · · ·

· ·

·

Target

. . . . . . . . . . . . . .

Sectors.

· ·

Sends

. .

..

Sectors

. . . . . . . .

Data

·

·

. .
.

...

. . . . . .

. .

..

.

·

·

·

·

·

·

· ·

·

·

·

·

·

·

2-1
2-3
2-5
2-6
2-9
2-10
2-13
2-16
2-17

-2
2-22
2-25
2-28
2-31
2-34
2-35
2-36

3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13

4-2
4-3
4-7
4-7
4-8

2

5-1
5-2
5-3

Test
Test
Test

Waveforms(1)
Waveforms(2)
Waveforms(3)

v

· . . . .

· .

· . . . . .

5-6
5-7
5-8

2-1
2-2
2-3

J1

Pin

Assignments.

DC

Power

Requirements

Microprocessors

LIS

and

T o F

. . . .

Buffer

.

.....

RAM.

TAB

..

. . . . .

.

L E S

...

. . . • . •

· • •

.

2-9
2-15

2-32
4-1
5-1

Available
Test

Connector

Spare

and

J5

Defective

Signals

. .

Sectors

.

· . .

· . •

4-8

5-5

vi

1.1

Features

Q250
System

and

Interface

plug-in

(PCB).
electronics
and

actuator

the

flex

The

following

throughput:

o

o

o

o

Q280

EPROM
These

except

rotor

circuit

Seeks
processed

14

KByte

and
Optional

(See

concerning
Cylinder

accessing

drives

(SCSI)

IC,

both

drives

the
are

inside

features

are

FIFO

from

the
DisCache

the

Q200

and

feature

on-board,

controllers,

models

require

spindle

use

no

motor,

contained

the

sealed

of

the

Q250/Q280

initiated

immediately--other

simultaneously.

data

SCSI

buffer

bus

increases

Series

this

data

option.)

head

skewing

sequentially

ANSI-standard,

and,

the

same

operational

headstack,

on

the

PCB. A

assembly.

drives

balances

as

well

as

data

Programmers

scheme

across

with

the

printed

adjustments.

single

enable

the

to

and

buffer

Manual

minimizes

cylinder

Small
exception
circuit

flex

circuit,

IC

high

commands

transfer

from

size

for

the
to

details

latency

boundaries.

Computer

board

All

is

mounted

data

are

of

drive.

60

of

a

heads,

data

to

KBytes.

when

on

o
o

Defect

Multiple
to

o RLL

on

management

2

Kbytes.

1,7

the

disks.

scheme

block

transfer

(run-length-Iimited)

minimizes

of

up

to

encoding

seeks

64K-1

to

spare

blocks,

increases

each

data

sectors.

with

density

up

1-1

SCSI

commands

management,

Programmable

initially
defective
to

reformat,
correcting
be

handled

of

17

bits,

relieve

error

options

and

throughout

sectors

(2)

code

in

the

or

correction,

can

data

(ECC) ,

host

detect

the

host

allow

the

be

automatically

can

be
or
computer.

three

users

product's

corrected

(3)

burst

system

and

flexible

all

of

physical

life.
reassigned
with

error

The

ECC

errors

many

tasks,

sector

ways

For

a

Reed-Solomon

detection

can

correct

of

17

addressing.

to

handle

example,

without

and

bits

such

correction

one

each.

as

defect

defects

(1)

the

error

burst

need

can

error

Q200

Series

factory-written
thermal
headstack
which
bit

sizes

1.2

Signals

level,

document,

"-ACK,"

when

other

Signal
Asserted
Asserted

use

and

of

they

signals,

and

assembly
a

track

512,

Logic

on

and

the

and

are

Type

when
when

tm

drives

in

mechanical

dedicated

densities
1024,

Conventions

the

SCSI

false

or

names

the

timing

low,

as

low

high

employ

wedges

effects

are

minimized,

servo

ensure

and

2048

bus

are

non-asserted

of

such
diagrams

as

they

on

the

a

hard-sectored

between

which

surface.

high

bytes

all
signals

might

PCB,

are

Examples

-paR

+POR

all

in

data

are

true

when

are

are

drawn

be

observed

indicated

format

sectors

tend

to

comparison

In

addition,

integrity.

supported.

or

asserted

they

are

always

to

as

on

all

misalign

with

when

at

high

preceded
show
with

the
an

follows:

with

servo

surfaces.

heads

other

drives

conservative

Logical

they

are

level.

by a minus,

signals

oscilloscope.

data

on

the

block

asserted

Thus,

linear

at
In

low

this

as

Differential

Analog

Note

example,
the
"+ACK"

that

signals

on

the

ANSI

"-ACK"

as

timing

Standard

when

"ACK"

diagrams.

listing

in

Asserted

positive

WRITE

for

the

text,

when
than

CURRENT,

SCSI,

connector

and

1-2

+READ

-READ
5 V

ANSI

pin

shows

SIG

is

SIG

X3.131-1986
connections,

positive

more

uses,

true

but

signals

for

describes

SECTION

2.

PRINCIPLES

OF

OPERATION

2.1

2.1.1
The

single
surface
brackets.

yo

'\~'ST

~:K

ASSEMBLY

for

Head
Base

piece,

the

See

r-

/

Disk

Assembly

Casting

aluminum

rest

Figure

HEADS

ACTUATOR

UPPER

AND

LOWER

MAGNETS

Assembly

of

the

2-1

alloy

drive

for

(HDA)

base

relative

casting

mechanism,

locations.

! I!

/t:tD

/'

'

/'

!

provides

PCB,

and

DISK

shock

CLAMP

MAGNETIC

a

mounting

DISK

RECIRCULATION
FIL

TER

BASE

mount

~

",

,

CASTING

/~/

FACEPLATE

Figure

2-1:

Exploded

View

MOUNTING

HOLES

~

/'

PRINTED CIRCUIT
BOARD

MOUNTING
BRACKET

2-1

2.1.2

Disk

Stack

Assembly

Three
hub
the
prevents
head
area,

2.1.3
The

permanent
the

aluminum

and

clamped

surfaces

head

surface.

and

when
Rotary

positioner

magnet

headstack
alternating
bolted
magnet

spindle

2.1.4

The

flex

to

the

plates.

or

Headstack

headstack

circuit,
positioner
entire

stack

mini-composite

steel

circuit,

flexures.

which

alloy

in

of

the

and

This
the

positioner

is

plates,

mounting

poles

base

These

off

of

assembly
and

assembly

is

at

slider-type

The

contains

disks

place.

disks,

media

only

disks

a

proprietary

hub

bonded

casting.

prevent

the

disk

Assembly

consists

rotary

balance

the

center

heads

(two

A

thin

and

wear

when
occurs
are

not

Assembly

and

a

shaft.

to

the

Resilient

surface.

positioner

each

heads,
and

a

read

for

the

Q250)

film

magnetic

lubricated

the

heads

in

the

landing

rotating

(Actuator)

design

rotary

magnet

The

consisting

single

magnets

plates
crash

the

of

heads

the

from

read/write

assembly.

of

other
the

so

mounting

mounted

actuator

are

preamplifier/write

are

metal

with

are

a

in

zone

at

full

phase

are

which,
stops
being

The

that

the

hub.

to

Whitney-style

connected

placed

carbon

contact

outside

speed.

of

upper
coil
composed

in
are
driven

heads,
head

mass

The

driver

on

is

sputtered

overcoat

molded
turn,

mounted

into

spacers,

arms

center
heads

by

the

chip.

the

with

the

and

of

are

and

are

spring

flex

motor

that
the
data

lower
to
two

to

the

the

rotary

of

the

on

2.1.5

AIRLOCK

zone,

The

is

and

dedicated
prevents
motor,
motor

it
starts

in

an
and
place.

spinning,

rotates,

2.1.6

To

DC

achieve

interference,
closed-loop
motor

3662

is

rpm.

Automatic

a

mechanical

is

covered

landing

damage

during
electronic
pulls

the

As

releasing

Drive

Motor

accurate

the

digital

dynamically

A

12 V motor

Actuator

by

zone

shipment.

return

headstack

dc

power

airflow

the

headstack.

speed

Q250/Q280

servo

balanced,

Lock

means

u.s.

Patents

for

spring

is

applied

increases,

control

uses

system,

control

(AIRLOCK)

of

locking

the

heads

When

extracts

into

the

with

a

brushless

synchronized

four

IC

commutates

and

dc
landing

to

and

minimum

pole,

the
pending
ensures

power

energy

the

motor

the

airvane

three

heads

tack
patent
data

is

removed

from

zone.

and

on

electromagnetic

dc

spindle

by

a 2

phase,

the

motor

in

the

applications.

integrity

from

the

spinning
AIRLOCK
the

disk

AIRLOCK

motor

MHz

clock.

and

rotates

coils

landing

and
the

latches

stack

in

a

The

in

at

2-2

accordance
degrees
start

up

with

around

and

signals

the

produces

motor.

dynamic

from

three

The

IC

also

braking

Hall-effect

limits

to

stop

devices
the
the

motor
motor

mounted

current
quickly.

at

120

on

contaminants
heavy

aluminum

ferro-fluid
through
are

final

the

processed

assembly
tromagnetic
reduced

by

teflon.

2.1.7

The
of

Air

Q250

11

microinches

. 3
FILTER

are

magnetic
bearing

and

Interference)

grounding

Filtration

and

Q280

MICRON

CIRCULATION

kept

housing,

core

coated

is

in

are

.

out

of

bolted

seals

prevent
or
to

a

Class

and

the

rotating

Winchester

the

drive

to

the

along

the

eliminate

100

clean

electrostatic

shaft

drives

by

base

outside

bearing
dust,

room

mounting

casting.
air

chips,
environment.
discharge

with

with

from

shaft.

a

brush

a

nominal

the

motor

Two

entering

Motor

and

oxides,

(ESD)

of

flying

inside

conductive

the

components

and

EMI

(Elec-

are

conductive

height

a

drive

Figure

2-2:

Inside

View

of

Drive,

2-3

Showing

Air

Filtration

To

keep
drives
sealed
disks
tion

filter,
shown,
equalize

the

are

with

pump

allows

internal

air

circulating

assembled

a

metal

the

enclosed

as

shown

outside

and

in

cover.

in

air

external

a

Class

air

Figure

into

within

100
During
through

2-2.

the
pressures.

the

clean

the

an

Another

sealed

drive

room
life
internal

area

free

environment,

of

the

0.3

0.3

micron

of

of

particles,

drive,

micron

the

drive

and

the

recircula-

filter,

to

the
then

rotating

not

2.2

2.2.1

Q200

seven

lists,
tains
area
data,

in

DICEY.

within
the
on

the
that
with

zation
ber,
and

At

3662
area,
passes
data

Series

tracks

serial

thirty-two

consists

and

the

data

tracks--written

disk.
identifies
the

data

area.
the

head

D),

a
rpm,

passes

under
transfer

Drive
Disk

Electronics

Format

drives

are

number
of

12

bytes

servo

In

the
areas,
In
number

checksum

a

complete
under
the

rate

employ

reserved

ID
sectors
a

preamble
of

ECC. A

wedges

a

wedge,

area

each

the

bursts,

(bursts

that

its

head

of

in

about

823
for

and

and

are

in

a

as

burst

allows
sector,

head

about

user
disk

factory

tracks
drive

test

thirty-two

and

synchronization

short

the
staggered
servo
a

wedge,

servo

track

postamble

tracks--three

sequence

and

begins
this
A

and
error

is

followed

C)

detection,

or

including

in

512

microseconds.

410

microseconds,

10 M bits/sec,

system

data.

servo

starts

ends

with

the

(refer

a

sector

wedge

i.e.,

to
uses
Each

wedges.

area,

flushes

so

they

with

with

a

preamble

by

the
and
and

The

giving

1.25

Figure

--

such

data

track

Each

512

bytes

the

ECC

times

as

don't

a

unique

servo

and

servo

number

a

short

512-byte

data

a

maximum

MBytes/sec.

2-3),

as

while
defect
con-

user

data

of

buffers

many

overlap

qual
burst.
synchroni­track

num-

(bursts

postamble.

data

itself

as
area

As

B

user

2.2.2

This
to

simplified

section

the

Simplified

summarizes

more

detailed

block

Explanation--Block

sections

diagram

the

of

operation

that

the

system.

2-4

Diagram

of

follow.

the

drive,

Refer

to

as

an

Figure

introduction

2-4,

a

SERVO

TRACKS

I /

-~~~-j

/

+

STo~A~

/

10i

----T----- -

TO

CENTER

OF

DISK

1

SERVO & DATA

TRACK

LAYOUT

TRACKS

QUAL.
AREA

50us

PRE

AMBLE

rr---w...---I--<- /

'-

'-

'-

'-

'-

S
Y
N
C

PRE
AMB

~

I e

'-

'-

'-

'-

TRACK

NO.

/

105

/

/

/

/

104

/

/

/

/

LE

'-

\

103

102

101

S

Y
N
C

'-

'-

'-

'-

'-

P

0

S

T

'-

~

512

452us

DETAIL

OF A BURST

CHECKSUM

HEAD

NO.

{

SECTOR

c=J

P

A&C)

B&D)

E

0

C

S

C

T

DATA

BYTES

(BURSTS

NO.

(BURSTS

[

[

LOGICAL~

TRACK

NO.5

DETAIL

OF

ONE

SECTOR

12

BYTES

Figure

2-3:

Disk

Format:

Wedges,

2-5

Sectors,

and

Tracks

Power-On

Voltages

low,

as

on-reset

until

At
the

the

initial

inner,
amplitude
calculates
optimize

may

be

when

the

(PaR)

circuit

voltages

power-on,
outer,

measurements

and

stores

seek

-------,

-------,

and

I

I
I
I

applied

power

are

the

and

settle

in

any

has

failed
resets
high

drive

middle

are

made

adaptive

times.

sequence.

the

enough

is

tracks;

and

gain

ELECTRONIC

RETURN
SPRING

When

or

has

just

major

and

circuits

stable.

recalibrated:

at

each

from

these

parameters

2MHz

UB

the

been

location,

the
that

RESET

uP

OTHER

CIRCUIT

dc

voltages

applied,

and

keeps

the

actuator

servo-burst

microprocessor

are

later

the

them

seeks

+12V

+5V

are

power-

reset

used

to

to

R/W

HEADS

______

HEAD

DISK

ASM

(HDA)

PRE-AMP

WRITE

DRIVER

...J

Figure

2-4:

Electronics

2-6

Block

ALE.

-WR.

-RD

*64KB

WITH

DISCACHE

Diagram

50BO

12MHz

SCSI

BUS

TO

HOST

Architecture
A

standard

Series

for
ferent

without

drive.

drives

EPROMS

DisCache.

8-bit

with

microprocessor

An

8031

it.

are

Firmware

used

Special

is

for

used

the
EPROMs

operated

for

is

in

Q250

drives

a
and

may

at

without

plug-in

Q280,

be

used

12

MHz

32

and

for

controls

DisCache,

K X 8

for

drives

custom

each
an

EPROM.

with

applications.

Q200
8032
Dif-

and

communication
MAD
controller
dynamic
of

serial
generates

SCSI

(multiplexed

RAM

is

the

IC,

RAM

(4

KBytes

DMA

controller,

conversions,

the

Bus

Operations

Communications
bus.

can
reconnect

Before

The

play

the

the

interface

and

disk
accumulated
read

the
option),
bus.
error

from,

data

Users

is

data

is

transferred
detected,

Servo

between

address/data)

manages

(64

KBytes

with

ECC

with

role

arbitration

is

in

buffer

is

checked
can

select

the

access
for

DisCache)

performs

handles

syndrome.

the

host

is

implemented

of

initiator

written

RAM

also

stored

with

through

the

via

the

major

bus.

to

drives

all

and

or

functions.

to,

a

(via

DMA
in

the

error-correcting
the

action

MODE

circuit

the

with

is

reserved

serial

RLL

encoding

other

with

target,

full

transfers).

RAM.

5080

to

SELECT

components
DICEY, a
buffer,

DisCache).
to

parallel

SCSI

a

5080
and

sector

After

via

DMA,

be

taken

command.

proprietary

which

for

Q250/Q280

and

decoding,

devices

SCSI

performs

of

incoming

As

a

full

code

then

in

the

is

over

is

16

The

upper

and

parallel

is

over

Controller

disconnect/

the

disk

sector

(at

the

on

to

event

the

data-

KBytes

2

use.

and

the

SCSI

is
is

user's

the

that

8-bit

of

KBytes

DICEY
to

SCSI

IC

data

being
read,

SCSI

an

that

is

While
tion
position
microprocessor
tion
output
New
bursts,
decelerates,
seek

As

the
the
processor
tude,

track-following,

are

stored
at

DAC

track

(digital-to-analog

is

converted
and

forming

in

the

servo

AMC
servo

bursts

(amplitude

ADC
reads

if

possible.

in

buffer

all

times.

immediately

sector

a

closed

the

actuator

shortest

pass

measurement

(analog-to-digital

head

track

When a

to

a

numbers

time.
under

position

Once

and

RAM--the

starts

converter)

high

current,

are

loop.

via

the

the

from

the

head

sector

microprocessor

READ

a

or

seek

read

The

microprocessor

head

head,

their

circuit),

converter).

the

is

on

2-7

numbers

WRITE

by

via

which

on

the

position

and

burst

track,

of

knows

command

commanding

the

MAD

drives

fly

from

DAC

amplitudes

placed

When

with

the

the

the

current

the

exact

arrives,

the

head

bus.

the

The

actuator.

the

DAC

servo

accelerates,

to

achieve

are

measured

on

the

MAD

seeking,

the

highest

microprocessor

posi-

the

posi-

then

the

bus

micro-

ampli-

head

by
by

keeps
position
each
bursts

side

the

A

head

so

of

and

following

that

the
D

on

the
data

logical

the

amplitudes

track

are

track

track

exactly,

of

the

equal.

a

are

two

For

kept

by

adjusting

servo

example,

equal.

bursts

in

the
written
Figure

head

on

2-3,

There
Each
amplified

(automatic-gain-control)
differentiated
a
data
drop-outs
for

write
The

(under
the

2.2.3
A

necting
standard
Universal
the
AMP

(without
should
backwards.

is

one

head

pulse

and

every

preamplifier/write
head,

50-pin

mating
receptacle

can

first

detector.

clock

rare.

magnetic

command

which

SCSI

connector

to

the

SCSI

Header

connector

strain

not

be

head

either

by
to
signals

of

writes
Bus

standard

single-ended

PIN

relief),

used

for

each

read

the

preamplifier

find

RLL

the

connector

the

A

phase-locked

for

1,7

transition

driver

microprocessor)

magnetic

Physical

is

provided

improperly.

1-499508-2
due

to

surface:

or

write.

amplifier.

zero
DICEY.

encoding

Interface

SCSI

bus.
non-shielded
and

or

equivalent.

the

crossings,

loop

allows

on

the

chip

transitions

at

position

See

has

a

The

(with

danger

four
chip

Careful

inside

strain

on

When

in

That

circuit

1.33

disk.

and

Figures

connector

key

slot

recommended

Unkeyed

of

plugging

the

reading,

the

output

and

converted
derives

design

data

the

HDA

sends

on

the

J1

on

2-5

to

relief)

Q250,

the

HDA,

is

filtered,

makes

bits

selects

current

disk.

the

and

is

prevent

mating

or

mating

the

six

on

output

then

PCB
used.

connector

by

to

synchronized

drop-ins
to

be

the

reversals

for

2-9.

installing

connector

PIN

1-746195-2

connectors

the

is

an

then

pulses

stored

head

con­The

J1

is

in

Q280.

AGC

by

or

to

a

is

A

50-conductor
with
of
together

reflections,
same
satisfactory

connected

is

a

100

bus.

20

minimum

ohms

using

to

feet

flat
conductor

+/-

10%

a common

cables

Table

(6

2-1
transmission
ground;

meters),

cable

is

recommended.

of

different

gives
pin

a

or

size

cable.

J1

quality,

25

length

a

25-signal

of

pin

is

left

28

AWG
SCSI

To

minimize

impedances

assignments.

all

open.

suitable

2-8

twisted-pair

and

a

devices

discontinuities
should

odd

pins

Maximum

for

use

ribbon

characteristic

are

daisy-chained

not
Note
except

in

that

total

a

cabinet.

be
pin

and
used
to

25

cable

cable

impedance

signal

in

the

achieve

are

length

CENTER

KEY

SLOT

Ground
1

3

5

7
9
11
13
15
17
19
21
23

25
27

29
31
33
35
37
39
41
43
45
47
49

DDDDDDDDDDDDDDDCCCCCCCCCC
DOCOCDOCCCCCCDCCCCCCCCCCC

CONNECTOR

Figure

Table
Signal
2

4
6
8
10
12
14
16
18
20
22
24

26
28
30
32

34
36

38
40
42
44

46
48

50

Name

-Data

-Data

-Data

-Data

-Data

-Data

-Data

-Data

-Data
Ground
Ground
Ground
Open
Terminator
Ground
Ground

-ATN
Ground

-BSY

-ACK

-RST

-MSG

-SEL

-C/D

-REQ

-I/O

PCB

2-1:

Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit

POSITION

2-5:

0
1
2

3

4
5
6
7
P

Jl

Pin

Jl

(-DBO)
(-DBl)
(-DB2)
(-DB3)
(-DB4)
(-DB5)
(-DB6)
(-DB7)
(-DBP)

Power

#1

Connector

Assignments

(TERMPWR)

INDICATOR

2-9

2.2.4

All

signals

2-6

for

physical

provided
the

terminators

SCSI

are

a

typical
end
as

terminators.

Bus

of

Signal

true

circuit).

the

bus.

plugged

low

Descriptions

and

use
A

Three

Drives

in.

See

open

collector

termination

resistor

are

shipped

Figure

CAUTION

is

networks

2-9

for

drivers

required

from

locations

in
the

(see

at

sockets

factory

each

on

Figure
are

with

the

PCB.

5'1

Only

are

all

packages).

the

current

to

Plug-in

plugged

with

the

about

r---------

the
allowed
other

bus

carry.

a
PCB.

the

__

two

to

devices

If

drivers

from

terminator

in

correctly.

dark

band,

All

correct

~~----

devices

have
the

may

the

at

the

terminators:

on

the

bus

additional

be

damaged

+5 V supply

physical

(unplug

terminators

because

than

CAUTION

packages

On

and

must

terminators

orientation,

TERMPWR

__

~--------------~--~------~--------~

each

face

face

(PIN26)

are

package,
the

consult

ends

remove

all

the

48

polarized,
the

"1"

same

5V

of

the

terminators

three

are

they

rnA

will
they

and

pin

1

that

is

way.

Figure

SCSI

terminator

not

removed,

sink

are

must

is

be

marked

screened

If

in

doubt

2-9.

bus

from

more

rated

on

5V

~----~----~--------~---------------+--~------4---~------1

~----~----~--~----~---------------r----------T---~----~

DEVICE

WITH

TERMINATOR

Figure

"----------..

2-6:

SCSI

DEVICES

Bus.

-SIGNAL

GROUND

-------)

V

WITHOUT

Typical

2-10

TERMINATORS

Circuit

of

a

Signal

DEVICE

WITH

TERMINATOR

Line

Each

Q250/Q280

bus

driver

has

the

following

output

characteristics:

Each

True
False

signal

(Signal

(Signal

received

characteristics:

True
Maximum
False

Minimum
SCSI
Up

tion

to

Bus

eight

is

Information
low a defined

byte

a
that

of

total

comprise
described

(Signal

total

(Signal

input

Signals

devices

allowed

transfers

-REQ/-ACK

information

of

18

logic
an

briefly

-BSY (BUSY). An

used.

Asserted)

Non-Asserted)

by

Asserted)

input
Non-Asserted)
hysteresis

can

between

on

can
signals:

8-bit

DATA

below.

"oR-tied"

=

0.0

to

0.4

=

2.5

to

the

load

be

supported

only

the

Q250

=

0.0

=

-0.4

=

0.2

two
SCSI

or

Q280

to

=

2.0
V

SCSI

DATA

0.8

mA

to

dc.

on

devices

BUS

(request/acknowledge)

be

transferred

nine

BUS

signal

control

with

that

with

parity.

indicates

V

5.25

must

V

at

5.25

the

signals

dc

at

have

dc.

0.4

SCSI

at

are

handshake

each

Each

48

mAo

V

dc.

the

following

V

dc.

V

dc.

bus,
any

but

given

asynchronous

handshake.

and

nine

of

the

that

the

communica-

time.

and

protocol.

There

signals

signals

bus

is

input

fol-

One
are

is

being

-SEL
a

-C/D

whether

indicates

-I/O
direction
tiator.
also

-MSG

(SELECT).

target

to

reselect

(CONTROL/DATA). A

CONTROL

CONTROL.

(INPUT/OUTPUT).

of

data

Assertion

used

to

distinguish

(MESSAGE). A

A

or

-REQ (REQUEST). A
a

-REQ/-ACK

-ACK

(ACKNOWLEDGE).

acknowledgement

data

transfer

for

signal

an

initiator.
signal

DATA

information

A

signal

movement

indicates

signal

signal

A

signal

a

-REQ/-ACK

used

by

driven

driven

on

the

input

between

driven

driven
handshake.

driven

an

initiator

by a target

is

on

by a target

DATA

to

BUS

the

SELECTION
by a target
by a target

by

data

transfer

the

with

initiator.

and

an

initiator

to

select

that

DATA

BUS.

that

respect

RESELECTION
during
to

the

indicate

to

handshake.

a

target

indicates

Assertion

controls

to

This

MESSAGE

a

indicate

an

ini­signal
phases.

request

or

by

the

is

phase.

for

an

2-11

-ATN (ATTENTION). A
ATTENTION

condition.

signal

driven

by

an

initiator

to

indicate

the

-RST

(RESET).

-DB(7-0,P)
signal,
has

the

that

highest
significance,
defined
the

Data

(i.e.,

as

signal

parity

a
generate
have
valid

parity

during

TERMPWR.
terminations
event

of

2.2.5

Delay-time
signal
Thus,
without

conditions

the

considering

An

(DATA

form

priority

and

one

when

is

non-asserted.

-DB(P)
system
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contending

address

o.

The

values:

is

0;

with

2 . 0 ---- -- -- -

(A)

1 . 0

-r-

-

~-:-:

o

~

L

leU.e

t-o,

poweron

2-8:

Plug

top

view
and

Address

A2, A1,

drive.

therefore

for

7,

usually

three

plugs

A2

with

plugs

=

all
in

........

~~~ -~-

: : \ t : I

-

~~~~~

~

i

POR

~

, , ,

-~

aT

R --- --r --------

.~

lP

0 SP

;\

I

~~

--M ------

: j r 7

IV

I

10

--j-----

SECONDS

Drive

startup

options

of

the

PCB,

showing

connectors.

and

AO,

determine

The

address

4,

which

the

given

establish

A1

'plugs

A2

and

=

SCSI

to

2,

inserted,

A1

device

bus

the

a

AO = 1.

(address

~-

--- -- -

EO

I

15

:

..,

--~f

-

-- -----

IL

Jt

•

.j..~

TYPICAL
CURRENT.

Current

the

the

determines

wins

arbitration

simultaneously.

host,

3-bit

and

binary

with

the

address

6).

--

SEEK
t=3-40

MS

Profile

locations

unique
the

lowest

no

plugs

priority

Highest

number

is

of

shorting

address

if

several

priority

with

inserted,

7.

Drives

(0-

level

pri-

is

the

Enable

When

SCSI

use

DB(7-0,P)
Drives

installed)

Parity

shorting

bus

of

parity

are

is

enabled.

in

shipped

.

(EP)

plug

is

a

Section

EP
system

from

is

with

2.2.4
the

installed,

EP

removed,

option.

for

additional

factory

See

2-16

parity

parity
the

with

checking

is

description

information.

parity

enabled

of

not

data

across

performed.

of

signal

(plug

the

The

-

EP

P1
RD

55

EP

W5

A2
A1

RD

JUMPERS

(TEST

CONNECTOR)

SMS

5080

(U19)

TERMINA

TORS

J2

J5

J1

~~~_

J3

(MOTOR

CONNECTOR)

BUFFER

RAM

(U16, U17, U18)

MOTOR

Il-r------+--=---

EPROM

(U15)

W1D

8031
MICRO

(U13)

J4

DATA

SYNCRONIZER

PROCESSOR

LED

FYLO

DRIVER

ADC

DIFFERENTIAL

AMPLIFIER (U2)

(U9)

DAC' s
ACTUATOR

(U

(U3,

10)

(U4)

(U1)

U28)

Figure

2-9:

General
Locations

wait

When

STOP

Multiple

ing

received,
with

starts
seconds.

Spin
the

Option

WS

shorting

UNIT command

drives

the

system

a

drive

the

WS

shorting

spinning

Drives

(WS)

from

can

power

is

when

are

plug

the

then

supply.
ready

plug
power
shipped

PCB

be

Layout;

is

installed,

host

started

Once

within

not

installed,

is

applied,

from

via

2-17

Plug,

the

in

the

30

the

Terminator

the

motor

SCSI

bus

sequence

waits

before

to

avoid

and

Connector

for

spinning.

overload-

START/STOP UNIT command

seconds.

the

and

the

factory

motor

in

automatically

drive

this

is

ready

condition.

a START/

is

in

30

Self

Seek

option

(SS)

This
drive.
cutes
a

option

SCSI

with

a

bus.

malfunction

Drives

SS
Reset

not

are

installed).

option

Shorting
signal

(plug

If

-RST

not

cold
performs
resets
plete
and
result
takes

all

recalibration,

goes

if

six

commands.
If

warm

is

detected,
a

partial
phase.
useful

when

is

provided

shorting

"butterfly"

No

has

shipped

(RO)

plug

RO

(reset)

installed).

reset

a

is
POR
drive

to

the

a

drive

seconds,

reset

(RO

the

servo

Warm

reset

the

as

a

test

plug

seek

results

SS

pattern.

occurred.

from

the

determines

with

selected,

a

The

cold
Q250

(RO

(Power-On-Reset)

functions

including

reevaluates

SCSI

is

during

plug

drive

bus

free

cold

not
completes

reset

which

installed)

resynchronization,

typically

host

issues

method

installed,

are

given,

factory

whether

reset
and

plug

when

all

phase.

while

time

writing

requires

multiple

to

continuously

the

The

drive

but

with

a

SS

drive

(plug

Q280

never

installed)

the

-RST

write

shorting

Unrecoverable
writing.

the

drive

is

selected

the

and

goes

200

ms.

-RSTs.

drive
need

if

the

disabled

responds

installed)

assert
the

signal

to

disk,
plugs

cannot

current

to

the

It

exercise

continuously

not

drive

(shorting

to

drive

is

performs

except
read

Cold

reset

and

sector,

SCSI

is

particularly

be

connected
stops,

the

or

a

-RST.
immediately

detected:

wait

errors

typically

respond

the

-RST

bus

the

exe­a

plug

SCSI
warm

a

com-

Spin,

may

to

signal

performs

free

to

bus
reset

it

Both

warm
reset.
plug

not

External

If

an

Leave
Drives
Spare
For

the
with
tion

a

is

and

Drives

installed).
LED

external

W1

installed

are

shipped

Shorting

convenience

spare

affected

cold

are

(W1)

LED

Plug

shorting

by

resets
shipped

will

to

use

with

(P1)

of

customers,

plug

Pl.

meet

from

be

connected

the

W1

installed.

installed

the

the

LED

ANSI

on

drives

2-18

requirements

factory

to

J6,

the

in

position

face

are

set

for

remove

of

shipped

warm

shorting

the

Pl.

for

drive.

from

No

a

"hard"

reset

plug

the

drive

(RO

W1.

factory

func-

2.2.8
The

HDA,

of

the"

in

a

pose

inside

Flex

close

thin

16-pin

Flex

Circuit

Circuit

to

the
flexible
connector

preamplifier/write

the

drive.

is

heads

This

a

flexible

circuit

which

to

improve

driver
chip:

printed

is

mates

IC

the

clamped

with

(SSI

circuit

mounted

signal-to-noise

under

J4

501)

on

the

the

is

PCB. A

soldered

cover

in

the

ratio.

and

special

to

sealed

One

terminates

the

circuit

end

pur-

The

2.3

2.3.1

o

Selects
+BUF
through

o

switches
GATE.

o When

falling
multiplied
reversing
media

o
o

Amplifies

Detects

current

transitions

+WR

output

is
PCB
Power-an-Reset

the

HS2,

+BUF

DICEY.

from

writing,

edges

current

the

in

alternate

read

fault

while
UNSAFE.
the

differential

Functional

head

according

HS1,

reading

mUltiplies

of

+BUF

magnetic

signals

conditions

reading,

too

infrequent.

Elements

(PaR)

+BUF HSO,

to

w~iting

WRITE CURRENT. On

WR

DATA,

through

field

directions.

from

such

no

write

signal

and

Warm

to

three-bit

from

the

alternate

and

each

as

current,

If

faults

RDX

and

Reset

logic

the

microprocessor,

when

chip

DICEY

sources

sides

magnetizing

head

about

defective

and

are

RDY.

input

asserts

successive

the

of

the

the

100

times.

heads,

write

detected,

-BUF

coil,

spinning

write

data

asserts

WR

A

cold

paR
the
delay).
voltages

paR
delay
to
thresholds

reset
o Low
o

resets
actuator

is

released

that

initialize

is

SCSI

shorting

the

driver,

paR

dynamically

to

6 V.

ensures
are

triggered

supply

bus

voltage

signal

plug

microprocessor,

and

Transistor

11

ms

to

that

during

set

power

below

by:

-RST

installed

enables
brakes

switches

60

ms

the

power

up.

the

normal

asserted

in

DICEY,

the

the

motor

after

is

To

avoid

power

2-19

by

the

the

drive.

the

5080

electronic

by

perform

+5 V and
stable

multiple

operating

host,

SCSI

return

clamping

each
+12 V are

and

also

with

controller,

all

function.

allows

resets,

ranges

the

spring

coil

normal,

the

and

the

RO

and

(after

output

a
logic

paR

a

a

small

hysteresis

Overvoltage

drive

is

between

conditions

recalibrated,

the

are

not

typically

upper

detected.

and

taking

lower

After

six

thresholds

POR

seconds.

is

is

maintained.

released,

the

Circuit

See

(output
ence
11

to

the

CR12

60

Description
schematics

pins

to

ms
reference,
signals.

Pin

56

(-RESET

the

Q250/Q280:

RO

On
5080

plug
the

other

pulls

or

the
installed,
If

the

RO

plug

circuit

by

the

the
At

the

by

-RESET CAP, U29
gates
enables

is

unaffected.

microprocessor,

5080.
start

U24

and

the

13

and

produce

delay.

the

U6

CAP)
the

through

hand,

-RESET

-POR A
is

of

a

U26.

lines

in

SECTION 3

14)
the

When

(output

on
5080
Q28.

when

CAP

is

also

not

installed,

warm

then

Later,

via

DICEY

compare

signals

the

pin

the

5080

is

reset

the

host
pin
pulled

However,

which

reset,

deasserts

the

pin

for

the

the

supply

-PORA, -PORB,

voltage

1)

is

across

comparator

an

by

the

asserts

(now

has

an

low
Q28
a

warm

been

and
remains

flip-flop

the

microprocessor

AUX

6.

POR

voltages

deasserts

input

POR

circuit

-RST

output)

a

cold

reset

triggered

U29

SCSI

lines

circuit.

and

C24

rises

if

a

POR

on

the

low.

reset

turned

now

follows,

by

(Q = pin

-MSD,

clears

Comparators

to

voltage

+POR. C24

above

the

is

either

SCSI

If

the

is

off,

the

three

initiated

through

bus,

RO
triggered.
and

controlled

an

interrupt

9)

is

toggled

-C/D,

the

flip-flop

refer-

sets

the

plug

the

-I/O

U6

the

CR12

POR

at

the

is

POR

from

on

via

and

2.3.2

Refer
motor

three
rents

to

control

Hall-effect

through

replace
coils.
MHz

clock

R97.

Loop

controlled

output.

COIL A
to

generate

mine

that

revolution.

Motor

the

a

commutator

Speed

from

gain
by

C39,

to

COIL B

MOTOR

the

Control

schematic

IC

(U8)

devices

the

three

is

sensed

FYLO.

and

R95,

C40,

R96,
and

voltage

POSITION,

motor

Circuit

in

SECTION 3

senses

mounted

delta-wound

by

indicating
from

Starting

bandwidth

C35,

C4l

is

is

up

to

the

a

Hall

current

of

and

reduce

processed

which

speed.

for

the

differential

around

motor

when

to

signal

is

the

op-amp

C42.

C36

ringing.

by

the

microprocessor

The

2-20

circuit

output

the

motor,

coils.

commutate
and

compared

inversely

current

filters

comparator
signal

is

diagram.

signals

and

drives

The

Hall

current

in

proportional

integrator

the

integrator

U6

(output

checks

two

cycles

The

from

cur-

signals

to

U8

to

are

pin

to

deter-

per

the

the

a 2
to

2)

Q24

turns

processor

EMF

generated

whose

outputs

off

causes

the
by

are

motor
DICEY
the

spinning

clamped

when

to

-POR B is

deassert

motor

to

6

V,

asserted

-SPIN,
flows

producing

which
through

dynamic

or

when

turns

the

the
off
IC

drivers,

braking.

micro-

Q8.

Back

2.3.3

When

the
thus

At
delay

the

back

forcing

power-on-reset,

allows

discharges

and

Q14

motor

If
the
Only
zone;
drive

to

the

+12

+12

milliseconds

AIRLOCK
during

2.3.4

A

5080

CMOS

SCSI

technology

conform

meet

The
it
low

the

5080

is

and

strapped

selected

Electronic

drive
EMF

C36

turn

the

V

V

dc

5080

Controller

to

standard

ANSI

can

the

IOEN

when

is

powered

from

the

the

the

headstack

driver

and

on.

Twice

actuator,
dc

supply

is

maintained,

are

operates

this

period.

SCSI

reduces

standards,

operate

to

operate

pin

address

Return

slowing

-POR
clamps

then
has

required

about

Bus

IC

5 V

with
high.

bits

Spring

down,

motor,

into

turns

Q3

currents

the

U8

per

revolution

through

failed,

more

30

Controller

is

used

the

power

logic

and

levels.

are
various
with

Pins

MAD7-5

the

electronic

switching

the

landing

off

after

to

fall

current

Q7

Q14

the

circuit

current

to

move

the

seconds

to

implement

consumption.

The

connected

microprocessors;

an

8031

XOR

are

or

A7-A5

110

zone.

a

delay

to

a

integrator

passes

and

R42

is

supplied

actuator

later.

SCSI
directly

8032

are

(address

return

it

to

safe

current

to

still

Do

the

All
bus

by

tying

strapped

spring

the

set

by

level

output).

ground.

functions,

to

into

not

handle

SCSI

inputs

pins

to

the

in

this

range

utilizes

actuator,

C29.

(while

Q4,

from

the

the

the

actuator.

landing

the

interface.

and

of

the
SCSI
application

the

CONFIG

so

the

CO -DF).

This
Q5

Q7,

but

outputs

5080

bus.

pin

5080

if

is

On

command

the

drive

nected
Figure

emphasizes
shown

on

Registers

over

(1)

the

switch
deassert
nals

from
SELECTION/
logic

for

of

and

to

5080

2-10

is

the

the

schematics

in

the

MAD

bus.

the

SCSI

the

RESELECTION

arbitration.

the

microprocessor,

the

options

pins
a

IN

conceptual

external

5080

In

5080
bus
host,

from

signals,

and

are
this

and

set

0-5.

block
interfaces.
in

SECTION 3

written

way,

target

(3)

(4)

set

ARBITRATION

by

read

the

the

shorting

diagram

The
and

and

for

example,

to

initiator

the

the

programmable

2-21

5080

signals
in

read

state

phases.

reads

of

Figure

by

the

plugs,

the

5080.
mentioned

2-4.

the

microprocessor

the

microprocessor

mode,

of

SCSI
timing

The

SCSI
which

(2)

5080

Figure

assert

bus

for

address

are

below

and

control

the

provides

of

con-

2-11

are

can

sig-

SCSI

,--------------------------------------------1

I I

I I
I I

SCSI

\

REGISTERS/

CONTROL

LOGIC

V

t\

~

NTERFACE

1

r

\

-y

DMA

NTERFACE

STROBE

HOST

STROBE

DATA

(REG

6,7)

Figure

STROBE

ON

TROLLER

1.0

(REG

I
I

I I

L ____

2-10:

DMA

TO

HOST

REGISTER

5)

~~

MICROPROCESSOR

INTERFACE

5080

HOST

TO

DMA

REGISTER

STROBE

SELECT

----

Conceptual

READ

REGISTER

MUL

TIPLEXER

REG.O

REG. 1 REG.

~J

INPUT

PORT

~----~~-YI

2

I
I

____ J

Block

...-_--==:::;--- OPTIONS

Diagram

BUFFERED
llATA

DMA
TO/FROM

MADO-7
ADORESS/
DATA

roRD,

BUS

CmHROL

BUS

INTERRUPT
IOWR,

PLUGS)

~

1.S

I

~*=-r-

TTL

INPUT

(SHORTING

DICE {

ALE

Figure

SELECT

2-11:

WRITE

MULT

5080

2-22

HOST

IPLEXER

Interface

HOST
INTERFACE

SCSI

BUS

Diagram

The

microprocessor

edge

of

strobes

ALE
data

(address

from

strobes

latch

the

MAD

an

address

enable).

bus;

-IOWR

into

If

the

strobes

the

5080

5080

data

on

is

selected,

to

the

the

falling

MAD

-lORD

bus.

DICEY

controls

(buffered

o When

o When

Handshaking
DICEY)
buffer

and
RAM

arbitration

2.3.5
Before

2.2.2.
diagram
details

reading

Follow
of
of

Seeking

data)

5080.
to

HOST

RAM.
the

between

-DMA

without

logic

Servo

the
the

a

DMA

bus:

-DMA

-DMA
register.

-DMA

-DMAIENB

HOST

to

ACK

is

Control,

this
this
drive.
servo

read

I/O

I/O

is

CLK

is

or

asserted,

strobes

deasserted,

turns

DMA

register

DICEY

(from

and
DICEY).

intervention

set

by

AMC

section,

explanation

Figure

signals

write

the

the

and
read

2-3

in

on

by
12

on

the

to

the

the

onto

5080

DICEY
the
MHz

Servo

the

Figure

shows

wedges.

buffer

data

data

data

5080

the

is

handles

5080.
clock

AGC

summary

the

RAM

flow

from

is

the

flow

drivers,

bus.

controlled

Timing

from

description

2-4,

a

disk

over

is

from

bus

from

the

RAM

to

placing

by

-DMA

addressing

for

FYLO.

simplified
format

BDATAO-7

to

the

the

the

5080

data

REQ

of

the

5080

in

section

block

including

DMA

to

from

(to

the

While

a

numbers

position.

sures
how

the

nearly

processor

the

highest
responding
data

If
infers

the
Track

While
wedge

is

data

the

bursts

Following
track

are

servo-burst

when

the

written

drive

from

As

peak

the

attempts

amplitude,

to
invalid,
from

head

in

following,

stored

amplitudes

head

on

each

is

seeking,

the

data

each

amplitudes

bursts

that

data

all

bursts

position

the

next

in

is

centered,

side

in

wedge

are

to

use

because

burst.

from

wedge.

RAM

of

the
passes

in

from

the

as

in

the

the

read

servo

of

the
centered
the

servo

the

But

if

the

next

a

wedge

previous

track,
they

order

the

head

data

circuit
bursts,

under

burst's

under

track

head

the

largest

is

head

are

read.

to

center

equally

track--the

reads
thus

the

moving

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the

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microprocessor

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determining

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moving

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AMC

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microprocessor

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from

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amplitudes
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becomes
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To

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sured
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o

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Figure

or
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servo

head

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value,

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or

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2-12:

Servo

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2-25

ADC

Circuit

Waveforms

Refer
Figures
amplifier

3)
to
sistor
present.

At
transistor
C72,
During

ing
C72.
the

ing

to

in

transistor

a

proportional

the

initializing

current

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preamble
the

the

schematic

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is

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7,

beginning

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the

preamble

from

charge

signal,

current

5-1,

8)

5-2
SIG

array

current,

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of

13,

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the
accumulates

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and
U11

U11

a

burst,

14).
sample

period

current
until

would

5-3.

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full-wave
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sinks

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of

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in

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turn,
and

a

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asserts

SECTION

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differential

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rectify

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mirrored

AMP

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by

and

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signal

signal

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Q20

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on

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6,

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portional
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Follow
To

placing
strobes
DAC.
to
input
on
converts
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assert

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255

to

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overrides

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to

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8

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the

bits

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it

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the

output

charge

U12

2.5

3.7

Description

Servo
corresponding

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an

is

a

the

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user

AGC,

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DAC
emitter

high-current

the

1,

input.
asserted,
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AGC

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of

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on

C72,

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the
DAC

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signal

sets

circuit

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op-amp

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output.
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schematics

the

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output

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output

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voltage

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(decimal)

255

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3.

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on

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gain

gain

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2.3.6

Actuator

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tor

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ence

voltage--the
rents
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current.

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turns
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actuator

put

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voltage
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ground

inductive

reading

the

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to

255

another

is

obtained

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and

on

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stage

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across

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voltage

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128

following.

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error

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limit

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error

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time

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the

8

bits

bits

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into

output
DAC

amplifier;

full

even

range
though

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seeking,

connects

amplifier,

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dissipation

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amplifier.

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R43,

positioning.

from

output

constant;

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C63

across

refer

microprocessor

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actuator

of

input.

of

positive

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gain

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gain

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into
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input

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compensate

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op-amp

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output

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in

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schematics
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to

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U21

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to

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feedback

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the

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coil.

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actuator

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as

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compensates

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in

SECTION

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desired
on

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closes

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the

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to

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the

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actuator
gain

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chip

to

the

difference

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for

output

3.
actua-

MAD

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when

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the

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loop,

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to

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2.3.7

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drive,
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voltage
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voltage

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pulse

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output

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and

circuit

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across

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detector
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the

pole

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schematics

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coil

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fields

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that

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are

on

SECTION

on

the

head

by

the

to

the

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drive

emitter

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Figure

3.

the

disk
selected
chip

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the

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inputs.

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generate

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the

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pulse

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differential

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in

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peak

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gain

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time

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to

times

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keep

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to
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peak

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rapidly

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amplitude

C9

the

signal

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for

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disk.
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tive
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peaks

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signal,

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ferentiation

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output
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in

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data

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data
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high

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peak

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per

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preamble.

preamble,

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buffered

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Figure

2-13:

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qualify,

peaks

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set

a

pulse

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read,

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mode

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by

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the

AND
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at

asserts

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for

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must

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pulse

gate

15

MHz

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allow

lower

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bit

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high

rate

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signal

width,

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clock

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burst

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12)

input,

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preamble
preamble,

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phase

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signal

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crossings

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track
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head
to
onto
following,

jitter.

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synchronizes

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encoded

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signal

trigger

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output

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should

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the

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data

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with

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a

dif-

the

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be
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DATA

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pulses,

to

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a

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transfer.

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to

encoded
buffer

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RAM

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set
pump

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frequency,

the

current.

selected
write
See
SCSI

of

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write

Controller

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DICEY
the

six
the

write

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flex
non-inverting
inputs

current

CURRENT
output

on

Q21,
CURRENT.
near

zero.

C20,

PLL

loop

for

the

description

circuit

the

data
data.

circuit

are

to

ground.

of

the

inserting

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and

C21

and

R21

bandwidth

R19,

10

Mbit/sec

C15,

of

operation.

is

stored

from

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GATE

chip

buffers,

1A - 6A;

in

the

The

outer

tracks:

R22

reset,

set

the

the

VCO

and

and

C16
data

the

Flex

in

RAM

its

B-bit

when

from

it
preamplifier
used

the

corresponding

head

is

proportional

microprocessor

through

in

parallel

POR B turns

PLL
operating
damping,

compensate

Circuit,

In

write

and

form

detects

to

gain

rate.

mode,

passed

to

improve

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with

off

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and

bandwidth.

current.

and

integrate
for

section

data

to

DICEY

a

serial

a

user

to

area,

write

signal

outputs
to

the

compensates

it

asserts

R23

and

thus

reducing

C17,

phase

2.2.B,

received

stream

thereby

driver.

immunity

are

current

for

increasing

WRITE

the
shift,

via

1Y

the

AUX

C22

sets

C1B,

PLL

for

an

by

DMA.

of

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switching

U20

to

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from

lower

5,

CURRENT

the

and

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charge

and

are

outline

the

50BO

DICEY

RLL

contains
noise:

WRITE

turning

WRITE

to

2.3.B

FYLO
of

timing

the

is

a

pinout.

o

o

o
o

o

FYLO

custom

Timing

IC

functions.

FYLO

Accepts

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Derives

the

2 MHz, 12MHz,
Outputs
Controls

-RST

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AMP

servo-burst

Controller

proprietary

See

performs
+RAW

DATA,

DATA.

the

2

MHz

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the

servo

and

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device

the

clock
and

to

identify

IC,

to

U9

following

and

buffers

15

AMC

sample

AID

conversion

2-29

and

Quantum

on

the

from

MHz

the

clocks.

the

Xtal

Oscillators

that
schematics

functions:
the

signal

12

MHz

wedge

and

hold

by

incorporates

in

to

clock,

area.

timing

asserting

a

SECTION 3

produce

and

with

-CONVERT.

number

for

buffers

outputs

o

Asserts
through

+READ
the

read

GATE

data

to

indicate
synchronizer.

when

data

should

be

processed

o

o

Several

factured;

the

microprocessor,

a

metal

oscillator

(pins

3 -

2.3.9
DICEY

is
Quantum
U14

on

the

the

block

DICEY

performs
laneous
chips

on

Asserts
should

Asserts
DICEY
criteria,
the

correct

three
Note:

inhibited
writing

variations

the

PCB

can

at

module

6)

in

DICEY

a

custom

and

designed

schematics

diagram.

"glue

the

logic,"

PCB,

+PREVLD

be

present.

+QUAL

that

which

dc

erase

to

avoid

in

data

of

accomodates

with

U25,

or

with

U23

is

Data

data

All

several

and

to

ERR

the

wedge

are:

times,

fields.
overwriting

a

wedge.

in

the

the

crystal

a

15

(2)

a

driver

required

Controller

controller

by

Quantum

in

SECTION 3

pins

functions,

thereby

improving

indicate

to

indicate

area

(1)

and

(2)

Moreover,

sector

oscillator
either
MHz

crystal

dual-

ICs

in

only
IC

IC,

for

conform

listed

significantly

the

to

DICEY

to

does

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sector

no

pulses

the

servo

if

QUAL

(1)

a

frequency

a

metal

for

option

a

100-pin

the

Q200

for

the

to

standard

below,

drive

that

the

microprocessor

meet

and

echo

are

tracks,

the

microprocessor

ERR

circuits

12

MHz

and

associated

12

MHz

can

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device

series

pinout

including

reducing

reliability.

a

the

pulses
detected

is

asserted.

crystal

and

at

U25.

disk

and

5 V

valid

preamble

qualification

appear

in

writing

have

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driven

driver

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MHz

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proprietary

drives.

Figure

logic

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the

number

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is

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manu-

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for

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Controlled

over

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MAD

Microprocessor

it

can

write

status,
Performs

etc.

serial-to-parallel

conversions.
Encodes

from

means

the

that

all

disk,

by

microprocessor,

bus.

sees

to

control

data

written

using

the

code

DICEY

data

a

2/3

maps

2-30

as

to

two

which

a
transfer,

and

disk

RLL

data

communicates

set

of

34

registers

or

parallel-to-serial

and

decodes

(1,7)

bits

code.

into

read

The
three

to

all

with

to

determine

data

notation

code

DICEY

which

read

bits,

PlL

AD

1IA

AD

PRE

HI

811

DATA
DATA

CLOCK

VLD

..

DICEY

SERIAL

CHANNEL

RESISTER

I I

11

III

11

IC

BUS

..

-

•

,

BlFFEA

-

DATA

o

o

IF

ADDAIDATA

UTCI£D

ADDA.DUT

and

that

o

bits

Generates
after
and

pll

Os).

Detects
there

is

-

..

AUX

I/O

BUS

Figure

the

between

a

sync

locks

sync

a

drop

--

UP

INTERFACE

-"""

2-14:

encoded

each

time-out

on

pattern

out,

CONTROL

DICEY

bit

1

bit.

the

(100100)

drop

.....

,

MASTER

UNIT

Block

stream

error

preamble

in,

DMA

CONTROLLER

Diagram

has

if

(an

and

generates

or

shifted

BlFFER

AIlIlA.

-

BlFFER

CONTROLS

SCSI

INTEIFACE

between

sync

is

alternating

bit.

one

not

a

and

detected

field

sync

seven

of

error

Is

if

o

o

o

o

Controls
priority:
data,

DMA

cycles

Control

Disk

in

Can

and

and

the

read
the

access

(1)

(2)

microprocessor,

are

Unit,

write

serial

and

write

SCSI

bus)

sec.

to

buffer

disk,

including

controlled

synchronized

functions

channel,

to

buffer

at

the

RAM

via
user

and
by

are

(3)

a

state

to

the

controlled

synchronized

RAM

burst

transfer

2-31

DMA

data

5080

15

(to

transfers,

and

SCSI

machine
MHz

by a state

to

READ

and

rate

servo
controller.

clock

CLOCK.

from

of

in

both

in

position

the

from

1.25

this

Master

FYLO.

machine

the

disk

Mbytesj

o

Checks

buffer

RAM

during

initialization.
o
o
o

o

o

2.3.10

Q250

and

processors

DisCache

No

Yes

Generates
Refreshes

contains

LAD

0-7).
Provides
contains

4.2.1)

latches

additional
12-byte

.

Microprocessor

Q280

as

drives

shown

Table

Microprocessor

8031
8032

parity
Buffer

use

in

the

2-3:

and

checks

RAM.

for

the

low-byte

microprocessor

ECC

syndrome

and

EPROM

12

MHz

industry-standard

following

Microprocessors

Internal
Data

128
256

RAM

8

X
X 8

parity,

generator.

table:

FIFO
Buffer

16
64

EPROM

and

Kbytes
Kbytes

for

I/O

Buffer

RAM

buffer

address

(pins

(See

8-bit

RAM

RAM.

(outputs

AUX

section

micro-

Buffer

KBytes

14

KBytes

60

0-7).

The

Internal

access.

Firmware
U15.
and

There

without

2.4

This
which

After

the

section

is

RAM

SCSI

seconds.

data

RAM
Communication
for

the

drive

are

four

DisCache.

Power-Up

Sequence/Recalibration

explains

shown

tests

bus,

in

Figure

and

although

is

with

is

different

the

circuit

the

used

for

other

stored

EPROMS:

special

2-15.

initialization,

drive

look-up

devices

in

a

features

cannot

32

for

tables
is

KB

read

over

EPROM,

Q250

of

the

the

or

that

the

a

and

Q280,

power-up

drive
write

require
8-bit

27256,

can

for

fast

MAD

located

each

with

sequence,

respond
several

bus.

at

to

2-32

No

mechanical
Q280,
the

servo
toward
while

as

the

the

the

actuator

wedges.

middle

radial

or

absolute

finds

At

power-up,

of

the

velocity

position

its

disk,

is

zero.

information

position

the

then

by
position
braking

is

reading

is

determined

and

reading

used

in

information

the

the

by

wedges

Q250j

from

seeking

Once

the
actuator
position,

information,
into
then
the
even

buffer

read

list

if

one

cylinder

2.5

This

section

Sequence,
Series

The

Programmers

READ

transfer

checks
sector
action

MODE

the

is

taken

SELECT

2.6

actuator

seeks

the

peak

the

RAM.

from

is

stored

or

0,

and

Read

explains

Figure

command
length

defect

read

is

command.

write

position

to

the

amplitudes

adaptive

The

reserved

on

more

is

copies

ready.

Command

2-16.

Manual.

contains

in

blocks.

list

into

buffer,

that

Command

outer,

gain

W-list,

tracks

each

Sequence

the

special

For

the

and

specified

Sequence

is

known,

middle,

of

parameters

or

into
surface
is

damaged.

additional

starting

Before

seeks

the

data

by

the
and

the

servo

working

buffer

so

that

features

reading

to

the

is

the

Error

drive

inner

is
tracks,

bursts

are

calculated

list

of

RAM.

it

is

Finally,

of

the

information,

logical

block

each
correct
checked

Recovery

recalibrated:
are

read.

defective
A

duplicate

always

the

drive

Read

see

address
sector,
position.

for

correctness;

Parameters

and

at

From

and

written

sectors,

copy

available,

seeks

Command

the

Q200

and

the

Q250jQ280

After

the

each

of

this

is

of

to

the

each
the

the

This

section

Sequence,

Series
The

Programmers

WRITE
transfer
checks

the

Writing

the

buffer.

transfers

(actually

length

and

Q250jQ280

of

from

explains

Figure

command

length

defect

to

disk

Then,

data

interleaved,

data

the

buffer

sends

2-17.

contains

in

list

doesn't

from

has

Status

the

For

Manual.

blocks.

and

start

the

Q250jQ280

the

SCSI

a

been

to

the

transferred

and

special

additional

the

Before

seeks

byte

disk,
Message

starting

until

bus

at

features

writing

to

the

a
writes
to

buffer

a

time).

from
the

transfer

to

2-33

of

information,

logical

each

correct

complete

to

the
almost

When

the

SCSI

the

host.

the

write

see

block
sector,
position.

block
disk

from

simultaneously

the

full

bus

is

complete

Command
the

address

the

is

available

buffer,
transfer

to

the

Q200

and

Q250jQ280

buffer,

and

the

the

in

and

FIND

SEEK

READ

SEEK

MEASURE

ACUATOR

AND

SERVO

TO

CYLINDER

HEAD

SERVO

POSITION;

PIVOT;

BURST

O.

BURST

822

SEEK

TO

HEAD

MEASURE

AMPL

ITUOES.

SEEK

TO

MID

HEAD

MEASURE

AMPLITUDES.

CALCULATE

PARAMETERS

NULL

READ

DEFECT

SECTORS

PROTECTED

CYLINDER

0

SERVO

ALL

CYLINDER.
O.

SERVO

ALL

ADAPTIVE

KA.

I.

AGC

LIST

0-11

BUFFER

BURST

HEADS

BURST

HEADS

FROM

INTO

RAM

O.

Figure

2-15:

Power-Up

2-34

Sequence

HOST

ARBITRATES

FOR

SELECTS

BUS,

DRIVE

SET

NEXT

READ

SECTOR

INTO

DICEY

COMMAND
SENT
SCSI

READ

COMMAND

PULLED

B031

DECODE

READ

COMMAND

CHECK

DEFECT

LIST

VIA
BUS

INTO

RAM

SERVO

INTERRUPT

READ A SECTOR

FROM

DISK

TO

BUFFER

DICEY

Y

START

SEEK

CHECK

DEFECT

LIST

WAIT

FOR

SEEK

COMPLETE

TRANSFER

FROM

BUFFER

TO

SCSI

SEND

STATUS

TO

HOST

BEGINS

CHECK

ERROR

PAGE

FOR

OPTIONS

ACT

PER

OPTIONS

*RETRY
*CORRECT
*NO

CORRECTI

*ETC

W/ECC

ON

FINO

SECTOR-1

Figure

2-16:

Read

2-35

SEND
MESSAGE
TO

HOST

Command

Sequence

A

FINO

SECToR-l

Figure

2-17:

write

2-36

Command

Sequence

SECTION

3.

Q200

SERIES

ENGINEERING

DRAWINGS

The

following

Boards

for

applicable,

Figure

Figure
Figure
Figure

Figure
Figure
Figure
Figure

Figure
Figure
Figure
Figure

3-1:
3-2:
3-3:
3-4:

3-5:
3-6:

3-7:

3-8:

3-9:
3-10:
3-11:
3-12:

drawings

several

please

Printed
Schematic,
Schematic,
Schematic,

Printed
Schematic,
Schematic,
Schematic,

Printed

Schematic,
Schematic,
Schematic,

illustrate
revisions.
refer

to

PCB-7

Circuit

PCB-7,
PCB-7,
PCB-7,

PCB-8

Circuit

PCB-a,
PCB-a,
PCB-a,

PCB-9

Circuit

PCB-9,
PCB-9,
PCB-9,

the

Depending

PCB-7,

PCB-a,

Engineering

Board

Sheet
Sheet
Sheet

Parts

1
2
3

Engineering
Board

Sheet
Sheet
Sheet

Parts

1
2
3

Engineering

Board

Parts
Sheet
Sheet
Sheet

Q200

Drawings

Drawings
Locations

Drawings

1
2
3

Series

on

the

or

PCB-9

Locations

Locations

Printed

specific

drawing

(PCB-7)

(PCB-a)

(PCB-9)

Circuit

PCB

groups.

that

is

3-1

-

C&7

- C68

CJ

-

WiD

C54

1

QUANTUM

CORP.

Q200

PCB

7

FAB

10-22007
SILKSCREEN
ARTWORK

30-22007

REV

02

CRD

A026

4-4-86

KRL

or

5

~

::J

Ii

-

CSO

CSi

R5&

lit

R5&

-

,.,

-

III

~

..

II

-

i!

..

"

~

1I

f'\'

~

-

U

-

Ril

Figure

3-1:

Printed

Circuit

Board

Parts

Locations

TES:

UNLESS

OTHERWISE

SPECIFIED.

THIS

SCHEMATIC

APPLIES

TO

ASSEMBLY

20-22007

OF

THE

SAME

REVISION

LEVEl.

ALL

RESISTOR

VALUES

ARE

IN

OHMS,

ALL

CAPACITOR

VALUES

ARE

IN

MICROFARAOS,

ALL

INDUCTOR

VALUES

ARE

IN

MICROHENRIES.

SHORTING

PLUG

OPTIONS

ARE

SHOWN

AS:

OPEN

CONNECTI

ON

TRACE

OR

WIRE

CONNECTION

-B-"

SHORTING

PLUG

INSTALLED

POWER

CONNECTIONS

I.C.

REF

5 V 12 V

GROUND

OP8455 U 1 20

NONE

10, 19

r---------

-----

------------

----

---------

OP8464

U2

NONE

9 17, 20

---_.

------------

-----

---------

DACOB32

~~B

19

20 3. B

-EL2-017

---

ru4--

----NONE---

-20-

--;0-----

r-;:M'iSBA

---

U5--

----NDNE---

---e-

--:;-------

------------

r---

------------

----

----------

LM339

U6 3 NONE

12

-:;40-6----

u7"--

-----14-----

NONE

--7-------

--------------

r-----

r--------

------

------------

HA13426

UB

NONE I 5,7

TMG

eTLR

~~::

:=::~~~~::=-

~~~

:~:

II,

:~:~--:

A07B20

Ul0

7. 20

NONE

10. 13

3046

U'ij--

f--No"NE-----

NONE

-NONE

--.----

---------- r----

r---------

----- -------------

MC34072AP U12

NONE

B 4

B031

U'13--

r---

40

------

NONE

-20---·------

-----

ra-I725--33

-----

-:f13.-20-;----

DATA

CTLR

U14

50,58,68,

NONE

2B.

3B.

4S.

7S, 86. 100

~~:

~~.

73.

27256

U'1ii--

f---2e'------

NONE

--j4----------

------------ r----

f------------

------

--------------

4416

U16
U17
U18

NONE

1.1B

--------------

-----

r------------

------

--i:-r2.-rr.::!~

__

~~_~_~_______

~_~

__

r~~~~~:-~-~-

~~~~l~6

:.~~_~~~_~_

74LS36SA U20 16

NONE

8

--LM35BA----

U'ij--

----NONE----- --B-

-:;------------

--i4Hc11----

u2i-

r----

14

-------

NONE

-:;----------

-----

--------------

-----

---------------

75453

~~~

8

NONE

4

OSC

U'25--

----i1.-j:;-----

NONE

-:;-------------

------r-------------

-----

---------------

220

ohml

U31

330

ohm

LJ32
LJ38

NONE

NONE

1

-----

r-------------

-----

---------------

U39

lOOK

.ohm

LJ40
LJ41

NONE

NONE

r-----------

-----

------------

-----

--------------

---------------------

-------------- -------

----------------

REF.

PIN

SIGNAL

NAME

PAGE

Jl

01

GNO

3R

02 -OBO

3R

f-.------

---

--------------

----

03

GND

3R

04

-DBI

3R

05

GND

3R

-------

---- -----------------

06

-082

3R

07

GND

3R

-------

----

---------------

---

OB

-DB3

3R

09

GND

3R

10

-DB4

3R

11

GNO

3R

f-------

----

-----------------

---

12 -DBS

3R

13

GNO

3R

-------

----

---------------- -----

14

-OB6

3R

15

GND

3R

16

-OB7

3R

17

GND

3R

------- --18 ----.:iisp------

-3R

19

GND

3R

20

GNO

3R

21

GNO

3R

22

GND

3R

23

GND

3R

24

GND

3R

-_._._--

---

.----_._--------- --.-.-

25 N/C

12 V

DC

REF.

PIN

SIGNAL

NAME

PAGE

Jl

26

TERMPWR

3R

27

GND

3R

2B

GND

3R

r------- -----

--------------------

-----

29

GND

3R

30

GND

3R

31

GND

3R

--------

-----

----------------

----

32 -ATN

3R

.-------

____

po

__________________

_

33

GND

3R

34

GND

3R

35

GND

3R

36

-BSY

3R

37

GND

3R

3B

-ACK

3R

39

GND

3R

40

-RST

3R

41

GND

3R

42

-MSG

3R

43

GND

3A

44

-SEL

3R

45

GND

3R

------------

-:;S--

------::C7ii--------

-3Fi---

r---------

----- ------------------

----

47

GND

3R

4B

-REG

3A

49

GND

3R

-----------

-50--

·----::i/-ii-----------

-3R'--

L4

CONNECTOR

PIN

ASSIGNMENTS

REF.

PIN

SIGNAL

NAME

PAGE

J2

01 12 V

DC

lL

02 12 V

RT

lL

--------

-----

--_.

__

._---_._+-_

..

-

03 5 V

RTN

lL

04

S V

DC

lL

REF.

PIN

SIGNAL

NAME

PAGE

J3

01 HALL

GND

2R

02

HALL

1+

2L

--------

03'--

-HAL.Li:------~L---

--------

-----

---------------+-----

04

HALL 2+ 2L

OS

HALL 2-2L

----------

-----

--------------+-----

06

HALL 3+ 2L

-.--------

0'7--'

-HAL.L3:-------

r

2L·--

----------

------

----------------r-----

OB

HALL 12 V

2R

09

COIL A

2R

-----------

10--'

---CO:iLB--------

r

2R·--

._-----_.-

...

_----

------------_.-

-------

11 COIL C

2R

L11

J4

,----JTTT\.-----l.!:0!Lj

FIL

12

V

~.7

~Lr----~----InrL----~------~----~r_----~~------------------

12 V

BEAD

C3B.

45.49

10

C43

.01

CB1.

B2

10

CB • 2B.

37. 47.

64-66.

.1

75.91.93.111.

12 V

RTN

~02~----------~------+-------

...

----~~----~

J5

L5

S V

DC

BEAD

S V

RTN

GND

C46

22

Wl0

C44

. 01

(BASE

CASTING

VIA

PLATED

THRU

MOUNTING

HOLE)

(JUMPER

NOT

INSTALLED)

L12

J4

,------"'4'.

7~-----l....!0~B'-J

FIL

5 V

5 V

C3.

19.25.33.34.47.

4B.

50

_

1 51. 54. 55. 67, 68. 69 .

GND

Fi

Ie;

B022007A

Drwng;

NAM

NG

Page

Ole

f

03

REV:

L

Date;

4/10/B7

REF.

PIN

SIGNAL

NAME

PAGE

J5

01 C

AGC

2L

------

-02'-

--auRs;:--PEAK-----

3R-

------

03'-

-SETHySr----

3L-

---------

-0;;-

--OETREF------

2L

--------

05'-

-::WEDGE-------

3R--

---------

06'-

-----6NO------

-;L-

-------

'07'-

------5--Y------

-1L-

------ 08-

------12-V-------

-1L-

-------

'---

----------------

-------

09 12 V

lL

--------

-1(j-

------S--Y-------

-1L-

---------

------

-----------------

-----

II

GND

lL

=:=::::=

:~~=-

:=:::::~Z~=::::=

::::~

13

+ENCDDED

DATA

3R

----------

-1;;-

-+DATA--Coc-K'-----

3R-

---------

------

----------------.-

-----

IS

N/C

---------

-16'-

+Ti;sr--RocLi<'-

3R-

i i

MUST

CONFOHM

TO

MATERIAL

f:

::5

> t::

~

;

~~

~

~

CASE DEPTH

..

~

'"

!!:l

HARDNESS

~

i

su

RFACE

"'8

TREATMENT

ENGINEE

RING

SPEC

TOLERANCE

UNLESS

OTHERWISE

NOTED

LINEAR

:.XX

'.XXX

ANGULAR,

~g~~~RS

IOUTSIDE

MAX

BRO'"

IINSIDE

MAX

Figure

3-2

Sheet

1

Quantum

TITLE

SCHEMATIC, Q200 PCB7

DETAIL!

I

RELEASED

FOR

ASSEMBLY

DESIGN 1

I

ID

APPRO I I SHEET

I

OF

3

L

SCALE

80-22007

rEV

NONE

(SHT

3R)

ISHT

3R)

ISHT

3R)

ISHT

3R)

ISHT

3R)

ISHT

3R)

ISHT

3R)

ISHT

3R)

ISHT

3A)

(SHT

3R)

ISHT

3RI

(SHT

3RI

ISHT

3A)

,-----------------------------------------------------------------------------------------------------------

______________________ ~ _____________________________________________

-~PO=R~A--.~.

(SHT

3L)

,-----------------~~------------------------------------------------------~~----------------------------

________________________________________________________

~-P~O~R~B~---(SHT

3L)

.-----------------------------------------------------~----------~--------------~--~--------------------------------------------------------f_----------------------------------------------------------------------

_______________

+~P~OR~_____

(SHT

3L)

5 V

R2
51K

5 V 5 V

5 V

23

tU

22

-U

21

+v

20

-v

19

tW

18

-W

U

~13~--------4---~--------------------------~~~----------------------------------~--------------~C0~I~L~A~~LJ~3~

v

15

COIL B ..[jQJ

RP3
330

,RP3

8

10 _

R57
390K

R50

1.2K

5 V

U33

lK

HA13426

UB

W 17 COIL C ...rm

"r--

C~~~5B

1.

245

V

220

12

V

RP3

2~6.

5K

2r------

U6

.-----+-~II"_1

;M339

13

R66
390K

RP3 C26

p.l1K

=[::.01

3.~--~~--1_----------~~--r_~

5 V

a _

RP3

5.11K

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THIS

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ALL

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U39

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NONE

8

CONNECTOR

PIN

ASSIGNMENTS

SIGNAL

NAME

PAGE

REF

PIN

SIGNAL

NAME

PAGE

REF

PIN

SIGNAL

NAME

PAGE

REF.

PIN

SIGNAL

NAME

PAGE

GNO

-DBO
GNO

-OBI
GNO

-DB2
GNO

-OB3
GNO

-DB4
GNO

-OB5
GND

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GND

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GND

GND
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GNO
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GND
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30

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33

GND

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08

FIL

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3R

34

GND

3R

REF.

PIN

SIGNAL

NAME

PAGE

09

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HSI

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35

GND

3A

J3

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10

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36

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SIGNAL

NAME

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Page

01

of

03

REV. F

Oat.:

04/8/B7

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SIGNAL

NAME

PAGE

J5

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07

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12

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09

12

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TITLE

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BY:

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3

DATE

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PIN

SIGNAL

NAME

PAGE

Jl

01

GNO

3A

02

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3R

r---+-0-3-+---G-N-0----~

--

04

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3R

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05

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06

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13

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19

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20

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NAME

PAGE

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REF.

PIN

SIGNAL

NAME

PAGE

J2

01

12 V

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-

03-

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PIN

SIGNAL

NAME

PAGE

----:;3'0;-

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GND

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02

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NAME

PAGE

J6

01

LED

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3R

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15

File:

8022009A

Orwng: E.M

P.ge

Olaf

03

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C

O.te:

4/28/87

REF.

PIN

SIGNAL

NAME

PAGE

J5

01 C

AGC

2L

02

BURST

PEAK

3A-

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DET

REF

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3R

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06

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lL

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IL

08

12 V

IL

09

12 V

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10 5 V

lL

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12

N/C

--

13

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DATA

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14

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3R

15

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16 + TEST

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SECTION

4.

APPLICATIONS

4.1
The

following

transfer

4.1.1
To

achieve

-ACK

as
should
asserted
completed
cantly

Figure
the

Q250/Q280

initiator).
bring
the

it

SCSI

data

target

latches

data

possible.

The

sequence

"Host

latches

asserts
When

to

ately

the

inform

begins

overlap,

Special

from

-REQ/-ACK
an

soon

be

as

received

-REQ.
its

impaired.
4-1

illustrates

The
from
asserts
the

to

-ACK
target

the

and

Considerations

descriptions
Q200

Series

Handshake

optimal

the

data

within

If

the

DMA

cycle,

is

the
target

buffer

-REQ.

SCSI

its

for

-ACKi

as

data

internal

fastest

1.25

soon

(Q250/Q280)

initiator

a

new

DMA

a

new

SCSI

drives

transfer

is

about

host

the

the

target

(Q250/Q280)

RAM

When

and

memory.

data
MByte/sec

as

the
that

cycle.

cycle

detail

strategies

to

rate,

latched.

100

waits

data

to
transmission

-REQ/-ACK
and

is

transferring

to

the

SCSI

the

begins

Two

transfer

Transfer

data

is

observes

the

data

The

begins

host

the

At

ns

of

assert

handshake

performs

bus;

initiator

its

own

handshake

on

latched,

-ACK
is

initiator

quickly.

for

systems.

host
the

must

Q250/Q280

the

time

-ACK

an

when

detectes

DMA

the

SCSI

Rate."

and

asserted,

no

longer

and

optimizing

assert
that

until

rate

for

may

a
data
internal

the

cycle

sequences

bus

Here

begins

valid,

target

target,

the

the

be

situation
to

the

DMA

data

-REQ

to

transfer

is

the

its

it

deasserts

DMA

data

SCSI

target
host
signifi-

host

cycle

is

stable,

asserted,
are

marked

initiator

DMA

and

immedi-

cycles

signal

-ACK
has

has

where

(the

to

the

now

cycle.

-REQ

The

sequence

results

-ACK
if

until

the
tiator
the

initiator
deasserts
valid,
cycles

When
rate

the

is
machine
cycles.

-ACK

SCSI

within

cycle,

in

slower
its

initiator

to

assert

-REQ

and

begins

are

serial

host
greater
with

If

the
the

marked

own

completes

to

delays

than

400

target
current

and

the

"Host

data

DMA

has

-ACK,
inform

a

new

in

ns

cycle

data

Delays
transfer.
cycle

received

keeping

its

the

DMA

time.
asserting

adding

times,

(Q250/Q280)

SCSI

transfer

is

the

the

DMA

initiator

cycle.

-ACK,

the

cycle,

-ACK;
Here

complete.

data,

data

cycle

and

The

the

DMA

cycle

servicing

does

the

may

take

4-1

625

KByte/sec

the

initiator

The

and

must

valid

asserts

that

the

initiator

reduction

times.

the

not

observe

Q250/Q280

twice

target

wait

during

-ACK,

data

and

DICEY

SCSI

waits

as

Transfer
does

does

for

this

is

target

in

data

bus

the
long.

not

not
the
time.

the

target

no

longer

DMA

transfer

is

a

state

on

alternate

assertion
for

the

Rate"

assert

know

ini-

When

of

next

TARGET

~

CSI

««

DATA

-REG

ACK

VALID

DATA

>>>>

«<

VALID

INITIATOR

joe----

TARGET

DMA

[

DISK

BOOns

HOST

LATCHES

CSI

««

DATA

~~"""';';'=;"';;';";";";";""....£I,~--------~~-:";";=~

-REG

----.

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IN

ITIATO{::

DISK

,.....--------

HOST

CYCLE

CYCLE

DISK

CYCLE

SCSI

.1

-ACK:

VALID

I~----------------------~

INIT

SCSI

CYCLE

DELAYS

-ACK:

DATA

HAS

LATCHED

DATA

MORE

THAN

DELAY

1600ns

1.25

MBYTE/SEC

»»

100ns

NOP

CYCLE

J

TRANSFER

«<

RATE

VALID

SCSI

CYCLE

---------~~

625

MBYTE/SEC

TRANSFER

RATE

Figure

4-1:

-REQ/-ACK

Handshake.

4-2

Q250/Q280

Target

Sends

Data

4.1.2

Hints

for

Software

Driver

writers

Software
trying

1.

2.

driver

to

increase

At
bus
hosts
as

requires

ing
puts
by
asserted

Software
three
bus
ever,
involves
devices

Set
Q200
utilization
the
drive

memory

sustained

When

are
tion

writers

data

the

beginning

signals

detect

the

signals

that

-REQ.
of

OR

gates

In

the

almost

writers

signals

and

avoid

that

this

some

other

the

Buffer

Series

following

can

transfer

at

a
rate,

the

drive

de~ayed.

of

the

may

find

throughput.

of

a

-C/D,
a

5080

U24

-I/O,
change
are

the

target

the

Q250/Q280,

are

and

received,

U26,

simultaneously.

may

to

indicate

the

wait

is

a

risk

than

Full

of
Q200

Ratio
Programmers
by

optimizing

examples,

data

maximum

rate

including

is

seeking,

See

Figure

situation.

the

MESSAGE

and

in

bus

confirm

tristated

so

use

the

that

for

violation

receiving

Series

and

Manual

disconnect/reconnect

a

rough

to

of

wedges,

4-2

following

phase,

-MSG

at

phase

although

the

the

-C/D,

(not

that

-C/D,

simultaneous

valid

-REQ

to

of

an

drives.

Buffer

for

rule

and

from

about

transfers

for

a

hints

a

target

staggered

and

latch

the

ANSI

phase

-I/O,

used),

-I/O,

assertion

MESSAGE

be

asserted.

the

ANSI

invalid

Empty

details)

of

thumb

the

14

14

KBytes/14

of

about
to

and

diagrammatic

useful

asserts
times.

data

standard

change

and

-MSG

and

are

and

-MSG

data

Note,

standard,

MESSAGE

Ratio

to

improve

phases.

is

that

KByte

buffer

ms

14

KBytes/19

from

the

representa-

when

as
by

replaced

of

is

on
and

from

(see

and

disk

SCSI
Some

soon
assert-

out­are

the

the

how-

the

bus

In

the
at

ms.

a

The

transfer
host
data
Empty

DISK SCSI DISK

(F

AST)

can

"-ACK,"

must

Ratios.

~

,

(SLOW)

/ "

I \

be

(SLOW)_,

! r

RECONNECT

lj

-----

00

~

BUFFER

Figure

FULL RATIO

DISK

READ

4-2:

rate

known

FF

on

the

SCSI

and

on

the

to

correctly

SCSI

(FAST)

r-+-

__

~_-+---.,

__

Buffer

DISK

(FAST)

Full

4-3

bus

block

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and

depends

sizes

set

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SCSI DISK

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I \

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it

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BUFFER

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DISK

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WRITE

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RATIO

how

requests.

Full

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LJI

1

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fast

SCSI

(FAST)

the

This

and

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Buffer

the

disk.

is

emptying

SCSI

bus

connects.
bus:

then
anything
set

to

the

drive,

full
In

(Buffer

many
specific
setting

buffer

asks

to

for

the

excessive

Full
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may

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the

in

00.
the

Ratio

drive

it.

If

empty

assume

drive

the

buffer,

Conversely,

drive

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situations,

size;

the

with

4

buffer

near

Buffer

that

KBytes,

before

much

disconnect/reconnect

applies

fills

the

drive

the

buffer,

the

should

and

if

shouldn't

=

the

host

optimum

Full

wait

Ratio

data

for

reconnecting.

when

buffer

must

at

drive

reconnect

the

the

SCSI
reconnect

FF).

will

bus

so

before

the

SCSI

the

drive

memory

seek

which

is

much

as

Buffer

Full

bus

request

utilization

the

drive

reconnecting:

drive

to
This
bus

is

while

for

more

time

the

faster

soon

as

Ratio

is

much

until

a

transfer

is

has

transfer

strategy

overhead.

reading

the

SCSI
data,
drive

than

the

there

should

faster

the

buffer

obtained
filled

if

the

4

KBytes

avoids

of

from

bus
the
dis-

SCSI

is

be

than

is

a
by

the

host

3.

Buffer
the
The

it.

fer,
the
should
Empty
than
fer

If

mum
Ratio

mirror
SCSI

If
at

SCSI

the

is

the

bus

Empty

the
which

reconnect

Ratio

full

host

utilization

so

reconnecting.

When
within
dual

transferring

a

command

individual

a

file

consists

increasing

to

read

block

all

reads

Ratio

image

bus

fills

drive

bus

is

=

SCSI

the

single

bus,

(Buffer

transfers

buffer

has

commands
LBAs

of
or

of

time

much

even

00).

read

an

of

(logical
the
writes.

applies

the

buffer

must

the

seek,

drive

faster

if

Conversely,

the

drive

Empty

data

is

obtained

is

filled

data,

or
overhead
used,

several
blocks,

when

situation

memory

the

disconnects.

than

the

buffer

should

Ratio

in

use

the

write

associated

the

blocks

block

instead

the

drive

when

while

SCSI
the

is

if

the

reconnect

=

FF).

known

with

by

size

setting

that

maximum

command.
lower

the

located

addresses),

of

the
the

bus

drive:

nearly
drive

much

number
Since
with
data

many

is

writing,
drive
drive

may

Now

then

is

blocks,

the

data

it,

throughput.

in

sequentially

use

commands

is
is

fill

assume

the

empty

much

when

near

Buffer

of

each

the

one

and
reading.
emptying

the

buf-

that

drive

(Buffer

faster

the

buf-

opti-

Empty

before

blocks

indivi-

more

command

of

one

is

If

Also,
to

command.

have

and
overall

adjust

allow

a

number

the

up

to

Since

fixed

interleave

of

performance.

block

4

sectors

the

blocks

size

to

Q250/Q280

of

1:1,

per

read

4-4

with

be

drives
can

the

MODE

read

with

are

optimizing

have

SELECT
a
hard

a

dramatic

single

sectored

the

command

block

block

impact

and

size

on

4.

For

use

maximum
only

the

compatibility

ANSI

"Mandatory"

with

various

commands.

vendors

and

models,

5.

4.2

4.2.1
Q200

ECC
and
test
of
be

Series

capabilities

for

time
detecting
detected

Errors
Any

discrepancy

a

data

or

"hard"--those
generally
represent
even
due

interference

to

defective

Program

the

sions
However,
they
drives

Errors
Errors

drives

writing

during

during

Defined

error.

related
marginal

defects,

media

only

additional

based

can

while
and

that

dedicated

system

and

compensating

between

Errors

repeatable

to

from
pits,
areas

the

Sense

only

the

Sense

greatly

troubleshooting.

Media

incorporate

eliminate

defect-mapping

integration.

the

life

recorded

are

either

the

signal-to-noise

conditions

other
scratches,
can

be

error

Codes.

on

the

Codes

enhance

Defects

integrated

the

for

of

the

with

of

equipment.

detected

Sense

Keys
The

Sense

Keys,
should
diagnosis

requirement

software.

A Q200

any

new

drive.

data

and

"soft"--those

high

probability.

ratio

the

media,

Hard

or

thin

spots

and

into

driver

such

be

displayed
of

problems

media

defect
for

Series

defective

recovered

not

of

heads,

errors

in

skipped

the

code

as

readily

the

and

the

(not

driver

can

retry

or

handling
user
This
drive
sectors

data

Soft

system,

circuitry,

are

media.

used).

code,

make

or

printed,

with

defect
also

is

capable

that

is

defined

repeatable,

errors

most

not

deci-

abort.

as

the

and

maps,

reduces

may

as

are

and

or
often
These

Error
The

code

Correcting

ECC

with
allows
rect,

and

incorrect.

or

detects
detects
while

the

is

a

byte-based

an

interleave

correction

detection

If

a

full

many

errors

probability

the

Code

of

of

errors

three

worse

Reed-Solomon
of

3,

any

sector

any

sector

begin

bytes

than

of

misdetection

resulting

having

having

on

byte

(24

bits)

stated

4-5

(t

=

2)

in

one

up
boundaries,
incorrect.

with

is

very

double

a

96-bit

burst

to

very

three

high

low.

burst
ECC.

of

17
the

Further,

probability,

bits

bursts

code

correcting
This

code

incor-

of

17

corrects

it

bits

At

the
computes
data,

Later,

the

DICEY

when

data

syndrome

non-zero

Parameters

mine

for
The

the

full

basic
operation
is

obtained

avoids

probability

drive

attempts

enabled.

the

user,
stable
enabled).

start

the

of

syndrome
appends
the

and

the

is

zero,

syndrome

(previously
action
details.

strategy

until

when

invoking

of

If

the

the

syndrome

a

write

as

the

sector

ECC

bytes

no

errors

indicates

to

be

taken.

coded

a

stable

the

sector

correction

miscorrection.

to

use

ECC

number

drive

has

again
not

operation,

each

syndrome

is

read,

originally

have
an

selected

in

firmware

syndrome

is

on

to

of

retries

attempts

been

byte

to

DICEY

occurred

error,

with

See

read

soft

When a

correct

found

the

is

the

the

the

is

is

found

twice

errors

the

reaches

to

(again,

ECC

syndrome

written.

end

of

calculates

written

in

and

the

MODE

Q200

to

Series

continue

(i.e.,

in

and

stable

data,

the

correct

only

is

After

the

data

another

on

the

writing

user's
SELECT

Programmers

retrying

the

a

row).

dramatically

syndrome

if

ECC

maximum

the

error,

if

ECC

zeroed.

the

last

on

the

syndrome
sector.
and

reading.

Error

Recovery

command)

same
This

syndrome
strategy
reduces

is

found,

correction

specified

even

correction

DICEY
byte
sector.

If

the

deter-

Manual

a

read

the

by

if

a

of

from

A

the

is

is

4.2.2

Allocating

Traditionally,
drive
a

far

defective

required.
Q200

reserved
sectors.

When a

field,
replaced
up
are
method
cent

With
pIe

Series

at

Long

drive

an

with

(see

found

is

Figure

within
used:

cylinder
this

relationship
addresses--thus
records

When

are

Automatic

command),

directly
blocks,

into

as

replacement

from

the

sector

drives

the

end

seeks

is

formatted,

"in-line

adjacent

4-3).

the

additional

with

approach,

between

providing

stored

Read

field-found

spare

shown

in

Replacement

inside
is

use

of

to

or

found,

an

alternate

every

the

sparing"

sectors,

In

the

same

spare

cylinder,

sectors

cylinder

each

the

within

cylinder

Reallocation

or

"grown"
sectors
Figure

Sectors

sectors

outside
a

long

cylinder

replacement

either

in

method

and

rare

instance

defects

available

boundaries

cylinder's
host

is

defects

without

4-5.

are

put

diameter

seek

to

approach:

for

the

sectors

the

factory

is

used:

all

subsequent

the

"In-Line

are

mapped

are

physical

a

method

boundaries.

enabled

are

shifting

in

a

reserved

of

the

the

replacement

two

replacement

are

or

defective

where

more
Sparing

into

(see

well
to

Figure

defined,

ensure

(with

automatically
subsequent

disk.

spare

eliminated.
later

sectors

sectors

than

the

nearest
4-4).

and

logical
that

the

MODE

area

Thus,
sector

sectors

of

defective

in

the

are
two

Overflow"

with

file

SELECT
mapped

logical

of

the

are

are

shifted
defects

adja-

a

sim-

block

when

is

4-6

HEAD 0

x

x + 1 x + 2 x + 29

x + 30

x +

31

HEAD 1

•

•

•

HEAD 5

HEAD

HEAD 1

0

+ 32

x

x +

159

Figure

x

x

+ 32

(Bad)

XXXX

x + 160 x +

Q280: cylinder number x 190; Q250; cylinder x 126

4-3:

x + 1

(Bad)

XXXX

x + 33 x + 60

161

x

= logical block address

(Assuming 512 byte logical block size)

XXXXX

In-Line

x + 2

x + 33

= deallocated sector

Sparing

of

initial sector

of

Defective

x + 188

Sectors

x + 29

(Bad)

XXX X

x +

61

x + 189

(spare)

x + 30

x + 60

x + 62

(spare)

x +

(Bad)

XXXX

31

•

HEAD 5

•

NEXT

CYL

Figure

x +

x +

61

157

4-4:

x

= logical block address

Q280: cylinder number

(Assuming 512 byte logical block size)

XXXXX

In-Line

Sparing

of

initial sector

x 190; Q250; cylinder x 126

= deallocated sector

Overflow

of

4-7

x + 186

Defective

x + 187

(spare)

(spare)

Sectors

x + 188

(spare)

x + 189

(spare)

HEAD 0

x

x + 1 x + 2

x + 29 x + 30

x +

31

HEAD 1

HEAD 5

Table
Q280.

•

•

•

4-1

+ 32

x

x + 160

Figure

shows

Table

XXXX

x +161

4-5:
the

4-1:

(Bad)

x

= logical block address

Q280: cylinder

(Assuming 512 byte logical block size)

Sparing

number

Available

x + 34

x + 162

XXXXX

of

of

initial sector

x 190; Q250: cylinder x 126

= deallocated sector

of

Field-Found

sectors

Spare

available

and

Defective

Defective

x +

x + 189

for

x + 62

61

(spare)

Sectors

Models

Sectors

Q250

x + 63

x + 33

(spare)

and

Model
Q250

Q280

4.2.3
Defect

system
during
the
to

determine

lists
reserved

power-on.

drive

location
tions,

Defect
BLOCKS

Figures
lists

command,

Reallocation

Cylinders

823

823

creating

map

as

backups.
whether

of

the

are

is

the

the

cylinder;

Copies

sector

2-15

created

or

during

enabled.

User
Sectors

103,698
156,370

Defect

defective

of

Before

the

sector

which

through

by

the

the

2-17.
the

read

Lists

sectors.

W-list

lists

a

read
is

replaces

FORMAT

operations

Spare
Sectors

1,646
1,646

The

is

downloaded

are

or

write,

defective

it.

UNIT

Maximum
Sectors

50

80

lists

replicated

the

or

not,

See

the

command,

when

Automatic

Defective

at

Factory

are

written

into

on

buffer
every

W-list

and

Sequence

the

on
RAM

head

is

checked

if

so,

the

descrip-

REASSIGN
Read

a

of

4-8

There

are

four

different

defect

lists:

P-list.
drive
track
life

G-list.
detected
detected

D-list.
by

the

merged
W-list.

of

is
and

the

user

into

The
tested

The

during

either

The

The
replacements.
from

the

P-list,
operation

4.2.4

At

any

time

o Map

primary

in

can

never

drive.

grown

field

by

defect

to

request

the

G-list.

working

The

of

the

Updating

during

out

of

defects,

defect

the

be

defect

the

data

list:

W-list
G-list,
drive.

the
normal

the

list:

factory.

modified

list:

operation

user,

list:

the

drive

the

is

and

Drive

operation,

defective
and

uses

the

It

is

by

a

the

list

of

the

or

by

the

the

list

to

map

list

of
constructed
D-list.

Using

the

blocks.

the

REASSIGN

list

written

user--it

of
drive.
read

of

them

defective

from

This

Defect

the

user
The

of

defects

on

a

is

preserved

accumulated

The

operation.

defective

out.

sectors

the

defects

list

is

Lists
can

choose

user

can

BLOCKS

found

system

defects

defects

sectors

The

D-list

and

used

during

to:

submit

command.

when
reserved
for

the

are

provided

will

their

combined

aD-list

the

be

o

o

In

any

of

updates
See

the

commands

Rely
SELECT

idefects

Reformat

combinations

without
Factory
Grown
Existing

Provided
Factory
Grown

All

known

the

above

the

G-list.

Q200

and

Series
options

on

the

command.

and
the

defect
defects

defects

defects
defects

and

and

Automatic

The

reallocates
drive

of

with

defect

lists

only

only

only

provided

provided

defects

defects
cases,

The

the

P-list,

Programmers

mentioned.

Read

drive

the

the

lists:

defects

drive

however,

Manual

Reallocation
automatically

sectors.

FORMAT

(use
(use
(use
(use
(use
(use
(use
(use

UNIT

no
P-list

G-list

P-list
D-list
P-list

G-list

P-list,

reconstructs

remains

for

details

option

detects

command,

defect

only)
only)
and
only)
and
and

G-list,

the
untouched.

on

of

lists)

G-list)
D-list)

D-list)

W-list

use

the

drive

using

of

MODE

these

D-list)
and

the

4-9

4.3

Grounding,

Electrostatic

Discharges,

and

EMI

The 5 Vdc

metal

plate
holes
casting

wire

shock

is
in

to

(a

heavy
frequencies)
fastened
One

suitable

which

to
Such

accomodates

accept

a

ground

o

o

EMI

may

be
supplies
as

the

Q250/Q280

and

motors,

strong

field:

and

12

Vdc

mount
plastic.
the

shock

cabinet

brackets

Therefore,
mount
ground.

braid

to

from

the

cabinet

base

mating

18

the

grounding
connection

Electrostatic
touching
cause
over

soft

20

the

kilovolts

Electromagnetic
EMI

may

also

due

to

nearby

(especially

drive),

even

up

lamp
to

returns

brackets

is

recommended

ground

casting.

part

AWG

is

wire.

braid.

is

discharges

drive

(random,

Interference

cause

radio

those

heavy

dimmers.

4

volts/meter

are

connected

are

electrically

mounting

does

If

desired,

to

The

a

push-on

The

desirable

after

non-repeating)

may

cause

soft

or

TV

operating

electrical

The

to

ensure

the

male

receptacle,

mating

if:

occur
walking

permanent

errors.

stations,
from

drive

over

the

not

an

male

lug

(for

(EMI)

the
machinery

is

a

range

to

the

isolated,
drives
directly

installer

low

tab-type

is

AMP

part

used

example,

over

a

errors,

damage.

is

present.

chopper-type

same

rated

of

base

casting.

and

by

the

connect

can

impedance

grounding

Faston

AMP

PIN

should

by

carpet).

but

5

volts

such

to

operate

20

Hz

to

the

face-

mounting

the

run

a

ground

to

high

PIN

61761-2.

62187-1,

be

chosen

personnel

These

discharges

Excessive

power

or

12

as

elevators

in

20

MHz.

The

base

lug

may

volts
a

If

EMI
analysis:
operating;
Surge

suppressors

problem

is

suspected
see

try

persists,

if

the

different,

in

contact

and

grounding

problems

the

ac

occur

dedicated

lines

Quantum's

doesn't

only
sources

to

Technical

4-10

other

help,

when

of

equipment

use

the

suspected

5

volts

Support

some

and

may

Group.

common

source

12

volts.

help.

sense

is

If

the

SECTION

5.

MAINTENANCE

5.1

5.2

o

o

o

o

o

o

o

Maintenance

Preventive
adjustments,

board.

DO

NOT

open

which

Do

board.

Do

Avoid
down

Do

are

not

lift

not

operate

harsh

carefully.

not

move

Always

removed.
headstack

Level

1

Maintenance

Replacement

Precautions

maintenance

either

the

HDA

also

the

seals.

drive

handle
the

shocks

the

drive

This

time

assembly

of

the

to

or

by

the
drive
to

the

for

is

in

the

entire

is

not

the

HDA

attempt

its

drive

without

drive

30

required

landing

drive.

required.

or

on

to

remove

faceplate

by

its

at

seconds

for

zone.

the

its

shock

any

after

the

There
printed

the

or

printed

shock

mount

time.

power

AIRLOCK

are

labels,

mount

brackets.

Always

has

to

no

circuit

circuit

brackets.

set

been

lock

some

the

of

it

o

o

o

Replacement

Do

not
approval
cause
to

be

Exchange
isolating

Models

require
require
and

Q250

different

a

U18).

Replacement

listed
common

in

hand

of

exchange

from
user
written

of

PCB.

the

problem

and

PCB

equipped

of

SECTION

tools

plug-in

Quantum.

data

over

See

Q280,

EPROMs,

shock

6.
are

EPROM

CAUTION

different

to

be
and

section
to

the

and

drives
and

with

mounts,

Besides
required.

on

printed

EPROMs

The

lost,

destroyed.

5.5

HDA

that

64

Kbytes

brackets,

the

without

wrong

or

for
or
with

EPROM

servo

information

the

and

drives

of

and

replacement

circuit

tracks

PCB.

without
with

RAM

faceplate,

board

may

Note

DisCache

(U16,

parts,

(PCB).

on

that

DisCache

U17,

as

only

5-1

NOTE

Users

The

Quantum

Level

drive

5.3

Level
service

5.4
Both

nectors.

ribbon

lOX

magnifier
cable
clean

with

5.5

must

limit

warranty

2

procedure

will

be

billed

Level

2

maintenance

center

o

Level

Connector

intermittent

Before

cable

connector

that
gently
the

a

contact-cleaning

while

contacts

PCB

Waveforms

their

service

is

is

attempted.
at

2

Maintenance

is

performed

or

at

the

1

plus

repair

Maintenance

problems

troubleshooting

on

all

wires

the

drive

by

wiping

null
the

prevailing

factory.

and

the

solvent.
and

Techniques

to

and

of

solid

SCSI

are

is

operating

them

Level
void
All

by

HDA

if

time

trained

and

problems

by

observing

bus:

crimped

with

1

during

the

and

rates.

PCBs.

check

to

and

a

lint-free

the

HDA

is

material

personnel

can

be
waveforms,
visually

the

contacts;

watch

warranty

opened

at

caused

for

cloth

period.

or

any

to

repair

an

authorized

by

inspect

with

a

3X

flex

intermittents;

moistened

the

con-

the
to

the

The

waveforms

shooting:

isolate
If

a

drive

following

most

circuits

to

a

problem

waveform

microprocessor,

loop,

These

write,

waveform
recalibrate.
almost
It
and

5.5.1

is

Sense

o

all

easier

Keys
Special

150
two

and

described

determine

to

successfully

tests

must

operate:

EPROM,

and

SCSI

tests

They

circuits

to

check

reported

Test

MHz

or
a

(or

four

delaying

in

if

the

the

board

recalibrates

are

DICEY, FYLO,

interface.

are

primarily

concentrate

and

require

write

to

Equipment

better)
channels.

sweep

this

PCB

or

not

power,

on

functions

the

host

oscilloscope

is

section

is

the

likely

paR,

seek,

useful

read

the

least
over

High

useful.

may

operating

HDA.

when

operating
to
RAM

servo,

with

functions;

special

by

noting
the

impedance

be

reveal

test,

SCSI

with

observed

correctly,

in
any
motor

read,

a

drive

these

test

the

Sense
bus.

differential
probes

for

trouble-

or

to

a

system,

problems,

control,

phase-Iocked-

that

doesn't

exercise

equipment.

Error

input

are

required,

the

since

Codes

and

5-2

o

various

clip-on

connections

for

tiny

100-pin

IC

legs.

o
o

5.5.2
Place

the
shorting
connector.
and

the

Digital
Extension

bench

is

not

Techniques

drive

plug,

if

The

schematics

Be

careful

ground.

and

-BUF

shorted

write
Some

test

of

connector,

shorts.

dc

voltmeter.

cable,

while

connected

required.

and

so

the

PCB

installed.

waveforms

are

in

not

Be

especially

WR

GATE.

to

ground

over

the

and

signals

allowing

Waveform

is

easily
Plug

are

shown

SECTION

CAUTION

to

short

If

or

another

destroy

can

where

the

to

power.

Descriptions

accessible.

in

power,

in

3.

IC

pins

careful

either

data

there

be

and

observed

is

drive

Connection

Figures

together

with

of

these

signal,

servo

less

to

but

2-12,

-WR
signals

the

tracks.

at
danger

be

operated

Remove

not

the

or

GATE

drive

J5,

the
of

to

5-1,

to

the

the
SCSI

5-2

is

may

on
SCSI

WS

bus

and

a

bus

5-3

1.

DC

Measure

5 V

3.7

2.5

3.7

2.

Spin-up

Listen

must

be:

o A

o 1 V

Voltages

(all

dc

and

V

dc

V

dc

V

dc

to

the

continuous

-SPIN
tests

The 2 MHz
FYLO,

+

with

respect

12 V dc
reference
reference
reference

motor

spin

signal
are

passed.

peak-to-peak

is

U9.

input

voltage
voltage
voltage

up.

low

level

after

at

derived

to

power,

In

the

2

ground):

at

pin

at

pin

at

pin

order

on

U8,

RAM

MHz

on

from

the

near

10
11
12

for

test

top

pin

12

J2,

of
of

of

the

and

of

MHz

U28.
U10.
U10.

2.

or

motor

DICEY

other

1 V

clock,

on

J5.

to

asserts

initialization

dc,

on
divided

spin,

U8,

there

this

pin

down

4.

by

5-3

3.

RDX,

Use

the

6

and
head,
disk

outer

difficult

RDY,

oscilloscope

7

of

U2.

amplified

diameter,

or

and

-WEDGE

This
by

the

impossible

differential

is

RDX

and

flex

15

mV

to

circuit.
at
sync,

the

input

RDY,

inner

and

and

the

Expect

diameter.

shows

connect

analog

about

a

broad

signal

20

This

band

the

from

mV

probes

a

p-p
signal
on

the

to

read

at

is
screen.

pins

the

Now,
J5.
of

trigger
The

one

wedge,
Note

4.

Use

that
+RAW
another

observe

a

TTL-type

5.

+ENCODED

Observe

of

FYLO,

6.

+READ

Observe
nal,

the
CLOCK,
and

that

servo

another.

trigger

-WEDGE

DATA

oscilloscope

+RAW

pulse

at

pin

and

DATA

this

input

and

its

the

the

oscilloscope

bursts

To

on

requires

DATA,

for

DATA

4

of

is

the

at

the
to
presence

pulse

can

separate

pin

5

the

each

U9,

same

same

DICEY,

detector

now

of

that

channel,

input

transition

or

as

time
ready

means

them

U13,

signal

pin

+RAW

and

on

-WEDGE,

be

observed,

and

the

13

DATA.

as

RDX

to

the

FYLO

and

observe

delay

pulse

and

simultaneously

to

FYLO,

of

RDX

of

J5.

and

be

decoded.

servo

is

are

pin

12

but

all

the

the

sweep.

detector

on

and

+ENCODED

RDY.

It
It

keeping

operating.

of

details

and

pin
RDY.

is
is

U13,

or

wedges

FYLO

with

6

of

U9.

DATA

is

a

TTL-type

synchronous

the

head

pin
are
of

be

RDX

the

on

5

of

on

top

just

one

working.

and

RDY,

Observe

output

sig-

to

track,

RD

7.

AMC

Observe
signal
seconds
pulse

amplitude

amplitude

with

5.5.3
Test

-WEDGE.
Test

connector

provides

shooting.

Circuit
BURST

-WEDGE.
in

duration)

of

Connector

a

convenient
The

PEAK,

the

FYLO

J5
signals

Look

(from

servo

must

is

pin

for

going

the

J5
used

place

1

of

a

series
negative

3.7

bursts,

be

working

Signals

in

are

listed

U10,

the

to

V

dc

and

factory

observe

5-4

or
of

base
the
to

in

pin
pulses

from

group

observe

some

Table

2
a

line)

to

of

J5.

(each

3.7
is

occurs

this.

test
signals

5-1.

Trigger

about

V

dc

base

proportional

simultaneously

the

PCB,

for

using

10

micro-

line.

but

trouble-

to

it

the

The

the

also

Pin

Signal
Name

Table

5-1:

Test

Connector

Description

J5

Signals

4

5

6

7

8

9

1

2

3

CAGC

BURST

SET

HYST

DET

REF

-WEDGE

GND

5

Vdc

12

Vdc

12

Vdc

PEAK

AGC

voltage

2.3.5
See

AMC

Figure

1.2

V

factory

margin.

0.2

V

factory

margin.
See

RDX,

5.5.2,

and

Circuit

5-3.

dc.

test

dc.

test

and

for

section

This

This

RDY,

Figure

to

to

and

U2

(B).

2.3.7.

in

section

voltage

check

voltage
check

-WEDGE
5-2.

the

the

See

is

drive's

is

drive's

in

section

5.5.2,

changed

changed

section

and

in

in

10
11
12
13
14

15
16

5

Vdc
GND
N/C
+ENCODED
+DATA

LOCK

N/C
+TEST

RD

DATA

CLOCK

Same
TTL

sync

Same

5-5

as

+RAW

Level.

pattern

as

+RD

DATA.

Asserted

check.

CLOCK.

See

by

See

Figure
DICEY

Figure

5-1.

at

2-13.

end

of

Figure

5-1:

Test

Waveforms(l)

TOP:

+RAW

BOTTOM:

DATA

+RD

(1

DATA

Vjdiv.)

(1

Vjdiv.)

5-6

Figure

5-2:

Test

Waveforms(2)

TOP:

RDX,

(Differential,

BOTTOM:

RDY

-WEDGE

5

(5

mV/div.)

V/div.)

5-7

Figure

5-3:

Test

Waveforms(3)

TOP: -READ

(Differential,

BOTTOM:

BURST

SIG,

+READ

100

PEAK

SIG

mv/div.)

(1

V/div.)

5-8

SECTION

6.

PARTS

LISTS

6.1

The

Spare

following
available
this

refer

is

to

Part

Number

20-22007
20-22017
20-22027
20-22008
20-22018
20-22009

Parts

through

a

very

section

List

abbreviated

Quantum's

limited

6.2.

Description
PCB-7

PCB-7
PCB-7
PCB-8
PCB-8
PCB-9

(standard)
(standard

(standard

(standard

(standard
(standard

list.

list

Customer

For

provides

a

complete

with
with
with
with
with

warm-reset

DisCache
warm-reset)
warm-reset

warm-reset

part

Support

numbers

for

Department.

list

of

PCB

rework)

rework)

and

DisCache)

and

green

subassemblies

Note

that

components,

LED)

6-1

6.2

Reference

Parts

List(s)

The
tions

following

illustrations)
iterations
ifically,

documented

of

the

here.

parts
the

most

lists

provided

Q200

current

correspond

Series

revisions

in
PCB

to

section

are

of

the

3.

detailed

PCB-7,

PCB

As

layouts
in

section

in

these

PCB-8

and

(Parts

3,

lists.

PCB-9

Loca-

several

Spec-

are

6-2

a

Ouantum

Quantum

1804

Milpitas,

Corporation

McCarthy

CA 95035

Blvd.