Quanta Computer LA-9869P VDKTE Rosetta 10ADT, Satellite L40D, LA-9869P VDKTE Rosetta 10ADTG Schematic

A

1 1

B

C

D

E

VDKTE

2 2

Rosetta 10ADT/10ADTG

LA-9869P SchematicREV 1.0

AMD APU RICHLAND FP2 / FCH BOLTON-M3

3 3

2013-03-20 Rev 1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/12 2014/03/12

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

LA-9869P

1 51Wednesday, March 20, 2013

E

1.0

A

B

C

D

E

eDP Conn.

page 20

LVDS Conn.

1 1

page 20

LVDS Translator RTD2132R

page 19

DP0 (X2)

AMD APU

PWM Fan Control

page 5

GCLK SLG3NB283VTR (UMA)

page 29

GCLK SLG3NB302VTR (DIS)

page 29

FP2 Processor

GPU Sun Pro M2

page 12~18

HDMI Conn

2 2

RJ45

page 30

3 3

CRT

RTL8106E 10/100M

Cardreader Conn.

GL834L 2 in 1 MMC/SD

PCI-Express X8 5GHz

page 27

page 21

APU PCIe port 0

page 30

USB port 2

page 34

DP2 (X4)

USB2.0

5V 480MHz

SPI Bus

3.3V 33 MHz

PCIe X1

1.2V 5GT/s

BGA-827

27mm*31mm

page 5,6,7,8,9

DP1 (X4)

AMD FCH Hudson M3

FCBGA-656

24.5mm*24.5mm

page 23,24,25,26,27

LPC Bus

3.3V 33 MHz

UMI X4

2.5GT/s

HD Audio

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1333/1600 MT/s

PCIe X1

1.2V 5GT/s

Left USB2.0

Right USB 3.0

USB2.0

5V 480MHz

SB2.0

U

5V 480MHz

SATA port 0

5V 6GHz(600MB/s)

SATA port 1

5V 6GHz(600MB/s)

USB 3.0

5GHz

USB 3.0

5GHz

3.3V 24MHz

PCIeMini Card WLAN + BT

APU PCIe port 1

SATA HDD

SATA ODD

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

Int. Camera

USB port 0

page 30

USB port 1

page 25

Right USB 3.0

USB port 10

page 31

USB port 3

page 28

SATA port 0

page 28

SATA port 1

page 28

USB port 11

page 31

USB 3.0

page 10,11

Touch screen

USB3.0 port 0

page 31

USB3.0 port 1

page 31

USB port 4

page 25

HDA Codec

RTC CKT.

page 19

SPI ROM

(4MB)

page 25

ENE KB9012

page 35

ALC259/269

page 32

DC/DC Interface CKT.

page 38

4 4

Power Circuit DC/DC

page 39~50

Power On/Off CKT.

A

LAN/USB board LS-9861P

page 30

PWR/B LS-9862P

page 37page 36

B

Touch Pad

page 37

Int.KBD

page 36

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

MIC Conn

page 33

D

SPK ConnInt.

page 33

Title

Block Diagrams

Size Document Number Rev

Custom

Date: Sheet of

JCRIO (HP & MIC)

page 33

Compal Electronics, Inc.

LA-9869P

E

1.0

2 51Wednesday, March 20, 2013

1.0

5

4

3

2

1

DESIGN CURRENT 0.15A

B+

D D

Ipeak=12A, Imax=8.4A, Iocp min=14A

SUSP

N-CHANNEL

SI4800

DESIGN CURRENT 0A

DESIGN CURRENT 4A

+3VL +5VL

+5VALW

+5VS

RT8243A

Ipeak=8A, Imax=5.6A, Iocp min=10A

WOL_EN#

P-CHANNEL

SUSP

N-CHANNEL

SI4800

C C

AO-3413

LCD_ENVDD

P-CHANNEL

AO-3413

DGPU_PWR_EN

P-CHANNEL

AO-3413

VGA_PWRGD

SY8032

SYSON

RT8207M

Ipeak=12A, Imax=8.4A, Iocp min=13.8A

SUSP

N-CHANNEL FDS6676AS

APL5508

DESIGN CURRENT 330mA

DESIGN CURRENT 4A

DESIGN CURRENT 1.5A

DESIGN CURRENT 60mA

DESIGN CURRENT 0.5A

DESIGN CURRENT 0.75A

DESIGN CURRENT 2A

+3VALW

+3V_LAN

+3VS

+LCD_VDD

+3VS_DGPU

1.8VGSP

2.5VSP

+1.5V

+1.5V_CPU

B B

PJ1

1.1VPWR_EN

SY8208D

Ipeak=5.3A, Imax=3.71A, Iocp min=16A

SUSP#

DESIGN CURRENT 2A

DESIGN CURRENT 1.5A

FDS6676

VR_ON

SY8208D

VR_ON

ISL6277

A A

GPU_DPRSLPVR

ISL62881

5

Ipeak=7A, Imax=4.9A, Iocp min=16A

Ipeak=36A, Imax=25.2A, Iocp min=60A Ipeak=30A, Imax=21A, Iocp min=50A

Ipeak=21A, Imax=14.7A, Iocp min=40A

4

+1.5VS

+0.75VS

+1.1VALWP

+1.1VS

+1.2VS

APU_CORE APU_CORE_NB

VGA_CORE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Power Tree

LA-9869P

1

3 51Wednesday, March 20, 2013

1.0

A

B

C

D

E

Voltage Rails

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

State

S0

S1

S3

S5 S4/AC

power plane

( O MEANS ON X MEANS OFF )

+RTCVCC

O O O O O O

B+

O O O O O

X

VL +3VL

O O O O O

X

+5VALW +3VALW

O O O O

X X

+1.5V

+5VS +3VS +2.5VS +1.5VS +1.2VS +1.1VS +0.75VS +APU_CORE +APU_CORE_NB +1.1VALW

O

X X X X X

BTO Option Table

Bolton

R1

BOLTONR1@

Clock

FCH

HUDM3R3@

No Green Clock

GPU

R1 R3

UMA/DIS

DIS

VGA@

UMA

UMA@

U1GK

Function

APU

description

explain

R1 R3

R3

BTO

Function

3D sensor

KB LED

description

explain

BTO

OO OO

X

Function

description

explain

BTO

G-sensor

GSENSOR@

LVDS eDP

LVDS@

KB LED

KBL@

Panel

S D

IEDP@

Green Clock

GCLK@ NOGCLK@

X

FCH SM Bus Address (SCL0/SDA0)

Power

3VS

3 3

+ +3VS +3VS

Device

DDR SO-DIMM 0 DDR SO-DIMM 1 WLAN

EC SM Bus1 Address

Power

+3VL +3VL

Device Address

Charger 12 H 0001 0010 b

EC SM Bus2 Address

DevicePower

4 4

+3VL +3VS +3VS VGA Thermal

SB-TSI

A

HEX

Address

1010 000X bA0 H 1010 001X bA2 H

HEX

16 H

0001 0110 bSmart Battery

HEX Address

98 H

1001 1001 b

40 H

0100 0000 bG-Sensor

82H

1000 0010 b

EC SM Bus3 Address

+3VS

B

HEX AddressDevicePower

94 H

1001 0100 bLVDS Translator

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOW

Deciphered Date

SIGNAL

D

SLP_S3# SLP_S5#

HIGHHIGH

HIGH HIGH

LOW

HIGH

LOW

LOWLOW

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Notes List

LA-9869P

E

1.0

4 51Wednesday, March 20, 2013

1.0

A

PCIE_GTX_C_ARX_P[0..3] PCIE_ATX_C_GRX_P[0..3] PCIE_GTX_C_ARX_N[0..3]

PCIE_GTX_C_ARX_P0 PCIE_GTX_C_ARX_N0 PCIE_GTX_C_ARX_P1 PCIE_GTX_C_ARX_N1

1 1

2 2

LAN WLAN

PCIE_FRX_C_LANTX_P0 PCIE_FRX_C_LANTX_N0 PCIE_FRX_WLANTX_P1 PCIE_FRX_WLANTX_N1

UMI_MTX_C_FRX_P0 UMI_MTX_C_FRX_N0 UMI_MTX_C_FRX_P1 UMI_MTX_C_FRX_N1 UMI_MTX_C_FRX_P2 UMI_MTX_C_FRX_N2 UMI_MTX_C_FRX_P3 UMI_MTX_C_FRX_N3

+1.2VS

PCIE_GTX_C_ARX_P2 PCIE_GTX_C_ARX_N2 PCIE_GTX_C_ARX_P3 PCIE_GTX_C_ARX_N3

1 2

R1 196_0402_1%R1 196_0402_1%

Close to AR11 Close to AP11

P_ZVDDP P_ZVSS

B

UAPUA

AP1

P_GFX_RXP[0]

AP2

P_GFX_RXN[0]

AM1

P_GFX_RXP[1]

AM2

P_GFX_RXN[1]

AK3

P_GFX_RXP[2]

AK4

P_GFX_RXN[2]

AJ1

P_GFX_RXP[3]

AJ2

P_GFX_RXN[3]

AH4

P_GFX_RXP[4]

AH3

P_GFX_RXN[4]

AF2

P_GFX_RXP[5]

AF1

P_GFX_RXN[5]

AD1

P_GFX_RXP[6]

AD2

P_GFX_RXN[6]

AB3

P_GFX_RXP[7]

AB4

P_GFX_RXN[7]

AA1

P_GFX_RXP[8]

AA2

P_GFX_RXN[8]

Y4

P_GFX_RXP[9]

Y3

P_GFX_RXN[9]

V2

P_GFX_RXP[10]

V1

P_GFX_RXN[10]

T1

P_GFX_RXP[11]

T2

P_GFX_RXN[11]

P3

P_GFX_RXP[12]

P4

P_GFX_RXN[12]

N1

P_GFX_RXP[13]

N2

P_GFX_RXN[13]

M4

P_GFX_RXP[14]

M3

P_GFX_RXN[14]

K2

P_GFX_RXP[15]

K1

P_GFX_RXN[15]

AH5

P_GPP_RXP[0]

AH6

P_GPP_RXN[0]

AG5

P_GPP_RXP[1]

AG6

P_GPP_RXN[1]

AE6

P_GPP_RXP[2]

AE5

P_GPP_RXN[2]

AD6

P_GPP_RXP[3]

AD5

P_GPP_RXN[3]

AM10

P_UMI_RXP[0]

AN10

P_UMI_RXN[0]

AN8

P_UMI_RXP[1]

AM8

P_UMI_RXN[1]

AP8

P_UMI_RXP[2]

AR8

P_UMI_RXN[2]

AR7

P_UMI_RXP[3]

AP7

P_UMI_RXN[3]

AR11

P_ZVDDP

TRINITY-A8-SERIES_BGA813

5745R1@

P_GFX_TXP[0] P_GFX_TXN[0] P_GFX_TXP[1] P_GFX_TXN[1] P_GFX_TXP[2] P_GFX_TXN[2] P_GFX_TXP[3] P_GFX_TXN[3] P_GFX_TXP[4] P_GFX_TXN[4] P_GFX_TXP[5] P_GFX_TXN[5] P_GFX_TXP[6] P_GFX_TXN[6] P_GFX_TXP[7] P_GFX_TXN[7] P_GFX_TXP[8]

GRAPHICSGPPUMI

P_GFX_TXN[8] P_GFX_TXP[9]

P_GFX_TXN[9] P_GFX_TXP[10] P_GFX_TXN[10] P_GFX_TXP[11] P_GFX_TXN[11] P_GFX_TXP[12] P_GFX_TXN[12] P_GFX_TXP[13] P_GFX_TXN[13] P_GFX_TXP[14] P_GFX_TXN[14] P_GFX_TXP[15] P_GFX_TXN[15]

P_GPP_TXP[0]

P_GPP_TXN[0]

P_GPP_TXP[1]

P_GPP_TXN[1]

P_GPP_TXP[2]

P_GPP_TXN[2]

P_GPP_TXP[3]

P_GPP_TXN[3]

P_UMI_TXP[0] P_UMI_TXN[0] P_UMI_TXP[1] P_UMI_TXN[1] P_UMI_TXP[2] P_UMI_TXN[2] P_UMI_TXP[3] P_UMI_TXN[3]

P_ZVSS

AN1 AN2 AM4 AM3 AK2 AK1 AH1 AH2 AF3 AF4 AE1 AE2 AD4 AD3 AB2 AB1 Y1 Y2 V3 V4 U1 U2 T4 T3 P2 P1 M1 M2 K3 K4 J1 J2

AG7 AG8 AE7 AE8 AD7 AD8 AB6 AB5

AN6 AM6 AP6 AR6 AP4 AR4 AP3 AR3

AP11

PCIE_ATX_GRX_P0 PCIE_ATX_GRX_N0 PCIE_ATX_GRX_P1 PCIE_ATX_GRX_N1 PCIE_ATX_GRX_P2 PCIE_ATX_GRX_N2 PCIE_ATX_GRX_P3 PCIE_ATX_GRX_N3

PCIE_FTX_LANRX_P0 PCIE_FTX_LANRX_N0 PCIE_FTX_WLANRX_P1 PCIE_FTX_WLANRX_N1

UMI_FTX_MRX_P0 UMI_FTX_MRX_N0 UMI_FTX_MRX_P1 UMI_FTX_MRX_N1 UMI_FTX_MRX_P2 UMI_FTX_MRX_N2 UMI_FTX_MRX_P3 UMI_FTX_MRX_N3

1 2

R2 196_0402_1%R2 196_0402_1%

C

PCIE_ATX_C_GRX_N[0..3]

1 2

C1 0.1U_0402_16V7KVGA@C1 0.1U_0402_16V7KVGA@

1 2

C15 0.1U_0402_16V7KVGA@C15 0.1U_0402_16V7KVGA@

1 2

C17 0.1U_0402_16V7KVGA@C17 0.1U_0402_16V7KVGA@

1 2

C11 0.1U_0402_16V7KVGA@C11 0.1U_0402_16V7KVGA@

1 2

C7 0.1U_0402_16V7KVGA@C7 0.1U_0402_16V7KVGA@

1 2

C14 0.1U_0402_16V7KVGA@C14 0.1U_0402_16V7KVGA@

1 2

C13 0.1U_0402_16V7KVGA@C13 0.1U_0402_16V7KVGA@

1 2

C8 0.1U_0402_16V7KVGA@C8 0.1U_0402_16V7KVGA@

1 2

C50 0.1U_0402_16V7KC50 0.1U_0402_16V7K

1 2

C55 0.1U_0402_16V7KC55 0.1U_0402_16V7K

1 2

C51 0.1U_0402_16V7KC51 0.1U_0402_16V7K

1 2

C54 0.1U_0402_16V7KC54 0.1U_0402_16V7K

1 2

C59 0.1U_0402_16V7KC59 0.1U_0402_16V7K

1 2

C60 0.1U_0402_16V7KC60 0.1U_0402_16V7K

1 2

C61 0.1U_0402_16V7KC61 0.1U_0402_16V7K

1 2

C62 0.1U_0402_16V7KC62 0.1U_0402_16V7K

1 2

C122 0.1U_0402_16V7KC122 0.1U_0402_16V7K

1 2

C123 0.1U_0402_16V7KC123 0.1U_0402_16V7K

1 2

C120 0.1U_0402_16V7KC120 0.1U_0402_16V7K

1 2

C121 0.1U_0402_16V7KC121 0.1U_0402_16V7K

D

PCIE_ATX_C_GRX_P0 PCIE_ATX_C_GRX_N0 PCIE_ATX_C_GRX_P1 PCIE_ATX_C_GRX_N1 PCIE_ATX_C_GRX_P2 PCIE_ATX_C_GRX_N2 PCIE_ATX_C_GRX_P3 PCIE_ATX_C_GRX_N3

PCIE_FTX_C_LANRX_P0 PCIE_FTX_C_LANRX_N0 PCIE_FTX_C_WLANRX_P1 PCIE_FTX_C_WLANRX_N1

UMI_FTX_C_MRX_P0 UMI_FTX_C_MRX_N0 UMI_FTX_C_MRX_P1 UMI_FTX_C_MRX_N1 UMI_FTX_C_MRX_P2 UMI_FTX_C_MRX_N2 UMI_FTX_C_MRX_P3 UMI_FTX_C_MRX_N3

E

LAN WLAN

3 3

+FAN1

D

+3VS

12

R6

R6 10K_0402_5%

10K_0402_5%

1

C4

0.01U_0402_25V7K

@

2

JFAN

6

G6

5

G5

4

C5

3

2

1

ACES_50273-0040N-001

@

1

@

C6

2

1000P_0402_50V7K

E

5 51Wednesday, March 20, 2013

FANPWM

+FAN1

12

D1

BAS16_SOT23-3

Title

AMD Trinity FP2 / GFX / UMI

Size Document Number Rev

Custom

LA-9869P

Date: Sheet of

1

2

10U_0603_6.3V6M

Compal Electronics, Inc.

1.0

FAN Control Circuit

FAN_SPEED1

+5VS

1A

1 2

@

R3 0_0603_5%

4 4

Security Classification

2013/03/20 2014/03/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/20 2014/03/20

C

Compal Secret Data

Deciphered Date

A

B

C

D

E

DDR_A_DQS[0..7]

DDR_A_DQS#[0..7]

1 1

UAPUB

DDR_A_MA[0..15]

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 DDR_A_DM[0..7]

2 2

DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK1 DDR_A_CLK1#

DDR_A_CKE0

3 3

DDR_A_CKE1 DDR_A_ODT0

DDR_A_ODT1

DDR_A_SCS0# DDR_A_SCS1#

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

MEM_MA_RST# MEM_MA_EVENT#

+1.5V

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

+MEM_VREF

1 2

R60 39.2_0402_1%R60 39.2_0402_1%

M_ZVDDIO

Close to AJ32

UAPUB

AA28

MA_ADD[0]

R29

MA_ADD[1]

T30

MA_ADD[2]

R28

MA_ADD[3]

R26

MA_ADD[4]

P26

MA_ADD[5]

P27

MA_ADD[6]

P30

MA_ADD[7]

P29

MA_ADD[8]

M28

MA_ADD[9]

AB26

MA_ADD[10]

M26

MA_ADD[11]

M29

MA_ADD[12]

AE27

MA_ADD[13]

L26

MA_ADD[14]

L27

MA_ADD[15]

AB27

MA_BANK[0]

AA29

MA_BANK[1]

M30

MA_BANK[2]

D16

MA_DM[0]

D20

MA_DM[1]

E25

MA_DM[2]

F30

MA_DM[3]

AK29

MA_DM[4]

AL25

MA_DM[5]

AM20

MA_DM[6]

AM16

MA_DM[7]

G17

MA_DQS_H[0]

H17

MA_DQS_L[0]

F22

MA_DQS_H[1]

G22

MA_DQS_L[1]

E26

MA_DQS_H[2]

F26

MA_DQS_L[2]

H30

MA_DQS_H[3]

G30

MA_DQS_L[3]

AL29

MA_DQS_H[4]

AL30

MA_DQS_L[4]

AH25

MA_DQS_H[5]

AJ25

MA_DQS_L[5]

AK20

MA_DQS_H[6]

AL20

MA_DQS_L[6]

AK15

MA_DQS_H[7]

AL15

MA_DQS_L[7]

W29

MA_CLK_H[0]

Y30

MA_CLK_L[0]

W26

MA_CLK_H[1]

W27

MA_CLK_L[1]

U29

MA_CLK_H[2]

V30

MA_CLK_L[2]

U26

MA_CLK_H[3]

U27

MA_CLK_L[3]

L29

MA_CKE[0]

K30

MA_CKE[1]

AD30

MA0_ODT[0]

AG28

MA0_ODT[1]

AE26

MA1_ODT[0]

AG29

MA1_ODT[1]

AD26

MA0_CS_L[0]

AE29

MA0_CS_L[1]

AB30

MA1_CS_L[0]

AF30

MA1_CS_L[1]

AB29

MA_RAS_L

AD29

MA_CAS_L

AD28

MA_WE_L

J28

MA_RESET_L

AA26

MA_EVENT_L

G32

M_VREF

AJ32

M_ZVDDIO

TRINITY-A8-SERIES_BGA813

5745R1@

MA_DATA[0] MA_DATA[1] MA_DATA[2] MA_DATA[3] MA_DATA[4] MA_DATA[5] MA_DATA[6] MA_DATA[7]

MA_DATA[8]

MA_DATA[9] MA_DATA[10] MA_DATA[11] MA_DATA[12] MA_DATA[13] MA_DATA[14] MA_DATA[15]

MA_DATA[16] MA_DATA[17] MA_DATA[18] MA_DATA[19] MA_DATA[20] MA_DATA[21] MA_DATA[22] MA_DATA[23]

MA_DATA[24] MA_DATA[25] MA_DATA[26] MA_DATA[27] MA_DATA[28] MA_DATA[29] MA_DATA[30] MA_DATA[31]

MA_DATA[32] MA_DATA[33] MA_DATA[34] MA_DATA[35] MA_DATA[36] MA_DATA[37] MA_DATA[38] MA_DATA[39]

MA_DATA[40] MA_DATA[41] MA_DATA[42] MA_DATA[43] MA_DATA[44] MA_DATA[45] MA_DATA[46] MA_DATA[47]

MA_DATA[48] MA_DATA[49] MA_DATA[50] MA_DATA[51] MA_DATA[52] MA_DATA[53] MA_DATA[54] MA_DATA[55]

MA_DATA[56] MA_DATA[57] MA_DATA[58] MA_DATA[59] MA_DATA[60] MA_DATA[61] MA_DATA[62] MA_DATA[63]

+1.5V

F15 E15 H19 F19 E14 H15 E17 D18

G20 E20 H23 G23 E19 H20 E22 D22

H25 F25 D28 D29 E23 D24 D26 D27

G28 G29 H27 J29 E28 F27 H29 H28

AH29 AJ30 AM28 AM27 AH27 AH28 AJ29 AK27

AK26 AJ26 AK23 AJ23 AM26 AL26 AM24 AL23

AK22 AH22 AK19 AH19 AM22 AL22 AJ20 AL19

AK17 AJ17 AK14 AH14 AM18 AL17 AH15 AL14

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7

DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15

DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23

DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31

DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39

DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47

DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55

DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_D[0..63]

DDR_B_DQS[0..7]

DDR_B_DQS#[0..7]

DDR_B_MA[0..15]

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 DDR_B_DM[0..7]

DDR_B_CLK0 DDR_B_CLK0# DDR_B_CLK1 DDR_B_CLK1#

DDR_B_CKE0 DDR_B_CKE1

DDR_B_ODT0 DDR_B_ODT1

DDR_B_SCS0# DDR_B_SCS1#

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

MEM_MB_RST# MEM_MB_EVENT#

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7

UAPUC

Y33

MB_ADD[0]

R32

MB_ADD[1]

T31

MB_ADD[2]

P33

MB_ADD[3]

P32

MB_ADD[4]

P31

MB_ADD[5]

N32

MB_ADD[6]

M33

MB_ADD[7]

M32

MB_ADD[8]

L32

MB_ADD[9]

AB31

MB_ADD[10]

M31

MB_ADD[11]

K32

MB_ADD[12]

AF33

MB_ADD[13]

K33

MB_ADD[14]

J32

MB_ADD[15]

AB33

MB_BANK[0]

AA32

MB_BANK[1]

K31

MB_BANK[2]

C18

MB_DM[0]

B23

MB_DM[1]

C28

MB_DM[2]

D31

MB_DM[3]

AM31

MB_DM[4]

AN30

MB_DM[5]

AR24

MB_DM[6]

AN18

MB_DM[7]

B18

MB_DQS_H[0]

A18

MB_DQS_L[0]

B24

MB_DQS_H[1]

A24

MB_DQS_L[1]

B30

MB_DQS_H[2]

B29

MB_DQS_L[2]

D32

MB_DQS_H[3]

D33

MB_DQS_L[3]

AM32

MB_DQS_H[4]

AM33

MB_DQS_L[4]

AN28

MB_DQS_H[5]

AP29

MB_DQS_L[5]

AP23

MB_DQS_H[6]

AP24

MB_DQS_L[6]

AR18

MB_DQS_H[7]

AP18

MB_DQS_L[7]

W32

MB_CLK_H[0]

Y32

MB_CLK_L[0]

V33

MB_CLK_H[1]

V32

MB_CLK_L[1]

U32

MB_CLK_H[2]

V31

MB_CLK_L[2]

T33

MB_CLK_H[3]

T32

MB_CLK_L[3]

H32

MB_CKE[0]

H33

MB_CKE[1]

AF31

MB0_ODT[0]

AH31

MB0_ODT[1]

AE32

MB1_ODT[0]

AH33

MB1_ODT[1]

AD31

MB0_CS_L[0]

AF32

MB0_CS_L[1]

AC32

MB1_CS_L[0]

AG32

MB1_CS_L[1]

AB32

MB_RAS_L

AD32

MB_CAS_L

AD33

MB_WE_L

H31

MB_RESET_L

Y31

MB_EVENT_L

TRINITY-A8-SERIES_BGA813

5745R1@

MB_DATA[0] MB_DATA[1] MB_DATA[2] MB_DATA[3] MB_DATA[4] MB_DATA[5] MB_DATA[6] MB_DATA[7]

MB_DATA[8]

MB_DATA[9] MB_DATA[10] MB_DATA[11] MB_DATA[12] MB_DATA[13] MB_DATA[14] MB_DATA[15]

MB_DATA[16] MB_DATA[17] MB_DATA[18] MB_DATA[19] MB_DATA[20] MB_DATA[21] MB_DATA[22] MB_DATA[23]

MB_DATA[24] MB_DATA[25] MB_DATA[26] MB_DATA[27] MB_DATA[28] MB_DATA[29] MB_DATA[30] MB_DATA[31]

MB_DATA[32] MB_DATA[33] MB_DATA[34] MB_DATA[35] MB_DATA[36] MB_DATA[37] MB_DATA[38] MB_DATA[39]

MB_DATA[40] MB_DATA[41] MB_DATA[42] MB_DATA[43] MB_DATA[44] MB_DATA[45] MB_DATA[46] MB_DATA[47]

MB_DATA[48] MB_DATA[49] MB_DATA[50] MB_DATA[51] MB_DATA[52] MB_DATA[53] MB_DATA[54] MB_DATA[55]

MB_DATA[56] MB_DATA[57] MB_DATA[58] MB_DATA[59] MB_DATA[60] MB_DATA[61] MB_DATA[62] MB_DATA[63]

C16 B17 B20 C20 A16 B16 B19 A20

B22 C22 A26 B26 B21 A22 C24 B25

A28 B28 B31 A32 C26 B27 A30 C30

B33 C32 F33 F32 B32 C31 E32 F31

AK32 AL32 AP32 AN31 AK31 AK33 AN32 AP33

AP30 AR30 AP27 AN26 AR32 AP31 AR28 AP28

AP25 AN24 AR22 AP21 AP26 AR26 AN22 AP22

AR20 AP19 AP16 AR16 AN20 AP20 AP17 AN16

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7

DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15

DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23

DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31

DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39

DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47

DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55

DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_D[0..63]

0.75V Reference Voltage

4 4

EVENT# pull high

+1.5V

1 2

R15 1K_0402_5%R15 1K_0402_5%

1 2

R61 1K_0402_5%R61 1K_0402_5%

MEM_MA_EVENT# MEM_MB_EVENT#

A

R64

1K_0402_1%

R65

1K_0402_1%

1 2

B

1

C124

C124 1000P_0402_50V7K

1000P_0402_50V7K

2

+MEM_VREF

2

C125

0.1U_0402_25V6

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

AMD Trinity FP2 DDRIII I/F

LA-9869P

E

6 51Wednesday, March 20, 2013

1.0

A

1 2

LVDS/eDP

1 1

CRT

(To FCH)

HDMI

DP0_TXP0_C DP0_TXN0_C

DP0_TXP1_C DP0_TXN1_C

ML_VGA_TXP0 ML_VGA_TXN0

ML_VGA_TXP1 ML_VGA_TXN1

ML_VGA_TXP2 ML_VGA_TXN2

ML_VGA_TXP3 ML_VGA_TXN3

UMA_HDMI_TX2+

UMA_HDMI_TX2-

UMA_HDMI_TX1+

UMA_HDMI_TX1-

UMA_HDMI_TX0+

UMA_HDMI_TX0-

UMA_HDMI_TXC+

UMA_HDMI_TXC-

100MHz (SS)

100MHz (Non-spread spectrum)

2 2

+1.5V

Close to JHDT

RPC3

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

1 2

R117 1K_0402_5%R117 1K_0402_5%

3 3

C127 1000P_0402_50V7K@C127 1000P_0402_50V7K@

C140 1000P_0402_50V7K@C140 1000P_0402_50V7K@

C141 1000P_0402_50V7K@C141 1000P_0402_50V7K@

1 2

C145

1 2

ESD@

APU_TDI APU_TCK APU_TMS APU_TRST#

APU_DBREQ#

APU_VDD_RUN_FB_L

APU_VDDNB_SEN

APU_VDD_SEN

APU_THERMTRIP#

1000P_0402_50V7K

APU_SVC

APU_SVD

APU_SVT

C56 0.1U_0402_16V7KC56 0.1U_0402_16V7K

1 2

C48 0.1U_0402_16V7KC48 0.1U_0402_16V7K

1 2

C58 0.1U_0402_16V7KIEDP@C58 0.1U_0402_16V7KIEDP@

1 2

C75 0.1U_0402_16V7KIEDP@C75 0.1U_0402_16V7KIEDP@

1 2

C67 0.1U_0402_16V7KC67 0.1U_0402_16V7K

1 2

C71 0.1U_0402_16V7KC71 0.1U_0402_16V7K

1 2

C66 0.1U_0402_16V7KC66 0.1U_0402_16V7K

1 2

C69 0.1U_0402_16V7KC69 0.1U_0402_16V7K

1 2

C68 0.1U_0402_16V7KC68 0.1U_0402_16V7K

1 2

C72 0.1U_0402_16V7KC72 0.1U_0402_16V7K

1 2

C73 0.1U_0402_16V7KC73 0.1U_0402_16V7K

1 2

C70 0.1U_0402_16V7KC70 0.1U_0402_16V7K

clock no test point

APU_CLK APU_CLK#

APU_DISP_CLK APU_DISP_CLK#

1 2

R212 0_0402_5%@R212 0_0402_5%@

1 2

R214 0_0402_5%@R214 0_0402_5%@

1 2

R215 0_0402_5%@R215 0_0402_5%@

R31 0_0402_5%@R31 0_0402_5%@ R32 0_0402_5%@R32 0_0402_5%@

R33 0_0402_5%@R33 0_0402_5%@

APU_SIC APU_SID

APU_RST# APU_PWRGD

T15T15

T16T16

APU_SVC APU_SVD

APU_SVT

1 2 1 2

1 2

For ESD request and close APU

4 4

A

B

DP0_TXP0 DP0_TXN0

DP0_TXP1 DP0_TXN1

DP1_TXP0 DP1_TXN0

DP1_TXP1 DP1_TXN1

DP1_TXP2 DP1_TXN2

DP1_TXP3 DP1_TXN3

APU_PROCHOT# APU_THERMTRIP# APU_ALERT#

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

VSS_SENSE

T13T13

VDDNB_SENSE

T21T21

VDD_SENSE

T28T28

B

APU_SVC_R APU_SVD_R

APU_SVT_R

UAPUD

H2

DP0_TXP[0]

H1

DP0_TXN[0]

H3

DP0_TXP[1]

H4

DP0_TXN[1]

F4

DP0_TXP[2]

F3

DP0_TXN[2]

F1

DP0_TXP[3]

F2

DP0_TXN[3]

E2

DP1_TXP[0]

E1

DP1_TXN[0]

D4

DP1_TXP[1]

D3

DP1_TXN[1]

D1

DP1_TXP[2]

D2

DP1_TXN[2]

C1

DP1_TXP[3]

C2

DP1_TXN[3]

B2

DP2_TXP[0]

A2

DP2_TXN[0]

B3

DP2_TXP[1]

A3

DP2_TXN[1]

B4

DP2_TXP[2]

A4

DP2_TXN[2]

B5

DP2_TXP[3]

A5

DP2_TXN[3]

AL9

CLKIN_H

AK9

CLKIN_L

AL7

DISP_CLKIN_H

AK7

DISP_CLKIN_L

E5

SVC

E6

SVD

D6

SVT

AJ11

SIC

AH11

SID

AK11

RESET_L

AH9

PWROK

AL12

PROCHOT_L

AK5

THERMTRIP_L

AR10

ALERT_L

E11

TDI

G11

TDO

H12

TCK

F11

TMS

H11

TRST_L

E8

DBRDY

E7

DBREQ_L

G6

VSS_SENSE

H6

VDDP_SENSE

H5

VDDNB_SENSE

G7

VDDIO_SENSE

G5

VDD_SENSE

H7

VDDR_SENSE

TRINITY-A8-SERIES_BGA813

5745R1@

DISPLAY PORT 0DISPLAY PORT 1DISPLAY PORT 2CLKSER.CTRLJTAGSENSE

DP0_AUXP DP0_AUXN

DP1_AUXP DP1_AUXN

DP2_AUXP DP2_AUXN

DP3_AUXP DP3_AUXN

DP4_AUXP DP4_AUXN

DP5_AUXP DP5_AUXN

DP0_HPD

DISPLAY PORT MISC.RSVD TEST

DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD

DP_BLON

DP_DIGON

DP_VARY_BL

DP_AUX_ZVSS

TEST6

TEST9 TEST10 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST24

TEST25_H TEST25_L TEST28_H TEST28_L TEST30_H TEST30_L

TEST31

TEST32_H TEST32_L

TEST35

DMAACTIVE_L

TEST4

TEST5

RSVD RSVD RSVD RSVD RSVD

C

M5

DP0_AUXP

M6

DP0_AUXN

L5

DP1_AUXP

L6

DP1_AUXN

J5 J6

P5

Aux signal are re-configured as I2C signals for DDC

P6

APU AUX pin are 3.3V tolerant

R5 R6

U5 U6

M7

LVDS_HPD

L7

FCH_CRT_HPD

J7

HDMI_HPD

P7 R7 U7

C6 D7 A6

B6

DP_AUX_ZVSS

AL6 Y23 V23 G9 F9 E9 G8 F12

APU_TEST18

E12

APU_TEST19

F14

APU_TEST20

G12

APU_TEST24

AJ8

TEST25_H

AH8

TEST25_L

G14 H14 V25 Y25 AH32

APU_TEST31

R25 T25 AL5

APU_TEST35

AP10 T23

R23

L8 P8 AH12 AJ12 AK12

1 2

C47 0.1U_0402_16V7KC47 0.1U_0402_16V7K

1 2

C49 0.1U_0402_16V7KC49 0.1U_0402_16V7K

1 2

C57 0.1U_0402_16V7KC57 0.1U_0402_16V7K

1 2

C52 0.1U_0402_16V7KC52 0.1U_0402_16V7K

1 2

R16 150_0402_1%R16 150_0402_1%

R23 510_0402_1%R23 510_0402_1% R24 510_0402_1%R24 510_0402_1%

T7T7 T8T8 T9T9 T10T10

R38 39.2_0402_1%R38 39.2_0402_1%

T17T17 T18T18

R29 300_0402_5%R29 300_0402_5% R30 300_0402_5%@R30 300_0402_5%@

TEST4 TEST5

@ESD@

APU_PROCHOT#

CK0402101V05_0402-2

D31

1 2

T11T11 T12T12

DP0_AUXP_C DP0_AUXN_C

ML_VGA_AUXP ML_VGA_AUXN

UMA_HDMI_CLK UMA_HDMI_DATA

LVDS_HPD FCH_CRT_HPD HDMI_HPD

DP_ENBKL DP_ENVDD DP_INT_PWM

1 2 1 2

1 2

1 2 1 2

DMA_ACTIVE#

Change TEST35 to pull-high for HDMI issue check list recommend mount R29 and R30 @

Asserted as an input to force the processor into the HTC-active state

+1.5V

1

2

ESD@

C142

0.1U_0402_16V7K

3.3V Tolerance

+1.2VS

+1.5V

H_THERMTRIP#

2

1

For ESD request and close Q5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

C144

1000P_0402_50V7K

D

LVDS CRT (To FCH) HDMI

APU_PROCHOT#

ESD@

D

DP0_AUXP DP0_AUXN DP1_AUXP

DP1_AUXN LVDS_HPD FCH_CRT_HPD HDMI_HPD

DP0_AUXP

DP0_AUXN

RPC1

1 8

APU_TEST18

2 7

APU_TEST19

3 6

APU_TEST20

4 5

APU_TEST24

1K_0804_8P4R_5%

APU_RST#

APU_PWRGD

R55

1K_0402_5%

1 2

@

R136 0_0402_5%

1K_0402_5%

APU_THERMTRIP#

APU_SVT_R APU_SVC_R APU_SVD_R

APU_RST#

APU_PWRGD

Custom

Date: Sheet of

E

R25 1.8K_0402_5%R25 1.8K_0402_5% R58 1.8K_0402_5%R58 1.8K_0402_5% R10 1.8K_0402_5%R10 1.8K_0402_5% R11 1.8K_0402_5%R11 1.8K_0402_5% R74 100K_0402_5%R74 100K_0402_5% R75 100K_0402_5%R75 100K_0402_5% R95 100K_0402_5%R95 100K_0402_5%

12 12 12 12 12 12 12

For 2132R

1 2

C138 680P_0402_50V7KC138 680P_0402_50V7K

1 2

C139 680P_0402_50V7KC139 680P_0402_50V7K

+1.5V

R36 1K_0402_5%@R36 1K_0402_5%@ R39 1K_0402_5%@R39 1K_0402_5%@ R41 1K_0402_5%@R41 1K_0402_5%@

R52 300_0402_5%R52 300_0402_5% R54 300_0402_5%R54 300_0402_5%

+1.5V

1 2

+1.5V

R68

1 2

B

E

3 1

MMBT3904_NL_SOT23-3

Title

AMD Trinity FP2 Display / MISC / HDT

Size Document Number Rev

LA-9869P

12 12 12

+1.5V

RPC2

APU_SIC APU_SID APU_ALERT# DMA_ACTIVE#

1 2

C126 1000P_0402_50V7K

1 2

C130 180P_0402_50V8J

12

R69

R69 10K_0402_5%

10K_0402_5%

2

C

Compal Electronics, Inc.

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

12 12

ESD@

Thermal Shutdown Temperature: 115 degree

Q5

+1.5V

H_PROCHOT#APU_PROCHOT#

H_THERMTRIP#

E

7 51Wednesday, March 20, 2013

1.0

A

+1.5V

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB

VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO

VDDR VDDR VDDR VDDR VDDR

C170 0.22U_0402_10V4ZC170 0.22U_0402_10V4Z

1

2

+APU_CORE

V17 V19 V20 V22 W8 AA8 AA9 AA11 AA12 AA14 AA15 AA17 AA19 AA20 AA22 AD9 AD11 AD12 AD14 AD15 AD17 AD19 AD20 AD22 AG12 AG14 AG15 AG17 AG19 AG20 AG22

B11 B12 B13 B14 B15 C8 C10 C12 C14 D8 D10 D12 D14

M9 N9

W33 AA23 AA25 AA27 AA30 AA33 AB28 AC30 AC33 AD23 AD25 AD27 AE28 AE30 AE33 AG23 AG25 AG27 AG30 AG33

AN14 AP14 AP15 AR14 AR15

+VDDA

C165 4.7U_0603_6.3V6KC165 4.7U_0603_6.3V6K

1

2

+APU_CORE_NB

+VDDNB_CAP

+1.5V +1.2VS

C158 180P_0402_50V8JC158 180P_0402_50V8J

C163 22U_0603_6.3V6MC163 22U_0603_6.3V6M

C196 22U_0603_6.3V6MC196 22U_0603_6.3V6M

1

2

close to APU

+VDDP_CAP

+APU_CORE

1 1

+APU_CORE_NB

2 2

+1.5V

3 3

+1.2VS

+VDDP_CAP

+VDDA

Other signals should keep 20 mil away with +VDDA

FBMA-L11-201209-300LMA30T

+2.5VS

4 4

UAPUE

J12

VDD

J14

VDD

J15

VDD

J17

VDD

J19

VDD

J20

VDD

J22

VDD

M11

VDD

M12

VDD

M14

VDD

M15

VDD

M17

VDD

M19

VDD

M20

VDD

M22

VDD

R8

VDD

R9

VDD

R11

VDD

R12

VDD

R14

VDD

R15

VDD

R17

VDD

R19

VDD

R20

VDD

R22

VDD

U8

VDD

V9

VDD

V11

VDD

V12

VDD

V14

VDD

V15

VDD

A7

VDDNB

A8

VDDNB

A9

VDDNB

A10

VDDNB

A11

VDDNB

A12

VDDNB

A13

VDDNB

A14

VDDNB

A15

VDDNB

B7

VDDNB

B8

VDDNB

B9

VDDNB

B10

VDDNB

J33

VDDIO

K23

VDDIO

K25

VDDIO

L28

VDDIO

L30

VDDIO

L33

VDDIO

M27

VDDIO

N23

VDDIO

N25

VDDIO

N30

VDDIO

N33

VDDIO

P28

VDDIO

R27

VDDIO

R30

VDDIO

R33

VDDIO

U28

VDDIO

U30

VDDIO

U33

VDDIO

W28

VDDIO

W30

VDDIO

AM12

VDDP

AN12

VDDP

AP12

VDDP

AP13

VDDP

AR12

VDDP

AR13

VDDP

AA6

VDDP_CAP

AA7

VDDP_CAP

AM13

VDDA

AM14

VDDA

TRINITY-A8-SERIES_BGA813

5745R1@

L1

1 2

36A

30A

VDDNB_CAP VDDNB_CAP

3.2A

3.5A

0.75A

C164 3300P_0402_50V7-KC164 3300P_0402_50V7-K

3.5A

1

2

B

C63 22U_0603_6.3V6MC63 22U_0603_6.3V6M

C65 22U_0603_6.3V6MC65 22U_0603_6.3V6M

C64 22U_0603_6.3V6MC64 22U_0603_6.3V6M

C74 22U_0603_6.3V6MC74 22U_0603_6.3V6M

1

2

C91 4.7U_0603_6.3V6KC91 4.7U_0603_6.3V6K

C90 4.7U_0603_6.3V6KC90 4.7U_0603_6.3V6K

C92 4.7U_0603_6.3V6KC92 4.7U_0603_6.3V6K

C89 4.7U_0603_6.3V6KC89 4.7U_0603_6.3V6K

1

2

C94 0.22U_0402_10V4ZC94 0.22U_0402_10V4Z

C93 0.22U_0402_10V4ZC93 0.22U_0402_10V4Z

1

2

C102 0.22U_0402_10V4ZC102 0.22U_0402_10V4Z

C117 0.22U_0402_10V4ZC117 0.22U_0402_10V4Z

C96 0.22U_0402_10V4ZC96 0.22U_0402_10V4Z

C97 0.22U_0402_10V4ZC97 0.22U_0402_10V4Z

C95 0.22U_0402_10V4ZC95 0.22U_0402_10V4Z

1

2

VDDR more different VDDP more different

+1.2VS

1

2

C169 22U_0805_6.3V6MC169 22U_0805_6.3V6M

C168 22U_0805_6.3V6MC168 22U_0805_6.3V6M

1

2

C149 0.01U_0402_16V7KC149 0.01U_0402_16V7K

C137 0.01U_0402_16V7KC137 0.01U_0402_16V7K

1

2

C115 0.22U_0402_10V4ZC115 0.22U_0402_10V4Z

C116 0.22U_0402_10V4ZC116 0.22U_0402_10V4Z

1

2

C110 180P_0402_50V8JC110 180P_0402_50V8J

C111 1000P_0402_50V7KC111 1000P_0402_50V7K

C109 180P_0402_50V8JC109 180P_0402_50V8J

1

2

C119 0.22U_0402_10V4ZC119 0.22U_0402_10V4Z

C118 0.22U_0402_10V4ZC118 0.22U_0402_10V4Z

1

2

C

C100 180P_0402_50V8JC100 180P_0402_50V8J

1

2

C131 4.7U_0603_6.3V6K@C131 4.7U_0603_6.3V6K

C103 180P_0402_50V8JC103 180P_0402_50V8J

1

2

@

+1.2VS

C106 180P_0402_50V8JC106 180P_0402_50V8J

C105 180P_0402_50V8JC105 180P_0402_50V8J

1

2

Power Sequence of APU

+1.5V

+2.5VS

+1.5VS

+CPU_CORE

+CPU_CORE_NB

+1.2VS

1

2

+1.5V

1

C150

C150 100U_1206_6.3V6K

100U_1206_6.3V6K

@

2

D

UAPUF

A17

VSS

A19

VSS

A21

VSS

A23

VSS

A25

VSS

A27

VSS

A29

VSS

A31

VSS

B1

VSS

C3

VSS

C4

VSS

C33

VSS

D5

VSS

D9

VSS

D11

VSS

D13

VSS

D15

VSS

D17

VSS

D19

VSS

D21

VSS

D23

VSS

D25

VSS

D30

VSS

E4

VSS

E27

VSS

E29

VSS

E30

VSS

E33

VSS

F5

VSS

F6

VSS

F7

VSS

C132 0.22U_0402_10V4ZC132 0.22U_0402_10V4Z

C152 0.22U_0402_10V4ZC152 0.22U_0402_10V4Z

C632 22U_0603_6.3V6MC632 22U_0603_6.3V6M

C77 22U_0603_6.3V6MC77 22U_0603_6.3V6M

1

2

C655 22U_0603_6.3V6M@C655 22U_0603_6.3V6M

1

@

2

Group A

Group B

F8

VSS

F17

VSS

F20

VSS

F23

VSS

F28

VSS

F29

VSS

G1

VSS

G2

VSS

G4

VSS

G15

VSS

G19

VSS

G25

VSS

G26

VSS

G27

VSS

G33

VSS

H8

VSS

H9

VSS

H22

VSS

H26

VSS

J4

VSS

J8

VSS

J9

VSS

J11

VSS

J23

VSS

J25

VSS

J26

VSS

J27

VSS

J30

VSS

K9

VSS

K11

VSS

K12

VSS

K14

VSS

K15

VSS

K17

VSS

K19

VSS

K20

VSS

K22

VSS

L1

VSS

L2

VSS

L4

VSS

M8

VSS

M23

VSS

M25

VSS

N4

VSS

N11

VSS

N12

VSS

N14

VSS

N15

VSS

N17

VSS

N19

VSS

N20

VSS

N22

VSS

R1

VSS

R2

VSS

R4

VSS

T9

VSS

T11

VSS

T12

VSS

T14

VSS

T15

VSS

T17

VSS

T19

VSS

T20

VSS

T22

VSS

U4

VSS

W1

VSS

W2

VSS

W4

VSS

W5

VSS

W6

VSS

W7

VSS

Y9

VSS

TRINITY-A8-SERIES_BGA813

5745R1@

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

E

Y11 Y12 Y14 Y15 Y17 Y19 Y20 Y22 AA4 AA5 AB7 AB8 AC1 AC2 AC4 AC9 AC11 AC12 AC14 AC15 AC17 AC19 AC20 AC22 AC23 AC25 AE4 AF9 AF11 AF12 AF14 AF15 AF17 AF19 AF20 AF22 AF23 AF25 AG1 AG2 AG4 AG9 AG11 AG26 AH7 AH17 AH20 AH23 AH26 AH30 AJ4 AJ5 AJ6 AJ7 AJ9 AJ14 AJ15 AJ19 AJ22 AJ27 AJ28 AJ33 AK6 AK8 AK25 AK28 AK30 AL1 AL2 AL4 AL8 AL11 AL27 AL28 AL33 AM5 AM7 AM9 AM11 AM15 AM17 AM19 AM21 AM23 AM25 AM29 AM30 AN3 AN4 AN33 AP5 AP9 AR2 AR5 AR9 AR17 AR19 AR21 AR23 AR25 AR27 AR29 AR31

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

AMD Trinity FP2 PWR / GND

LA-9869P

E

1.0

of

8 51Wednesday, March 20, 2013

5

R49

0_0402_5%

@

APU_SID

BSH111_SOT23-3

Vg = 1.607 V

APU_SIC

BSH111_SOT23-3

+1.5V

Q16

Q16 AO3413_SOT23

AO3413_SOT23

S

G

2

D

@

1 2

1 3

+1.5V_SI

G

2

Q14

13

D

S

D

S

G

2

Q15

13

D

S

D

S

SUSP

D D

APU_SID

C C

APU_SIC

4

BSH111, the Vgs is: min = 0.4V Max = 1.3V

When APU High -> MOS OFF (Vgs < 0.4V )

APU Low -> MOS ON (Vgs > 1.3V)

EC_SMB_DA1

EC_SMB_CK1

3

Panel PWMSB-TSI

DP_INT_PW M

eDP Panel ENVDD

2

R93

LVDS@R93

R89

LVDS@R89

LVDS@

2.2K_0402_5%

Q21

LVDS@Q21

LVDS@

MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3 R92

LVDS@R92

LVDS@

47K_0402_5%

DP_INT_PW M APU_INVT_PWM

DP_INT_PW M

DP_ENVDD

R46 0_0402_5%

LVDS@

4.7K_0402_5%

Q28

LVDS@Q28

LVDS@

2N7002KW_SOT323-3

@

1 2

R89 2.2K_0402_5%

12

R76

4.7K_0402_5%

R141 2.2K_0402_5%

12

R147

R147 100K_0402_5%

100K_0402_5%

IEDP@

1 2

IEDP@

1 2

IEDP@

+3VS

12

R92

R92 47K_0402_5%

47K_0402_5%

IEDP@

C

2

Q21

B

MMBT3904_NL_SOT23-3

E

3 1

IEDP@

+3VS

12

R135

R135 47K_0402_5%

47K_0402_5%

IEDP@

C

2

Q26

B

MMBT3904_NL_SOT23-3

E

IEDP@

3 1

2

G

12

13

12

R137

4.7K_0402_5%

IEDP@

61

1

R93

4.7K_0402_5%

IEDP@

APU_INVT_PWM

D

Q28

Q28 2N7002KW_SOT323-3

2N7002KW_SOT323-3

IEDP@

S

LCD_ENVDD

IEDP@

Q29A

Q29A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

APU_INVT_PWM

B B

+3VS

eDP Panel ENBKL

12

R144

R144 47K_0402_5%

47K_0402_5%

IEDP@

C

DP_ENBKL

A A

Security Classification

2013/03/20 2014/03/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/20 2014/03/20

3

Compal Secret Data

Deciphered Date

1 2

R146 2.2K_0402_5%

12

R142

R142 100K_0402_5%

100K_0402_5%

IEDP@

2

IEDP@

2

Q27

B

MMBT3904_NL_SOT23-3

E

IEDP@

3 1

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

12

R143

4.7K_0402_5%

IEDP@

3

IEDP@

5

Q29B

Q29B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

AMD Trinity FP2 Singal Level Shifter

LA-9869P

LCD_ENBKL

1

9 51Wednesday, March 20, 2013

1.0

of

5

+1.5V

+VREF_DQA

D D

DDR_A_BS2

C C

DDR_A_CLK0 DDR_A_CLK0#

DDR_A_BS0

DDR_A_WE#

DDR_A_CAS#

DDR_A_SCS1#

B B

+3VS

A A

C182

1

2

0.1U_0402_16V4Z

DDR_A_D0 DDR_A_D1

DDR_A_DM0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11 DDR_A_D16

DDR_A_D17 DDR_A_DQS#2

DDR_A_DQS2 DDR_A_D18

DDR_A_D19 DDR_A_D24

DDR_A_D25 DDR_A_DM3 DDR_A_D26

DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49 DDR_A_DQS#6

DDR_A_DQS6 DDR_A_D50

DDR_A_D51 DDR_A_D56

DDR_A_D57 DDR_A_DM7 DDR_A_D58

DDR_A_D59

+0.75VS

JDDR3L

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4406-0103

@

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5

VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

DM6

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7

VSS50

DQ62

DQ63 VSS52

EVENT#

SDA

VTT2

DQ4 DQ5

DQ6 DQ7

CK1

BA1

NC2

SCL

A15 A14

A11

S0#

+1.5V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

G2

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2 DDR_A_D22

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

+VREF_CAA DDR_A_D36

DDR_A_D37 DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53 DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63

+0.75VS

4

DDR3 SO-DIMM A Reverse Type

MEM_MA_RST#

DDR_A_CKE1DDR_A_CKE0

DDR_A_CLK1 DDR_A_CLK1#

DDR_A_BS1 DDR_A_RAS#

DDR_A_SCS0# DDR_A_ODT0

DDR_A_ODT1

C162

Close to JDDR3H.126

MEM_MA_EVENT# FCH_SDATA0 FCH_SCLK0

3

+VREF_DQA

DDR_A_DQS[0..7] DDR_A_DQS#[0..7] DDR_A_D[0..63] DDR_A_MA[0..15] DDR_A_DM[0..7]

1

C156

C157

0.1U_0402_16V7K

2

+1.5V

12

R79

1K_0402_1%

12

R81

@

2.2U_0402_6.3V6M

R81

1

1K_0402_1%

2

1

Close to JDDR3H.1

+1.5V

1

C148

+1.5V

12

R80

1K_0402_1%

12

@

1

C161

2.2U_0402_6.3V6M

0.1U_0402_16V7K

2

R82

1K_0402_1%

2

C148 100U_1206_6.3V6K

100U_1206_6.3V6K

2

SE00000O000

Layout Note: Place near JDDR3H

+1.5V

C176 10U_0603_6.3V6MC176 10U_0603_6.3V6M C174 10U_0603_6.3V6MC174 10U_0603_6.3V6M C173 10U_0603_6.3V6MC173 10U_0603_6.3V6M C171 10U_0603_6.3V6MC171 10U_0603_6.3V6M C167 10U_0603_6.3V6MC167 10U_0603_6.3V6M C166 10U_0603_6.3V6MC166 10U_0603_6.3V6M

12 12 12 12 12 12

1 2

C179 0.1U_0402_16V4ZC179 0.1U_0402_16V4Z

1 2

C178 0.1U_0402_16V4ZC178 0.1U_0402_16V4Z

1 2

C185 0.1U_0402_16V4ZC185 0.1U_0402_16V4Z

1 2

C180 0.1U_0402_16V4ZC180 0.1U_0402_16V4Z

Layout Note: Place near JDDR3H.203 and 204

+0.75VS

1 2

C84 4.7U_0603_6.3V6KC84 4.7U_0603_6.3V6K

1 2

C186 0.1U_0402_16V4ZC186 0.1U_0402_16V4Z

1 2

C205 0.1U_0402_16V4ZC205 0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM0

LA-9869P

1

10 51Wednesday, March 20, 2013

1.0

A

+1.5V

+VREF_DQB

1 1

DDR_B_CKE0

DDR_B_BS2

2 2

DDR_B_CLK0 DDR_B_CLK0#

DDR_B_WE# DDR_B_CAS#

DDR_B_SCS1#

3 3

+3VS

1

4 4

2

0.1U_0402_16V4Z

C208

DDR_B_D0 DDR_B_D1

DDR_B_DM0 DDR_B_D2

DDR_B_D3 DDR_B_D8

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11 DDR_B_D16

DDR_B_D17 DDR_B_DQS#2

DDR_B_DQS2 DDR_B_D18

DDR_B_D19 DDR_B_D24

DDR_B_D25 DDR_B_DM3 DDR_B_D26

DDR_B_D27

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

DDR_B_MA10

DDR_B_MA13

DDR_B_D37 DDR_B_D36

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49 DDR_B_DQS#6

DDR_B_DQS6 DDR_B_D54

DDR_B_D55 DDR_B_D56

DDR_B_D57 DDR_B_DM7 DDR_B_D58

DDR_B_D59

+0.75VS

JDDR3H

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4806-0103

@

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5

VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

DM6

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7

VSS50

DQ62

DQ63 VSS52

EVENT#

SDA

VTT2

DQ4 DQ5

DQ6 DQ7

CK1

BA1

NC2

SCL

A15 A14

A11

S0#

+1.5V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

G2

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2 DDR_B_D22

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

+VREF_CAB DDR_B_D32

DDR_B_D33 DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53 DDR_B_DM6 DDR_B_D50

DDR_B_D51 DDR_B_D60

DDR_B_D61 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D62

DDR_B_D63

+0.75VS

B

DDR3 SO-DIMM B Reverse Type

MEM_MB_RST#

DDR_B_CKE1

DDR_B_CLK1 DDR_B_CLK1#

DDR_B_BS1 DDR_B_RAS#DDR_B_BS0

DDR_B_SCS0# DDR_B_ODT0

DDR_B_ODT1

Close to JDDR3L.126

MEM_MB_EVENT# FCH_SDATA0 FCH_SCLK0

C188

C

DDR_B_DQS#[0..7] DDR_B_DQS[0..7] DDR_B_D[0..63] DDR_B_MA[0..15] DDR_B_DM[0..7]

+1.5V

12

R83

1K_0402_1%

+VREF_DQB

12

@

1

C184

1

C183

0.1U_0402_16V7K

2.2U_0402_6.3V6M

2

R84

1K_0402_1%

2

D

E

Close to JDDR3L.1

+1.5V

12

R86

1K_0402_1%

12

@

1

C187

0.1U_0402_16V7K

2.2U_0402_6.3V6M

2

R94

1K_0402_1%

2

Layout Note: Place near JDDR3L

+1.5V

12

C195 10U_0603_6.3V6MC195 10U_0603_6.3V6M

12

C189 10U_0603_6.3V6MC189 10U_0603_6.3V6M

12

C181 10U_0603_6.3V6MC181 10U_0603_6.3V6M

12

C177 10U_0603_6.3V6MC177 10U_0603_6.3V6M

12

C175 10U_0603_6.3V6MC175 10U_0603_6.3V6M

12

C172 10U_0603_6.3V6MC172 10U_0603_6.3V6M

1 2

C190 0.1U_0402_16V4ZC190 0.1U_0402_16V4Z

1 2

C191 0.1U_0402_16V4ZC191 0.1U_0402_16V4Z

1 2

C192 0.1U_0402_16V4ZC192 0.1U_0402_16V4Z

1 2

C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z

Layout Note: Place near JDDRL.203 and 204

+0.75VS +1.5V

@

12

C197 10U_0603_6.3V6M

1 2

C194 0.1U_0402_16V4ZC194 0.1U_0402_16V4Z

1 2

C206 0.1U_0402_16V4ZC206 0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM1

LA-9869P

E

11 51Wednesday, March 20, 2013

1.0

A

B

C

D

E

PCIE_ATX_C_GRX_P[3..0] PCIE_ATX_C_GRX_N[3..0]

1 1

2 2

3 3

CLK_PCIE_VGA CLK_PCIE_VGA#

3.3-V tolerant

PCIE_ATX_C_GRX_P[3..0] PCIE_ATX_C_GRX_N[3..0]

PCIE_ATX_C_GRX_P0 PCIE_ATX_C_GRX_N0

PCIE_ATX_C_GRX_P1 PCIE_ATX_C_GRX_N1

PCIE_ATX_C_GRX_P2 PCIE_ATX_C_GRX_N2

PCIE_ATX_C_GRX_P3 PCIE_ATX_C_GRX_N3

CLK_PCIE_VGA CLK_PCIE_VGA#

12

VGA@

RV2 1K_0402_5%

GPU_RST#

12

VGA@

RV212

RV212 100K_0402_5%

100K_0402_5%

AA38

W36

W38

AB35 AA36

AH16

AA30

U36

U38

R36

R38

N36

N38 M37

M35

H37

H35 G36

G38

Y37

Y35

V37

V35

T37

T35

P37

P35

L36

L38 K37

K35 J36

J38

F37

F35 E37

UV1A

PCIE_RX0P PCIE_RX0N

PCIE_RX1P PCIE_RX1N

PCIE_RX2P PCIE_RX2N

PCIE_RX3P PCIE_RX3N

PCIE_RX4P PCIE_RX4N

PCIE_RX5P PCIE_RX5N

PCIE_RX6P PCIE_RX6N

PCIE_RX7P PCIE_RX7N

NC NC

CLOCK

PCIE_REFCLKP PCIE_REFCLKN

TEST_PG

PERSTB

SUNR1@

PART 1 0F 9

PCI EXPRESS INTERFACE

SUN-PRO M2_FCBGA962

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

CALIBRATION

PCIE_CALR_TX PCIE_CALR_RX

PCIE_GTX_C_ARX_P[3..0] PCIE_GTX_C_ARX_N[3..0]

.1U_0402_16V7K

Y33

PCIE_GTX_ARX_P0 PCIE_GTX_C_ARX_P0

Y32

W33

PCIE_GTX_ARX_P1

W32

PCIE_GTX_ARX_N1

U33

PCIE_GTX_ARX_P2

U32

PCIE_GTX_ARX_N2 PCIE_GTX_C_ARX_N2

U30

PCIE_GTX_ARX_P3

U29

PCIE_GTX_ARX_N3 PCIE_GTX_C_ARX_N3

T33 T32

T30 T29

P33 P32

P30 P29

N33

NC

N32

NC

N30

NC

N29

NC

L33

NC

L32

NC

L30

NC

L29

NC

K33

NC

K32

NC

J33

NC

J32

NC

K30

NC

K29

NC

H33

NC

H32

NC

Y30

VGA_PCIE_CALRP

Y29

VGA_PCIE_CALRN

.1U_0402_16V7K

.1U_0402_16V7K .1U_0402_16V7K

.1U_0402_16V7K

AC Coupling Capacitor PCIeR Gen1 and Gen2 only: Recommended value is 100 nF 10%. PCIeR Gen3: Recommended value is 220 nF 10%.

1 2

RV1 1.69K_0402_1%VGA@RV1 1.69K_0402_1%VGA@

1 2

RV3 1K_0402_1%VGA@RV3 1K_0402_1%VGA@

PCIE_GTX_C_ARX_P[3..0] PCIE_GTX_C_ARX_N[3..0]

1 2

CV1 CV2

CV3 CV4

CV5 CV6

CV7 CV8

1 2

1 2 1 2

1 2

VGA@CV1

VGA@ VGA@CV2

VGA@

VGA@CV3

VGA@ VGA@CV4

VGA@

VGA@CV5

VGA@ VGA@CV6

VGA@

VGA@CV7

VGA@ VGA@CV8

VGA@

PCIE_GTX_C_ARX_N0PCIE_GTX_ARX_N0

PCIE_GTX_C_ARX_P1 PCIE_GTX_C_ARX_N1

PCIE_GTX_C_ARX_P2

PCIE_GTX_C_ARX_P3

+0.95VGS +0.95VGS

LVDS Interface

UV1D

PART 7 0F 9

RSVD/VARY_BL

RSVD/DIGON

TXCBP_DPB3P TXCBM_DPB3N

TX3P_DPB2P TX3M_DPB2N

TX4P_DPB1P TX4M_DPB1N

TX5P_DPB0P TX5M_DPB0N

NC#AF35 NC#AG36

TXCAP_DPA3P TXCAM_DPA3N

TX0P_DPA2P TX0M_DPA2N

TX1P_DPA1P TX1M_DPA1N

TX2P_DPA0P TX2M_DPA0N

SUN-PRO M2_FCBGA962

NC NC

LVTMDP

SUNR1@

LVDS CONTROL

AK27 AJ27

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35 AG36

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36 AP37

+3VS

VGA@

5

UV13

4 4

PXS_RST#

APU_PCIE_RST#

A

UV13

2

P

B

4

Y

1

A

G

3

MC74VHC1G08DFT2G SC70 5P

GPU_RST#

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

PCIE/LVDS

LA-9869P

12 51Wednesday, March 20, 2013

E

1.0

A

+3VGS

1 1

RV12

1 8

JTAG_TRSTB

2 7 3 6 4 5

10K_8P4R_5%

+3VGS

2 2

+3VGS

3 3

4 4

10K_8P4R_5%

CHECK VR IF VR Suport PSI# and DPRSLPVR PU 10K to +3VGS: PSI# :Low load current flag DPRSLPVR : Deeper sleep enable flag

+3VGS

VGA@

1 2

RV15 10K_0402_5%

VGA@

RV14

1 2

10K_0402_5%

GENERIC_X Stereo-sync signal. Indicates left/right frame, or top/bottom field. Can be left unconnected if not used.

Enable JTAG access

RV7

5.11K_0402_5%

@

1 2

TESTEN

Reserved signal, for normal ASIC operation.

RV9

RV9 1K_0402_5%

1K_0402_5%

VGA@

TSVDD MarsCRB Design 120ohm 1 1

0.1u 1 1 1u 1 1 10u 1 1

JTAG_TDI JTAG_TMS JTAG_TCK

@

RV13

1 8

GPIO_16

2 7

GPIO_28_FDO

3 6

VGA_SMB_CK2

4 5

VGA_SMB_DA2

VGA@

GPU_DPRSLPVR

RV11 10K_0402_5%

GPU_DOWN#

GPU_VID5

GPU_DOWN#

GPU_VID1

GPU_VID2

CLKREQ_PEG#

GPU_VID3 GPU_VID4

PX_EN : H

igh (3.3 V) switches the regulators off (enter BACO mode). Low (0 V) switches the regulators on. (Default)

MLPS

GPIO_28_FDO

Disable

H

Enable

L

LV3

VGA@ LV3

VGA@

1 2

BLM15BD121SN1D_0402

A

VGA@

1 2

RV8

+TSVDD+1.8VGS

CV17

VGA@ CV17

VGA@

VGA_SMB_CK2 VGA_SMB_DA2

TV1TV1 TV2TV2 TV3TV3

1 2

TV4TV4 TV5TV5

TV9TV9

TV7TV7

(1.8V@13mA TSVDD)

1

CV18

2

10U_0603_6.3V6M

VGA@ CV18

VGA@

GPU_DPRSLPVR

GPU_DOWN#

GPU_VID5 GPU_GPIO8

GPU_GPIO9 GPU_GPIO10

GPU_VID1

GPIO_16

10K_0402_5%@

GPU_VID2 GPU_GPIO21 GPU_GPIO22 CLKREQ_PEG#

GPU_VID3 GPU_VID4

PX_EN

JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO

GPIO_28_FDO

+TSVDD

1

CV19

2

1U_0402_6.3V6K

VGA@ CV19

VGA@

UV1B

PART 2 0F 9

MUTI GFX

AD29

GENLK_CLK

AC29

GENLK_VSYNC

AJ21

SWAPLOCKA

AK21

SWAPLOCKB

AR8

NC

AU8

NC

AP8

DBG_CNTL0

AW8

NC

AR3

NC

AR1

NC

AU1

DBG_DATA0

AU3

DBG_DATA1

AW3

DBG_DATA2

AP6

DBG_DATA3

AW5

DBG_DATA4

AU5

DBG_DATA5

AR6

DBG_DATA6

AW6

DBG_DATA7

AU6

DBG_DATA8

AT7

DBG_DATA9

AV7

DBG_DATA10

AN7

DBG_DATA11

AV9

DBG_DATA12

AT9

DBG_DATA13

AR10

DBG_DATA14

AW10

DBG_DATA15

AU10

DBG_DATA16

AP10

DBG_DATA17

AV11

DBG_DATA18

AT11

DBG_DATA19

AR12

DBG_DATA20

AW12

DBG_DATA21

AU12

DBG_DATA22

AP12

DBG_DATA23

AJ23

SMBCLK

AH23

SMBDATA

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6_TACH

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21

AK13

GPIO_22_ROMCSB

AN13

CLKREQB

AG32

GPIO_29

AG33

GPIO_30

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

GENERICF_HPD5

AH24

GENERICG_HPD6

AC30

CEC_1

AK24

HPD1

AH13

DBG_VREFG

AL21

PX_EN

AD28

TESTEN

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

THERMAL

AF29

DPLUS

AG29

DMINUS

AK32

GPIO_28_FDO

AL31

TS_A

AJ32

TSVDD

AJ33

TSVSS

SUNR1@

0.1U_0402_16V4Z

DEBUG

DPA

DPB

DPC

DPD

SMBus

I2C

DAC1

MLPS

BACO

DDC/AUX

DDCVGACLK

DDCVGADATA

SUN-PRO M2_FCBGA962

AVSSN

AVSSN HSYNC

VSYNC

AVSSQ VDD1DI

VSS1DI

NC_SVI2 NC_SVI2 NC_SVI2

DDC1CLK

DDC1DATA

AUX1P AUX1N

DDC2CLK

DDC2DATA

AUX2P AUX2N

B

C

D

E

MLPS

AU24

NC

AV23

NC

AT25

NC

AR24

NC

AU26

NC

AV25

NC

AT27

NC

AR26

NC

AR30

NC

AT29

NC

AV31

NC

AU30

NC

AR32

NC

AT31

NC

AT33

NC

AU32

NC

AU14

NC

AV13

NC

AT15

NC

AR14

NC

AU16

NC

AV15

NC

AT17

NC

AR16

NC

AU20

NC

AT19

NC

AT21

NC

AR20

NC

AU22

NC

AV21

NC

AT23

NC

AR22

NC

AD39

R

AD37 AE36

G

AD35 AF37

B

AE38 AC36

AC38

AB34

RSET

AD34

AVDD

AE34 AC33

AC34

V13

NC

U13

NC

AF33

NC

AF32

NC

AA29

NC

AG21

NC

AC32

NC

AC31 AD30 AD32

AM34

PS_0

AD31

PS_1

AG31

PS_2

AD33

PS_3

AM26 AN26

AM27 AL27

AM19 AL19

AN20 AM20

AL30

NC

AM30

NC

AL29

NC

AM29

NC

AN21

NC

AM21

NC

AK30

NC

AK29

NC

AJ30 AJ31

B

Mars MLPS configuration

Bits[5:1]

xx000 xx001 xx010 xx011 xx100 xx101 xx110 xx111 00xxx 01xxx 10xxx 11xxx

Pin Name

GPIO_0

GPIO_5_AC_BATT

GPIO_6 GPIO_15_PWRCNTL_0 GPIO_20_PWRCNTL_1 GPIO_29 GPIO_30

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_22_ROMCSB

GPIO_17_THERMAL_INT

GPIO_19_CTF

GPIO_21

GPIO_28_FDO

CLKREQB

PX_EN

PD(1%) CapPU(1%)

NC 4.75k

8.45k 2.00k

4.53k 2.00k

6.98k 4.99k

4.53k 4.99k

3.24k 5.62k

3.40k 10.0k

4.75k NC

Type PD/PU Description

I/O

3.3 V (VDDR3)

I/O

3.3 V (VDDR3)

I/O

3.3 V (VDDR3)

I

3.3 V (VDDR3)

O

3.3 V (VDDR3)

I/O

3.3 V (VDDR3)

O

3.3 V (VDDR3)

I/O

3.3 V (VDDR3)

I/O

3.3 V (VDDR3)

O

O PD

Primary Memory Aperture Size Requested at PCI Configuration

Size of the Primary Memory Apertures

ROM_CONFIG [2:0]

128 MB

256 MB

64 MB

Reserved

512 MB

680nF 82nF 10nF NC

PD-reset

1 GB

2 GB

4 GB Not supported

Power-state indicator. Permits the voltage regulator to activate power-saving features. IF VR Suport PSI# and DPRSLPVR PU 10K to +3VGS. PSI# :Low load current flag DPRSLPVR : Deeper sleep enable flag

(Optional) An input which allows the system to request a fastpower reduction by setting GPIO_5_AC_BATT to low (0 V). The resulting state transition may disturb the display momentarily. Power reductions that are less time critical should use the standard software methods in order to prevent display disturbances.

Voltage control signals for the core (VDDC and VDDCI). At reset, these signals will be inputs with weak internal pulldown resistors. The VBIOS can define all voltage-control signals to be either 3.3-V or open-drain outputs (all signals must be the same type). The output states (high/low) of these pins are programmable for each AMD PowerPlay state when they are used as voltage control signals. Note: GPIO_29 and GPIO_30 are only available on 28-nm ASICs, and are NC on earlier generation ASICs.

Serial-ROM output from ROM. General purpose I/O or open-drain output.

Design: No use external VGA ROM, so use the test point.

Serial-ROM input to ROM. General purpose I/O or open-drain output.

Serial-ROM clock to ROM. General purpose I/O or open-drain output.

BIOS-ROM chip select. Used to enable the ROM for ROM read and program operations.

Design: No use external VGA ROM, so use the test

oints.

p

Thermal monitor interrupt. An input from an external temperature sensor (ALERTb).

Critical temperature fault (CTF) (active high) will output 3.3 V if the on-die temperature sensor exceeds a critical temperature so that the motherboard can protect the ASIC from damage by removing power. The CTF setpoint is 109 by default, and is programmed during ASIC initialization. See the advisory for AMD PowerPlay states for more details.

(Optional) Voltage control signal for the memory-voltage regulator. Note: This signal must be low (0 V) at reset (failure to do so will prevent booting).

Disable MLPS: PU 10K ohm to 3.3V. (Do not install for Mars) Enable MLPS: PD 10K ohm to GND. (Install for Mars)

Supports the CLKREQB feature for saving power to turn on/off the REFCLK clock on the ASIC.

On/off regulator switch in AMD PowerXpress? (switchable graphics) BACO mode. High (3.3 V) switches the regulators off (enter BACO mode). Low (0 V) switches the regulators on. (Default) PX_EN is tri-state before internal TEST_PG is asserted and PERSTb is deasserted.

Not supported

℃℃℃℃

C

000

001

010

011

MLPS Bit Strap Name Description Settings

ROM_CONFIG[0]

PS_0[1]

ROM_CONFIG[1]

PS_0[2]

ROM_CONFIG[2]

PS_0[3]

PS_0[4] N/A

STRAP_BIF_

PS_1[1]

GEN3_EN_A

PS_1[2] STRAP_BIF_

CLK_PM_EN

PS_1[3] N/A Reserved for internal use only. Must be 0 at reset.

PS_1[4] TX_PWRS_ENB

PS_1[5] TX_DEEMPH_EN

PS_2[1]

N/A

PS_2[2]

N/A

PS_2[3] BIOS_ROM_EN

PS_2[4] BIF_VGA_DIS

PS_2[5] N/A Reserved.

PS_3[1]

BOARD_CONFIG[0]

PS_3[2]

BOARD_CONFIG[1]

PS_3[3]

BOARD_CONFIG[2]

PS_0[5]

AUD_PORT_CONN_

PS_3[4]

PINSTRAP[0]

PS_3[5]

AUD_PORT_CONN_ PINSTRAP[1]

AUD_PORT_CONN_ PINSTRAP[2]

For MEMCLK 1GHZ Brand Description Comment PS_3[3:1] R_pu (ohm) R_pd (ohm)

For MEMCLK 900MHZ Brand Description Comment PS_3[3:1] R_pu (ohm) R_pd (ohm)

MLPS Strap

1 1

PS_0[5:1]

1 1

PS_1[5:1]

0 0

PS_2[5:1]

1 1

PS_3[5:1]

PS_0 PS_1 PS_2 PS_3

VGA@

@

1

CV22

CV21

CV20

2

0.68U_0402_10V6K

0.01U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFEREDFROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFEREDFROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFEREDFROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Legacy

GPIO[13:11]

GENLK_VSYNC

GPIO_2

GPIO_8

If BIOS_ROM_EN = 1, ROM_CONFIG[2:0] define the ROM type. If BIOS_ROM_EN = 0, ROM_CONFIG[2:0] define the primary memory-aperture size. Refer to current databooks for details.

Reserved for internal use only. Must be 1 at reset.

Re-defined strap to indicate PCIe GEN3 capability. 1 = PCIe GEN3 supported. 0 = PCIe GEN3 not supported.

Determines whether or not the PCIe reference clock power management capability is reported in the PCI configuration space (otherwise known as CLKREQB). 0 = The CLKREQB power management capability is disabled 1 = The CLKREQB power management capability is enabled

GENLK_CLK

GPIO_0

GPIO_1

N/A

GPIO_22

GPIO_9

Transmitter (Tx) power savings enable. 0 = 50% Tx output swing. 1 = Full Tx output swing.

PCI EXPRESS transmitter, deemphasis enable. 0 = Tx deemphasis disabled. 1 = Tx deemphasis enabled.

Reserved.

To enable the external BIOS ROM device. 0 = Disable the external BIOS ROM device. 1 = Enable the external BIOS ROM device.

VGA disable determines whether or not the card will be recognized as the system's VGA controller. 0 = VGA controller capacity enabled. 1 = The device will not be recognized as the system’s VGA controller.

N/A

gDDR3-2Gbit

Board configuration related strapping (such as memory ID).

Together with PS_0[5] form the three-bit strap option to indicate the number of audio-capable display outputs. In a given ASIC there are as many endpoints as there are digital display outputs, though not all outputs are audio capable. 111 = No usable endpoints. 110 = One usable endpoint. 101 = Two usable endpoints. 100 = Three usable endpoints. 011 = Four usable endpoints. 010 = Five usable endpoints. 001 = Six usable endpoints. 000 = All endpoints are usable.

skHynix

H5TQ2G63DFR-N0C

Samsung

K4W2G1646E-BC1A

skHynix

H5TQ2G63DFR-11C

Micron

MT41K128M16JT-107G:K

Samsung K4W2G1646E-BC11 1.5V/900MHz 111 4750 NC

CapacitorBits[5:4]

Bits[3:1]

0 0 1

0 0 0

X X X

Mapping to VRAM type please refer to page 6

@

1

CV23

2

0.01U_0402_16V7K

R_pu R_pd

NC

8.45K 2K

NC

8.45K

680 nF

NC

@

RV20

8.45K_0402_1%

@

1

RV27

2K_0402_1%

2

0.01U_0402_16V7K

2013/03/20 2014/03/20

D

2K

NC

4.75K

X

12

@

RV21

8.45K_0402_1%

12

VGA@

RV28

4.75K_0402_1%

Compal Secret Data

Deciphered Date

12

8.45K_0402_1%

12

4.75K_0402_1%

@

RV22

VGA@

RV68

12

8.45K_0402_1%

12

2K_0402_1%

1.5V/1GHz

1.5V/900MHz

1.35V-1.5V/900MHz

+1.8VGS

12

VGA@

RV23

12

VGA@

RV30

000

111

VGA_SMB_CK2

VGA_SMB_DA2

NC

4750

000

001

DMN66D0LDW-7 2N_SOT363-6

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

NC

8450

+3VGS

2

VGA@

61

QV1A

4

DMN66D0LDW-7 2N_SOT363-6

Compal Electronics, Inc.

Main_MSIC

LA-9869P

E

001

1

0

1

0

Base on

RAM ID

V

111

4750

2000

VGA@QV1B

VGA@

EC_SMB_CK2

3

EC_SMB_DA2

1.0

of

13 51Wednesday, March 20, 2013

5

QV1B

A

MPLL_PVDD MarsCRB Design

1 1

2 2

220ohm 1 1

0.1u 1 1 1u 1 1

2.2u 1 1

SPLL_PVDD MarsCRB Design 120ohm 1 1

0.1u 1 1 1u 1 1

2.2u 1 1

SPLL_VDDC MarsCRB Design 120ohm 1 1

0.1u 1 1 1u 1 1

2.2u 1 1

+1.8VGS

1 2

BLM15BD121SN1D_0402

+1.8VGS

1 2

BLM15BD121SN1D_0402

+0.95VGS

1 2

BLM15BD121SN1D_0402

B

+MPV18

LV7

VGA@LV7

VGA@

LV8

VGA@LV8

VGA@

LV9

VGA@LV9

VGA@

(MPLL_PVDD:1.8V@130mA )

1

CV79

CV78

2

1U_0402_6.3V6K

0.1U_0402_16V7K

VGA@ CV79

VGA@

VGA@ CV78

VGA@

2.2U_0402_6.3V6M

+SPV18

(SPLL_PVDD:1.8V@75mA )

1

CV82

CV81

2

1U_0402_6.3V6K

0.1U_0402_16V7K

VGA@ CV81

VGA@

VGA@ CV82

VGA@

2.2U_0402_6.3V6M

+SPLL_VDDC

(SPLL_VDDC:0.95V@100mA )

1

CV92

CV93

2

1U_0402_6.3V6K

0.1U_0402_16V7K

VGA@ CV92

VGA@

VGA@ CV93

VGA@

2.2U_0402_6.3V6M

1

CV80

2

VGA@ CV80

VGA@

1

CV83

2

VGA@ CV83

VGA@

1

CV94

2

VGA@ CV94

VGA@

+MPV18

+SPV18

+SPLL_VDDC

C

AM10

AN9

AN10

AF30 AF31

H7 H8

UV1C

MPLL_PVDD MPLL_PVDD

SPLL_PVDD

SPLL_VDDC

SPLL_PVSS

NC_XTAL_PVDD NC_XTAL_PVSS

SUNR1@

PART 9 0F 9

PLLS/XTAL

SUN-PRO M2_FCBGA962

XTALIN

XTALOUT

XO_IN

XO_IN2

CLKTESTA CLKTESTB

D

AV33

VGA_X1

AU34

XTALOUT

AW34

AW35

AK10

Debug Only, for clock observation

AL10

As short as possible

VGA_X1

CV24

15P_0402_50V8J

NOGCLK@

1 2

RV31 1M_0402_5%

YV1

4

NC

OSC

1

2

1

VGA_X1

OSC

NOGCLK@

NC

27MHZ 10PF +-20PPM X3G027000DA1H

E

3

XTALOUT

2

CV25

CV25 15P_0402_50V8J

15P_0402_50V8J

1

NOGCLK@

+1.5V to +1.5VGS

RV45

VGA@

QV188

+5VALW

VGA@

B+

5

12

RV5530

100K_0402_5%

VGA@

13

D

2N7002KW_SOT323-3

VGA@

S

B

470_0805_5%

1 2 3

VGA@

QV8B

QV8B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

1 2

RV48

220K_0402_5%

61

VGA@

2

VGA_PWRGD#

VGA@

QV8A

2N7002DW-T/R7_SOT363-6

VGA_PWRGD#

2

G

+3VGS

VGA@

RV43

470_0805_5%

1 2 3

VGA@

QV9B

PXS_PWREN

QV9B

4

PXS_PWREN

D

2N7002DW-T/R7_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

100K_0402_5%

5

PXS_PWREN#

VGA@

RV44

VGA@

QV9A

A

+1.5V

VGA@

QV3

8

D

7

D

6

D

5

D

FDS6676AS_SO8

3 3

4 4

+1.5VGS

Vgs=10V,Id=14.5A,Rds=6mohm

1

S

2

S

3

S

4

G

1

12

RV49

CV106

2

VGA@ RV49

VGA@

VGA@ CV106

VGA@

0.1U_0402_25V6

820K_0402_5%

VGA_PWRGD

+3VS to +3VGS

+3VALW

@

2

CV103

0.1U_0402_16V7K

VGA@

RV46

1 2

47K_0402_5%

1 2

61

2

2N7002DW-T/R7_SOT363-6

Date: Sheet of

0.1U_0402_16V7K

1

2

CV104

1

VGA@ CV104

VGA@

0.01U_0402_25V7K

Title

Size Document Number Rev

Custom

G

2

QV4

VGA@

Compal Electronics, Inc.

BACO POWER

LA-9869P

+3VS

Vgs=-4.5V,Id=3A,Rds<97mohm

S

D

1 3

AO3413_SOT23

E

+3VGS

14 51Wednesday, March 20, 2013

1.0

A

B

C

D

E

VDDR1 MarsCRB Design

0.01u 5 0

0.1u 5 0

2.2u 5 5 10u 3 3

VDD_CT MarsCRB Design 120ohm 1 1

1 1

0.1u 1 1 1u 1 1 10u 1 1

VDDR3 Mars check list Design 120ohm 1 1 1u 3 2 10u 1 0

0.1u 0 1

+1.8VGS +VDDC_CT

BLM15BD121SN1D_0402

2 2

3 3

+3VGS

BLM15BD121SN1D_0402

LV4

VGA@LV4

VGA@

1 2

LV5

VGA@LV5

VGA@

1 2

+1.5VGS

10U_0603_6.3V6M

1

CV34

CV33

2

10U_0603_6.3V6M

VGA@ CV34

10U_0603_6.3V6M

VGA@

VGA@ CV33

VGA@

1

CV51

2

10U_0603_6.3V6M

VGA@ CV51

10U_0603_6.3V6M

VGA@

+VDDR3

1

CV42

2

1U_0402_6.3V6K

VGA@ CV42

VGA@

(VDDR1:1.5V@1.5A)

1

CV36

CV37

CV35

2

VGA@ CV36

VGA@

VGA@ CV37

VGA@

10U_0603_6.3V6M

VGA@ CV35

10U_0603_6.3V6M

VGA@

2.2U_0402_6.3V6M

(VDD_CT:1.8V@13mA )

1

CV52

CV53

2

1U_0402_6.3V6K

0.1U_0402_16V7K

VGA@ CV52

VGA@

VGA@ CV53

VGA@

(VDDR3:3.3V@25mA)

1

CV55

CV54

2

1U_0402_6.3V6K

0.1U_0402_16V7K

VGA@ CV55

VGA@

VGA@ CV54

VGA@

+1.5VGS

1

CV38

CV40

CV39

2

VGA@ CV38

VGA@

VGA@ CV40

VGA@

VGA@ CV39

VGA@

2.2U_0402_6.3V6M

+VDDC_CT

+VDDR3

Route as differential pair

VCC_GPU_SENSE

TV44TV44

VSS_GPU_SENSE

AD11 AG10

AF26 AF27 AG26 AG27

AF23 AF24 AG23 AG24

AD12 AF11 AF12 AF13

AF15 AG11 AG13 AG15

AF28

AG28

AH29

AC7

AF7 AJ7

AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10

K11 K13

L12 L16 L21 L23 L26

M11 N11

R11 U11

Y11

J7 J9

K8

L7

P7

U7 Y7

UV1E

MEM I/O

VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1

LEVEL

TRANSLATION

VDD_CT VDD_CT VDD_CT VDD_CT

I/O

VDDR3 VDDR3 VDDR3 VDDR3

DVP

VDDR4 VDDR4 VDDR4 VDDR4

VOLTAGE

VOLTAGE SENESE

SENESE

FB_VDDC

FB_VDDCI

FB_GND

SUNR1@

PART 5 0F 9

NC NC NC NC NC

NC NC_BIF_VDDC NC_BIF_VDDC

PCIE_PVDD

PCIE

PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC

BIF_VDDC

BACO

BIF_VDDC

CORE

VDDCI

CORE I/O

ISOLATED

VDDCI

SUN-PRO M2_FCBGA962

VDDCI

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

AA31 AA32 AA33 AA34 W30 Y31 V28 W29 AB37

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

N27 T27

AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18

AH22 AH27 AH28 M26 N24 R18 R21 R23 R26 T17 T20 T22 T24 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28

AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13

(PCIE_PVDD: 1.80V@100mA)

+1.8VGS

1

CV30

2

1U_0402_6.3V6K

VGA@ CV30

VGA@

+0.95VGS

1

CV43

2

1U_0402_6.3V6K

VGA@ CV43

VGA@

(BIF_VDDC: 0.95V@1.4A)

+0.95VGS

1

CV67

2

@ CV67

@

1U_0402_6.3V6K

+VGA_CORE

1

CV31

2

1U_0402_6.3V6K

VGA@ CV31

VGA@

10U_0603_6.3V6M

1

CV44

2

1U_0402_6.3V6K

VGA@ CV44

VGA@

1

CV68

2

@ CV68

@

1U_0402_6.3V6K

10U_0603_6.3V6M

Maximum Current on +1.8VGS:

1

"Sun": ~0.5 A

CV32

2

VGA@ CV32

VGA@

PCIE_VDDC:

0.95 V @ 1.88 A (PCIe Gen 2.0)

0.95 V @ 2.50 A (PCIe Gen 3.0)

1

CV46

CV45

CV41

2

1U_0402_6.3V6K

VGA@ CV46

VGA@

VGA@ CV45

VGA@

VGA@ CV41

VGA@

Maximum Current on +0.95VGS:

1

CV69

"Sun": ~4.0 A for PCIe GEN 3.0 designs (estimated)

2

@ CV69

@

1U_0402_6.3V6K

1

CV47

2

VGA@ CV47

VGA@

+0.95VGS

+1.8VGS

+0.95VGS

1

CV50

CV49

CV48

2

1U_0402_6.3V6K

10U_0603_6.3V6M

VGA@ CV50

VGA@

VGA@ CV49

VGA@

VGA@ CV48

VGA@

PCIE_PVDD MarsCRB Design 1u 2 2 10u 1 1

PCIE_VDDC MarsCRB Design 1u 7 7 10u 2 2

BIF_VDDC Mars check list Design 1u 1 1 10u 1 1

+VGA_CORE

Need check all power current and decoupling capacitors

4 4

A

after got SUN databook and reference schematic.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

B

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

Power

LA-9869P

E

15 51Wednesday, March 20, 2013

of

1.0

A

UV1H

PART 3 0F 9

PART 3 0F 9 GDDR5/DDR3

DQA0_0 DQA0_1 DQA0_2 DQA0_3 DQA0_4 DQA0_5 DQA0_6 DQA0_7 DQA0_8 DQA0_9 DQA0_10 DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 DQA0_16 DQA0_17 DQA0_18 DQA0_19 DQA0_20 DQA0_21 DQA0_22 DQA0_23 DQA0_24 DQA0_25 DQA0_26 DQA0_27 DQA0_28 DQA0_29 DQA0_30 DQA0_31 DQA1_0 DQA1_1 DQA1_2 DQA1_3 DQA1_4 DQA1_5 DQA1_6 DQA1_7 DQA1_8 DQA1_9 DQA1_10 DQA1_11 DQA1_12 DQA1_13 DQA1_14 DQA1_15 DQA1_16 DQA1_17 DQA1_18 DQA1_19 DQA1_20 DQA1_21 DQA1_22 DQA1_23 DQA1_24 DQA1_25 DQA1_26 DQA1_27 DQA1_28 DQA1_29 DQA1_30 DQA1_31

MVREFDA MVREFSA

NC NC NC

MEM_CALRP0 NC

NC

SUNR1@

GDDR5/DDR3

MEMORY INTERFACE A

SUN-PRO M2_FCBGA962

Compal P/N

SA00003YOG0

SA000065320

SA00005XB10

SA00005SH40

SA000068U20

MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8

MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12

MAA1_5/MAA_BA2 MAA1_6/MAA_BA0 MAA1_7/MAA_BA1

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

WCKA1B_1/DQMA_7

EDCA0_0/QSA_0 EDCA0_1/QSA_1 EDCA0_2/QSA_2 EDCA0_3/QSA_3 EDCA1_0/QSA_4 EDCA1_1/QSA_5 EDCA1_2/QSA_6 EDCA1_3/QSA_7

DDBIA0_0/QSA_0B DDBIA0_1/QSA_1B DDBIA0_2/QSA_2B DDBIA0_3/QSA_3B DDBIA1_0/QSA_4B DDBIA1_1/QSA_5B DDBIA1_2/QSA_6B DDBIA1_3/QSA_7B

ADBIA0/ODTA0

ADBIA1/ODTA1

CLKA0B

CLKA1B RASA0B

RASA1B CASA0B

CASA1B

CSA0B_0 CSA0B_1

CSA1B_0 CSA1B_1

CKEA0 CKEA1

WEA0B WEA1B

MAA0_8/MAA_13 MAA1_8/MAA_14 MAA0_9/MAA_15

MAA1_9/RSVD

C37 C35

A35

E34 G32 D33

F32

E32 D31

F30 C30

A30

1 1

2 2

1 2

RV34 120_0402_1%VGA@RV34 120_0402_1%VGA@

3 3

GPU Type

SUN PRO-M2

Memory Bus Width

64bit

F28 C28

A28

E28 D27

F26 C26

A26

F24 C24

A24

E24 C22

A22

F22 D21

A20

F20 D19

E18 C18

A18

F18 D17

A16

F16 D15

E14

F14 D13

F12

A12 D11

F10

A10 C10 G13 H13

J13 H11 G10

G8

K9

K10

G9

A8

C8

E8 A6

C6

E6 A5

L18

L20

L27 N12

AG12

M27 M12

AH12

VRAM Vendor

Hynix

Micron

Samsung

B

G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17

A32 C32 D23 E22 C14 A14 E10 D9

C34 D29 D25 E20 E16 E12 J10 D7

A34 E30 E26 C20 C16 C12 J11 F8

J21 G19

H27

CLKA0

G27 J14

CLKA1

H14 K23

K19 K20

K17 K24

K27 M13

K16 K21

J20 K26

L15

H23 J19 M21 M20

Manufacturer P/N

H5TQ2G63DFR-11C

H5TQ2G63DFR-N0C

MT41K128M16JT-107G:K

K4W2G1646E-BC11

K4W2G1646E-BC1A

Close to pin Y12 and AA12

40.2_0402_1%

100_0402_1%

ZZZ2

S1G

S1G@

X76xxxxxLx1

X76 P/N

X7648051L01

X7648051L02

X7648051L03

X7648051L04

X7648051L05

C

MDB[0..63]

+1.5VGS

RV72

VGA@

RV73

VGA@

ZZZ3

H1G@

X76xxxxxLx2

H1G

MDB[0..63]

12

15mil

+MVREFDB_SB

12

1

CV159

CV159 1U_0402_6.3V6K

1U_0402_6.3V6K

VGA@

2

ZZZ5

S2G

S2G@

ZZZ5

H2G

H2G@

X76xxxxxLx4

ZZZ4

X76xxxxxLx3

Size per part Configuration Total Memory Size/Qty

2Gbit 128M*16

1GB/4pcs

2Gbit 128M*16 1GB/4pcs

2Gbit

128M*16

1GB/4pcs

+MVREFDB_SB

0 0

0 1

1

UV1I

PART 4 0F 9

GDDR5/DDR3

DQB0_0 DQB0_1 DQB0_2 DQB0_3 DQB0_4 DQB0_5 DQB0_6 DQB0_7 DQB0_8 DQB0_9 DQB0_10 DQB0_11 DQB0_12 DQB0_13 DQB0_14 DQB0_15 DQB0_16 DQB0_17 DQB0_18 DQB0_19 DQB0_20 DQB0_21 DQB0_22 DQB0_23 DQB0_24 DQB0_25 DQB0_26 DQB0_27 DQB0_28 DQB0_29 DQB0_30 DQB0_31 DQB1_0 DQB1_1 DQB1_2 DQB1_3 DQB1_4 DQB1_5 DQB1_6 DQB1_7 DQB1_8 DQB1_9 DQB1_10 DQB1_11 DQB1_12 DQB1_13 DQB1_14 DQB1_15 DQB1_16 DQB1_17 DQB1_18 DQB1_19 DQB1_20 DQB1_21 DQB1_22 DQB1_23 DQB1_24 DQB1_25 DQB1_26 DQB1_27 DQB1_28 DQB1_29 DQB1_30 DQB1_31

MVREFDB MVREFSB

SUNR1@

GDDR5/DDR3

C5

MDB0

C3

MDB1

E3

MDB2

E1

MDB3

F1

MDB4

F3

MDB5

F5

MDB6

G4

MDB7

H5

MDB8

H6

MDB9

J4

MDB10

K6

MDB11

K5

MDB12

L4

MDB13

M6

MDB14

M1

MDB15

M3

MDB16

M5

MDB17

N4

MDB18

P6

MDB19

P5

MDB20

R4

MDB21

T6

MDB22

T1

MDB23

U4

MDB24

V6

MDB25

V1

MDB26

V3

MDB27

Y6

MDB28

Y1

MDB29

Y3

MDB30

Y5

MDB31

AA4

MDB32

AB6

MDB33

AB1

MDB34

AB3

MDB35

AD6

MDB36

AD1

MDB37

AD3

MDB38

AD5

MDB39

AF1

MDB40

AF3

MDB41

AF6

MDB42

AG4

MDB43

AH5

MDB44

AH6

MDB45

AJ4

MDB46

AK3

MDB47

AF8

MDB48

AF9

MDB49

AG8

MDB50

AG7

MDB51

AK9

MDB52

AL7

MDB53

AM8

MDB54

AM7

MDB55

AK1

MDB56

AL4

MDB57

AM6

MDB58

AM1

MDB59

AN4

MDB60

AP3

MDB61

AP1

MDB62

AP5

MDB63

Y12

AA12

R_pu & R_pd resistor: 0

402 1% resistors are required.

PS_3[ 1]PS_3[ 2 ]PS_3[ 3 ]

0

00

1

0

D

MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8

MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12

MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

MEMORY INTERFACE B

WCKB1B_1/DQMB_7

EDCB0_0/QSB_0 EDCB0_1/QSB_1 EDCB0_2/QSB_2 EDCB0_3/QSB_3 EDCB1_0/QSB_4 EDCB1_1/QSB_5 EDCB1_2/QSB_6 EDCB1_3/QSB_7

DDBIB0_0/QSB_0B DDBIB0_1/QSB_1B DDBIB0_2/QSB_2B DDBIB0_3/QSB_3B DDBIB1_0/QSB_4B DDBIB1_1/QSB_5B DDBIB1_2/QSB_6B DDBIB1_3/QSB_7B

ADBIB0/ODTB0 ADBIB1/ODTB1

MAB0_8/MAB_13 MAB1_8/MAB_14 MAB0_9/MAB_15

MAB1_9/RSVD

DRAM_RST

SUN-PRO M2_FCBGA962

R_pu R_pd

RV20 RV27

NC 4.75K

RV20 RV27

4.53K

RV20 RV27

8.45K 2K

RV20 RV27

4.75K

RV27

RV20

3.4K

CLKB0

CLKB0B

CLKB1

CLKB1B RASB0B

RASB1B CASB0B

CASB1B

CSB0B_0 CSB0B_1

CSB1B_0 CSB1B_1

CKEB0 CKEB1

WEB0B WEB1B

2K

NC

10K

E

MAB[0..15]

B_BA2 B_BA0 B_BA1

ODTB0 ODTB1

CLKB0 CLKB0#

CLKB1 CLKB1#

RASB0# RASB1#

CASB0# CASB1#

CSB0#_0

CSB1#_0

CKEB0 CKEB1

WEB0# WEB1#

1 2

10_0402_1%

120P_0402_50V9

1 2

RV36

DQMB#[0..7] QSB[0..7]

QSB#[0..7]

VGA@RV36

VGA@

CV158

P8

MAB0

T9

MAB1

P9

MAB2

N7

MAB3

N8

MAB4

N9

MAB5

U9

MAB6

U8

MAB7

Y9

MAB8

W9

MAB9

AC8

MAB10

AC9

MAB11

AA7

MAB12

AA8

B_BA2

Y8

B_BA0

AA9

B_BA1

H3

DQMB#0

H1

DQMB#1

T3

DQMB#2

T5

DQMB#3

AE4

DQMB#4

AF5

DQMB#5

AK6

DQMB#6

AK5

DQMB#7

F6

QSB0

K3

QSB1

P3

QSB2

V5

QSB3

AB5

QSB4

AH1

QSB5

AJ9

QSB6

AM5

QSB7

G7

QSB#0

K1

QSB#1

P1

QSB#2

W4

QSB#3

AC4

QSB#4

AH3

QSB#5

AJ8

QSB#6

AM3

QSB#7

T7

ODTB0

W7

ODTB1

L9

CLKB0

L8

CLKB0#

AD8

CLKB1

AD7

CLKB1#

T10

RASB0#

Y10

RASB1#

W10

CASB0#

AA10

CASB1#

P10

CSB0#_0

L10 AD10

CSB1#_0

AC10 U10

CKEB0

AA11

CKEB1

N10

WEB0#

AB11

WEB1#

T8

MAB13

W8

MAB14

U12

MAB15

V12 AH11

DRAM_RST#_R

VGA@

RV71

4.99K_0402_1%

Place all these components close to GPU (Within 25mm) and keep all component close to each other

12

RV70

1 2

51.1_0402_1%

MAB[0..15] DQMB#[0..7] QSB[0..7] QSB#[0..7]

VGA@RV70

VGA@

DRAM_RST#

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

A

B

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

MEM Interface

LA-9869P

E

16 51Wednesday, March 20, 2013

1.0

A

UV1G

PART 6 0F 9

AB39

GND

E39

GND

F34

GND

F39

GND

G33

GND

G34

GND

H31

GND

H34

GND

H39

GND

J31

M34 M39

W31 W34

K31 K34 K39

N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39

Y34 Y39

F15 F17 F19 F21 F23 F25 F27 F29 F31 F33

K14

M17 M22 M24 N16 N18

N21 N23 N26

R15 R17

R20 R22 R24 R27

T11 T13 T16 T18 T21 T23 T26 U15 U17

U20 U22 U24 U27

J34

L31 L34

J27

L11 L17

L22 L24

V11 V16 V18 V21 V23 V26 W2 W6 Y15 Y17 Y20 Y22 Y24 Y27

G2 G6

F7 F9

H9 J2

J6 J8

K7

L2

L6

N2

N6

R2

R6

U2

U6

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

SUNR1@

GND

VSS_MECH VSS_MECH VSS_MECH

SUN-PRO M2_FCBGA962

1 1

2 2

3 3

4 4

A

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

NC

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20

AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20

AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

AG22

A39 AW1 AW39

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+1.8VGS

(DP_VDDR: 1.8V@20mA)

C

D

UV1F

AN24

NC

AP24

NC

AP25

NC

AP26

NC

AU28

NC

AV29

NC

AP20

NC

AP21

NC

AP22

NC

AP23

NC

AU18

NC

AV19

NC

AH34

DP_VDDR

AJ34

DP_VDDR

AF34

DP_VDDR

AG34

DP_VDDR

AM37

DP_VDDR

AL38

DP_VDDR

AM32

DP_VDDR

AW28

NC

AW18

NC

AM39

DP_CALR

SUNR1@

2013/03/20 2014/03/20

PART 8 0F 9

DP_VDDR DP_VDDC

DP GND

CALIBRATION

SUN-PRO M2_FCBGA962

Compal Secret Data

Deciphered Date

DP_VDDC DP_VDDC DP_VDDC DP_VDDC DP_VDDC DP_VDDC DP_VDDC DP_VDDC DP_VDDC

DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR

D

NC NC NC NC

AP31 AP32 AN33 AP33 AL33 AM33 AK33 AK34

(DP_VDDC: 0.95V@20mA)

AN31

AP13 AT13 AP14 AP15

AN27 AP27 AP28 AW24 AW26 AN29 AP29 AP30 AW30 AW32 AN17 AP16 AP17 AW14 AW16 AN19 AP18 AP19 AW20 AW22 AN34 AP39 AR39 AU37 AF39 AH39 AK39 AL34 AV27 AR28 AV17 AR18 AN38 AM35 AN32

E

+0.95VGS

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

PWR_GND

LA-9869P

17 51Wednesday, March 20, 2013

E

of

1.0

5

4

3

2

1

CHANNEL B: 512MB/1024MB DDR3

UV8

MAB15MAB15MAB15MAB15

12

UV8

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646G-BC11_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

MDB53

F7

MDB50

F2

MDB52

F8

MDB51

H3

MDB55

H8

MDB49

G2

MDB54

H7

MDB48

D7

MDB57

C3

MDB59

C8

MDB63

C2

MDB62

A7

MDB56MDB44

A2

MDB61

B8

MDB58

A3

MDB60

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

@

UV6

12

UV6

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646G-BC11_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

UV7

12

UV7

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646G-BC11_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

MDB33

F7

MDB37

F2

MDB35

F8

MDB39

H3

MDB32

H8

MDB36

G2

MDB34

H7

MDB38

D7

MDB45

C3

MDB43

C8

MDB47

C2

MDB42MDB8

A7 A2

MDB40

B8

MDB46

A3

MDB41

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

@

RV83

243_0402_1%

VGA@

CLKB1 CLKB1#

QSB6 QSB7

DQMB#6 DQMB#7

QSB#6 QSB#7

E3

MDB17

F7

MDB19

F2

MDB16

F8

MDB22

H3

MDB20

H8

MDB21

G2

MDB18

H7

MDB23

D7

MDB15

C3

MDB10

C8

MDB12

C2 A7

MDB13

A2 B8

MDB14

A3

MDB11

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

@

CLKB1 CLKB1# CKEB1

ODTB1 CSB1#_0 RASB1# CASB1# WEB1#

RV82

243_0402_1%

VGA@

QSB5

DQMB#5

QSB#5

UV5

+VREFC_A1_B +VREFC_A2_B +VREFC_A3_B +VREFC_A4_B

D D

MDB[0..63]

MAB[15..0]

DQMB#[7..0]

QSB[7..0]

QSB#[7..0]

C C

CLKB0

RV78 40.2_0402_1%

CLKB0#

RV79 40.2_0402_1%

1 2

CLKB1

RV84 40.2_0402_1%

1 2

CLKB1#

RV85 40.2_0402_1%

VGA@

1 2

VGA@

1 2

VGA@

MDB[0..63]

MAB[15..0]

DQMB#[7..0]

QSB[7..0]

QSB#[7..0]

12

VGA@

CV160

0.01U_0402_16V7K

VGA@

CV161

0.01U_0402_16V7K

B_BA0 B_BA1 B_BA2

CLKB0 CLKB0# CKEB0

ODTB0 CSB0#_0 RASB0# CASB0# WEB0#

DRAM_RST#

RV80

243_0402_1%

VGA@

M8

VREFCA

H1

VREFDQ

N3

MAB0 MAB0 MAB0 MAB0

A0

P7

MAB1 MAB1 MAB1 MAB1

A1

P3

MAB2 MAB2 MAB2 MAB2

A2

N2

MAB3 MAB3 MAB3 MAB3

A3

P8

MAB4 MAB4 MAB4 MAB4

A4

P2

MAB5 MAB5 MAB5 MAB5

A5

R8

MAB6 MAB6 MAB6 MAB6

A6

R2

MAB7 MAB7 MAB7 MAB7

A7

T8

MAB8 MAB8 MAB8 MAB8

A8

R3

MAB9 MAB9 MAB9 MAB9MDB1

A9

L7

MAB10 MAB10 MAB10 MAB10

A10/AP

R7

MAB11 MAB11 MAB11 MAB11

A11

N7

MAB12 MAB12 MAB12 MAB12

A12

T3

MAB13 MAB13 MAB13 MAB13

A13

T7

MAB14 MAB14 MAB14 MAB14

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

QSB3 QSB2 QSB4 QSB0 QSB1

DQMB#3 DQMB#2 DQMB#4 DQMB#0 DQMB#1

QSB#3 QSB#2 QSB#4 QSB#0 QSB#1

12

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646G-BC11_FBGA96

E3

MDB29

DQL0

F7

MDB26

DQL1

F2

MDB30

DQL2

F8

MDB27

DQL3

H3

MDB31

DQL4

H8

MDB25

DQL5

G2

MDB28

DQL6

H7

MDB24

DQL7

D7

MDB3

DQU0

C3

MDB5

DQU1

C8

DQU2

C2

MDB6

DQU3

A7

MDB2

DQU4

A2

MDB7 MDB9

DQU5

B8

MDB0

DQU6

A3

MDB4

DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

@

B_BA0 B_BA0 B_BA0 B_BA1 B_BA1 B_BA1 B_BA2 B_BA2 B_BA2

CLKB0 CLKB0# CKEB0 CKEB1

ODTB0 ODTB1 CSB0#_0 CSB1#_0 RASB0# RASB1# CASB0# CASB1# WEB0# WEB1#

DRAM_RST# DRAM_RST# DRAM_RST#

RV81

243_0402_1%

VGA@

Supported Memory Configurations: Up to 4 Gbit/part for DDR3.

B B

+1.5VGS +1.5VGS

0.1U_0402_16V7K

VGA@

1

CV171

2

0.1U_0402_16V7K

VGA@

1

CV172

CV173

2

0.1U_0402_16V7K

VGA@

close to UV9 UV10

1

CV166

A A

0.1U_0402_16V7K

VGA@

2

0.1U_0402_16V7K

VGA@

1

0.1U_0402_16V7K

VGA@

1

0.1U_0402_16V7K

VGA@

1

CV169

CV170

2

0.1U_0402_16V7K

VGA@

CV168

2

1

CV167

2

close to UV7 UV8

5

+1.5VGS +1.5VGS +1.5VGS +1.5VGS

VGA@

RV86

4.99K_0402_1%

VGA@

RV90

4.99K_0402_1%

12

15mil 15mil 15mil 15mil

+VREFC_A1_B +VREFC_A3_B +VREFC_A4_B

12

1

CV162

2

VGA@

0.1U_0402_16V7K

CV179 22U_0603_6.3V6M

1

2

VGA@

4

VGA@

RV87

4.99K_0402_1%

VGA@

RV91

4.99K_0402_1%

12

+VREFC_A2_B

12

1

CV163

2

VGA@

0.1U_0402_16V7K

close to UV7 UV8

+1.5VGS +1.5VGS

1

1U_0402_6.3V6K

VGA@

1

CV184

CV185

2

1U_0402_6.3V6K

VGA@

CV183

2

1U_0402_6.3V6K

VGA@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THISSHE ET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THISSHE ET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THISSHE ET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

CV187

CV186

2

1U_0402_6.3V6K

VGA@

2013/03/20 2014/03/20

VGA@

RV88

4.99K_0402_1%

VGA@

RV92

4.99K_0402_1%

1

CV188

2

VGA@

Compal Secret Data

Deciphered Date

12

1

CV164

2

VGA@

0.1U_0402_16V7K

close to UV9 UV10

1

CV193

2

1U_0402_6.3V6K

VGA@

2

1

CV194

CV195

CV196

2

1U_0402_6.3V6K

VGA@

Title

Size Document Number Rev

C 1.0

Date: Sheet of

12

VGA@

RV89

4.99K_0402_1%

12

VGA@

RV93

4.99K_0402_1%

1

2

1

CV197

CV198

2

1U_0402_6.3V6K

VGA@

Compal Electronics, Inc.

VRAM Channel B

LA-9869P

VGA@

1

CV165

2

0.1U_0402_16V7K

18 51Wednesday, March 20, 2013

5

4

3

2

1

SWR / LDO Mode select

LDO SWR

R476/481/480/482 need to place under UT2 In orfer to reduce sub-trace

2132R RT24

D D

※※※※ If use 2132R, please select LDO mode as default.

+3VS +3VS_RT

LVDS@

80mil 80mil

LVDS@

1 2

RT1 0_0603_5%

DP0_AUXP_C DP0_AUXN_C

DP0_TXP0_C DP0_TXN0_C

DP0_AUXP_C DP0_AUXN_C

DP0_TXP0_C DP0_TXN0_C

1 2

R476 0_0402_5%IEDP@R476 0_0402_5%IEDP@

1 2

R481 0_0402_5%

IEDP@

1 2

R480 0_0402_5%IEDP@R480 0_0402_5%IEDP@

1 2

R482 0_0402_5%

IEDP@

LCD_EDID_CLK LCD_EDID_DATA

LCD_TXOUT0+ LCD_TXOUT0-

Mode Configure

ROM only mode : PIN 30 4.7k pull low, Pin 31 4.7k pull high.

※

EP mode : PIN 30 4.7k pull high, Pin 31 4.7k pull low. EEPROM : PIN 30 4.7k pull high, Pin 31 4.7k pull high.

〈 ※

Default mode

MIIC_SDA MIIC_SCL

PIN30 PIN31

〉

+3VS_RT +3VS_RT

RT4

@

RT4

4.7K_0402_5%

1 2

RT6

4.7K_0402_5%LVDS@

1 2

LVDS@

RT12

4.7K_0402_5%

1 2

RT7

4.7K_0402_5%@

1 2

Close to Pin3

10U_0603_6.3V6M

C C

LVDS@

1

2

CT2

CT1

2

LVDS@

0.1U_0402_16V4Z

10U_0603_6.3V6M

Close to LT2

10U_0603_6.3V6M

LVDS@

0.1U_0402_16V4Z

1

CT4

2

LVDS@

1

2

CT5

22U_0603_6.3V6M

LVDS@

Close to Pin13

+DP_V33

1

CT3

2

Close to Pin18

0.1U_0402_16V4Z

1

CT7

CT6

2

LVDS@

0.1U_0402_16V4Z

+SWR_VDD

1

CT8

2

LVDS@

Close to L29

0.1U_0402_16V4Z

10U_0603_6.3V6M

1

CT9

LVDS@

CT9

2

LVDS@

B B

0.1U_0402_16V4Z

1

2

1

CT11

2

LVDS@

Close to Pin27

CT11

CT10

0.1U_0402_16V4Z

1

CT12

2

LVDS@

Close to Pin7

+SWR_V12

LCD POWER CIRCUIT (For eDP panel only)

+3VS_RT

LVDS@

LT1

LT1 FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

LVDS@

LT2

100mil

FBMA-L11-201209-221LMA30T_0805

+SWR_V12

EC_SMB_CK3 EC_SMB_DA3

LVDS_HPD

Close to Pin8

12

DP0_AUXP_C DP0_AUXN_C

DP0_TXP0_C DP0_TXN0_C

RT8

12K_0402_1%

LVDS@

+DP_V33

+SWR_VDD

1 2

40mil 100mil

40mil 40mil

40mil 40mil 40mil

UT2

3

DP_V33

13

SWR_VDD

18

PVCC

12

SWR_LX

11

SWR_VCCK

27

VCCK

7

DP_V12

2

AUX_P

1

AUX_N

5

LANE0P

6

LANE0N

9

CIICSCL1

10

CIICSDA1

32

HPD

8

DP_REXT

4

DP_GND

LVDS@

SA000069200

Power

LVDS

RTD2132R

DP-IN

GPIO(PWM OUT)

GPIO(Panel_VCC)

GPIO(PWM IN)

GPIO

GPIO(BL_EN)

LVDS

LVDS EDID

EDID

ROM

MIICSCL1

MIICSCL0 MIICSDA0

Other

RTD2132R-VE-CG_QFN32_5X5

TXEC+

TXEC-

TXE2+

TXE2-

TXE1+

TXE1-

TXE0+

TXE0-

MIICDA1

GND

19 20

21 22

23 24

25 26

14 15 16 17

29 28

31 30

33

LCD_TXOUT0+ LCD_TXOUT0-

80mil

LCD_EDID_CLK LCD_EDID_DATA

MIIC_SCL MIIC_SDA

TL_INVT_PWM +LCD_VDD_R

LCD_TXCLK+ LCD_TXCLK-

LCD_TXOUT2+ LCD_TXOUT2-

LCD_TXOUT1+ LCD_TXOUT1-

LCD_TXOUT0+ LCD_TXOUT0-

TL_INVT_PWM APU_INVT_PWM

EC_ENBKL

LCD_EDID_CLK LCD_EDID_DATA

2132S

2132R

* Version R internal Power Switch, can

output 1A, Rds(on)=0.2 ohm

+LCD_VDD_R

PIN15

TL_ENVDD

+LCD_VDD *

LCD_EDID_DATA LCD_EDID_CLK

RT11 0_0805_5%

+LCD_VDD

12

+3VS_RT

+LCD_VDD

RT113

RT113 100K_0402_5%

100K_0402_5%

LVDS@

1 2

RT9 4.7K_0402_5%

LVDS@

1 2

RT10 4.7K_0402_5%

LVDS@

1 2

CT13

4.7U_0603_6.3V6K

LVDS@

2

1

Close to Panel conn.

PIN16

Accept voltage input (high level)

2132S

2132R

* Version R has internal level shifter, remove

level shifter circuit on AMD platform

3.3V

1.5~3.3V

+3VS

U18

IEDP@

U18

5

VIN

4

SS

APL3512ABI-TRG_SOT23-5

IEDP@

SA00003AR00

W=80mils

+LCD_VDD_SS

12

C2

A A

1500P_0402_50V7K

W=80mils

1

VOUT

2

GND

3

EN

100K_0402_5%

5

IEDP@

R112

+LCD_VDD

1 2

IEDP@

Close to Pin15

1 2

R104 0_0402_5%

LCD_ENVDD

4

2132S 2132R

1. Support SWR mode

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

2

Different between 2132S and 2132R

1. Support LDO mode and SWR mode

2. Internal ROM

3. Support LCD_VDD(internal Power switch)

4. Integrates Level shifter

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

LVDS Translator - RTD2132S

LA-9869P

1

19 51Wednesday, March 20, 2013

1.0

of

19 51Wednesday, March 20, 2013

A

B

C

D

E

For LVDS 1ch Panel

USB20_P1_R

LCD_TXOUT0+

LCD_TXOUT0-

1 1

LCD_TXOUT1+

LCD_TXOUT1-

LCD_TXOUT2+ LCD_TXOUT2LCD_TXCLK+

LCD_TXCLKLCD_EDID_CLK LCD_EDID_DATA

LCD_TXOUT0+ LCD_TXOUT0LCD_TXOUT1+ LCD_TXOUT1LCD_TXOUT2+ LCD_TXOUT2LCD_TXCLK+

LCD_TXCLKLCD_EDID_CLK LCD_EDID_DATA

USB20_N1_R

USB20_N4_R

USB20_P4_R

For eDP Panel

1 2

2 2

DP0_TXP1_C DP0_TXN1_C

Reserve for eDP panel potience issue

IEDP@

R103 0_0402_5%

BKOFF#_R

3 3

4 4

47K_0402_5%

1 2

D16 RB751V40_SC76-2

12

R114

R114 10K_0402_5%

10K_0402_5%

LED_PW M

12

R133

R102 0_0402_5%IEDP@R102 0_0402_5%IEDP@

1 2

R105 0_0402_5%IEDP@R105 0_0402_5%IEDP@

IEDP@

LCD_EDID_DATA LCD_EDID_CLK

1 2

LVDS@

1.5A

+LCD_INV B+

1 2

RB751V40_SC76-2

IEDP@

R149 100K_0402_5%

R149 100K_0402_5% R150 100K_0402_5%

R150 100K_0402_5%

IEDP@

+3VS +5VS

IEDP@

5

U19

4

O

3

1 2

R152 0_0402_5%

LVDS@

L2

EMI@L2

EMI@

FBMA-L11-201209-221LMA30T_0805

1 2

R108 0_0402_5%

D17

LCD_TXOUT1+

LCD_TXOUT1-

12 12

1

P

IN1

2

IN2

G

SN74AHC1G08DCKR_SC70-5

12

IEDP@

+3VS

LCD_ENBKL BKOFF#

APU_INVT_PWM

TL_INVT_PWM

JLVDS @

STARC_111H30-000000-G4-R

EMI@

1

4

L55

@TOUCH_EMI@

1

4

L56

WCM-2012-900T_0805

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

GND

32

GND

33

GND

34

GND

35

GND

2

3

WCM-2012-900T_0805

TOUCH_EMI@

1 2

R155 0_0402_5%

2

3

TOUCH_EMI@

1 2

R156 0_0402_5%

+5VS_LVDS_TOUCH USB20_N4_R USB20_P4_R BKOFF#

USB20_P1_R USB20_N1_R +3VS_LVDS_CAM

+LCD_VDD LCD_EDID_CLK

LCD_EDID_DATA LCD_TXOUT0LCD_TXOUT0+ LCD_TXOUT1LCD_TXOUT1+ LCD_TXOUT2LCD_TXOUT2+

LCD_TXCLKLCD_TXCLK+

LED_PW M BKOFF#_R

USB20_P1

USB20_N1

USB20_N4

USB20_P4

1 2

@

R391 0_0603_5%

INT_MIC_DATA INT_MIC_CLK

1 2

@

R392 0_0603_5%

R154 0_0402_5%

+LCD_INV

1 2

IEDP@

1.5A

+3VS

+LCD_VDD +3VS

Irush=1.5A

INT_MIC_DATA INT_MIC_CLK

LVDS_HPD

USB20_P1_R

+3VS

INT_MIC_DATA

D32

4

5

Vbus

6

SC300001400

ESD@D32

ESD@

3

USB20_N1_R

3

2

GND

1

INT_MIC_CLK

1

close to LVDS conn.

Security Classification

2013/03/20 2014/03/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/20 2014/03/20

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

LVDS

LA-9869P

20 51Wednesday, March 20, 2013

E

1.0

A

1 1

UMA_CRT_R UMA_CRT_G UMA_CRT_B

R140

R139

R138

12

2 2

3 3

UMA_CRT_VSYNC

UMA_CRT_HSYNC

12

150_0402_1%

+HDMI_5V_OUT

UMA_CRT_DATA

UMA_CRT_CLK

12

150_0402_1%

2

C282

0.1U_0402_10V7K

1

Near U3.1

C238

B

1

C239

2

2.2P_0402_50V8C

+HDMI_5V_OUT

UMA_CRT_DATA

UMA_CRT_CLK

UMA_CRT_VSYNC

UMA_CRT_HSYNC

EMI@

1 2

L3 NBQ100505T-800Y_0402

EMI@

1 2

L4 NBQ100505T-800Y_0402

EMI@

1 2

L5 NBQ100505T-800Y_0402

C240

2.2P_0402_50V8C

+3VS

1

2

2.2P_0402_50V8C

C241

1

C242

2

2.2P_0402_50V8C

1

2

7

10

11

13

15

6

TPD7S019-15DBQR_SSOP16

SA000068B00

1

C243

2

2.2P_0402_50V8C

U4

VCC_SYNC

VCC_VIDEO

VCC_DDC

DDC_IN1

DDC_IN2

SYNC_IN1

SYNC_IN2

GND

C

1

2

2.2P_0402_50V8C

SYNC_OUT1

SYNC_OUT2

BYP

VIDEO1

VIDEO2

VIDEO3

DDC_OUT1

DDC_OUT2

CRT_R_L CRT_G_L CRT_B_L

8

3

4

5

9

12

14

16

1 2

C19 0.22U_0402_16V7KC19 0.22U_0402_16V7K

CRT_B_L

CRT_G_L

CRT_R_L

R67

VSYNC_R

HSYNC_R

R67

R66

+HDMI_5V_OUT

4.7K_0402_5%

1 2

D

+HDMI_5V_OUT

R153

1 2

22_0402_5%

CRT_R_L CRT_DDC_DAT

CRT_G_L HSYNC

CRT_B_L VSYNC

CRT_DDC_CLK

R159

4.7K_0402_5%

1 2

T65 PADT65 PAD

T66 PADT66 PAD

CRT_DDC_DAT

CRT_DDC_CLK

VSYNC

HSYNC

JCRT

@

JCRT

@

6

11

1 7

12

2 8

13

3 9

14

G

4

G

10 15

5

C-H_13-12201513CP

E

16 17

4 4

Security Classification

2013/03/20 2014/03/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/20 2014/03/20

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT

LA-9869P

21 51Wednesday, March 20, 2013

E

1.0

5

4

3

2

1

HDMI POWER CIRCUIT

VIN = 5V, IOUT = 0.5A , RDS(ON) TYP=95m ; MAX=115m

1 2

UMA_HDMI_TXC+

UMA_HDMI_TXCUMA_HDMI_TX0 +

D D

C C

UMA_HDMI_TX0 -

UMA_HDMI_TX1 +

UMA_HDMI_TX1 -

UMA_HDMI_TX2 +

UMA_HDMI_TX2 -

VGA_DVI_ TXC-

VGA_DVI_ TXC+

VGA_DVI_ TXD0-

VGA_DVI_ TXD0+ HDMI_R_D0+

VGA_DVI_ TXD1-

VGA_DVI_ TXD1+

C267 0.1U_040 2_16V7KC267 0.1U_040 2_16V7K

1 2

C268 0.1U_040 2_16V7KC268 0.1U_040 2_16V7K

1 2

C269 0.1U_040 2_16V7KC269 0.1U_040 2_16V7K

1 2

C270 0.1U_040 2_16V7KC270 0.1U_040 2_16V7K

1 2

C271 0.1U_040 2_16V7KC271 0.1U_040 2_16V7K

1 2

C276 0.1U_040 2_16V7KC276 0.1U_040 2_16V7K

1 2

C277 0.1U_040 2_16V7KC277 0.1U_040 2_16V7K

1 2

C283 0.1 U_0402_ 16V7KC283 0.1 U_0402_ 16V7K

L8

EMI@ L8

EMI@

1

4

WCM-2012-900T_0805

EMI@ L9

EMI@

1

4

WCM-2012-900T_0805

EMI@ L10

EMI@

1

4

WCM-2012-900T_0805

2

3

L9

2

3

L10

2

3

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D1-

HDMI_R_D1+

VGA_DVI_ TXC+ VGA_DVI_ TXCVGA_DVI_ TXD0+

VGA_DVI_ TXD0-

VGA_DVI_ TXD1+

VGA_DVI_ TXD1-

VGA_DVI_ TXD2+

VGA_DVI_ TXD2-

UMA_HDMI_CL K

UMA_HDMI_DA TA

UMA_HDMI_CL K

UMA_HDMI_DA TA HDMI_SDATA

1 2

HDMI_R_CK+

R195 60 4_0402 _1%R19 5 604_ 0402_1 %

1 2

HDMI_R_CK-

R197 60 4_0402 _1%R19 7 604_ 0402_1 %

1 2

HDMI_R_D1-

R198 60 4_0402 _1%R19 8 604_ 0402_1 %

1 2

HDMI_R_D1+

R202 60 4_0402 _1%R20 2 604_ 0402_1 %

1 2

HDMI_R_D0+

R201 60 4_0402 _1%R20 1 604_ 0402_1 %

1 2

HDMI_R_D0-

R203 60 4_0402 _1%R20 3 604_ 0402_1 %

1 2

HDMI_R_D2-

R205 60 4_0402 _1%R20 5 604_ 0402_1 %

1 2

HDMI_R_D2+

R206 60 4_0402 _1%R20 6 604_ 0402_1 %

+5VS

Change R184 and R185 from 2K to 4.7K for HDMI detect issue on Comal

+3VS

S

G

2

13

D

S

D

S

Q19

FDV301N-NL _SOT23-3

Q18/Q19 Change to FDV301 due to BSH111 EOL

2

G

2

13

D

Q18

FDV301N-NL _SOT23-3

13

D

S

Q24

Q24 2N7002KW_SOT32 3-3

2N7002KW_SOT32 3-3

HDMI_SCLK

Current Limit: TYP=0.8A ; MAX=1A

+HDMI_5V_O UT +5VS

1

C284

0.1U_040 2_10V7 K

2

+HDMI_5V_O UT

5

1

U9

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

HDMI_HPD

4

U17

1

OUT

2

GND

3

AP2151DWG-7_S OT25-5

SA00006H000

R145

1 2

1K_0402 _5%

100K_04 02_5%

HDMI_HPD

R571

2.2K_0402_5%

ZZZ

HDMI45@ZZZ

5

IN

EN4FLG

HDMI_HPD_CHDMI_HPD_U

2

R186

C265

0.1U_040 2_16V4 Z

1

1 2

12

+3VS

HDMI_HPD

HDMI Royalty

+HDMI_5V_O UT

RO0000003HM

HDMI Connector

HDMI_HPD_C

HDMI_SDATA HDMI_SCLK

HDMI_R_CKHDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

HDMI45@

HDMI W/Logo + HDCP

HDMI W/O Logo: RO0000001HM HDMI W/Logo: RO0000002HM HDMI W/Logo + HDCP: RO0000003HM

JHDMI @

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

TYCO_20413 43-1~D

23

GND

22

GND

21

GND

20

GND

RP1

VGA_DVI_ TXD2-

VGA_DVI_ TXD2+

B B

A A

1

4

WCM-2012-900T_0805

5

2

HDMI_R_D2-

2

3

HDMI_R_D2+

3

+3VS

+HDMI_5V_O UT

4

L11

EMI@ L11

EMI@

RP1

1 8 2 7 3 6 4 5

4.7K_8P4R_5%

UMA_HDMI_DA TA UMA_HDMI_CL K

HDMI_SCLK HDMI_SDATA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SH EET NOR THE I NFORMATION IT C ONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SH EET NOR THE I NFORMATION IT C ONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SH EET NOR THE I NFORMATION IT C ONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Docu ment Num ber Rev

Date: Sheet of

Date: Sheet

HDMI Conn./CEC

LA-9869P

1

of

22 51Wednesday, March 20, 20 13

1.0

A

APU_PCIE_RST#_R

1 2

UMI_MTX_C_FRX_P0 UMI_MTX_C_FRX_N0 UMI_MTX_C_FRX_P1 UMI_MTX_C_FRX_N1 UMI_MTX_C_FRX_P2 UMI_MTX_C_FRX_N2 UMI_MTX_C_FRX_P3

1 1

2 2

UMI_MTX_C_FRX_N3 UMI_FTX_C_MRX_P0

UMI_FTX_C_MRX_N0 UMI_FTX_C_MRX_P1 UMI_FTX_C_MRX_N1 UMI_FTX_C_MRX_P2 UMI_FTX_C_MRX_N2 UMI_FTX_C_MRX_P3 UMI_FTX_C_MRX_N3

+PCIE_VDDR_FCH

+1.1VS_CKVDD

SS

APU DISP

NSS

APU

For DIS

WLAN

SS

LAN

3 3

FCH_RTCX1_R

FCH_X1_R

C202 0.1U_0402_16V7KC202 0.1U_0402_16V7K

1 2

C203 0.1U_0402_16V7KC203 0.1U_0402_16V7K

1 2

C204 0.1U_0402_16V7KC204 0.1U_0402_16V7K

1 2

C209 0.1U_0402_16V7KC209 0.1U_0402_16V7K

1 2

C210 0.1U_0402_16V7KC210 0.1U_0402_16V7K

1 2

C211 0.1U_0402_16V7KC211 0.1U_0402_16V7K

1 2

C213 0.1U_0402_16V7KC213 0.1U_0402_16V7K

1 2

C212 0.1U_0402_16V7KC212 0.1U_0402_16V7K

1 2

R220 590_0402_1%R220 590_0402_1%

1 2

R221 2K_0402_1%R221 2K_0402_1%

1 2

R228 2K_0402_1%R228 2K_0402_1%

Input from external clock generator NC for internal clock generator

APU_DISP_CLK APU_DISP_CLK#

clock no test point

APU_CLK APU_CLK#

CLK_PCIE_VGA CLK_PCIE_VGA#

CLK_WLAN CLK_WLAN#

CLK_LAN CLK_LAN#

Place close to Y2

1 2

@

R207 0_0402_5%

1 2

@

R208 0_0402_5%

LPC_RST#_R

UMI_MTX_FRX_P0 UMI_MTX_FRX_N0 UMI_MTX_FRX_P1 UMI_MTX_FRX_N1 UMI_MTX_FRX_P2 UMI_MTX_FRX_N2 UMI_MTX_FRX_P3 UMI_MTX_FRX_N3

PCIE_CALRP PCIE_CALRN

CLK_CALRN

CLK_PCIE_VGA CLK_PCIE_VGA#

32K_X1

25M_X1

Place close to Y1

1 2

C220 27P_0402_50V8J

NOGCLK@

1 2

27P_0402_50V8J

1 2

R230

20M_0402_5%

NOGCLK@

1 2

27P_0402_50V8J

12

1 2

A

C230

4 4

C230

C248 18P_0402_50V8JNOGCLK@ C248 18P_0402_50V8JNOGCLK@

C249 18P_0402_50V8JNOGCLK@ C249 18P_0402_50V8JNOGCLK@

Change C248/C249 to 18P for RTC issue on pre-MP

25MHZ 12PF X3G025000DK1H-X

1

Y3

NOGCLK@

Y3

GND

NOGCLK@

R229

R229 1M_0402_5%

1M_0402_5%

NOGCLK@

3

2

4

Y2

32.768KHZ_12.5P_1TJF125DP1A000D

NOGCLK@

25M_X1

25M_X2

32K_X1

32K_X2

B

U1A

AE2

PCIE_RST#

AD5

A_RST#

AE30

UMI_TX0P

AE32

UMI_TX0N

AD33

UMI_TX1P

AD31

UMI_TX1N

AD28

UMI_TX2P

AD29

UMI_TX2N

AC30

UMI_TX3P

AC32

UMI_TX3N

AB33

UMI_RX0P

AB31

UMI_RX0N

AB28

UMI_RX1P

AB29

UMI_RX1N

Y33

UMI_RX2P

Y31

UMI_RX2N

Y28

UMI_RX3P

Y29

UMI_RX3N

AF29

PCIE_CALRP

AF31

PCIE_CALRN

V33

GPP_TX0P

V31

GPP_TX0N

W30

GPP_TX1P

W32

GPP_TX1N

AB26

GPP_TX2P

AB27

GPP_TX2N

AA24

GPP_TX3P

AA23

GPP_TX3N

AA27

GPP_RX0P

AA26

GPP_RX0N

W27

GPP_RX1P

V27

GPP_RX1N

V26

GPP_RX2P

W26

GPP_RX2N

W24

GPP_RX3P

W23

GPP_RX3N

F27

CLK_CALRN

G30

PCIE_RCLKP

G28

PCIE_RCLKN

R26

DISP_CLKP

T26

DISP_CLKN

H33

DISP2_CLKP

H31

DISP2_CLKN

T24

APU_CLKP

T23

APU_CLKN

J30

SLT_GFX_CLKP

K29

SLT_GFX_CLKN

H27

GPP_CLK0P

H28

GPP_CLK0N

J27

GPP_CLK1P

K26

GPP_CLK1N

F33

GPP_CLK2P

F31

GPP_CLK2N

E33

GPP_CLK3P

E31

GPP_CLK3N

M23

GPP_CLK4P

M24

GPP_CLK4N

M27

GPP_CLK5P

M26

GPP_CLK5N

N25

GPP_CLK6P

N26

GPP_CLK6N

R23

GPP_CLK7P

R24

GPP_CLK7N

N27

GPP_CLK8P

R27

GPP_CLK8N

J26

14M_25M_48M_OSC

C31

25M_X1

C33

25M_X2

2180755042A13HUDSON_FCBGA656

25M_X1

B

PCI EXPRESS INTERFACES

INT 15K PU

INT 8.2K PU

CLOCK GENERATOR

INT 8.2K PU

@EMI@

12

R11610_0402_5%

10P_0402_50V8J

HUDSON-3

PCI CLKS

PCI INTERFACE

INT 8.2K PU

LPCAPUS5 PLUS

LDRQ1#/CLK_REQ6#/GPIO49

C507

1 2

@EMI@

PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCICLK4/14M_OSC/GPO39

REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42

GNT3#/CLK_REQ7#/GPIO46

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8

AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0#

REQ1#/GPIO40

GNT0#

GNT1#/GPO44

GNT2#/SD_LED/GPO45

CLKRUN#

LOCK#

INTE#/GPIO32 INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

SERIRQ/GPIO48

DMA_ACTIVE#

PROCHOT#

APU_PG

LDT_STP#

APU_RST#

S5_CORE_EN

RTCCLK

INTRUDER_ALERT#

VDDBT_RTC_G

32K_X1

32K_X2

BOLTONR1@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AF3 AF1 AF5 AG2 AF6

AB5

AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10 AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9

AF18 AE18 AC16 AD18

B25 D25

D27 C28 A26 A29 A31 B27 AE27 AE19

G25 E28 E26 G26 F26

H7 F1 F3 E6

G2

G4

C

VRAM_SEL GPIO30 GPIO31

LPC_CLK0 LPC_CLK1

APU_PROCHOT# APU_PWRGD

APU_RST#

+RTCVCC_R 32K_X1

32K_X2

D

Near FCH

PCI_CLK1 PCI_CLK3

PCI_CLK4

PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27

X76 H:1G

L:900M

1 2

R255 22_0402_5%EMI@R255 22_0402_5%EMI@

1 2

R258 22_0402_5%EMI@R258 22_0402_5%EMI@

T35T35

1 2

@

R260 0_0402_5%

20 mils

C250

0.1U_0402_16V4Z

2013/03/20 2014/03/20

Strap

+3VS

VRAM_SEL

1

2

Compal Secret Data

1 2

CLK_PCI_EC CLK_PCI_DDR

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME#

SERIRQ

1

C252

2

1U_0402_6.3V6K

Deciphered Date

RC95

RC95 10K_0402_5%

10K_0402_5%

@

RC99

RC99 10K_0402_5%

10K_0402_5%

@

DMA_ACTIVE# APU_PROCHOT# APU_PWRGD

APU_RST#

RTC_CLK

R271

1 2

120_0402_5%

D

+RTCVCC

12

PCIE_RST# is for PCIE devices on APU

APU_PCIE_RST#_R

LPC_RST#_R

1 2

R337 10K_0402_5%

1 2

R340 10K_0402_5%

1 2

R225 33_0402_5%R225 33_0402_5%

150P_0402_50V8J

1 2

R226 33_0402_5%R226 33_0402_5%

C222

150P_0402_50V8J

VGA@

GPIO30

GPIO31

1

C221

2

A_RST# is for LPC devices

1

2

UMA@

1 2

R332 10K_0402_5%

1 2

UMA@

R339 10K_0402_5%

Function GPIO30 GPIO31

PowerXpress

0 0 Reserved Discrete

UMA

DMA active. The FCH drives the DMA_ACTIVE# to APU to notify DMA activity. This will cause the APU to reestablish the UMI link quicker.

APU_PG/APU_RST#/LDT_STP# : OD pin DMA_ACTIVE# : IN/OD, 0.8V threshold PROCHOT# : IN, 0.8V threshold LDT_STP : No use, NC

R277

1 2

120_0402_5%

JCMOS@JCMOS

@

CMOS Setting Place under DDR Door

Title

Size Document Number Rev

Custom

Date: Sheet of

1 1

1

+RTCBATT_D

3

1

C253

2

0.1U_0402_10V7K

+RTCBATT_D

1

C295

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Hudson-M3-UMI/PCI/CLOCK/LPC/RTC

LA-9869P

E

R223

R223 100K_0402_5%

100K_0402_5%

@

1 2

R224

R224 100K_0402_5%

100K_0402_5%

@

1 2

10 01

DH1

DH1 BAS40-04_SOT23-3

BAS40-04_SOT23-3

2

E

+3VS

+RTCBATT

+3VL

APU_PCIE_RST#

LPC_RST#

23 51Wednesday, March 20, 2013

1.0

A

PCIE_RST2# is for PCIE devices on FCH

+3VALW _FCH

+3VS

R283

G

2

S

ESD@

1 2

1000P_0 402_50 V7K

S

FCH_PWRGD

Q30

Q30 2N7002KW_SOT32 3-3

2N7002KW_SOT32 3-3

HDMI_HPD

1 1

C505

R283 10K_040 2_5%

10K_040 2_5%

1 2

13

D

HDMI_HPD_FCH

+3VS

SM Bus 0-->S0 PWR domain SM Bus 1-->S5 PWR domain (for ASF device only)

1 2

R279 10 K_0402 _5%R279 1 0K_0402_5%

For DIS

VGA_PD: Support CRT power saving L: MLDAC power on H: MLDAC power off

2 2

USB_OC2# is for right USB2.0 ports

USB_CHG_OC# is for right USB3.0 ports

@ESD@

ESD@

RP12

USB_OC0# is for right USB3.0 ports

H_THERMTRIP# USB_OC#0 USB_CHG_OC# USB_OC#2

For ESD request

1 2

C503 1 80P_0402_50V8J

1 2

C504 1 80P_0402_50V8J

+3VALW _FCH

1 8 2 7 3 6 4 5

10K_8P4 R_5%

PXS_RST# ODD_DA#_FCH

For DIS

CLKREQ_P EG#

AZ_BITCLK_ HD AZ_SDOUT_HD

AZ_SDIN0_ HD

AZ_SYNC_HD AZ_RST_HD#

For DIS

+3VALW _FCH

3 3

+3VS

4 4

12

@

R282 10 0K_040 2_5%

1 2

R281 10 K_0402 _5%R281 1 0K_0402_5%

1 2

R288 2. 2K_0402_5%R288 2.2K_0402_5%

1 2

R289 2. 2K_0402_5%R289 2.2K_0402_5%

For FCH internal debug use

1 2

@

R290 2. 2K_0402_5%

1 2

@

R292 2. 2K_0402_5%

1 2

@

R293 2. 2K_0402_5%

1 2

R296 10 K_0402 _5%R296 1 0K_0402_5%

1 2

R286 2. 2K_0402_5%R286 2.2K_0402_5%

1 2

R287 2. 2K_0402_5%R287 2.2K_0402_5%

1 2

R291 8. 2K_0402_5%R291 8.2K_0402_5%

1 2

R284 8. 2K_0402_5%R284 8.2K_0402_5%

For DIS

1 2

@

R297 10 K_0402 _5%

1 2

R280 2. 2K_0402_5%R280 2.2K_0402_5%

1 2

@

R324 10 K_0402 _5%

1 2

@

R269 1K _0402_ 5%

RP10

1 8

AZ_SDIN1_ HD

2 7

AZ_SDIN3_ HD

3 6

AZ_SDIN2_ HD

4 5

10K_8P4 R_5%

AZ_SDIN0_ HD

@

EC_LID_OUT# FCH_PCIE_WAKE#

FCH_SCLK1 FCH_SDATA1

TEST0 TEST1 TEST2

PXS_PW REN

FCH_SCLK0 FCH_SDATA0 CLKREQ_W LAN# CLKREQ_L AN#

PXS_PW REN EC_RSMRST# HDA_BITCLK PXS_RST#

A

For DIS

PXS_PW REN

2N7002KDWH_SO T363-6

Q5530B

Q5530B 2N7002KDWH_SO T363-6

2N7002KDWH_SO T363-6

EC_LID_OUT#

SLP_S3#

SLP_S5# PBTN_OUT# FCH_PWRGD

GATEA20 KB_RST#

EC_SCI# EC_SMI#

FCH_PCIE_WAKE#

H_THERMTRIP#

EC_RSMRST#

CLKREQ_L AN#

FCH_SPKR FCH_SCLK0 FCH_SDATA0 FCH_SCLK1 FCH_SDATA1

CLKREQ_W LAN#

VGA_PW RGD

R295 0_0402_5%

@

1 2

R129 100K_0402_5%@R129 1 00K_0402_5%@

ODD_PLUGIN#

USB_OC#2

USB_CHG_OC#

USB_OC#0

1 2

R320 33_0402_5%EMI@R320 3 3_0402_5%EMI@

1 2

R321 33_0402_5%R321 3 3_0402 _5%

1 2

R322 33_0402_5%R322 3 3_0402 _5%

1 2

R323 33_0402_5%R323 3 3_0402 _5%

PXS_RST# PXS_PW REN

Q5530A

6 1

2

34

EC_PXCONTROL

5

LAN_EN

12

PXS_RST# PXS_PW REN

HDMI_HPD_FCH

EC_PXCONTROL

B

T50T50

FCH_PWRGD TEST0

TEST1 TEST2

WD_PW RGD

FCH_SCLK0 FCH_SDATA0 FCH_SCLK1 FCH_SDATA1

ODD_DA#_FCH

USB_OC#2 USB_CHG_OC# USB_OC#0

HDA_BITCLK HDA_SDOUT

AZ_SDIN1_ HD AZ_SDIN2_ HD AZ_SDIN3_ HD HDA_SYNC HDA_RST#

T26T26

+3VALW

12

R21610K_0402_5% R21 610K_0402 _5%

B

U1D

AB6

PCIE_RST2# /GEVENT4#

R2

RI#/GEVENT22#

W7

SPI_CS3# /GBE_STAT1/GEVENT21 #

T3

SLP_S3#

W2

SLP_S5#

J4

PWR_BTN#

N7

PWR_GO OD

T9

TEST0

T10

TEST1/TMS

V9

TEST2

AE22

GA20IN/GEVENT0#

AG19

KBRST#/GEVENT1#

R9

PME#/GEV ENT3#

C26

LPC_SMI#/GEVENT23#

T5

LPC_PD#/GEVENT5#

U4

SYS_RESET#/GEVENT19#

K1

WAKE# /GEVENT8#

V7

IR_RX1/GE VENT20#

R10

THRMTRIP#/SMBA LERT#/GEVENT2#

AF19

WD_PW RGD

U2

RSMRST#

AG24

CLK_REQ4 #/SATA_IS 0#/GPIO64

AE24

CLK_REQ3 #/SATA_IS 1#/GPIO63

AE26

SMARTVOLT1/S ATA_IS2#/GPIO50

AF22

CLK_REQ0 #/SATA_IS 3#/GPIO60

AH17

SATA_IS4# /FANOUT3/GP IO55

AG18

SATA_IS5# /FANIN3/GPIO59

AF24

SPKR/GPIO66

AD26

SCL0/GPIO43

AD25

SDA0/GPIO47

T7

SCL1/GPIO227

R7

SDA1/GPIO228

AG25

CLK_REQ2 #/FANIN4/GPIO62

AG22

CLK_REQ1 #/FANOUT4/G PIO61

J2

IR_LED#/L LB#/GPIO184

AG26

SMARTVOLT2/S HUTDOWN#/GPIO51

V8

DDR3_RST#/GEVENT7#/VGA_PD

W8

GBE_LED0/GPIO18 3

Y6

SPI_HOLD#/GBE_LED1/GEVE NT9#

V10

GBE_LED2/GEVENT10#

AA8

GBE_STAT0/G EVENT11#

AF25

CLK_REQG #/GPIO65/OSCIN/IDLEEXIT#

M7

BLINK/USB _OC7#/GEVENT18#

R8

USB_OC6# /IR_TX1/GE VENT6#

T1

USB_OC5# /IR_TX0/GE VENT17#

P6

USB_OC4# /IR_RX0/G EVENT16#

F5

USB_OC3# /AC_PRES /TDO/GEVENT15#

P5

USB_OC2# /TCK/GEVENT14#

J7

USB_OC1# /TDI/GEVENT13#

T8

USB_OC0# /SPI_TPM_CS#/TRST#/GEVENT12#

AB3

AZ_BITCLK

AB1

AZ_SDOUT

AA2

AZ_SDIN0/GPIO167

Y5

AZ_SDIN1/GPIO168

Y3

AZ_SDIN2/GPIO169

Y1

AZ_SDIN3/GPIO170

AD6

AZ_SYNC

AE4

AZ_RST#

K19

PS2_DAT/SDA4/GPIO187

J19

PS2_CLK/CEC/SCL4/GPIO188

J21

SPI_CS2# /GBE_STAT2/GPIO166

D21

PS2KB_DAT/GPIO189

C20

PS2KB_CLK/GPIO1 90

D23

PS2M_DAT/G PIO191

C22

PS2M_CLK /GPIO192

F21

KSO_0/GPIO209

E20

KSO_1/GPIO210

F20

KSO_2/GPIO211

A22

KSO_3/GPIO212

E18

KSO_4/GPIO213

A20

KSO_5/GPIO214

J18

KSO_6/GPIO215

H18

KSO_7/GPIO216

G18

KSO_8/GPIO217

B21

KSO_9/GPIO218

K18

KSO_10/GPIO219

D19

KSO_11/GPIO220

A18

KSO_12/GPIO221

C18

KSO_13/GPIO222

B19

KSO_14/XDB0/GPIO223

B17

KSO_15/XDB1/GPIO224

A24

KSO_16/XDB2/GPIO225

D17

KSO_17/XDB3/GPIO226

2180755 042A13 HUDSON_FCB GA656

GEVENT#2~22 INT 10K PU

INT 8.2K PU INT 8.2K PU

INT 10K PU

INT 50K PD

INT 10K PU

INT 8.2K PU

INT 10K PU

HUDSON-3

EMBEDDED CTRL

INT 10K PU

C

USBCLK/14M_25M_4 8M_OSC

USB MISCUSB 1.1USB 2.0USB 3.0

INT 15K PD

USB OC GPIO ACPI / WAKE UP EVENTSHD AUDIO

EC_PWM0/EC_TIMER0 /GPIO197 EC_PWM1/EC_TIMER1 /GPIO198

EC_PWM2/EC_TIMER2 /WOL_ EN/GPIO1 99

EC_PWM3/EC_TIMER3 /GPIO200

INT 10K PU

USB_RCOMP

USB_FSD1P/GPIO18 6

USB_FSD1N

USB_FSD0P/GPIO18 5

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

USBSS_CA LRP USBSS_CA LRN

USB_SS_TX3P USB_SS_TX3N

USB_SS_RX3P USB_SS_RX3N

USB_SS_TX2P USB_SS_TX2N

USB_SS_RX2P USB_SS_RX2N

USB_SS_TX1P USB_SS_TX1N

USB_SS_RX1P USB_SS_RX1N

USB_SS_TX0P USB_SS_TX0N

USB_SS_RX0P USB_SS_RX0N

SCL2/GPIO193

SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196

KSI_0/GP IO201 KSI_1/GP IO202 KSI_2/GP IO203 KSI_3/GP IO204 KSI_4/GP IO205 KSI_5/GP IO206 KSI_6/GP IO207 KSI_7/GP IO208

BOLTONR1@

C

D

G8 B9

USB_RCOMP

H1 H3

H6 H5

H10 G10

K10 J12

G12 F12

K12 K13

B11 D11

E10 F10

C10 A10

H9 G9

A8 C8

F8 E8

C6 A6

C5 A5

C1 C3

E1 E3

C16

USBSS_CA LRP

A16

USBSS_CA LRN

A14 C14

C12 A12

D15 B15

E14 F14

F15 G15

H13 G13

J16 H16

J15 K15

H19 G19 G22 G21 E22 H22 J22 H21

K21 K22

For PCIE device reset on FS1

F22

(GFX,GLAN,WLAN,LVDS Travis)

F24 E24 B23 C24 F18

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SH EET NOR THE I NFORMATION IT C ONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SH EET NOR THE I NFORMATION IT C ONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SH EET NOR THE I NFORMATION IT C ONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

R329 11.8K_0 402_1%R329 11.8K_0402 _1%

1 2

R330 1K_0402_1%R330 1K_0 402_1%

1 2

R334 1K_0402_1%R334 1K_0 402_1%

GPIO193 GPIO194 GPIO195 GPIO196

Hudson-M2/M3 OHCI (DEV-20, FUN-5)

Hudson-M2 OHCI (DEV-22, FUN-0)

ODD_DA#_FCH

EHCI (DEV-22, FUN-2) Hudson-M3

XHCI (DEV-16, FUN-0) XHCI (DEV-16, FUN-1)

Hudson-M2/M3 OHCI (DEV-19, FUN-0) EHCI (DEV-19, FUN-2)

Hudson-M2/M3 OHCI (DEV-18, FUN-0) EHCI (DEV-18, FUN-2)

Hudson-M3 XHCI (DEV-16, FUN-0) XHCI (DEV-16, FUN-1)

1 2

R425 0_ 0402_5 %

USB20_P11 USB20_N1 1

USB20_P10 USB20_N1 0

USB20_P4 USB20_N4

USB20_P3 USB20_N3

USB20_P2 USB20_N2

USB20_P1 USB20_N1

USB20_P0 USB20_N0

USB30_TX1 P USB30_TX1 N

USB30_RX 1P USB30_RX 1N

USB30_TX0 P USB30_TX0 N

USB30_RX 0P USB30_RX 0N

EC_PWM2

2013/03/20 2014/03/20

USB 3.0-Right 2 USB 3.0-Right 1

Touch

WLAN (BT) Card reader

Int. Camera USB-Left 1

+FCH_VDD_11_SSUSB_S

USB 3.0-Right 2

USB 3.0-Right 1

1 8 2 7 3 6 4 5

10K_8P4 R_5%

Strap

Compal Secret Data

Deciphered Date

D

RP8

Place R425 and C363 close to FCH for ESD

@

ODD_DA#_Q

2N7002KW_SOT32 3-3

E

+3VS +3VS

R311

R311 10K_040 2_5%

2

Q32

1 3

D

@

Title

Hudson-M3-ACPI/USB/EC

Size Docu ment Num ber Rev

Custom

LA-9869P

Date: Sheet of

10K_040 2_5%

G

@

1 2

S

Compal Electronics, Inc.

ODD_DA#

E

24 51Wednesday, March 20, 20 13

1.0

A

B

C

D

E

U1B

HUDSON-3

INT 8.2K PU

SERIAL ATA

INT 10K PU

HW MONITOR

SD_CLK/SCLK_0/GPIO73

SD_CMD/SLOAD_0/GPIO74

SD_CD#/GPIO75

SD_WP/GPIO76

SD_DATA0/SDATI_0/GPIO77

SD_DATA1/SDATO_0/GPIO78

SD CARDGBE LANSPI ROMVGA DACVGA MAINLINK

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SD_DATA2/GPIO79 SD_DATA3/GPIO80

GBE_RXCLK

GBE_RXCTL/RXDV

GBE_RXERR

GBE_TXCTL/TXEN

GBE_PHY_PD

GBE_PHY_RST#

GBE_PHY_INTR

SPI_DI/GPIO164

SPI_DO/GPIO163

SPI_CLK/GPIO162

SPI_CS1#/GPIO165

ROM_RST#/SPI_WP#/GPIO161

VGA_GREEN

VGA_HSYNC/GPO68 VGA_VSYNC/GPO69

VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71

VGA_DAC_RSET

AUX_VGA_CH_P AUX_VGA_CH_N

ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N

ML_VGA_HPD/GPIO229

VIN0/GPIO175 VIN1/GPIO176

VIN2/SDATI_1/GPIO177 VIN3/SDATO_1/GPIO178 VIN4/SLOAD_1/GPIO179

VIN5/SCLK_1/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

BOLTONR1@

Issued Date

C

AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14

AC4

GBE_COL

AD3

GBE_CRS

AD9

GBE_MDCK

W10

GBE_MDIO

AB8 AH7

GBE_RXD3

AF7

GBE_RXD2

AE7

GBE_RXD1

AD7

GBE_RXD0

AG8 AD1 AB7

GBE_TXCLK

AF9

GBE_TXD3

AG6

GBE_TXD2

AE8

GBE_TXD1

AD8

GBE_TXD0

AB9 AC2 AA7 W9

V6

FCH_SPI_MISO

V5

FCH_SPI_MOSI

V3

FCH_SPI_CLK_R

T6

FCH_SPI_CS1#

V1

L30

VGA_RED

L32

M29

VGA_BLUE

M28 N30

M33 N32

K31

VGA_DAC_RSET

V28 V29

U28

AUXCAL

NC1 NC2 NC3 NC4 NC5

AUXCAL

T31 T33 T29 T28 R32 R30 P29 P28

C29

N2 M3 L2 N4 P1 P3 M1 M5

AG16 AH10 A28 G27 L4

2013/03/20 2014/03/20

885@

AK19

SATA_TX0P

AM19

SATA_TX0N

AL20

SATA_RX0N

AN20

SATA_RX0P

AN22

SATA_TX1P

AL22

SATA_TX1N

AH20

SATA_RX1N

AJ20

SATA_RX1P

AJ22

SATA_TX2P

AH22

SATA_TX2N

AM23

SATA_RX2N

AK23

SATA_RX2P

AH24

SATA_TX3P

AJ24

SATA_TX3N

AN24

SATA_RX3N

AL24

SATA_RX3P

AL26

SATA_TX4P

AN26

SATA_TX4N

AJ26

SATA_RX4N

AH26

SATA_RX4P

AN29

SATA_TX5P

AL28

SATA_TX5N

AK27

SATA_RX5N

AM27

SATA_RX5P

AL29

NC6

AN31

NC7

AL31

NC8

AL33

NC9

AH33

NC10

AH31

NC11

AJ33

NC12

AJ31

NC13

AF28

SATA_CALRP

AF27

SATA_CALRN

AD22

SATA_ACT#/GPIO67

AF21

SATA_X1

AG21

SATA_X2

AH16

FANOUT0/GPIO52

AM15

FANOUT1/GPIO53

AJ16

FANOUT2/GPIO54

AK15

FANIN0/GPIO56

AN16

FANIN1/GPIO57

AL16

FANIN2/GPIO58

K6

TEMPIN0/GPIO171

K5

TEMPIN1/GPIO172

K3

TEMPIN2/GPIO173

M6

TEMPIN3/TALERT#/GPIO174

2180755042A13HUDSON_FCBGA656

12

R10633_0402_5%

EC_SDIO

SATA_FTX_DRX_P0

HDD

1 1

2 2

BIOS

SM_EN

SETUP

S&M

1

OPTION

0

+3VS

12

269@

12

3 3

1 8 2 7 3 6 4 5

10K_8P4R_5%

4 4

EC_CS0#

EC_SCK

EC_SDI

NO

R439

R439 10K_0402_5%

10K_0402_5%

R438

R438 10K_0402_5%

10K_0402_5%

RP11

SPK TYPE

HARMAN KARDON

NO HARMAN

SM_EN

GPIO182

R88 33_0402_5%885@R88 33_0402_5%885@ R107 33_0402_5%885@R107 33_0402_5%885@ R110 33_0402_5%885@R110 33_0402_5%885@

ODD

JPW@JPW

@

0.1U_0402_16V4Z

12 12 12

12

C498

1 2

PW_CLEAR#

FCH_SPI_CS1# FCH_SPI_CLK

SATA_FTX_DRX_N0

SATA_FRX_C_DTX_N0 SATA_FRX_C_DTX_P0

SATA_FTX_DRX_P1 SATA_FTX_DRX_N1

SATA_FRX_C_DTX_N1 SATA_FRX_C_DTX_P1

+AVDD_SATA

Place JPW under DDR Door

+3VALW_FCH

R336 1K_0402_1%R336 1K_0402_1% R130 931_0402_1%R130 931_0402_1%

ODD_PWR

+3VALW_FCH

4M Byte

U13

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

Q

D

MX25L3206EM2I-12G_SO8

12

SATA_CALRP

12

SATA_CALRN

PW_CLEAR#

T20T20

ODD_PWR

GPIO172

SM_EN

1 2

R437 10K_0402_5%R437 10K_0402_5%

4

FCH_ALERT#

SA00003K800 SA00004LI00

2

FCH_SPI_MISOFCH_SPI_MOSI

Socket PN: SP07000F500/SP07000H900

A

B

HDMI_EN# SPK_DET

GBE_PHY_INTR

ML_VGA_TXP0 ML_VGA_TXN0 ML_VGA_TXP1 ML_VGA_TXN1 ML_VGA_TXP2 ML_VGA_TXN2 ML_VGA_TXP3 ML_VGA_TXN3

FCH_CRT_HPD

GPIO175 GPIO176 GPIO177 GPIO178GPIO172 SLP_CHG_CB1 SLP_CHG_CB0 PANEL_SEL GPIO182

R443 1K_0402_1%R443 1K_0402_1%

12

1 2

R352 10K_0402_5%R352 10K_0402_5%

1 2

R111 0_0402_5%

1 2

R366 715_0402_1%R366 715_0402_1%

1 2

R364 100_0402_1%R364 100_0402_1%

PANEL_SEL

Compal Secret Data

Deciphered Date

SPK_DET

+3VALW_FCH

@

UMA_CRT_R

UMA_CRT_G

UMA_CRT_B

UMA_CRT_HSYNC UMA_CRT_VSYNC

UMA_CRT_DATA UMA_CRT_CLK

ML_VGA_AUXP ML_VGA_AUXN

+VDDAN_11_ML

ML_VGA_TXP0 ML_VGA_TXN0 ML_VGA_TXP1 ML_VGA_TXN1 ML_VGA_TXP2 ML_VGA_TXN2 ML_VGA_TXP3 ML_VGA_TXN3

FCH_CRT_HPD

+3VALW_FCH

R285

R285 10K_0402_5%

10K_0402_5%

IEDP@

1 2

R294

R294 10K_0402_5%

10K_0402_5%

LVDS@

1 2

D

FCH_SPI_CLK

HDMI_EN#

For EMI request

FCH_SPI_CLK_R

If an SPI ROM is shared between FCH and the Embedded Controller, a 10-k pull-up resistor to +3.3V_S5 is installed

FCH_SPI_CS1#

UMA_CRT_DATA UMA_CRT_CLK

UMA_CRT_R UMA_CRT_G UMA_CRT_B

FCH_CRT_HPD

SLP_CHG_CB0 SLP_CHG_CB1

Custom

Date: Sheet of

(Internal 8.2K PU)

HDMI_EN#

SKU

GPIO175 GPIO178 GPIO176 GPIO177

Title

Size Document Number Rev

LA-9869P

H L

Non-HDMI SKU

R118

10_0402_5%

EMI@

885@

1 2

R113 10K_0402_5%

1 2

R455 2.2K_0402_5%R455 2.2K_0402_5%

1 2

R462 2.2K_0402_5%R462 2.2K_0402_5%

1 2

R367 150_0402_1%R367 150_0402_1%

1 2

R368 150_0402_1%R368 150_0402_1%

1 2

R369 150_0402_1%R369 150_0402_1%

1 2

R365 10K_0402_5%R365 10K_0402_5%

RP9

1 8 2 7 3 6 4 5

10K_8P4R_5%

SLP_CHG_CB0 SLP_CHG_CB1

Compal Electronics, Inc.

Hudson-M3-SATA/GBE/HWM

HDMI SKU

C508

12

1 2

10P_0402_50V8J

EMI@

+3VALW_FCH

+3VS

+FCH_VDDAN_33_DAC_R

1 2

@

R134 10K_0402_5%

1 2

@

R151 10K_0402_5%

25 51Wednesday, March 20, 2013

E

25 51Wednesday, March 20, 2013

+3VALW_FCH

1.0

A

STRAP PINS

B

C

D

E

12

R239

2.2K_0402_5%

+3VALW_FCH+3VALW_FCH+3VS+3VS

RTC_CLK

RTC_CLKLPC_CLK1

S5 PLUS MODE DISABLED

DEFAULT

S5 PLUS MODE ENABLED

12

R240

R240 10K_0402_5%

10K_0402_5%

12

R238

R238 10K_0402_5%

10K_0402_5%

EC_PWM2

LPC ROM (INTERNAL 10K PULL-UP)

SPI ROM

DEFAULT

EC_PWM2

PCI_CLK1

PULL

PCI_CLK1 PCI_CLK3 PCI_CLK4 CLK_PCI_EC CLK_PCI_DDR EC_PWM2 RTC_CLK

HIGH

PULL LOW

1 1

2 2

ALLOW PCIE GEN2

DEFAULT

FORCE PCIE GEN1

PCI_CLK1

12

R231

R231 10K_0402_5%

10K_0402_5%

PCI_CLK3

ENABLE DEBUG STRAP

DISABLE DEBUG STRAP

DEFAULT

PCI_CLK3

PCI_CLK4 LPC_CLK0

NON_FUSION CLOCK MODE

FUSION CLOCK MODE

DEFAULT

12

R241

@

10K_0402_5%

PCI_CLK4

12

R233

R233 10K_0402_5%

10K_0402_5%

CLK_PCI_EC

12

R234

R234 10K_0402_5%

10K_0402_5%

EC ENABLED

EC DISABLED

DEFAULT

12

CLKGEN ENABLED

DEFAULT

CLKGEN DISABLE

CLK_PCI_DDR

R237

R237 10K_0402_5%

10K_0402_5%

DEBUG STRAPS

FCH HAS 15K INTERNAL PU-UP FOR PCI_AD[27:23]

PCI_AD25 PCI_AD24

USE FC PLL

BYPASS FC PLL

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULTDEFAULT

ENABLE PCI MEM BOOT

FCH_PWR_EN#

R5

1 2

47K_0402_5%

2

C523

0.1U_0402_10V7K

1

2

C521

0.01U_0402_25V7K

1

PULL HIGH

PULL LOW

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

DISABLE ILA AUTORUN

DEFAULT

ENABLE ILA AUTORUN

3 3

2

AO3413_SOT23

+3VALW

Vgs=-4.5V,Id=3A,Rds<97mohm

S

Q3

G

D

1 3

+3VALW_FCH

PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

4 4

PCI_AD27

A

12

R247

@

2.2K_0402_5%

PCI_AD26

12

R248

@

2.2K_0402_5%

PCI_AD25

12

R249

@

2.2K_0402_5%

PCI_AD24

12

R250

@

2.2K_0402_5%

PCI_AD23

12

R251

@

2.2K_0402_5%

Check with FAE whether can delete or reserve test point or not

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

Hudson-M3-STRAP

LA-9869P

E

26 51Wednesday, March 20, 2013

1.0

A

B

C

D

E

+3VS

L32

1 2

L30

1 2

@

L33

@

1 2

L31

1 2

L34

1 2

L35

1 2

L36

1 2

+FCH_VDDAN_33_DAC_R

+FCH_VDDPL_33_MLDAC

+FCH_VDDPL_33_SSUSB_S

+FCH_VDDPL_33_USB_S

+VDDPL_33_PCIE

+VDDPL_33_SATA

+VDDPL_3.3V

C285

2.2U_0402_6.3V6M

C285

2.2U_0402_6.3V6M

1

2

2.2U_0402_6.3V6M

C272

1

2

2.2U_0402_6.3V6M

C275

1

2

2.2U_0402_6.3V6M

C279

1

2

2.2U_0402_6.3V6M

C280

1

2

2.2U_0402_6.3V6M

C294

1

2

2.2U_0402_6.3V6M

C297

1

2

A

C288

0.1U_0402_16V7K

C288

0.1U_0402_16V7K

1

2

0.1U_0402_25V6

C273

1

VDDPL_33_SSUSB_S For Hudson M3 USB3.0 only

2

For Hudson M2, connect to GND

LDO_CAP: Internally generated 1.8V supply for the RGB outputs

0.1U_0402_25V6

+1.1VS

C274

1

2

0.1U_0402_25V6

C278

1

2

0.1U_0402_25V6

C281

1

2

0.1U_0402_25V6

C293

1

@

2

0.1U_0402_25V6

C296

1

@

2

+3VALW_FCH

+1.1VALW

FBMA-L11-201209-221LMA30T_0805

MBK1608221YZF_2P

1 1

+3VS

BLM15BB221SN1D 0402

+FCH_VDDAN_33_DAC_R

R42 0_0402_5%

+3VS

BLM15BB221SN1D 0402

2 2

+3VALW_FCH

BLM15BB221SN1D 0402

+3VALW_FCH

BLM15BB221SN1D 0402

+3VS

3 3

BLM15BB221SN1D 0402

+3VS

BLM15BB221SN1D 0402

4 4

+3VS

131mA

1 2

@

R20 0_0603_5%

22U_0805_6.3V6M

C266

C573

1

2

47mA 20mA

+FCH_VDDPL_33_MLDAC +VDDPL_33_DAC

1 2

R34 0_0402_5%

20mA

1 2

R35 0_0402_5%

200mA

20mA 17mA

@

@ @

@

+FCH_VDDPL_33_SSUSB_S

43mA 93mA

For A11: Cap = 1nF For A12, Cap = DNI

L24

1 2

MBK1608221YZF_2P

220 ohm/2A

1 2

MBK1608221YZF_2P

1 2

BLM15BB221SN1D 0402

+1.1VALW

L39

1 2

BLM15BB221SN1D 0402

+FCH_VDD_11_SSUSB_S

40mils

L61

L25

L38

12

7mA

1 2

@

R37 0_0402_5%

226mA

1 2

@

R12 0_0603_5%

658mA

1U_0402_16V6K

C133

1

2

140mA

2.2U_0402_6.3V6M

C303

1

2

197mA

10U_0603_6.3V6M

2.2U_0402_6.3V6M

C832

C316

1

@

2

282mA

1 2

@

R90

0_0402_5%

+FCH_VDD_11_SSUSB_S

R132 0_0603_5%

1 2

@

424mA

B

C128

1U_0402_16V6K

C134

1

2

0.1U_0402_25V6

C302

1

2

0.1U_0402_25V6

C304

1

2

C318

+VDDIO_33_PCIGP

0.1U_0402_25V6

1

2

+FCH_VDDAN_33_DAC_R

+FCH_VDDPL_33_USB_S

C298 2.2U_0402_6.3V6M

C129

4.7U_0603_6.3V6K

1

2

1 2

R87 0_0402_5%

+VDDAN_33_USB

C135

1

2

C305

1

2

+VDDCR_1.1V_USB

C324

1

2

+VDDAN_SSUSB

1U_0402_16V6K

1

2

C155

1

2

0.1U_0402_25V6

C572

C571

1

2

+VDDPL_3.3V

+VDDPL_33_ML

+VDDPL_33_PCIE +VDDPL_33_SATA

@

1 2

+VDDPL_11_DAC

0.1U_0402_25V6

0.1U_0402_25V6 C151

C151

1

2

@

10U_0603_6.3V6M

C136

C310

1

2

+VDDAN_11_USB_S

0.1U_0402_25V6

C325

C331

1

2

+VDDCR_11_SSUSB

10U_0603_6.3V6M

1U_0402_16V6K

C332

C319

1

2

+VDDAN_11_ML

0.1U_0402_25V6

1

2

0.1U_0402_25V6

1

2

10mils

10mils 10mils 10mils 10mils 10mils 10mils 10mils 10mils

10mils

20mils

30mils

10mils

20mils

30mils

C333

1

2

U1C

AB17

VDDIO_33_PCIGP_1

AB18

VDDIO_33_PCIGP_2

AE9

VDDIO_33_PCIGP_3

AD10

VDDIO_33_PCIGP_4

AG7

VDDIO_33_PCIGP_5

AC13

VDDIO_33_PCIGP_6

AB12

VDDIO_33_PCIGP_7

AB13

VDDIO_33_PCIGP_8

AB14

VDDIO_33_PCIGP_9

AB16

VDDIO_33_PCIGP_10

H24

VDDPL_33_SYS

V22

VDDPL_33_DAC

U22

VDDPL_33_ML

T22

VDDAN_33_DAC

L18

VDDPL_33_SSUSB_S

D7

VDDPL_33_USB_S

AH29

VDDPL_33_PCIE

AG28

VDDPL_33_SATA

M31

LDO_CAP

V21

VDDPL_11_DAC

Y22

VDDAN_11_ML_1

V23

VDDAN_11_ML_2

V24

VDDAN_11_ML_3

V25

VDDAN_11_ML_4

AB10

VDDIO_33_GBE_S

AB11

VDDCR_11_GBE_S_1

AA11

VDDCR_11_GBE_S_2

AA9

VDDIO_GBE_S_1

AA10

VDDIO_GBE_S_2

G7

VDDAN_33_USB_S_1

H8

VDDAN_33_USB_S_2

J8

VDDAN_33_USB_S_3

K8

VDDAN_33_USB_S_4

K9

VDDAN_33_USB_S_5

M9

VDDAN_33_USB_S_6

M10

VDDAN_33_USB_S_7

N9

VDDAN_33_USB_S_8

N10

VDDAN_33_USB_S_9

M12

VDDAN_33_USB_S_10

N12

VDDAN_33_USB_S_11

M11

VDDAN_33_USB_S_12

U12

VDDAN_11_USB_S_1

U13

VDDAN_11_USB_S_2

T12

VDDCR_11_USB_S_1

T13

VDDCR_11_USB_S_2

P16

VDDAN_11_SSUSB_S_1

M14

VDDAN_11_SSUSB_S_2

N14

VDDAN_11_SSUSB_S_3

P13

VDDAN_11_SSUSB_S_4

P14

VDDAN_11_SSUSB_S_5

N16

VDDCR_11_SSUSB_S_1

N17

VDDCR_11_SSUSB_S_2

P17

VDDCR_11_SSUSB_S_3

M17

VDDCR_11_SSUSB_S_4

0.1U_0402_25V6

2180755042A13HUDSON_FCBGA656

+VCC_FCH_R

1U_0402_16V6K

HUDSON-3

PCI/GPIO I/O

USB SS USB MAIN LINKGBE LAN

POWER

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

CORE S0

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6

CLKGEN I/OPCI EXPRESSSERIAL ATA3.3V_S5 I/O

VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9

VDDAN_11_SATA_10

VDDPL_11_SYS_S

VDDAN_33_HWM_S

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

VDDXL_33_S

VDDCR_11_S_1 VDDCR_11_S_2

VDDIO_AZ_S

BOLTONR1@

50mils

T14 T17 T20 U16 U18 V14 V17 V20 Y17

20mils

H26 J25 K24 L22 M22 N21 N22 P22

50mils

AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27

60mils

AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19

10mils

N18 L19 M18 V12 V13 Y12 Y13 W11

10mils

G24

10mils

N20 M20

10mils

J24

10mils

M8

10mils

AA4

2013/03/20 2014/03/20

1U_0402_16V6K

C311

C312

1

2

+1.1VS_CKVDD

1U_0402_16V6K

C320

C348

1

2

+PCIE_VDDR_FCH

1U_0402_16V6K

C327

C328

1

@

2

+AVDD_SATA

1U_0402_16V6K

C501

C502

1

2

+VDDIO_33_S

0.1U_0402_25V6

0.1U_0402_25V6 C343

C343

C342

1

2

+VDDXL_3.3V

+VDDCR_1.1V

+VDDPL_1.1V

+VDDAN_33_HWM

+VDDIO_AZ

Compal Secret Data

Deciphered Date

1007mA

0.1U_0402_25V6

1U_0402_16V6K

C335

C334

1

2

1U_0402_16V6K

0.1U_0402_25V6

0.1U_0402_25V6 C337

C337

C336

1

2

0.1U_0402_25V6

0.1U_0402_25V6 C339

C339

C338

1

@

2

0.1U_0402_25V6

C341

C340

1

@

2

2.2U_0402_6.3V6M

C506

1

2

2.2U_0402_6.3V6M

0.1U_0402_25V6

0.1U_0402_25V6 C509

C509

C510

1

2

1U_0402_16V6K

C518

C512

1

2

70mA

2.2U_0402_6.3V6M

0.1U_0402_25V6

C513

C514

1

2

2.2U_0402_6.3V6M

0.1U_0402_25V6

C515

C516

1

2

1 2

C517 2.2U_0402_6.3V6MC517 2.2U_0402_6.3V6M

1 2

@

C519 0.1U_0402_25V6

D

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M C317

C317

C315

1

@

2

340mA

2.2U_0402_6.3V6M

C620

C323

1

2

1088mA

22U_0603_6.3V6M

C499

1

2

1337mA

22U_0805_6.3V6M

C500

C589

1

2

59mA

1 2

@

R26 0_0402_5%

L37

5mA

1 2

BLM15BB221SN1D 0402

187mA

1 2

R167 0_0402_5%

L41

1 2

BLM15BB221SN1D 0402

12mA

1 2

@

R43 0_0402_5%

26mA

1 2

R45 0_0402_5%

22U_0805_6.3V6M

R28 0_0603_5%

1

2

R44

1 2

@

0_0402_5%

22U_0805_6.3V6M

1 2

@

R14 0_0805_5%

1 2

@

R40 0_0805_5%

22U_0805_6.3V6M

@

+1.1VS

1 2

@

C831

C831 10U_0805_25V6K

10U_0805_25V6K

+1.1VS

+3VALW_FCH

+1.1VALW

No more than two balls sharing any single via. Note: Use of a single via per ball is preferred.

U1E

HUDSON-3

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64

VSSAN_HWM VSSXL VSSPL_SYS

2180755042A13HUDSON_FCBGA656

+1.1VS

A33 B13 D13 E12

E16 E29

F11 F13 F16 F17 F19 F23 F25 F29

G16 G32 H12 H15 H29

K16 K27 K28

M13 M16 M21 M25

N11 N13 N23 N24 P12 P18 P20 P21 P31 P33

R11 R25 R28 T11 T16 T18

K25 H25

A3 B7 D9 E5

F7 F9

G6

J6

J9 J10 J13 J28 J32

K7

L6 L12 L13 L15 L16 L21

N6

R4

N8

GROUND

VSSPL_DAC

VSSAN_DAC

VSSANQ_DAC

VSSIO_DAC

Connect to GND through a dedicated via

+3VALW_FCH

AMD reply: VDDAN_33_HWM_S: Please connect it to +3.3V_S5 directly if HWM is not used.

+3VS

VDDIO_AZ_S should be tied to +3.3/1.5V_S5 rail if Wake on Ring is supported

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

Hudson-M3-POWER/GND

LA-9869P

E

VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128

EFUSE

BOLTONR1@

T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33

T21 L28 K33 N28

R6

27 51Wednesday, March 20, 2013

1.0

of

A

SATA HDD Conn.

JHDD@

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

GND GND

GND GND GND

GND

DAS/DSS

GND

V33

9

V33

10

V33

11 12 13 14

V5

15

V5

16

V5

17 18 19 20

V12

21

V12

22

V12

1 1

23 24

SUYIN_127043FR022G196ZR

SATA_FTX_C_DRX_P0 SATA_FTX_C_DRX_N0

SATA_FRX_DTX_N0 SATA_FRX_DTX_P0

+3VS

+5VS

Close to JHDD

1 2

C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K

1 2

C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K

+5VS

1.2A

1

C356

C356 10U_0603_6.3V6M

10U_0603_6.3V6M

2

Place closely JHDD SATA CONN.

1

2

C357

0.1U_0402_10V7K

B

SATA_FTX_DRX_P0 SATA_FTX_DRX_N0

SATA_FRX_C_DTX_N0

SATA_FRX_C_DTX_P0

1

C358

0.1U_0402_10V7K

2

SATA ODD Conn

JODD

GND

A+

A-

GND

B-

B+

GND

DP +5V +5V

GND GND

SANTA_202401-1

@

GND GND

MD

15 14

1 2 3 4 5 6 7

8 9 10 11 12 13

C

SATA_FTX_C_DRX_P1 SATA_FTX_C_DRX_N1

SATA_FRX_DTX_N1 SATA_FRX_DTX_P1

+5VS_ODD

Close to JODD

1 2

C376 0.01U_0402_25V7KC376 0.01U_0402_25V7K

1 2

C377 0.01U_0402_25V7KC377 0.01U_0402_25V7K

1 2

C378 0.01U_0402_25V7KC378 0.01U_0402_25V7K

1 2

C375 0.01U_0402_25V7KC375 0.01U_0402_25V7K

ODD_PLUGIN#

ODD_DA#

D

SATA_FTX_DRX_P1 SATA_FTX_DRX_N1

SATA_FRX_C_DTX_N1

SATA_FRX_C_DTX_P1

+5VS_ODD

1

2

1.1A

C355

C355 10U_0603_6.3V6M

10U_0603_6.3V6M

E

Power Consumption

Peak 1800 mA Read (CD) 1100 mA Read (DVD) 950 mA Write 1300 mA Standby 20mA

Place components closely ODD CONN.

1

C380

0.1U_0402_10V7K

2

1

C360

2

0.1U_0402_10V7K

Slot 1 Half PCIe Mini Card-WLAN

2 2

40 mils

+3V_WLAN

0.1U_0402_16V4Z

1

CM1

2

0.1U_0402_16V4Z

CM2

1

2

CM3

1

2

4.7U_0603_6.3V6K

PJ6

2 1

PAD-OPEN 2x2m@

Short for WIFI

+3V_WLAN+3VS

WLAN&BT Combo module circuits

BT on module

Enable Disable

BT_ON

H

L

1 2

BT_ON

+3V_WLAN

@

R1443

0_0402_5%

1 2

CLKREQ_WLAN#

CLK_WLAN#

3 3

E51_TXD

E51_RXD

CLK_WLAN

PCIE_FRX_WLANTX_N1 PCIE_FRX_WLANTX_P1

PCIE_FTX_C_WLANRX_N1 PCIE_FTX_C_WLANRX_P1

WLAN/ WiFi

+3V_WLAN

BT_CTRL_RBT_ON

Debug card using

JWLAN

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

GND2

LCN_DAN08-52406-0500

@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

12

R63

R63 300_0402_5%

300_0402_5%

@

1

C263

C263 10P_0402_50V8J

10P_0402_50V8J

@

2

WL_OFF# APU_PCIE_RST#

FCH_SCLK0 FCH_SDATA0

USB20_N3 USB20_P3

BT

BT_ON E51_RXD

For isolate BT_CTRL and Compal Debug Card.

R327

1K_0402_5%

Reserved for EHCI CRC errors

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SATA-HDD/ODD/USB

LA-9869P

E

1.0

of

28 51Wednesday, March 20, 2013

A

Green Clock Generator

B

C

D

E

F

G

H

CCL13

@

+3VL +3VALW_FCH+3V_LAN

1

CCL15

2

0.1U_0402_10V7K

1 1

2 2

1

2

0.1U_0402_10V7K

+1.8VGS

GCLK@

1

CCL18

GCLK@

2

0.1U_0402_10V7K

+3VALW

0.1U_0402_10V7K

1

GCLK@

2

0.1U_0402_10V7K

CCL20

1

2

change part number to SJ10000EF00

GCLK@

YCL1 25MHZ 12PF X3G025000DK1H-X

2

CCL11

CCL11 18P_0402_50V8J

18P_0402_50V8J

1

GCLK@

1

GND

3

GND

2

4

CCL14

GCLK@

3

CLK_X2CLK_X1

2

CCL12

CCL12 18P_0402_50V8J

18P_0402_50V8J

1

GCLK@

+RTC

+3V_LAN

22U_0805_6.3V6M

12

GCLK@

RCL10 120_0603_5%

1 2

@

RCL12 0_0402_5%

+3VALW_FCH

1

CCL1

GCLK@

2

+VBAT

+3VL

+3VALW

+1.8VGS

+3V_LAN_R

CLK_X1 CLK_X2

SLG3NB238VTR_TQFN16_2X3

SA00005DO00

UCL1

UGCLK@UCL1

UGCLK@

10

VBAT

15

2

8 3 1

16

VDD_RTC_OUT +V3.3A VDD

VDDIO_27M1127MHz VDDIO_25M_A VDDIO_25M_B XTAL_IN

XTAL_OUT

4

25MHz_A 25MHz_B

GND1

GND2

7

CCL2

1

2.2U_0402_6.3V6M

GCLK@

2

14

+VDD_RTC_OUT

9

32kHz

12

VGA_X1_R

6

LAN_X1_R_R

5

FCH_X1_R_R

GND3

GND4

13

17

RCL11

RCL11 RCL8

RCL8 RCL7

RCL7

VGA@

1 2 1 2

10_0402_5%

12

33_0402_5%@

33_0402_5%@ 33_0402_5%GCLK@

33_0402_5%GCLK@

FCH_RTCX1_R

VGA_X1

FCH_X1_R

LAN_X1_R

LAN_X1_R_R

CCL10 5P_0402_50V8C

Reserved for Swing Level adjustment ( Close GCLK side )

@

1 2

For DIS

UCL1

VGA@UCL1

VGA@

SLG3NB302VTR_TQFN16_2X3

SA00006D500

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2013/03/20 2014/03/20

E

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet of

F

Date: Sheet of

PCIe-WLAN/GCLK

Wednesday, March 20, 2013

G

LA-9869P

29 51

H

1.0

A

Left USB 2.0 x 1

B

C

D

E

OUT OUT OUT

OCB

@

WOL_EN#

W=60mils

+USB_VCCC

6

7

C76 1000P_0402_50V7K

8 5

Sx Enable Wake up

LOW

@EMI@

1 2

USB_OC#2

Sx Disable Wake up

HIGH HIGH

WOL_EN#

S0

APU_PCIE_RST#

FCH_PCIE_WAKE#

LAN_X1_R CLK_LAN#

CLK_LAN

PCIE_FTX_C_LANRX_N0

PCIE_FTX_C_LANRX_P0 PCIE_FRX_C_LANTX_N0 PCIE_FRX_C_LANTX_P0

+USB_VCCC

+3V_LAN

LANCLK_REQ# ISOLATE#

LAN_X1_R

EMI@

1 2

RL8 0_0402_5%

1 2

RL9 0_0402_5%

EMI@

USB20_P0_L USB20_N0_L

+USB_VCCC

W=60mils

JLAN

@JLAN

@

1

2

2 2

3

4

4 4

5

6

6 6

7

8

8 8

9

10

10 10

11

12

12 12

13

14

14 14

15

16

16 16

17

18

18 18

19

20

20 20

21

G1

22

G2

23

G3

24

G4

ACES_50559-02001-001

+5VALW

LR7

EMI@ LR7

EMI@

1 1

USB20_P0

USB20_N0

USB20_P0

USB20_N0

3

2

WCM-2012-900T_0805

For LAN function

LAN_EN

2 2

CLKREQ_LAN#

+3VALW_FCH

LAN_EN

CLKREQ_LAN#

PJ29

@ PJ29

@

2

JUMP_43X39

1 3

D

2N7002KW_SOT323-3

+3V_LAN

112

QL53

2

G

LANCLK_REQ#

S

4

USB20_P0_L

4

1

USB20_N0_L

1

+3VS

R333

R333 10K_0402_5%

10K_0402_5%

1 2

USB_EN#2

+3VS

12

1K_0402_5%

1K_0402_5% RL6

RL6

@

ISOLATE#

RL7

15K_0402_5%

2 3 4 1

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

2.0A

U14

IN IN EN/ENB GND

1 2

RL433 0_0402_5%

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

LAN WOL LAN_EN ISOLATEB

S0 Sx S0 Sx

----------------------------------------------

3 3

0 0 0 0 1 1 0 1 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 0*

* S3: after SUSP# assert low over 100ms S4/S5: after SYSON assert low over 100ms

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

PCIe-LAN-RTL8105E/8111F

LA-9869P

E

of

30 51Wednesday, March 20, 2013

1.0

5

U15

14640@U15

14640@

SA00006KL00

MAX14640ETA

D D

12

USB_CHG_EN#

+USB_VCCA

2.5A

UR4

2

IN

3

IN

4

EN/ENB

1

GND

G547N2P81U_MSOP8

SA00006DN00

USB_CHG_EN#

W=100mils

CR43 0.1U_0402_10V7KCR43 0.1U_0402_10V7K

1 2

CR42 47U_0805_6.3V6MCR42 47U_0805_6.3V6M

SLP_CHG_CB1

6

OUT

7

OUT

8

OUT

5

OCB

CHG_PWR_GATE#

1 2

W=100mils

+USB_VCCA+5VALW

C78 1000P_0402_50V7K

14641@

RR2

0_0402_5%

@EMI@

1 2

USB_CHG_OC#

USB20_DN10 USB20_DP10

CHG_CB1

4

SA00006C400

U15

1

CEN

2

DM

3

DP

4

CB1

9

PGND

MAX14641ETA+TGH7_TDFN-EP8_2X2

14641@

EC_SMB_CK1

EC_SMB_DA1

TDM VCC

CB0 TDP

8 7 6 5

CHG_CB0 USB20_N10 USB20_P10

+5VALW

1

CR10

0.1U_0402_10V7K

2

EC_SMB_CK1

EC_SMB_DA1

14641@

RR3

0_0402_5%

1 2 USB20_N10

USB20_P10

5

G

3 4

D

2N7002KDWH_SOT363-6

3

+3VALW

4.7K_0402_5%

2

G

QR1A

14640@

6 1

S

D

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6 QR1B

QR1B

14640@

S

SLP_CHG_CB0

RR4

14640@

2

1

USB Sleep & Charge

State table for MAX14641

CB1

0

1

+3VALW

RR5

4.7K_0402_5%

14640@

1 2

CHG_CB1

CHG_CB0

1

0

1

0

1

Mode

AM2

AP1

PM

CM

2A auto-detection charger mode for Apple device. Resistor dividers are connected to DP/DM. Including DCP

Forced 1A charger mode for Apple devices. Resistor dividers are connected to DP/DM.

USB pass-through mode.DP/DM are connected to TDP/TDM USB pass-through mode with CDP emulation.

Auto connects DP/DM to TDP/TDM depending on CDP detection status.

STATUS CB0

Front with S&C

LR1

EMI@LR1

C C

USB30_RX0N

USB30_RX0P

USB30_TX0N

USB30_TX0P

USB30_RX0P USB30_RX0P_L

1 2

CB22 0.1U_0402_16V7KCB22 0.1U_0402_16V7K

1 2

CB21 0.1U_0402_16V7KCB21 0.1U_0402_16V7K

USB30_TX0P_C USB30_TX0P_C_L

4

1

KINGCORE WCM-2012HS-670T

4

1

KINGCORE WCM-2012HS-670T

EMI@

3

USB30_RX0N_LUSB30_RX0N

3

4

EMI@LR2

EMI@

2

3

USB30_TX0N_C_LUSB30_TX0N_C

3

2

1

LR2

4

1

USB20_DN10 USB20_N10_L

LR3

EMI@LR3

EMI@

1

4

WCM-2012-900T_0805

2

USB20_P10_LUSB20_DP10

2

3

USB30_TX0P_C_L USB30_TX0N_C_L USB30_RX0P_L USB30_RX0N_L

DR7

@ESD@

1 2 4 5

3

TVWDF1004AD0_DFN9

9

USB30_TX0P_C_L

8

USB30_TX0N_C_L

7

USB30_RX0P_L

6

USB30_RX0N_L

USB30_TX0P_C_L USB30_TX0N_C_L

USB30_RX0P_L USB30_RX0N_L

USB20_P10_L USB20_N10_L

+USB_VCCA

JUSBF

9

StdA-SSTX+

8 7 6 5 4 3 2 1

GND

StdA-SSTX-

GND

GND-DRAIN

GND

StdA-SSRX+

GND StdA-SSRXGND D+ DVBUS

LOTES_AUSB0015-P001A

@JUSBF

@

13 12 11 10

Rear

W=80mils

+USB_VCCB

12

CR46

47U_0805_6.3V6M

USB20_P11

USB20_N11

0.1U_0402_10V7K

1

CR44

2

4

1

LR4

EMI@LR4

EMI@

4

1

WCM-2012-900T_0805

3

2

3

2

USB20_P11_L

USB20_N11_L

USB30_TX1P_C_L USB30_TX1N_C_L USB30_RX1P_L USB30_RX1N_L

DR8

@ESD@

1 2 4 5

3

TVWDF1004AD0_DFN9

9

USB30_TX1P_C_L

8

USB30_TX1N_C_L

7

USB30_RX1P_L

6

USB30_RX1N_L

USB30_TX1P_C_L USB30_TX1N_C_L

USB30_RX1P_L USB30_RX1N_L

USB20_P11_L USB20_N11_L

+USB_VCCB

JUSBR

9

StdA-SSTX+

8 7 6 5 4 3 2 1

GND StdA-SSTX-

GND GND-DRAIN

GND StdA-SSRX+

GND StdA-SSRXGND D+ DVBUS

LOTES_AUSB0015-P001A

@JUSBR

@

13 12 11 10

USB_EN#0

+5VALW

UR3

2

IN

3

IN

4

EN/ENB

1

GND

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

LR5

4

1

KINGCORE WCM-2012HS-670T

LR6

4

1

KINGCORE WCM-2012HS-670T

B B

USB_EN#0

USB30_RX1N

USB30_RX1P

USB30_TX1N

A A

USB30_TX1P

USB30_RX1N

USB30_RX1P

1 2

CB24 0.1U_0402_16V7KCB24 0.1U_0402_16V7K

CB23 0.1U_0402_16V7KCB23 0.1U_0402_16V7K

USB30_TX1N_C

1 2

USB30_TX1P_C USB30_TX1P_C_L

OUT OUT OUT OCB

EMI@LR5

EMI@

EMI@LR6

EMI@

3

2

3

2

W=80mils

+USB_VCCB

6 7

C79 1000P_0402_50V7K

8 5

3

USB30_RX1N_L

2

USB30_RX1P_L

3

USB30_TX1N_C_L

2

1 2

@EMI@

USB_OC#0

USB20_P11

USB20_N11

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

USB3.0

LA-9869P

1

of

31 51Wednesday, March 20, 2013

1.0

5

UA1

MIC1_LINE1_R_R MIC1_LINE1_R_L

2.2U_0402_6.3V6M

INT_MIC_DATA

12

@

EMI@

INT_MIC_CLK_R

EC_MUTE_INT

close to pin19

CA54

2.2U_0402_6.3V6M

EC_MUTE#

D D

AZ_RST_HD#

close to pin 28

1 2

CA6010U_0603_6.3V6M CA6010U_0603_6.3V6M

1

CA55

0.1U_0402_10V7K

C C

INT_MIC_CLK

2

RA34 20K_0402_1%

For EMI reserve

RA42

RA42 FBMA-10-100505-301T

FBMA-10-100505-301T

+MIC1_VREFO_L +MIC1_VREFO_R

AZ_SYNC_HD

RA30

20K_0402_1%

1 2

CA584.7U_0603_6.3V6K CA584.7U_0603_6.3V6K CA574.7U_0603_6.3V6K CA574.7U_0603_6.3V6K

12

1 2

CA53

INT_MIC_CLK_R

MONO_IN

AC_JDREF

SENSE_A SENSE_B

1 2

22 21

17 16

31 30 29

15 14

20 12 10 11

10 mil

19 28

LDO_CAP

27

AC_VREF

34

CPVEE

35

CBN

36

CBP

2 3

13 18

47

4

ALC259-VC2-CG_MQFN48_6X6

EC_MUTE#

Hight LOW

Internal AMP

Enable Disable

ALC259-VC2-CG_MQFN48_6X6

RA50

4.7K_0402_5%

269@

To solve S&M noise issue

4

259: SA000054P00

MIC1_R MIC1_L

MIC2_R MIC2_L

MIC1_VREFO_L MIC1_VREFO_R MIC2_VREFO

LINE2_R LINE2_L

MONO_OUT PCBEEP SYNC RESET#

JDREF LDO_CAP VREF CPVEE CBN CBP

GPIO0/DMIC_DATA GPIO1/DMIC_CLK

SENSE_A SENSE_B

EAPD PD#

SPK_OUT_R+

SPK_OUT_R-

SPK_OUT_L+

SPK_OUT_L-

SDATA_OUT

DVDD

DVDD_IO

AVDD1 AVDD2

PVDD1 PVDD2

HPOUT_R

HPOUT_L

SDATA_IN

BCLK

LINE1_L

LINE1_R

AVSS1 AVSS2 PVSS1 PVSS2

DVSS

Thermal Pad

NC

1 9

25 38

39 46

45 44

40 41

33

RA19

32

RA20

5 8

AZ_SDIN0_HD_R

6

AZ_BITCLK_HD

23 24 48

26 37 42 43 7

49

DGND

+DVDD +DVDD

+AVDD +AVDD

+PVDD +PVDD

SPKR+ SPKR-

SPKL+ SPKL-

75_0402_1%

LINE1_R_C_L LINE1_R_C_R

AGND

For EMI reserve placed close to codec

AZ_BITCLK_HD

0.1U_0402_16V4Z

close to pin1

0.1U_0402_16V4Z

close to pin9

HP_R HP_L

12

RA23 33_0402_5%RA23 33_0402_5%

269@

12

CA9 1U_0402_6.3V4Z

12

CA10 1U_0402_6.3V4Z

269@

@EMI@

12

RA4110_0402_5%

3

CA4

CA45

AZ_SDOUT_HD

AZ_SDIN0_HD

AZ_BITCLK_HD

MIC1_LINE1_R_L MIC1_LINE1_R_R

CA51

1 2

10P_0402_50V8J

35mA for 3.3V level

+DVDD

1

2

1

2

@EMI@

For S&M

1

CA3

2.2U_0402_6.3V6M

2

RA44 680P_0603_50V8JRA44 680P_0603_50V8J

RA43 680P_0603_50V8JRA43 680P_0603_50V8J

RA31 680P_0603_50V8JRA31 680P_0603_50V8J RA38 0_0603_5%

RA38 0_0603_5% RA39 0_0603_5%

RA39 0_0603_5%

RA22

@ RA22

@

1 2

0_0402_5%

1 2

EMI@

1 2

EMI@

2

0 mil20 mil

4

close to pin 25 close to pin 38

+AVDD

+3VS +5VALW

CA42

10U_0603_6.3V6M

close to pin39

close to pin46

650mA for 5V level

0.1U_0402_10V7K

1

2

CA47

2

1

CA33

0.1U_0402_10V7K

CA32

0.1U_0402_10V7K

For P/N and footprint Please place them to ISPD page

UA1

2

CA37

1

10U_0603_6.3V6M

60 mil

+PVDD

1

2

1

2

CA50

0.1U_0402_10V7K

1

2

CA35

1

10U_0603_6.3V6M

1

@

1 2

RA18 0_0603_5%

1 2

@

RA24 0_0603_5%

+5VALW

269: SA00006BW00

ALC269Q-VB6-CG

269@

Beep sound

PCI Beep

B B

Sense Pin

SENSE A

A A

FCH_SPKR

Impedance

39.2K 20K 10K

5.1K

39.2K 0K

2 10K

5

Codec Signals

PORT-I (PIN 32, 33) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) (PIN 48) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17)SENSE B PORT-H (PIN 20)

RA52

1 2

47K_0402_5%

RA49

4.7K_0402_5%

Function

Headphone out Ext. MIC

1 2

Add CA15 for better sound by A51

0.1U_0402_10V7K

1

CA15

2

100P_0402_50V8J

4

CA70

1 2

MONO_IN

SPK

2

W 4ohm =40mil

1W 8ohm =20mil

For EMI reserve

lose to codec

c

Issued Date

1 2

@

RA7 0_0603_5%

1 2

@

RA8 0_0603_5%

1000P_0402_50V7K

1 2

@

RA9 0_0603_5%

1 2

@

RA10 0_0603_5%

1000P_0402_50V7K

3

SPK_L1

1

CA31

@EMI@

CA34

@EMI@

2013/03/20 2014/03/20

1

CA30

CA30 1000P_0402_50V7K

1000P_0402_50V7K

2

@EMI@

1

CA36

CA36 1000P_0402_50V7K

1000P_0402_50V7K

2

@EMI@

Compal Secret Data

SPK_L2

SPK_R1

SPK_R2

Deciphered Date

SPKL+

SPKL-

SPKR+

SPKR-

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MIC/LINE IN

MIC1_LINE1_R_R

MIC1_LINE1_R_L

+3VL

SM_SENSE#

EC

2

RA48 2.2K_0402_5%RA48 2.2K_0402_5%

RA46 2.2K_0402_5%RA46 2.2K_0402_5%

61

RA29 100K_0402_5%

100K_0402_5%

2

3

5

4

12

269@RA29

269@

+MIC1_VREFO_R

+MIC1_VREFO_L

RA47

1K_0402_5%

RA45

MIC_SENSE

QA1A

2N7002DW-T/R7_SOT363-6

RA35 100K_0402_5%RA35 100K_0402_5%

2N7002DW-T/R7_SOT363-6

QA1A

269@

QA1B

269@

12

place close to chip

MIC_SENSE SENSE_A

RA32 20K_0402_1%RA32 20K_0402_1%

NBA_PLUG

RA33 39.2K_0402_1%RA33 39.2K_0402_1%

Title

Size Document Number Rev

Custom

Date: Sheet of

12

Compal Electronics, Inc.

Cover Sheet

1

1 2

MIC1_R

MIC1_L

RA37

RA37 0_0402_5%

0_0402_5%

@

32 51Wednesday, March 20, 2013

JACK_SENSE

1.0

SPK CONN.

SPK_R1 SPK_R2 SPK_L1 SPK_L2 SPK_DET

For common design, pull-high resistor should be placed at connector side.

CK0402101V05_0402-2

D27

@ESD@

D27

@ESD@

1 2

D28

@ESD@

D28

@ESD@

1 2

10K_0402_5%

CK0402101V05_0402-2

D29

1 2

Non-Harman detection

0

SPK_DET0

1

Please check SPK_DET pull high 10K to +3VS

+3VS

RA95

ACES_50228-0067N-001

1 2

CK0402101V05_0402-2

D30

@ESD@

D30

@ESD@

1 2

ACES_50228-0067N-001

8

GND

7

GND

6

5

4

3

2

1

JSPK@

ONKYO

Non-Brand

HeadPhone/LINE Out JACK

1 2

@

HP_L HP_R

NBA_PLUG

@

RA21 0_0402_5%

1 2

@

RA25 0_0402_5%

DA6

1

YSDA0502C_SOT23-3

YSDA0502C_SOT23-3 @ESD@

@ESD@

3 2

Ext.MIC/LINE IN JACK

1 2

@

MIC1_L MIC1_R

Security Classification

2013/03/20 2014/03/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

@

RA26 0_0402_5%

1 2

@

RA27 0_0402_5%

DA7

1

YSDA0502C_SOT23-3

YSDA0502C_SOT23-3 @ESD@

@ESD@

3 2

JLINE

@JLINE

@

6 1

1 2

RA36

RA36 0_0402_5%

0_0402_5%

@

2 3 4 5

SINGA_2SJ-0960-D11

JEXMIC

@JEXMIC

@

6 1 2

3 4 5

SINGA_2SJ-0960-D11

33 51

HP_R_L HP_R_R

MIC1_R_L MIC1_R_R

JACK_SENSE

+3VL

RA40

4.7K_0402_5%

269@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CR & Audio Conn.

LA-9869P

Wednesday, March 20, 2013

1.0

5

+3VS

30mils

CW3

2.2U_0402_6.3V6M

D D

+3VS

1

CW4

0.1U_0402_16V4Z

2

30mils

2.2U_0402_6.3V6M

please close the pin4 of UW1 and pin4 of UW2

C C

NC (default)

Power saving mode

CW1

1

2

1

2

USB20_N2

30mils

+3VS

CW2

0.1U_0402_16V4Z

10K pull down

Normal modeGPIO0

CW8

0.1U_0402_16V4Z

USB20_P2

+VCC_3IN1

30mils

1

2

CW5

0.1U_0402_16V4Z

De-coupling and Bulk capacitor should place near to Cardreader chip and Combo Socket

+3VS

+3VS +VDD18

12mils

1

2

4

1

UW1

2

22

RSTZ

2

DM

3

DP

1

DVDD

24

PMOS

19

DVDD

23

DVDD

20

GPIO0

4

AVDD

18

VDD18

25

Thermal pad

GL834L-OGY01_QFN24_4X4

MS_INS SD_D2/MS_D5/SB13 SD_D3/MS_D4/SB12

SD CMD/SD_CMD

SD CLK/SD_CLK

SD_CDZ SD_D0/MS_D6/SB9 SD_D1/MS_D7/SB8

MS BS/MS_BS

SD_WP/MS_D1/SB5

SD_D4/MS_D0/SB4 SD_D5/MS_D2/SB3 SD_D6/MS_D3/SB1

SD_D7/MS_CLK/SB0

5 17 16 15 14 21 13 12 11 10 9 8 7 6

SD_DATA2_G SD_DATA3_G SDCMD_G SDCLK_G SDCD# SD_DATA0_G SD_DATA1_G

SDWP

3

LW3

EMI@

LW4

EMI@

LW1

EMI@

LW2

EMI@

LW6

EMI@

LW5

EMI@

12

SD_DATA2_G

BLM15BB121SN1D_0402

SD_DATA3_G

SD_DATA0_G

BLM15BB121SN1D_0402

SD_DATA1_G

BLM15BB121SN1D_0402

SDCLK_G

SDCMD_G

BLM15BB121SN1D_0402

2

SD_DATA2

1

CW14

4.7P_0402_50V8J

2

EMI@

SD_DATA3

1

CW15

4.7P_0402_50V8J

2

EMI@

SD_DATA0

1

CW12

4.7P_0402_50V8J

2

EMI@

SD_DATA1

1

CW13

4.7P_0402_50V8J

2

EMI@

SDCLK

1

CW9

4.7P_0402_50V8J

2

EMI@

SDCMD

1

CW10

4.7P_0402_50V8J

2

@EMI@

1

B B

For normal close type connector invert circuit

< 2 in 1 Card Reader >

12

GND_SW

13

GND_SW

T-SOL_156-2000302604

"Normal Close" type connector

A A

Card Uninsertion

Card Insertion

5

T-SOL_156-2000302604

Close

Open CloseOpen

JCARD

@JCARD

@

5

VDD

CMD

CLK VSS VSS

DAT0 DAT1 DAT2

CD/DAT3

WP_SW

CD_SW

3 6 7 4

8 9 1 2

10 11

SDCMD SDCLK

SD_DATA0 SD_DATA1 SD_DATA2 SD_DATA3

SDWP# SDCD

WP_SWCD_SW

Protect disable Protect Enable

Close

4

Close to connector

1

CW6

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Close to IC

12

CW7

4.7U_0402_6.3V6M

2013/03/20 2014/03/20

3

30mils

+VCC_3IN1

Compal Secret Data

Deciphered Date

RW3

RW3 100K_0402_5%

100K_0402_5%

+3VS +3VS

12

QW1A

2

SDCD

G

2

SDCD#

61

D

2N7002KDWH_SOT363-6

S

12

RW4

RW4 100K_0402_5%

100K_0402_5%

QW1B

SDWP#

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

USB-CardReader GL834L/RTS5170

LA-9869P

5

G

SDWP

34

D

2N7002KDWH_SOT363-6

S

34 51Wednesday, March 20, 2013

1

1.0

5

0.1U_0402_10V7K

1

CB1

0.1U_0402_10V7K

For EMI

CLK_PCI_EC

12

RB3

10_0402_5%

@EMI@

D D

+3VL

RB25 10K_0402_5%RB25 10K_0402_5%

KSI[0..7]

KSO[0..15]

C C

+3VL +3VS

B B

@EMI@

CB11

22P_0402_50V8J

@EMI@

RB2

47K_0402_5%

1 2

CB12 0.1U_0402_10V7KCB12 0.1U_0402_10V7K

1 2

+3VL

CHG_PWR_GATE#

LVDS@

RB28 10K_0402_5%

RPB1

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

@

1 2

CB13 1U_0402_6.3V6K

@ESD@

1 2

CB14 180P_0402_50V8J

1

2

EC_RST#

KSI[0..7] KSO[0..15]

12

LPC_RST#

Close to EC

ESD@

1 2

RB37

47K_0402_5%

1 2

RB27

100K_0402_5%

1 2

FCH_PWRGD

EC_MUTE_INT_R

E51_TXD

>1.2V <1.2V

HIGH

LOW

5

CB17 1000P_0402_50V7K

A A

Voltage Comparator Pins FOR 9012 A3

VCIN0 pin109 VCIN1 pin102

VCOUT0 pin104

VCOUT1 pin103

0.1U_0402_10V7K

TRANS_SEL

EC_SMB_CK1 BATT_FULL_LED# EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

SUSP#

EC_MUTE_INT

RTC_CLK

2

GATEA20 KB_RST# SERIRQ

LPC_FRAME#

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC

LPC_RST#

EC_SCI#

CHG_PWR_GATE#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SMI#

USB_OC#2

USB_CHG_OC#

USB_CHG_EN#

USB_EN#2

KB_LED

FAN_SPEED1

WL_OFF# E51_TXD

E51_RXD

FCH_PWRGD BT_ON SM_SENSE#

1 2

@

1 2

@

RB38 0_0402_5%

RB38 0_0402_5% RB20 0_0402_5%

RB20 0_0402_5%

LOW

HIGH

1

CB2

CB4

2

0.1U_0402_10V7K

SLP_S3# SLP_S5#

0.1U_0402_10V7K

1

2

CHG_PWR_GATE#

EC_MUTE_INT_R

100K_0402_5%

1

CB5

2

1000P_0402_50V7K

EC_RST#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6

KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9

KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

TRANS_SEL

FCH_PWRGD

XCLKO

12

RB22

4

1000P_0402_50V7K

1

CB6

2

UB1

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GPIO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GPIO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GPIO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWROK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

1

CB16

CB16 20P_0402_50V8

20P_0402_50V8

2

EC_ON_R

885_EC_ON

4

1

CB7

2

LPC & MISC

10K_0402_5%

+3VL

Int. K/B

Int. K/B Matrix

Matrix

RB36

RB24

885@ RB24

885@

9

22

33

EC_VDD/VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SM Bus

GPIO

GND/GND

11

24

1 2

@

1 3

D

G

2

1 2

+3VL

0.1U_0402_10V7K

1 2

96

125

111

67

EC_VDD0

EC_VDD/VCC

EC_VDD/AVCC

BATT_TEMP/GPIO38

AD Input

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

CAP_INT#/GPIO4C

CPU1.5V_S3_GATE/GPXIOA00

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPI Flash ROM

PECI_KB930/GPIO41

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

GPIO

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03

EC_LID_OUT#/GPXIOA04 PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

GPI

LID_SW#/GPXIOD04

PECI_KB9012/GPXIOD07

GND/GND

AGND/AGND

GND/GND

GND0

KB9012QF-A3_LQFP128_14X14

35

KB9012QF-A3_LQFP128_14X14

69

94

9012@

113

0_0402_5%

S

QB2

QB2 2N7002KW_SOT323-3

2N7002KW_SOT323-3

885@

3

CB3

21

GPIO0F

BEEP#/GPIO10 ACOFF/GPIO13

ADP_I/GPIO3A

IMON/GPIO43

IREF/GPIO3E

USB_EN#/GPIO4B

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/GPIO40

FSTCHG/GPIO50

SYSON/GPIO56 VR_ON/GPIO57

AC_IN/GPXIOD01

SUSP#/GPXIOD05

23 26

GPIO12

27

63 64

GPIO39

65 66

GPIO3B

75

GPIO42

76

68 70

885_EC_ON

71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103

H_PROCHOT_EC

104

VCOUT0_PH_L

105 106 107 108

110

ACIN_D

112

EC_ON_R

114 115 116 117

GPXIOD06

118 124

V18R

1

1U_0402_6.3V6K

1U_0402_6.3V6K CB50

CB50

2

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+EC_V18R

UB1

885@UB1

885@

NPCE885NB0DX LQFP 128P

885@

12

RB19 330K_0402_5%

3

WL_BT_LED# USB_EN#0 FANPWM

BATT_PRES USB_OC#0 ADP_I ADP_V

HDPLOCK

EC_ENBKL

HDPINT

EC_MUTE#

EC_SMB_CK3 EC_SMB_DA3

TP_CLK

TP_DATA

VGATE

GPU_DOWN#

POK

VCIN0_PH

EC_SDIO

EC_SDI EC_SCK EC_CS0#

LCD_ENBKL

WOL_EN#

HDPACT

BATT_FULL_LED# CAPS_LED#

BATT_CHG_LOW_LED# SYSON VR_ON

1.1VPWR_EN

EC_RSMRST# EC_LID_OUT# PROCHOT_IN

BKOFF#

PBTN_OUT#

FCH_PWR_EN

EC_PXCONTROL

ON/OFFBTN# LID_SW#

SUSP#

1

CB15

4.7U_0805_10V4Z

2

+3VL

EC_ON

2013/03/20 2014/03/20

VCIN0_PH connect to power portion (9012 only)

Nuvoton EC share ROM

Compal Secret Data

Deciphered Date

2

1 2

@

RB14 0_0402_5%

H_PROCHOT_EC

@ESD@

H_PROCHOT_EC

High Active

H_PROCHOT_EC

2

PWR_SUSP_LED#

CK0402101V05_0402-2

DB2

1 2

2

1 2

@

RB6 10K_0402_5%

1

BATT_PRES

ACIN_D

EC_SMB_CK3 EC_SMB_DA3

LID_SW#

TP_CLK

TP_DATA

SYSON

VCOUT0_PH_L

VCOUT0_PH connect to power portion (9012 only)

ACIN_D

SUSP#

VR_ON

Low Active (+1.5V)

13

D

QB1

G

QB1 2N7002KW_SOT323-3

2N7002KW_SOT323-3

S

+3VS

Title

Size Document Number Rev

Date: Sheet of

1 2

CB9 100P_0402_50V8JCB9 100P_0402_50V8J

1 2

CB10 100P_0402_50V8JCB10 100P_0402_50V8J

@

1 2

RB135 4.7K_0402_5%

1 2

RB136 4.7K_0402_5%

@

1 2

RB35 47K_0402_5%RB35 47K_0402_5%

1 2

RB8 4.7K_0402_5%RB8 4.7K_0402_5%

1 2

RB9 4.7K_0402_5%RB9 4.7K_0402_5%

1 2

RB10 4.7K_0402_5%RB10 4.7K_0402_5%

1 2

@

RB34 0_0402_5%

RB18

330K_0402_5%

12

+3VL

12

DB1RB751V40_SC76-2 DB1RB751V40_SC76-2

1 2

RB21 10K_0402_5%RB21 10K_0402_5%

1 2

RB23 10K_0402_5%RB23 10K_0402_5%

H_PROCHOT#

Compal Electronics, Inc.

LPC-EC-KB9012

LA-9869P

Wednesday, March 20, 2013

1

+3VL

+3VS

VS_ON

ACIN

35 51

1.0

1

Battery Reset

2

3

4

5

6

7

8

G-SENSOR

+5VS +3VS_HDP

+3VS_HDP

SELF_TEST

+3VS_HDP

SA00003A600

CG2

12

@

0.22U_0402_10V4Z

1

2

3

4

5

6

7

8

9

10

1

CG9

GSENSOR@

0.1U_0402_10V7K

2

1

CG1

1U_0402_6.3V6K

GSENSOR@

2

UG1

P3_5/SSCK/SCL/CMP1_2

P3_7/CNTR0#/SSO/TXD1

RESET#

XOUT/P4_7

VSS/AVSS

XIN/P4_6

VCC/AVCC

MODE

P4_5/INT0#/RXD1

P1_7/CNTR00/INT10#

1

UG2

GSENSOR@UG2

CG3

1U_0402_6.3V6K

GSENSOR@

RPG1

4.7K_8P4R_5%

GSENSOR@

2

EC_SMB_CK2

G_RESET# GXOUT GXIN G_MODE

A A

ENLDO

Keyboard LED

Q38

KBL@

+5VS

12

R587

10K_0402_5%

B B

KB_LED

10K_0402_5%

KBL@

2

G

13

D

S

KBL@

AO3413_SOT23

D

S

D

S

13

G

2

Q52

Q52 2N7002KW_SOT323-3

2N7002KW_SOT323-3

KBL@

+5VS_LED

SW6

SW6 TJG-533-V-T/R_6P

TJG-533-V-T/R_6P

3 4

5

6

1 2

+3VS_HDP

1 8 2 7 3 6 4 5

HDPINT

+5VS_LED

JBLG @

1

2

3

4

5

GND

6

GND

ACES_50578-0040N-001

GSENSOR@

1

VIN

VOUT

2

GND

3

SHDN#

BP

G9191-330T1U_SOT23-5

SA000022I00

SELF_TEST

G_RESET#

GXOUT

GXIN

+3VS_HDP

G_MODE

RG7 1K_0402_5%

12

GSENSOR@

CG8

0.1U_0402_10V7K

GSENSOR@

5

4

1

2

UG3

GSENSOR@UG3

GSENSOR@

2

Vdd1

12

Vdd2

4

ST

6

PD

8

FS

9

Rev

TSH352TR LGA 16P

SA00004GB00

P1_5/RXD0/CNTR01/INT11#

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

Voutx Vouty Voutz

NC1 NC2 NC3 NC4 NC5

GND1 GND2

P1_6/CLK0/SSI01

P1_4/TXD0

P4_2/VREF

R5F211B4D34SP

GSENSOR@

3 5 7

10 11 14 15 16

1 13

11

12

13

14

15

16

17

18

19

20

1 2

VOUTX

CG4 0.033U_0402_16V7K GSENSOR@CG4 0.033U_0402_16V7K GSENSOR@

1 2

VOUTY

CG5 0.033U_0402_16V7K GSENSOR@CG5 0.033U_0402_16V7K GSENSOR@

1 2

VOUTZ

CG6 0.033U_0402_16V7K GSENSOR@CG6 0.033U_0402_16V7K GSENSOR@

HDPACT

RG2

RG2 47K_0402_5%

47K_0402_5%

GSENSOR@

1 2

RG4 47K_0402_5%

VOUTZ

VOUTX

VOUTY

RG4 47K_0402_5%

GSENSOR@

+3VS_HDP

1

CG7

0.1U_0402_10V7K

GSENSOR@

2

EC_SMB_DA2

HDPLOCK

12

NEW KEYBOARD CONN.

LED

BATT CHARGE(Blink) /FULL LED

KSI[0..7]

KSO[0..15]

C C

CAPS_LED#

+3VS

D D

1

KSI[0..7]

KSO[0..15]

R7 300_0402_5%R7 300_0402_5%

+5VALW

JKB

1

2

3

12

KSI1 KSI6 KSI5 KSI0 KSI4 KSI3 KSI2 KSI7 KSO15 KSO12 KSO11 KSO10 KSO9 KSO8 KSO13 KSO7 KSO6 KSO14 KSO5 KSO3 KSO4 KSO0 KSO1 KSO2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GND1

36

GND2

CVILU_CF17341U0R0-NH

@

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

White LED bright when both AC-adaptor is plugged in and Battery is full charged Amber LED bright while charging battery from AC-adaptor. Amber LED blink during Critical Low Battery

POWER LED(Blink)

+5VALW

White LED bright when system is power on. White LED blink when system is sleep mode.

WLAN LED

+5VS

Issued Date

D7

2 1

HT-F196BP5_WHITE

D9

2 1

HT-191UD5_AMBER_0603

D8

2 1

HT-F196BP5_WHITE

2 1

HT-191UD5_AMBER_0603

2013/03/20 2014/03/20

5

R19

1 2

390_0402_5%

R21

1 2

510_0402_5%

D26

Compal Secret Data

R18

1 2

390_0402_5%

R22

1 2

510_0402_5%

Deciphered Date

BATT_FULL_LED#

BATT_CHG_LOW_LED#

PWR_SUSP_LED#

WL_BT_LED#

6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

7

Debug/KB

LA-9869P

Wednesday, March 20, 2013

of

36 51

8

1.0

5

4

3

2

1

+3VL

R397

For debug

@

SW5

D D

Place on TOP

SW5

1 3

G

NTC017-DA1J-D160T_4P

5

6

2 4

R397 100K_0402_5%

100K_0402_5%

1 2

ON/OFFBTN#

Conn.

JPWR

112 334 556 778

ACES_50611-0040N-001

@

2 4 6 8

ON/OFFBTN#

1

C143

2

0.1U_0402_16V7K

+5VS

ESD@

Close JPW

+3VS

Touchpad Connector

JTP

C C

JTP

15

13

11

9

7

5

3

1

@

HB_A060877-SAVR01

16 14 12 10

8 6 4 2

+3VS

16 14 12 10 8 6 4 2

TP_FCH_SDATA1 TP_FCH_SCLK1

TP_DATA TP_CLK

TP_FCH_SCLK1

TP_FCH_SDATA1

R298

4.7K_0402_5%

R299

4.7K_0402_5%

1 2

DMN66D0LDW-7 2N_SOT363-6

R300 0_0402_5%

R300 0_0402_5% R301 0_0402_5%

R301 0_0402_5%

+3VS

2

61

5

Q5331A

DMN66D0LDW-7 2N_SOT363-6

1 2

@

1 2

@

3

4

Q5331B

FCH_SCLK1

FCH_SDATA1

Screw Hole

H22

1

H4

1

H13

H_3P2N

@

H_3P3

@

1

VGA

H_3P0

@

NPTH

H1

H7

H18

CPU

H3

1

H_4P6

@

H3

1

H_4P2x4P6

@

H2

H_4P2

@

1

PTH

H12

H11

1

H_3P0

@

H_3P3

@

H11

H21

H10

H_3P0

@

1

H29

H_4P0

@

1

H12

H_3P0

@

1

H_7P0

@

1

PCB Fedical Mark PAD

FD3@FD3

FD2@FD2

FD1@FD1

@

1

FD4@FD4

@

1

H5

1

H9

1

H_3P3

@

H_3P2x3P7N

@

H15

1

H16

CH

F

H8

1

H_3P2

@

H_3P2N

@

1

H_3P0

@

H17

H_3P0

@

1

ISPD

ZZZ

UAPU

5357R1@UAPU

UAPU

5745R3@UAPU

5745R3@

5745R1@

B B

SA00006KH00

5545R1@UAPU

5545R1@

SA00006KE10

A8-5545M-AM5545SHE44HL

UAPU

5345R1@UAPU

5345R1@

SA00006KD10

A6-5345M-AM5345SHE24HL

UAPU

5757R1@UAPU

5757R1@

A10-5745M-AM5745SIE44HL

UAPU

5545R3@UAPU

5545R3@

SA00006KE30

A8-5545M-AM5545SHE44HL

UAPU

5345R3@UAPU

5345R3@

SA00006KD30

A6-5345M-AM5345SHE24HL

UAPU

5757R3@UAPU

5757R3@

SA00006KI00

A A

A10-5757M-AM5757DFE44HL

UAPU

5557R1@UAPU

5557R1@

A10-5757M-AM5757DFE44HL

UAPU

5557R3@UAPU

5557R3@

SA00006KJ00

A8-5557M-AM5557DFE44HL

5

5357R1@

SA00006KK00

A6-5357M-AM5357DFE24HL

UAPU

5145R1@UAPU

SA00006KC00

A4-5145M-AM5145SHE23HL

UAPU

219168R1@UAPU

219168R1@

SA00006HJ10

A4-5145M-AM5145SHE23HL

UAPU

178570R1@UAPU

178570R1@

SA00006HK10

A4-5145M-AM5145SHE23HL

UAPU

229069R1@UAPU

229069R1@

SA00006KB00

A4-5145M-AM5145SHE23HL

UAPU

5357R3@UAPU

5357R3@

A6-5357M-AM5357DFE24HL

UAPU

5145R3@UAPU

5145R3@

A4-5145M-AM5145SHE23HL

UAPU

219168R3@UAPU

219168R3@

A4-5145M-AM5145SHE23HL

UAPU

178570R3@UAPU

178570R3@

A4-5145M-AM5145SHE23HL

UAPU

229069R3@UAPU

229069R3@

A4-5145M-AM5145SHE23HL

4

ZZZ

DA8000XI000

PCB LA-9869P

SUNR3@

U1

BOLTONR3@U1

BOLTONR3@

SA000066K90

218-0755097 A14 BOLTON-M3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/20 2014/03/20

3

SUNR3@

UV1

SA00006BA60

216-0841000 A0 SUN PRO M2 BGA A51!

Compal Secret Data

Deciphered Date

Lid SW

B+ B+

1

C475

2

0.1U_0402_25V6

Close to PR816

2

+3VL

1

C453

0.1U_0402_25V6

2

1

2

10U_0805_25V6K

U21

U21 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

VDD2VOUT

C833

GND

1

10P_0402_50V8J

B+

12

1U_0603_25V6K

3

C452

C834

LID_SW#

1

2

Close to PR21

Title

Size Document Number Rev

Date: Sheet of

TP/HDD LED/Screw

LA-9869P

Wednesday, March 20, 2013

1

37 51

1.0

A

+5VALW TO +5VS +3VALW TO +3VS Load switch

1 1

1U_0402_6.3V6K

+5VALW

C45

@

VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

1

2

+3VALW

1

C44

@ C44

@

1U_0402_6.3V6K

2

+5VALW

SUSP#

B

U2

1

VOUT1

VIN1

2

VOUT1

VIN1

3 4 5 6

7

CT1

ON1

GND

VBIAS ON2

CT2

VIN2

VOUT2

VIN2

VOUT2

GPAD

TPS22966DPUR_SON14_2X3

SA00004MM00

C

+5VS

PJ3

14

+5VS_LS

13 12 11 10 9

8 15

C20 180P_0402_50V8JC20 180P_0402_50V8J

1 2

C21 330P_0402_50V7KC21 330P_0402_50V7K

1 2

+3VS_LS

1 2

PAD-OPEN 4x4m

@

PJ5

1 2

PAD-OPEN 4x4m

@

+3VS

1

C53

@ C53

@

0.1U_0402_25V6

2

1

C46

@ C46

@

0.1U_0402_25V6

2

D

E

Q22B

+1.5V

1 2 34

SYSON

R478

R478 470_0805_5%

470_0805_5%

5

100K_0402_5%

SYSON#

R432

2

+5VALW

1 2 61

Q22A

Q22A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

+5VS_ODD

R457

470_0805_5%

ZP@

1 2 34

Q53B

2N7002KDWH_SOT363-6

5

ZP@

ODD_PWR

Q13B

ODD_PWR#

+1.2VS

1 2 34

VR_ON

R479

R479 470_0805_5%

470_0805_5%

5

+5VALW

R448

100K_0402_5%

1 2

VR_ON#

61

Q13A

2

2N7002KDWH_SOT363-6

+5VS TO +5VS_ODD

+5VS

ZP@

R441

R441 100K_0402_5%

1 2

61

2

100K_0402_5%

ODD_PWR#

Q53A

Q53A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

ZP@

R440

1 2

47K_0402_5%

2

C471

0.1U_0402_16V7K

ZP@

1

2

C217

0.01U_0402_25V7K

1

ZP@

+0.75VS

R477

R477 470_0805_5%

470_0805_5%

1 2 34

Q6B

5

2N7002KDWH_SOT363-6

+5VS

Vgs=-4.5V,Id=3A,Rds<97mohm

2

S

PJ28

Q45

G

2

AO3413_SOT23

ZP@

PJ28

2

JUMP_43X79

@

1

D

1 3

1

SUSP

SUSP SUSP#

+5VS_ODD

SUSP#

SUSP

+5VALW

1 2 61

2

R422

R422 100K_0402_5%

100K_0402_5%

Q6A

Q6A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

S S S

G

C477

10K_0402_5%

2

C476

1 2 3 4

1

2

0.1U_0402_25V6

+5VALW

R5545

1 2

13

D

G

S

+1.1VS

1

2

1U_0402_6.3V6K

12

FCH_PWR_EN#

Q25

Q25 2N7002KW_SOT323-3

2N7002KW_SOT323-3

R416

R416 820K_0402_5%

820K_0402_5%

2N7002KDWH_SOT363-6

4.7U_0805_10V4Z

1

C472

2

1 2

R415

220K_0402_5%

61

Q23A

2

FCH_PWR_EN#

SUSP

B+

1 2

@

R385 0_0402_5%

2

C200

0.1U_0402_16V4Z

@

1

Need to delay after +3VS ramp up

2N7002KDWH_SOT363-6

+1.1VS

R417

R417 470_0805_5%

470_0805_5%

1 2 34

Q23B

5

2N7002KDWH_SOT363-6

SUSP

+3VL

2 2

FCH_PWR_EN

3 3

R5546

10K_0402_5%

885@

1 2

12

R5529

R5529 100K_0402_5%

100K_0402_5%

9012@

+1.1VALW to +1.1VS

Vgs=10V,Id=14.5A,Rds=6mohm

4 4

+1.1VALW

1

2

4.7U_0805_10V4Z

Q44

8

D

7

D

6

D

5

D

FDS6676AS_SO8

C474

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

A

B

C

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

DC-DC INTERFACE

LA-9869P

E

of

38 51Wednesday, March 20, 2013

1.0

A

B

C

D

EMI Part (47.1)

Other component (37.1)

EMI@

PL1

A51 need add fuse

1 1

@

PJP1

1

2

3

4

ACES_50299-00401-001

PF1

21

7A_32V_S1206-H-7.0A

DC_IN_S1

12

EMI@

PC102

PC102 1000P_0603_50V7K

1000P_0603_50V7K

PL1

HCB2012KF-121T50_0805

1 2

EMI@

PL3

HCB2012KF-121T50_0805

1 2

12

EMI@

PC103

100P_0603_50V8

12

PC101

100P_0603_50V8

EMI@PC101

EMI@

VIN

12

EMI@

PC104

PC104 1000P_0603_50V7K

1000P_0603_50V7K

2 2

PBJ101 @

- +

ML1220T13RE

3 3

4 4

For ML1220 RTC (38.2)

PR102

560_0603_5%

1 2

+RTC_R

12

+RTC

PR101

560_0603_5%

1 2

+RTCBATT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

DCIN/PRECHARGE

LA-9869P

D

of

39 51

1.0

A

1.0

Other component (37.1)

@

ACES_50299-01001-W01

1

2

3

4

5

6

7

PJP2

8

9

10

1 1

2 2

BATT_S1

EC_SMCA

PR20

100_0402_1%

BATT_P4 BATT_P5 EC_SMDA

1 2

PF2

10A_125V_TR2/6125FF10-R

PR21

PR21 100_0402_1%

100_0402_1%

1 2

21

12

PR14

PR14 1K_0402_1%

1K_0402_1%

PR16

6.49K_0402_1%

PR19

1 2

1K_0402_1%

12

EC_SMB_DA1

EC_SMB_CK1

VMB

+3VL

BATT_PRES

B

HCB2012KF-121T50_0805

1 2

HCB2012KF-121T50_0805

1 2

12

EMI@

PC7

1000P_0402_50V7K

EMI@

PL4

EMI@

PL5

EMI Part (47.1)

C

D

BATT+

12

PC8

EMI@PC8

EMI@

0.01U_0402_25V7K

OTP (39.7)

+3VL

ADP_I

PR1

1 2

1K_0402_1%

PR2

@PR2

@

0_0402_5%

PROCHOT_IN VCIN0_PH

1 2

1K_0402_1%

PR3

1 2

20K_0402_1%

@PR5

@

0_0402_5%

1 2

12

@PC11

@

0.1U_0402_10V7K

PR5

PC11

12

PR4

12.1K_0402_1%

12

PH1

100K_0402_1%_TSM0B104F4251RZ

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

LA-9869P

D

40 51

A

B

C

D

for reverse input protection

Charger controller (40.1), Support component (40.2)

13

D

2

PQ209

G

SSM3K7002FU_SC70-3

S

PR225

1 2

1M_0402_5%

1 1

2 2

3 3

1M_0402_5%

TPCA 8057

PQ203

5

12

PC230

2200P_0402_50V7K

P1

1 2 3

4

BQ24725_ACDRV_1

1 2

3M_0402_5%

Vin Dectector

Min. Typ Max. H-->L 17.23V L--> H 17.63V

ILIM and external DPM

3.97A

4 4

PR226

S

EMI Part (47.1)

PQ205

SI7716ADN-T1-GE3_POWERPAK8-5

1 2 3

12

PC231

0.1U_0402_25V6

12

PR234

4.12K_0603_1%

A

4

PR235

4.12K_0603_1%

ACIN

P2

5

PC238

0.1U_0402_25V6

+3VL

PR239 10K_0402_1%PR239 10K_0402_1%

VIN

1 2

0.1U_0402_25V6

12

BQ24725_CMSRC

BQ24725_ACDRV

1 2

PR211

0.01_1206_1%

1 2

PC236

BQ24725_ACP

12

B+VIN

1UH_NRS4018T1R0NDGJ_3.2A_30%

4 3

12

PC235

0.1U_0402_25V6

PC239

0.1U_0402_25V6

1 2

1U_0603_25V6K

21

1

2

3

4

5

12

PR244

422K_0402_1%

12

PR245

66.5K_0402_1%

100P_0402_50V8J

BQ24725_ACN

PC244

1UH_NRS4018T1R0NDGJ_3.2A_30%

VIN

2

3

PD230

PD230 BAS40CW_SOT323-3

BAS40CW_SOT323-3

1 12

1 2

PR228

10_1206_1%

BQ24725_VCC

BQ24725_LX

20

PU200

19

VCC

PAD ACN

ACP

CMSRC

ACDRV

ACOK

PC245

B

PHASE

ACDET6IOUT7SDA8SCL9ILIM

BQ24725_ACDET

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PL201

1 2

0.047U_0402_25V7K

0.047U_0402_25V7K PC237

PC237

12

PR229

2.2_0603_5%

DH_CHG

BQ24725_REGN

BQ24725_BST

17

18

16

BTST

HIDRV

10

12

PR246

@PR246

@

0_0402_5%

1 2

REGN LODRV

BATDRV

12

PC211

EMI@

PD231

PD231 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1U_0603_25V6K

GND

SRP

SRN

BQ24725RGRR_QFN20_3P5X3P5

BQ24725_ILIM

PR242

100K_0402_1%

12

0.1U_0402_10V7K

PC211

10U_0805_25V6K

12

PC213

PC214

10U_0805_25V6K

2200P_0402_25V7K

@EMI@

5

PQ201

PQ201 AON7408L

123

5

4

123

12

PC242

Deciphered Date

AON7408L

BQ24725_LX

PQ202

AON7406L

1 2

DH_CHG

PR210 0_0603_5%

PC205

1 2

15

DL_CHG

14

PR236

10_0603_1%

1 2

13

SRP

PR237

6.8_0603_5%

1 2

12

SRN

11

BQ24725_BATDRV

1 2

PR241

357K_0402_1%

12

PC243

0.01U_0402_25V7K

EC_SMB_CK1

EC_SMB_DA1

ADP_I

PC246

@PC246

@

Please locate the RC Near EC chip 2011-02-22

2013/03/20 2014/03/20

4

@

CSOP1

CSON1

0.1U_0603_16V7K

+3VALW

Compal Secret Data

S TR SI7716ADN

S TR SI7716ADN PQ207

PQ207

5

PL202

1 2

PR206

4.7_1206_5%

@EMI@

PC206

680P_0603_50V8J

@EMI@ PC206

@EMI@

1 2

PR233

4.12K_0603_1%

CHG

CSOP1

12

BQ24725_BATDRV_1

PR227

0.01_1206_1%

1 2

PC240

0.1U_0402_25V6

BQ24725_BATDRV

4.7UH_ETQP3W4R7WFN_5.5A_20%

12

EMI Part (35.33)

VIN

12

PR247

309K_0402_1%

12

PR249

47K_0402_1%

For A51 ADP_V function

C

1 2 3

4

12

0.1U_0402_10V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

4 3

CSON1

12

PR248

10K_0402_1%

1 2

PC247

@PC247

@

12

PC234

0.01U_0402_50V7K

12

PC221

@

PC241

10U_0805_25V6K

0.1U_0402_25V6

Compal Electronics, Inc.

CHARGER

12

PC223

PC222

10U_0805_25V6K

ADP_V

10U_0805_25V6K

BATT+

41 51

D

1.0

A

3/5VALW controller (35.1), Support component (35.2)

B

C

D

1 1

EMI Part (47.1)

B+

EMI@

PL331

HCB2012KF-121T50_0805

1 2

2 2

+3VALWP

3/5V_B+

PC339

@EMI@

12

2200P_0402_50V7K

PC340

10U_0805_25V6K

PL332

4.7UH_ETQP3W4R7WFN_5.5A_20%

1 2

1

+

PC354

2

150U_D2_6.3VY_R15M

12

PR336

4.7_1206_5%

@EMI@

SNUB_3V

12

PC336

680P_0603_50V8J

@EMI@

5

PQ331

AON7408L

123

5

123

EMI Part (35.33)

3 3

3.3V Peak Current 8A OCP current 10A Delta I=1.160A ,ripple=1.160 x17m=19.27mV FSW=455kHz DCR 35mohm +/-15%

TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :19mohm , 23.5mohm

5V_3.3V controller (35.1), Support component (35.2)

30K_0402_1%

1 2

PR351

19.1K_0402_1%

1 2

FB_5V

1

21

FB1

PAD

20

BYP1

19

BOOT1

18

UGATE1

17

PHASE1

16

LGATE1

PU330

PU330 RT8243AZQW_WQFN20_3X3

RT8243AZQW_WQFN20_3X3

PC344

+3VLP +3VL

4

AON7406L

AON7406L PQ332

PQ332

PC335

0.1U_0402_10V7K

1 2

VS_ON

BST1_3V

EC_ON

POK

0_0402_5%

1 2

3/5V_B+

PR333

@PR333

@

PR330

14K_0402_1%

1 2

PR331

20K_0402_1%

1 2

VL

12

BST_3V

UG_3V

LX_3V

LG_3V

499K_0402_1%

1 2

12

PC360

@PR341

@

0_0402_5%

1 2

PR335

100K_0402_1%

PR334

0.1U_0603_25V7K

0.1U_0603_25V7K PR340

PR340

2.2K_0402_1%

1 2

PR341

FB_3V

6

7

8

9

10

PGOOD

BOOT2

UGATE2

PHASE2

LGATE2

PR338

100K_0402_1%

5

12

PR337

PR342

PR357

210K_0402_1%

56K_0402_1%

2

4

3

FB2

TON

ENTRIP1

ENTRIP2

VIN11ENLDO12SECFB13LDO514LDO3

VL

12

PC342

1U_0603_10V6K

12

@

12

ENLDO

4.7U_0603_10V6K

PR332

PC343

@ PR332

@

1 2

100K_0402_5%

4.7U_0805_25V6-K

174K_0402_1%

15

PR350

PR355

@PR355

BST_5V

UG_5V

LX_5V

LG_5V

@

0_0402_5%

1 2

0.1U_0402_10V7K

BST1_5V

PC355

1 2

+3VLP

12

PC341

4.7U_0603_10V6K

PJ332

@ PJ332

@

2

112

JUMP_43X39

(100mA,20mils ,Via NO.= 1)

JUMP_43X39

3/5V_B+

12

PC361

10U_0805_25V6K

PQ352

FDMC7692S_MLP8-5

PQ351

AON7408L

3 5

241

PL352

2.2UH_MMD-06CZ-2R2M-V1_8A_20%

1 2

5

4

12

PR356

4.7_1206_5%

@EMI@ PR356

@EMI@

SNUB_5V

123

12

PC356

680P_0603_50V8J

@EMI@ PC356

@EMI@

5V Peak Current 10A OCP current 12A FSW=390kHz Delta I=2.791A,ripple=2.791*15m=41.865mV DCR 18~20mohm

TYP MAX H/S Rds(on) ::27mohm , 34mohm L/S Rds(on) :10.8mohm , 13.6mohm

PJ331

@ PJ331

+3VALWP +3VALW

(8A,160mils ,Via NO.= 16)

+5VALWP +5VALW

(12A,240mils ,Via NO.= 24)

@

112

JUMP_43X118

@ PJ351

@

112

JUMP_43X118

PJ351

EMI Part (47.1)

1

+

PC353

2

150U_D2_6.3VY_R15M

2

+5VALWP

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

3VALW/5VALW

D

42 51

1.0

A

DDR controller (35.3), Support component (35.4)

EMI@

PL151

HCB2012KF-121T50_0805

B+

1 2

PL152

1UH_VMPI0703AR-1R0M-Z01_11A_20%

PL152

+1.5VP

1

+

PC157

2

330U_D2_2V_Y

1 1

1.5V_B+

12

@EMI@

PC152

12

EMI Part (47.1)

2200P_0402_50V7K

12

@EMI@

PR156

4.7_1206_5%

SNUB_+1.5VP

12

@EMI@

PC156

680P_0402_50V7K

@

PC164

1 2

PR155

SW_1.5V

DL_1.5V

12

EN_1.5V

BST_1.5V-1

12

PC154

10U_0805_25V6K

PQ151

AON7408L

123

PQ152

FDMC7692S_MLP8-5

123

SYSON

PC155

5

1 2

0.1U_0603_25V7K

4

PR159

5.1_0603_5%

4

1 2

+5VALW

1U_0603_10V6K

PR163

@PR163

@

0_0402_5%

1 2

0_0603_5%

DH_1.5V

PR158

17.4K_0402_1%

1 2

PC162

1U_0603_10V6K

1 2

VDD_1.5V

+5VALW

1.5V_B+

BST_1.5V

CS_1.5V

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR161

887K_0402_1%

1 2

17

16

PHASE

RT8207MZQW_WQFN20_3X3

PGOOD

10

19

18

BOOT

UGATE

VLDOIN

S5

S3

TON

8

7

9

TON_1.5V

20

PU150

VTT

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

FB_1.5V

PAD

21 1

2

3

4

5

VTTREF_1.5V

PR162

PR162 10K_0402_1%

10K_0402_1%

1 2

PR160

10.2K_0402_1%

+1.5V

+1.5VP

12

+0.75VSP

12

PC159

PC160

10U_0603_6.3V6M

12

PC163

0.033U_0402_16V7K

+1.5VP

PJ750

@ PJ750

@

+0.75VSP +1.5VP

(0.5A,40mils ,Via NO.= 1)

2

JUMP_43X79

112

+0.75VS

(12A, 480mils ,Via NO.= 24) OCP=13.8A

1.5V P

eak Current 12A OCP current 13.34A FSW=300kHz DCR 8.3 ~ 10mohm

TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :10.8mohm , 13.6mohm

STATE S3 S5 1.5VP VTT_REFP 0.75VSP

S0 S3

S4/S5

Hi Hi

HiLo

Lo Lo

On On

Off

(Discharge)

On On

Off

(Discharge)

On

Off (Hi-Z)

Off

(Discharge)

Note: S3 - sleep ; S5 - power off

@

PJ151

2

JUMP_43X118

@

PJ152

2

JUMP_43X118

12

PC166

@PC166

@

0.1U_0402_10V7K

112

+1.5V

0.1U_0402_10V7K

SUSP#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

PR164

@PR164

@

0_0402_5%

1 2

2013/03/20 2014/03/20

EN_0.75VSP

12

@

PC167

0.1U_0402_10V7K

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

1.5VP/0.75VSP/1.8VSP

LA-9869P

of

43 51

1.0

A

B

C

D

1.8V controller (35.15), Support component (35.16)

1 1

+3VS

Note:Iload(max)=3A

VGA@

PU450

4

IN PG FB6EN

SY8032ABC_SOT23-6

@PR454

@

LX

GND

VGA@ PC456

VGA@

680P_0603_50V7K

12

PR454

22K_0402_5%

5

12

PC458

22U_0603_6.3V6M

VGA@

PR452

220K_0402_1%

VGA_PWRGD

@

PJ451

2

2 2

+1.8VGSP

112

JUMP_43X79

+1.8VGS

1 2

VGA@

PC453

0.1U_0402_16V7K

VGA@

+1.8_EN

12

VGA@

PL451

1UH_NRS4018T1R0NDGJ_3.2A_30%

3 2 1

PC456

1 2

12

PR456

4.7_1206_5%

FB=0.6V

SNB_1.8V

12

PL451

@EMI@

PR451

100K_0402_1%

@EMI@

PR453

49.9K_0402_1%

12

VGA@

12

+1.8VGSP

12

PC450

22P_0402_50V8J

VGA@

12

PC452

PC451

22U_0603_6.3V6M

VGA@

1.8V Peak Current 0.5A OCP current 3.5A FSW=800kHz

H/S Rds(on) :100mohm , L/S Rds(on) :80mohm ,

(0.5A,20mils ,Via NO.=1)

1.1V controller (35.27), Support component (35.28)

@

PJ401

+1.1VALWP +1.1VALW

(5.3A,220mils ,Via NO.=10)

3 3

1.1V eak Current 5.3A

P OCP current 12A FSW=800kHz

H/S Rds(on) :22mohm , L/S Rds(on) :11mohm ,

112

JUMP_43X79

2

PR405

PR405 10K_0402_1%

10K_0402_1%

EMI Part (47.1)

HCB2012KF-121T50_0805

B+

PL402

EMI@

PU400

12

PC404

10U_0805_25V6K

2200P_0402_50V7K

@EMI@

PC410

B+_1.1V

12

+3VALW

PU400

8

IN

EN

9

3 2

BS

LX

GND

FB

BYP

ILMT PG

LDO

SY8206DQNC_QFN10_3X3

1

PC405

0.1U_0603_25V7K

1 2

6 10

LX_1.1V

4 7 5

12

PC402

4.7U_0603_6.3V6K

1 2

@EMI@

PR401

4.7_1206_5%

1 2

PL401

1UH_PCMB063T-1R0MS_12A_20%

1 2

+3VALW

12

PC411

2.2U_0603_6.3V6K

@EMI@

680P_0603_50V7K

SNB_1.1V

FB=0.6V

PR403

100K_0402_1%

1 2

PR404

@PR404

@

0_0402_5%

1 2

EMI Part (47.1)

PC403

12

PR402

PC409

84.5K_0402_1%

12

PR406

1K_0402_1%

12

S CER CAP 4700P 25V K X7R 0402

1.1VPWR_EN

12

PC408

+1.1VALWP

12

PC407

22U_0603_6.3V6M

12

PC401

22U_0603_6.3V6M

12

PC406

PC412

@

22U_0603_6.3V6M

4 4

A

The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high respectively.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

+1.8VALWP

LA-9869P

D

44 51Wednesday, March 20, 2013

1.0Custom

5

4

3

2

1

1.2V controller (35.7), Support component (35.8)

PR702

D D

PR702

0_0402_5%

@

12

VR_ON

EMI Part (47.1)

@EMI@

PR706

@EMI@PR706

@EMI@

4.7_1206_5%

EMI@

PL702

HCB2012KF-121T50_0805

B+

C C

1.2V

12

PC709

PC702

2200P_0402_50V7K

@EMI@ PC702

@EMI@

PC709

B+_1.2V

12

10U_0805_25V6K

+3VS

Peak Current 7A OCP current 12A FSW=800kHz

PU700

8

IN

EN

GND

ILMT PG

BS LX

FB BYP LDO

9

3 2

SY8206DQNC_QFN10_3X3

1

PC704

0.1U_0603_25V7K

1 2

6 10

LX_1.2V

4 7 5

12

PC707

4.7U_0603_6.3V6K

12

4.7_1206_5%

1 2

1UH_MMD-05CZ-1R0M-M7L_7A_20%

+3VS

PC701

2.2U_0603_6.3V6K

@EMI@

680P_0603_50V7K

SNB_1.2V

PL701

1 2

PR703

100K_0402_1%

1 2

EMI Part (47.1)

PC706

12

PR701

102K_0402_1%

PR407

1K_0402_1%

12

(7A,280mils ,Via NO.= 14)

+1.2VS

12

PC710

12

S CER CAP 4700P 25V K X7R 0402

12

PC711

PC708

22U_0603_6.3V6M

12

PC703

22U_0603_6.3V6M

12

PC713

PC712

PC713

@

22U_0603_6.3V6M

H/S Rds(on) :22mohm , L/S Rds(on) :11mohm ,

2.5V controller (35.13), Support component (35.14)

PU702

APL5508-25DC-TRL_SOT89-3

B B

+3VS

12

1U_0402_6.3V6K

APL5508-25DC-TRL_SOT89-3

PC798

2

IN

GND

3

OUT

1

12

PC799

4.7U_0805_6.3V6K

PR798

@PR798

@

150_1206_5%

+2.5VSP

@

PJ702

112

JUMP_43X39

2

+2.5VS+2.5VSP

(0.75A,30mils ,Via NO.= 2)

A A

Security Classification

2013/03/20 2014/03/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2013/03/20 2014/03/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+1.2VSP/+2.5VSP

LA-9869P

45 51Wednesday, March 20, 2013

1

1.0

10/9 NB_Vdroop=-4m ohm

PR503

+APU_CORE_NB

1 1

2 2

3 3

4 4

PR503

1 2

10_0402_1%

APU_VDDNB_SEN

VSUM+_NB

2.61K_0402_1%

2.61K_0402_1% PR511

PR511

VSUM-_NB

PC551

0.1U_0402_25V6

1 2

13K_0402_1%

PC514

1000P_0402_50V7K

PR528

127K_0402_1%

H_PROCHOT#

1 2

@PR559

@

+1.5V

100K_0402_1%

PC517

1000P_0402_50V7K

1 2

12

PR537

118K_0402_1%

1 2

PR538

13K_0402_1%

470K_0402_5%_TSM0B474J4702RE

A

PR507

@PR507

@

1 2

PC507

@PC507

@

0_0402_5%

1 2

330P_0402_50V7K

12

PR512

PH502

PH502 10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

12

PR523

PR522

27.4K_0402_1%

1 2

PH501

1 2

12

1 2

PR539

PR539 PH503

PH503

APU_SVD

APU_PWRGD

27.4K_0402_1%

12

0.1U_0402_25V6

A

PR559

PR502

PR504

137K_0402_1%

2.94K_0402_1%

PC504

1000P_0402_50V7K

1 2

12

PC509

@

11K_0402_1%

12

470K_0402_5%_TSM0B474J4702RE

APU_SVC

+1.5V

12

APU_SVT

VR_ON

2.61K_0402_1%

2.61K_0402_1% PR544

PR544

VSUM-

PC533

137K_0402_1%

1 2

PR508

PR508 301_0402_1%

301_0402_1%

12

PC510

10/9 OCP=50A for 35W(511 ohm)

0.1U_0402_10V6K

0.022U_0402_25V7K

0.022U_0402_25V7K 681_0402_1%

681_0402_1%

1 2

PR519

@PR519

@

1 2

100_0402_1%

@

+5VS

0_0402_5%

1 2

PR564

PR532

@

0_0402_5%

1 2

PR533

@

0_0402_5%

1 2

PC555 0.1U_0402_25V6PC555 0.1U_0402_25V6

PR535

@

0_0402_5%

1 2

PR536

@

0_0402_5%

1 2

12

PC546

+5VS

1000P_0603_50V7K

VSUM-

VSUM+

12

PR545

PH504

PH504 10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

12

PR502

2K_0402_1%

2K_0402_1% PR505

PR505

100P_0402_50V8J

PR518

PC560

0.22U_0402_16V7K

12

0_0402_5%

1 2

@ PR540

@

11K_0402_1%

12

1 2

PC503

390P_0402_50V7K

1 2

PC505

1 2

PC512

@PC512

@

1 2

220P_0402_50V7K

PR562

10K_0402_1%

1 2

10 11 12

1 2

PR540

PR563

10K_0402_1%@

1 2

12

PC527

@

0.15U_0402_10V6K

PC502

PC502 330P_0402_50V7K

330P_0402_50V7K

42.2K_0402_1%

1 2

@

12

0.22U_0402_16V7K

PU501

1

ISEN2_NB

2

NTC_NB

3

IMON_NB

4

SVC

5

VR_HOT_L

6

SVD

7

VDDIO

8

SVT

9

ENABLE PWROK IMON NTC

PR5680_0402_5% PR5680_0402_5%

ISEN2

12

PC529

0.022U_0402_16V7K

@PR553

@

1 2

100_0402_1%

10/9 OCP=62.5A for 35W (634)

PR509

PC559

48

13

1 2

PC522

422_0402_1%

1 2

PR553

B

C

CPU controller (36.1),Driver (36.2) Support component (36.3)

PR542

0_0603_5%

1 2

PR510

2.2_0603_5%

1 2

BOOT1

LGATE1

1 2 3 4

ISL6208BCRZ-T_QFN8_2X2

NB_UGATE1

NB_PHASE1

NB_BOOT1

NB_LGATE1

0.22U_0603_25V7K

PU502

UGATE

PHASE

BOOT

FCCM

PWM

VCC

LGATE

GND

0_0603_5%

1 2

PR572

2.2_0603_5%

1 2

PC557

0.22U_0603_25V7K

PC508

PR574

Compal Secret Data

1 2

8 7 6 5

1 2

45

47

46

ISEN1_NB

ISUMP_NB

ISUMN_NB

S IC ISL6277HRZ-TR5570 QFN 48P PWM

ISEN1

ISEN2

ISEN3

15

14

ISEN1

1 2

0.22U_0402_16V7K

PR550

PC534

@PC534

@

1 2

820P_0402_50V7K

44

FB_NB

VSEN_NB

ISUMN

ISUMP

17

16

PC523

0.22U_0402_16V7K

PC531

@

PR556

1 2

10_0402_5%

B

42

43

COMP_NB

PGOOD_NB

RTN

VSEN

19

18

12

330P_0402_50V8J

12

@PR554

@

+APU_CORE TDC (AB)22A (C)36A EDC (AB)35A (C)50A OCP current (AB)43.56A Load line -2.1mV/A FSW=450kHz DCR 1mohm~1.2mohm

TYP MAX H/S Rds(on) :8.5mohm , 11mohm L/S Rds(on) :2.6mohm , 3.2mohm

+APU_CORE_NB TDC (AB)22A (C)30A EDC (AB)33A (C)40A OCP current (AB)41.51A Load line -4mV/A FSW=450kHz DCR 1mohm ~1.2mohm

1 2

PR520

121K_0402_1%

TYP MAX

FCCM_NB

PWM2_NB

39

41

40

FCCM_NB

PWM2_NB

FB21PGOOD

FB2

22

20

PC535

0.01U_0402_50V7K

1 2

12

PR554 0_0402_5%

0_0402_5%

NB_LGATE1

NB_PHASE1

NB_UGATE1

38

37

LGATEX

PHASEX

UGATEX

COMP

BOOT1

23

24

BOOT1

PC528

1 2

1000P_0402_50V7K

PR548

1 2

1.65K_0402_1%

PR555

@PR555

@

0_0402_5%

PR557

1 2

10_0402_5%

APU_VDD_SENAPU_VDD_RUN_FB_L

H/S Rds(on) :7.4mohm , 8.8mohm L/S Rds(on) :2.6mohm , 3.1mohm

0_0603_5%

BOOTX

BOOT2 UGATE2 PHASE2

LGATE2

VDDP

VDD PWM_Y LGATE1

PHASE1 UGATE1

36 35

VIN

34 33 32 31 30 29 28 27 26 25

TP

+3VS

49

PR546

1 2

301_0402_1%

+APU_CORE

NB_BOOT1

BOOT2 UGATE2 PHASE2 LGATE2

LGATE1 PHASE1 UGATE1

12

PR558

PR558 100K_0402_1%

100K_0402_1%

10P_0402_50V8J

100P_0402_50V8J

1 2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0_0603_5%

PR527

1 2

12

PC515

0.22U_0603_50V7K

PR569

0_0402_5%

1 2

PR501

1_0603_5%

12

PC518

1U_0603_16V6K

VGATE

PC525

1 2

PC530

1 2

PC532

PR549

1 2

390P_0402_50V7K

PR551

2K_0402_1%

PC536

680P_0402_50V7K

390P_0402_50V7K

137K_0402_1%

10/9 CPU_Vdroop=-2.1m ohm

Issued Date

C

@

CPU_B+

+5VALW

12

PWM2_NB

32.4K_0402_1%

1 2

UGATE1

PC519

PC519 1U_0603_16V6K

1U_0603_16V6K

@

PR552

@PR552

@

2013/03/20

7

2

1

D1

G1

S2

4

5

3

PR560

0_0603_5%

1 2

UGATE2

PR521

2.2_0603_5%

1 2

BOOT2

LGATE2

@

PR570

PR570 0_0402_5%

0_0402_5%

1 2

PC513

0.22U_0603_25V7K

+5VALW

12

@

PC524

PC524 1U_0603_16V6K

1U_0603_16V6K

EMI Part (35.33)

PQ504

CSD87351Q5D_SON8~D

Deciphered Date

1

2

3 4

8

D

12

PC537

10U_0805_25V6K

S1/D2

G26S2

12

PQ501

12

FDMS3664S_POWER56-8-7

EMI Part (47.1)

1 2

PR561

CSD87351Q5D_SON8~D

@

0_0603_5%

1 2

PR541

@

2.2_0603_5%

PC521

1 2

0.22U_0603_25V7K

EMI Part (35.33)

7 6

APU_NB_SW

5

12

4.7_1206_5%

PR573

12

@EMI@

PC558

680P_0603_50V7K

@EMI@

D

EMI Part (47.1)

CPU_B+

PR513

PR515

PR517

PR517 1_0402_1%

1_0402_1%

12

PQ502

12

FDMS3664S_POWER56-8-7

PC545

2200P_0402_50V7K

@EMI@PC545

@EMI@

PHASE2

4.7_1206_5%

PR516

@EMI@

PC516

@EMI@

12

PC548

2200P_0402_50V7K

@EMI@

2200P_0402_50V7K

@EMI@

ISEN2

VSUM+

VSUM-

680P_0603_50V7K

12

PC538

PC539

10U_0805_25V6K

PHASE1

10K_0402_1%

@EMI@

4.7_1206_5%

PR506

PC506

@EMI@PC506

@EMI@

2

S2

3

10K_0402_1%

1 2

ISEN1 ISEN2

3.65K_0402_1%

1 2

VSUM+

1 2

VSUM-

680P_0603_50V7K

7

1

D1

G1

S1/D2

S2

G26S2

4

5

EMI Part (47.1)

@

PQ503

PC556

@EMI@

2200P_0402_50V7K

ISEN1_NB

VSUM+_NB

VSUM-_NB

1

2

3 4

8

12

PC553

PC552

10U_0805_25V6K

@

PR571

10K_0402_1%

1 2

PR575

3.65K_0402_1%

1 2

PR566

PR566 1_0402_1%

1_0402_1%

1 2

Title

Size Document Number Rev

Custom

Date: Sheet of

PC550

2200P_0402_50V7K

@EMI@

2200P_0402_50V7K

@EMI@

7 6

APU_NB_SW2

5

CPU_B+_NB

12

PC554

10U_0805_25V6K

PL505

0.22UH_MMD-06DZNR22ME_25A_20%

@

10K_0402_1%

1 2

Compal Electronics, Inc.

+CPU_CORE/VDDNBP

E

HCB2012KF-121T50_0805

1 2

HCB2012KF-121T50_0805

1

+

PC511

2

12

PC540

10K_0402_1%

1 2

3.65K_0402_1%

1 2

12

PC543

@

12

4.7_1206_5%

12

680P_0603_50V7K

+APU_CORE_NB

PR576

1 2

1

+

100U_25V_M

PC501

2

@

PL502

0.22UH_MMD-06DZNR22ME_25A_20%

PR514

10K_0402_1%

1 2

CPU_B+_NB

CPU_B+

12

PC541

10U_0805_25V6K

0.22UH_MMD-06DZNR22ME_25A_20%

PR524

PR530

PR531

PR531 1_0402_1%

1_0402_1%

12

PC520

PC544

@

10U_0805_25V6K

0.22UH_MMD-06DZNR22ME_25A_20%

@

PR578

PR526

10K_0402_1%

@EMI@

1 2

ISEN2_NB

@

PR579

3.65K_0402_1%

1 2

VSUM+_NB

PC526

PR577

@

@EMI@

VSUM-_NB

ISEN2_NB

1_0402_1%

1 2

LA-9869P

E

EMI@

PL501

PL506

+APU_CORE

HCB2012KF-121T50_0805

1 2

12

PC542

10U_0805_25V6K

12

10U_0805_25V6K

PL507

PL503

+APU_CORE

PR525

10K_0402_1%

1 2

CPU_B+_NB

@

PL504

@

10K_0402_1%

46 51Wednesday, March 20, 2013

EMI@

PR580

CPU_B+

ISEN1

B+

+APU_CORE_NB

1 2

ISEN1_NB

1.0

5

D D

4

3

2

1

VGA controller (43.1),Driver (43.2) Support component (43.3)

EMI Part (47.1)

VGA@

PL801

HCB2012KF-121T50_0805

B+

VGA@

PR804

10_0402_5%

12

C C

B B

VSS_GPU_SENSE

VCC_GPU_SENSE

+VGA_CORE

1 2

PR806

VGA@

10_0402_5%

VGA@

1000P_0402_50V7K

GPIO6

A A

1 2

VGA@

PC809

1000P_0402_50V7K

12

VGA@

PC811

330P_0402_50V7K

VGA@

PR812

2.37K_0402_1%

1 2

VGA@

PR816

PC818

715_0402_1%

GPIO30

VID5

VID4

1

0

1

0

1

0 0

1

0

1

0

1 0 1 0 0

1

0

1

11 000

1

GPU_B+

12

PC802

VGA@

2200P_0402_50V7K

@EMI@

VGA@

330P_0402_50V7K

1 2

VGA@

PR813

226K_0402_1%

1 2

VGA@

PC814

390P_0402_50V7K

VGA@

PC819

56P_0402_50V8

1 2

PR835

VGA@

120K_0402_1%

GPIO29

GPIO20

VID3

VID2

1 1

0

1

0

1

11 0.775V

PC803

10U_0805_25V6K

PC812

VGA@

1000P_0402_50V7K

VGA@

12

8.06K_0402_1%

VGA_PWRGD

0

1

10

0

1

10

0

1

0

PC804

VGA@

10U_0805_25V6K

PC815

12

147K for CPU 47K for GPU

12

PR817

GPIO15

VID1

0

1

0

101.075V

0

1

110

0

1

0

1

0

10

VDDC

1.15V

1.125V1110

1.100V

1.050V

1.025V

1.000V

0.975V

0.950V

0.925V

0.900V

0.875V

0.850V

0.825V

0.800V

VGA@

PR718

1.8K_0402_1%

Default

+5VALW

47K_0402_1%

+3VS

12

VGA@

PR809

VGA@

PR801

1_0603_5%

1 2

12

VGA@

1U_0603_6.3V6M

GPU_ISUM+ GPU_ISUM-

8

29

AGND

7

VSEN

6

FB

5

COMP

4

VW

ISL62881CHRTZ-T_TQFN28_4X4

3

RBIAS

2

PGOOD

1

CLK_EN#

28

@

12

PR8290_0402_5%@PR8290_0402_5%

GPU_DPRSLPVR

12

VGA@

PR802

1_0603_5%

PC807

PC806

9

RTN

VGA@

12

PR828

47K_0402_5%

VGA@

12

VGA@

0.22U_0603_25V7K

+5VALW

12

13

12

10

11

VIN

VDD

ISUM-

ISUM+

PU801

VID5

25

0.1U_0402_25V6

12

PR826 0_0402_5%@PR826 0_0402_5%

PR827 0_0402_5%@PR827 0_0402_5%

PC822

1 2

@

VGA@

GPU_VID4

GPU_VID3

GPU_VID5

PXS_PWREN

PR841

PR841 0_0402_5%

0_0402_5%

14

IMON

VID323VID424VID626VR_ON27DPRSLPVR

22

PR825 0_0402_5%@PR825 0_0402_5%

1 2

BST_GPU

BOOT

UGATE

PHASE

VSSP

LGATE

VCCP

VID0 VID1

VID2

PR824 0_0402_5%@PR824 0_0402_5%

@

GPU_VID2

VGA@

2.2_0603_5%

15 16 17 18 19 20 21

PR821 0_0402_5%@PR821 0_0402_5%

1 2

@

GPU_VID1

DH_GPU LX_GPU

DL_GPU

PR805

12

1_0603_5%

12

VGA@

2.2U_0603_6.3V6K

VGA@

12

PR823

VGA@

10K_0402_1%

12

PR836

@ PR836

@

10K_0402_1%

VGA@

PC810

0.1U_0603_25V7K

12

PR814

PC817

12

PR831

PR830

@ PR830

@

10K_0402_1%

VGA@ PR831

VGA@

12

PR837

PR838

@ PR838

@

VGA@

10K_0402_1%

12

+5VALW

+3VGS

12

PR832

PR833

@ PR833

@

10K_0402_1%

VGA@

12

PR840

PR839

@

10K_0402_1%

VGA@

10K_0402_1%

VGA@

10K_0402_1%

5

PQ801

4

123

TR TPCA8065-H 1N PPAK56-8

VGA@

5

PQ802

4

VGA@

4

123

S TR TPCA8059-H 1N PPAK56-8

VGA@

+VGA_CORE

DC 21A

T EDC 31.5A OCP current 40A FSW=300kHz DCR 1.4m ohm +-5%

H/S Rds(on) :11.7mohm , 14.5mohm L/S Rds(on) :3.8mohm , 4.8mohm

5

12

@EMI@

PR808

4.7_1206_5%

PQ803

@EMI@

PC816

123

680P_0603_50V7K

1 2

S TR TPCA8059-H 1N PPAK56-8

Layout Note: Place near Choke

GPU_ISUM+

GPU_ISUM-

TYP MAX

VGA@

0.36UH_PDME064T-R36MS_24A_20%

12

VGA@

3.65K_0805_1%

PR815

VGA@ PR815

VGA@

1 2

2.61K_0402_1%

PL802

1 2

PR810

VGA@

1 2

10KB_0402_5%_ERTJ1VR103J

1 2

PR818

VGA@ PR818

VGA@

11K_0402_1%

1 2

VGA@

PC820

.047U_0402_16V7K

1 2

PC821

VGA@ PC821

VGA@

0.1U_0402_16V7K

VGA@

1.2K_0402_1%

4 3

12

PR811

@PR811

@

0_0402_5%

PH7

B value:4250K±2%

12

PR822

+VGA_CORE

1

+

PC899

2

VGA@

560U_D2_2VM_R4.5M

0.1U_0402_16V7K

PC823

VGA@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVI SION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAI NS MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

5

4

MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF C OMPAL ELECTRONICS, I NC.

3

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

+VPU_COREP

LA-9869P

1

47 51Wednesday, March 20, 2013

1.0

A

1 1

B

C

D

0.95V controller (35.11), Support component (35.12)

@

12

PC601

PC601 1U_0603_6.3V6M

1U_0603_6.3V6M

VGA@

+0.95VS_POK

+5VS+1.1VALW

VGA@

PU600

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

3

VOUT

4

VOUT

2

FB

GND

1

APL5916KAI-TRL_SO8

VGA@

10K_0402_1%

+0.95VS_FB

VGA@

56K_0402_1%

PR604

PR603

12

PC600

39P_0402_50V8J

12

39P_0402_50V8J

VGA@

+0.95VGSP

@

PJ601

PC603

VGA@ PC603

VGA@

22U_0805_6.3V6M

+0.95VGSP

(4A,160mils ,Via NO.= 4)

PJ601

1 2

JUMP_43X118

+0.95VGS

0.95V

12

VGA@

PC604

PC604 22U_0805_6.3V6M

22U_0805_6.3V6M

1 2

+3VS

12

1

PJ602

1

JUMP_43X79

2

+0.95VS_VIN

+0.95VS_EN

@

PR601

1K_0402_1%

2 2

VGA@

PR602

10K_0402_1%

PXS_PWREN

3 3

1 2

VGA@

PC602

0.01U_0402_25V6

Peak Current 4A OCP current 16A FSW=800kHz

H/S Rds(on) :22mohm , L/S Rds(on) :11mohm ,

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/03/20 2014/03/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

+1.5VPCIE/0.935V

+1.5VPCIE/0.935V LA-9869P

LA-9869P

D

48 51Wednesday, March 20, 2013

1.0

A A

B B

C C

D D

PC1010

12

PC1010

22U_0603_6.3V6M

PC1011

22U_0603_6.3V6M

PC1013

22U_0603_6.3V6M

PC1014

22U_0603_6.3V6M

PC1012

22U_0603_6.3V6M

PC1028

22U_0603_6.3V6M

PC1029

22U_0603_6.3V6M

PC1030

22U_0603_6.3V6M

PC1031

22U_0603_6.3V6M

560U_D2_2VM_R4.5M

12

2

PC1032

PC1000

22U_0603_6.3V6M

PC1001

22U_0603_6.3V6M

PC1002

22U_0603_6.3V6M

PC1003

22U_0603_6.3V6M

PC1004

22U_0603_6.3V6M

1

+

PC1006

+APU_CORE

5

Local

1

2

+

PC1100

560U_D2_2VM_R4.5M

1

2

+

PC1101

330U_D2_2V_Y

1

2

+

@

PC1102

330U_D2_2V_Y

PC1050

VGA@

1U_0402_6.3V6K

PC1051

VGA@

1U_0402_6.3V6K

PC1052

VGA@ PC1052

VGA@

1U_0402_6.3V6K

VGA@

PC1053

1U_0402_6.3V6K

PC1054

VGA@

1U_0402_6.3V6K

VGA@

PC1055

1U_0402_6.3V6K

VGA@

PC1056

1U_0402_6.3V6K

PC1057

VGA@ PC1057

VGA@

1U_0402_6.3V6K

VGA@

PC1058

1U_0402_6.3V6K

PC1059

VGA@

1U_0402_6.3V6K

330U_D2_2V_Y

12

PC1076

VGA@

1U_0402_6.3V6K

VGA@

PC1077

1U_0402_6.3V6K

PC1078

VGA@PC1078

VGA@

1U_0402_6.3V6K

PC1044

VGA@ PC1044

VGA@

1U_0402_6.3V6K

VGA@

PC1045

1U_0402_6.3V6K

PC1079

VGA@ PC1079

VGA@

1U_0402_6.3V6K

PC1046

VGA@

1U_0402_6.3V6K

PC1047

VGA@ PC1047

VGA@

1U_0402_6.3V6K

PC1048

VGA@ PC1048

VGA@

1U_0402_6.3V6K

VGA@

PC1049

1U_0402_6.3V6K

12

4

VGA@

PC1069

1U_0402_6.3V6K

12

PC1060

VGA@ PC1060