Quanta Computer LA-6841P PWWAA Marseille LC, Satellite C660 Schematic

A

1 1

B

C

D

E

PWWAA

Marseille LC

2 2

L-A6841P

3 3

REV 0.1

Schematic

Intel Penryn/ Cantiga/ ICH9M

2010-07-22 Rev. 0.1

4 4

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

PWWAA LA6841P M/B

1 44Monday, August 1 6, 2010

E

0.1

of

A

Compal Confidential

B

C

D

E

Model Name : PWWAA File Name : LA-6841P

1 1

Fan Control

APL5607

page 4

Intel Penryn Processor

uPGA-478 Package

(Socket P)

H_A#(3..35) H_D#(0..63)

FSB

667/800/1066MHz

page 4,5,6

Thermal Sensor

EMC1402-1

page 4

Memory BUS(DDRIII)

CRT

page 18

Intel Cantiga

GM45/GL40

LCD Conn.

page 17

2 2

RJ45

RTL8105E 10/100M

RTS5138E

3 3

PCIeMini Card WiMax

PCIeMini Card WLAN

PCIe port 3

2IN1

USB port 10

USB port 7

page 25

PCIe port 4

page 25

page 26page 26

page 29

USB

5V 480MHz

PCIe 1x [2,4,5]

1.5V 2.5G Hz(250MB/s)

PCIe 1x

1.5V 2.5G Hz(250MB/s)

USB

5V 480MHz

uFCBGA-1329

page 7,8,9,10,11,12,13

DMI x 4

Intel ICH9-M

BGA-676

page 19,20,21,22

C-Link

Dual Channel

1.5V DDR3 800/1066

USB

5V 480MHz

SATA port 1

5V 1.5GHz(1 50MB/s)

SATA port 4

5V 1.5GHz(1 50MB/s)

USB/B

USB port 0,1

page 23

SATA HDD0

SATA ODD

Clock Generator

SLG8SP556VTR

page 16

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

Int. Camera

USB port 11

page 17

page 23

page 14,15

HD Audio

3.3V 33 MHz

page 30

Int.KBD

page 24

LPC BUS

SPI ROM

page 31

Power/B

RTC CKT.

DC/DC Interface CKT.

4 4

page 24

page 20

page 33

Debug Port

page 31

Touch Pad

page 24

ENE KB926 D2

3.3V/1.5V 24.576MHz/48Mhz

Int.

MIC CONN

page 30

HDA Codec

ALC259

page 29

MIC CONN

page 30

HP CONN

page 30

SPK CONN

page 30

Power Circuit DC/DC

Security Class ification

page 34,35,36,37,38,39,40

A

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Block Diagrams

PWWAA LA6841P M/B

2 44Monday, August 1 6, 2010

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B

C

D

E

Voltage Rails

OFF

OFF OFF

ON

ON ON

OFF

OFF OFF

OFF

ONON

ON

G3

BTO Option Table

Function

description

explain

BTO

Power Plane

1 1

2 2

VIN

B+

+CPU_CORE

+0.75VS

+1.05VS

+1.5VS

+1.5V

+1.8VS

+3VALW

+3VL

+3V_SB ONON

+3V_LAN

+3VS

+5VALW

+5V_SB

+5VS

+VSB

+RTCVCC RTC power

Description

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

0.75V switched power rail for DDR terminator

1.05V switched power rail

1.5V switched power rail

1.5 power rail for DDR

1.8V power rail

3.3V always on power rail OFF

3.3V always on power rail

3.3V power rail for SB

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V power rail for SB

5V switched power rail

VSB always on power rail

S1 S3 S5

ON ON ON

ON ON ON ON

ON

OFF

ON

OFF

ON

OFF OFF

ON

OFF OFF

ON

ON ON

ON

ON ON

OFF

ON

ON ON

OFF

ON

ON ON

ON

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOWLOWLOWLOW

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

HIGH HIGH HIGH HIGH

LOW

HIGH

HIGHHIGHHIGH

HIGH

LOWLOWLOW

HIGH

LOW LOW LOW LOW

Card Reader Energy Star

Camera

(X)

Camera

CAM@

WLAN

Always Always

WLAN

Energy Star

WLAN@

External PCI Devices

DEVICE PCI DEVICE ID IDSEL# REQ/GNT# PIRQ

3 3

EC SM Bus1 address

Device

EC SM Bus2 address

Address Address

PowerPower

Device

EC KB926 D2+3VL EC KB926 D2+3VS

Smart Battery+3VL

0001 011X b

+3VS

CPU THM Sen SMSC SMC1402

1001 101Xb

ICH9M SM Bus address

Power

+3V_SB ICH9M

4 4

+3VS

Device

Clock Generator (SLG8SP556V) DDR DIMM0

DDR DIMM1

A

Address

1101 001Xb

1001 000Xb

1001 010Xb

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Notes List

PWWAA LA6841P M/B

3 44Monday, August 1 6, 2010

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@

AA4 AB2 AA3

D22

K5 M3 N2

N3 P5 P2

P4 P1 R1 M1

K3 H2 K2

Y2 U5 R3

W6

U4 Y5 U1 R4 T5

T3 W2 W5

Y4

U2

V4 W3

V1

A6

A5

C4

D5

C6

B4

A3

M4

N5

T2

V3

B2

D2

D3

F6

J4 L5 L4

J1

L2

J3 L1

@

JCPUA

A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#

REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#

A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]

Penryn

ADDR GROUP_0

ADDR GROUP_1

THERMAL

ICH

THERMTRIP#

RESERVED

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

XDP/ITP SIGNALS

PROCHOT#

THERMDA THERMDC

H CLK

BCLK[0] BCLK[1]

H1 E2 G5

H5 F21 E1

F1

D20 B3

H4

C1 F3 F4 G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6

TDI

AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

H_A#[3..16 ]<7>

D D

H_ADSTB #0<7>

H_REQ#0<7> H_REQ#1<7> H_REQ#2<7> H_REQ#3<7> H_REQ#4<7>

H_A#[17..3 5]<7>

C C

H_ADSTB #1<7>

H_A20M#<20> H_FERR#<20> H_IGNNE#< 20>

H_STPCL K#<20> H_INTR<20> H_NMI<20> H_SMI#<20>

Reserve for debug close to South Bridge

B B

H_FERR#

C596 180P_04 02_50V8J@C596 180P_04 02_50V8J@

12

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8

H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_A20M# H_FERR# H_IGNNE#

H_STPCL K# H_INTR H_NMI H_SMI#

4

H_IERR#

R1 56_0402 _5%R1 56_0402 _5%

XDP_TCK XDP_TDI XDP_TDO XDP_TMS

XDP_TRS T#

XDP_DBR ESET#

H_PROCH OT# H_THERM DA H_THERM DC

1 2

H_INIT#

H_RESET #

H_ADS# <7> H_BNR# <7>

H_BPRI# <7>

H_DEFER # <7>

H_DRDY# <7> H_DBSY# <7>

H_BR0# <7 >

H_INIT# <20>

H_LOCK# <7>

H_RESET # <7> H_RS#0 <7 > H_RS#1 <7 > H_RS#2 <7 > H_TRDY# <7>

H_HIT# < 7> H_HITM# <7>

XDP_DBR ESET# <21 >

H_THERM TRIP# <8,20>

CLK_CPU _BCLK <16> CLK_CPU _BCLK# <16>

+1.05VS

if use XDP,these resistor are 51ohm

XDP_TDO

XDP_TMS

XDP_TDI

XDP_TCK

XDP_TRS T#

T13PAD T13PAD

+1.05VS

3

+1.05VS

1 2

R14 54.9 _0402_1%R 14 54.9_0402_ 1%

1 2

R4 54.9_0402_ 1%R4 54.9_0402_ 1%

1 2

R5 54.9_0402_ 1%R5 54.9_0402_ 1%

1 2

R6 54.9_0402_ 1%R6 54.9_0402_ 1%

1 2

R7 54.9_0402_ 1%R7 54.9_0402_ 1%

1 2

R8 56_0402_5%@R8 56_0402_5%@

1 2

R9 56_0402_5 %R9 56_0402_5 %

H_PROCH OT#

PROCHOT# PU: 68Ohm near CPU and MVP6. 5 6Ohm near CPU if no used.

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

B

2

E

3 1

Q6

Q6 MMBT390 4_SOT23@

MMBT390 4_SOT23@

C

OCP# <21>

EN_DFAN 1<30>

+3VS

10mil

+FAN1

C2

1 2

R3

1 2

10K_040 2_5%

+3VS

1

C1

2

0.1U_0402_16V4ZC10.1U_0402_16V4Z

H_THERM DA

2200P_0 402_50V7K

+5VS

H_THERM DC

CPU_THE RM#

1A

1 2 3 4

1

C5

C5 10U_080 5_10V4Z

10U_080 5_10V4Z

2

U1

1

VDD

2

DP

3

DN

4

THERM#

EMC1402 -1-ACZL-TR_MSOP 8

Address:0100_1100 EMC1402-1 Address:0100_1101 EMC1402-2

SMCLK

SMDATA

ALERT#

GND

FAN Control Circuit

2

C3

10U_080 5_10V4Z

U2

EN

GND

VIN

GND

VOUT

GND

VSET

GND

APL5607 KI-TRG_SO8

1

8 7 6 5

8

7

6

5

2

1

1 2

R2 10K_0402_5%

@

Reserve for sou rce control

+FAN1

C4 1000P_0 402_25V8J@C41000P_0 402_25V8J@

2

1

EC_SMB_ CK2 <30>

EC_SMB_ DA2 <30>

+3VS

JFAN

1

2

3

4

GND

5

GND

ACES_85 204-0300N

@

R10 10K_0 402_5%R10 10K_0 402_5%

C6

0.01U_04 02_16V7K

@

12

+3VS

FAN_SPE ED1 <30>

H_SMI#

H_INIT#

H_NMI

H_A20M#

H_INTR

H_IGNNE#

H_STPCL K#

A A

12

C597 180P_04 02_50V8J@C597 180P_04 02_50V8J@

12

C598 180P_04 02_50V8J@C598 180P_04 02_50V8J@

12

C599 180P_04 02_50V8J@C599 180P_04 02_50V8J@

12

C600 180P_04 02_50V8J@C600 180P_04 02_50V8J@

12

C601 180P_04 02_50V8J@C601 180P_04 02_50V8J@

12

C602 180P_04 02_50V8J@C602 180P_04 02_50V8J@

12

C603 180P_04 02_50V8J@C603 180P_04 02_50V8J@

Reserve for debug close to CPU

5

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn(1/3)-AGTL+/THM/FAN

PWWAA LA6841P M/B

1

of

4 44Monday, August 1 6, 2010

of

4 44Monday, August 1 6, 2010

of

4 44Monday, August 1 6, 2010

0.1

5

H_D#[0..15 ]<7>

D D

H_DSTBN #0<7> H_DSTBP #0<7> H_DINV#0< 7> H_D#[16..3 1]<7>

C C

R11

1K_0402 _1%

R17

2K_0402 _1%

+1.05VS

12

Close to CPU pin AD26 within 500mils.

+CPU_GT LREF

H_DSTBN #1<7 > H_DSTBP #1<7> H_DINV#1< 7>

CPU_BSE L0<8,16> CPU_BSE L1<8,16> CPU_BSE L2<8,16>

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

+CPU_GT LREF

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

B B

CPU_BSEL CPU_BSEL2 CPU_BSEL1

166

200

0 1

0

1

CPU_BSEL0

266 0 0 0

G22

G25

G24

H26 H25

M24

M23

R24

N25

M26 N24

AD26

C23 D25 C24

AF26

AF1

C21

1

0

E22 F24 E26

F23

E25 E23 K24

H22 F26 K22 H23

N22 K25 P26 R23 L23

L22

P25 P23 P22 T24

L25 T25

L26

A26

B22 B23

J24 J23

J26

C3

4

@

JCPUB

D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]

Penryn

DATA GRP 0

MISC

DATA GRP 1

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]#

DATA GRP 2DATA GRP 3

D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]#

COMP[0] COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

H_CPUSL P#

H_PW RGOOD

H_DPRST P#

H_DPSLP #

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

C650 180P_04 02_50V8J@C650 180P_04 02_50V8J@

C651 180P_04 02_50V8J@C651 180P_04 02_50V8J@

C652 180P_04 02_50V8J@C652 180P_04 02_50V8J@

C653 180P_04 02_50V8J@C653 180P_04 02_50V8J@

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0 COMP1 COMP2 COMP3

H_DPRST P# H_DPSLP #

H_PW RGOOD H_CPUSL P#

12

3

H_D#[32..4 7] <7>

H_DSTBN #2 <7 > H_DSTBP #2 <7> H_DINV#2 <7> H_D#[48..6 3] <7>

H_DSTBN #3 <7 > H_DSTBP #3 <7> H_DINV#3 <7>

H_DPRST P# <8 ,20,40> H_DPSLP # <20 > H_DPW R# <7> H_PW RGOOD <20> H_CPUSL P# <7> H_PSI# <40>

Reserve for debug close to CPU

2

Resistor placed with in

0.5" of CPU pin.Trac e should be at least 2 5 mils away from any o ther toggling signal. COMP[0,2] trace widt h is 18 mils. COMP[1,3] t race width is 5 mils.

COMP0

1 2

R12 27.4_040 2_1%R12 27.4_040 2_1%

COMP1

1 2

R13 54.9_040 2_1%R13 54.9_040 2_1%

COMP2

1 2

R15 27.4_040 2_1%R15 27.4_040 2_1%

COMP3

1 2

R18 54.9_040 2_1%R18 54.9_040 2_1%

layout note: Please use "Daisy Chain" to layout and the signal (H_DPRSTP#) is routed from ICH9 to power IC, then to NB and CPU

@

JCPUD

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Penryn

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

1

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

.

A A

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn(2/3)-AGTL+/GND

PWWAA LA6841P M/B

5 44Monday, August 1 6, 2010

1

0.1

of

5

4

3

2

1

Near CPU CORE regulator

ESR <= 1.5m ohm Capacitor > 1980uF

D D

+CPU_CO RE +CPU_CO RE

C C

B B

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

A10 A12 A13 A15 A17 A18 A20

B10 B12 B14 B15 B17 B18 B20

C10 C12 C13 C15 C17 C18

D10 D12 D14 D15 D17 D18

E10 E12 E13 E15 E17 E18 E20

F10 F12 F14 F15 F17 F18 F20 AA7 AA9

AB9

A7 A9

B7 B9

C9

D9

E7 E9

F7 F9

@

JCPUC

VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]

Penryn

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

.

VCCSENS E

C79

330U_6.3 V_M_R15

VCCSENS E

VSSSENS E

330U_6.3 V_M_R15

1

+

2

4.5A

C80

+1.05VS

330U_6.3 V_M_R15

1

+

C81

2

330U_6.3 V_M_R15

1

+

C146

2

330U_6.3 V_M_R15

Near pin B26

CPU_VID0 <40> CPU_VID1 <40> CPU_VID2 <40> CPU_VID3 <40> CPU_VID4 <40> CPU_VID5 <40> CPU_VID6 <40>

VCCSENS E < 40>

VSSSENS E <40>

+CPU_CO RE

R19100_040 2_1% R19100_040 2_1%

12

1

C82

2

1

C50

0.01U_04 02_16V7K

2

Place these capacitors on L8 (North side,Secondary Layer)

+

need to change P/N

Place these capacitors on L8 (Sorth side,Secondary Layer)

Mid Frequence Decoupling

Place these inside socket cavity on L8

+1.05VS

(North side Secondary)

1

C44

0.1U_040 2_10V6K

2

+1.5VS

1

C51

10U_080 5_6.3V6M

2

+CPU_CO RE

1

C45

0.1U_040 2_10V6K

2

1

C11

10U_080 5_6.3V6M

2

1

C19

10U_080 5_6.3V6M

2

1

C27

10U_080 5_6.3V6M

2

1

C35

10U_080 5_6.3V6M

2

1

2

1

C12

10U_080 5_6.3V6M

2

1

C20

10U_080 5_6.3V6M

2

1

C28

10U_080 5_6.3V6M

2

1

C36

10U_080 5_6.3V6M

2

C46

0.1U_040 2_10V6K

1

C47

0.1U_040 2_10V6K

2

1

C13

10U_080 5_6.3V6M

2

1

C21

10U_080 5_6.3V6M

2

1

C29

10U_080 5_6.3V6M

2

1

C37

10U_080 5_6.3V6M

2

1

C48

0.1U_040 2_10V6K

2

1

C14

10U_080 5_6.3V6M

2

1

C22

10U_080 5_6.3V6M

2

1

C30

10U_080 5_6.3V6M

2

1

C38

10U_080 5_6.3V6M

2

1

2

1

2

1

2

1

2

1

C49

0.1U_040 2_10V6K

2

C15

10U_080 5_6.3V6M

C23

10U_080 5_6.3V6M

C31

10U_080 5_6.3V6M

C39

10U_080 5_6.3V6M

1

C16

10U_080 5_6.3V6M

2

1

C24

10U_080 5_6.3V6M

2

1

C32

10U_080 5_6.3V6M

2

1

C40

10U_080 5_6.3V6M

2

1

C17

10U_080 5_6.3V6M

2

1

C25

10U_080 5_6.3V6M

2

1

C33

10U_080 5_6.3V6M

2

1

C41

10U_080 5_6.3V6M

2

1

C18

10U_080 5_6.3V6M

2

1

C26

10U_080 5_6.3V6M

2

1

C34

10U_080 5_6.3V6M

2

1

C42

10U_080 5_6.3V6M

2

VSSSENS E

A A

Close to CPU pin

R20100_040 2_1% R20100_040 2_1%

12

within 500mils.

Security Class ification

Length match within 25 mils. The trace width/space/other is 14/7/25.

5

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn(3/3)-PWR/Bypass

PWWAA LA6841P M/B

6 44Monday, August 1 6, 2010

1

0.1

of

5

4

3

2

1

U3A

H_D#[0..63 ]< 5>

D D

C C

Layout Note: H_RCOMP / +H_VREF / H_SWNG

trace width and spa cing is 10/20

within 100 mils from NB

+1.05VS+1.05VS

12

B B

R21

R21 1K_0402 _1%

1K_0402 _1%

12

R23

R23 2K_0402 _1%

2K_0402 _1%

1

C52

0.1U_040 2_16V4Z

@

2

H_RCOMP+H_VREF

12

R24

24.9_040 2_1%

12

R22

R22 221_040 2_1%

221_040 2_1%

H_SWING=0.3125* VCCP

12

R25

R25 100_040 2_1%

100_040 2_1%

H_SW NG

1

2

C53

0.1U_040 2_16V4Z

H_RESET #<4>

H_CPUSL P#<5>

Near B3 pin

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SW NG H_RCOMP

+H_VREF

U3A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA ES _FCBGA1329

GM45R3@

H_ADSTB#_0 H_ADSTB#_1

H_BREQ#

H_DEFER#

HOST

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_HIT#

H_HITM#

H_RS#_0 H_RS#_1 H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_A#[3..35 ] <4>

H_ADS# <4> H_ADSTB #0 <4> H_ADSTB #1 <4>

H_BNR# <4> H_BPRI# <4>

H_BR0# <4 > H_DEFER # <4>

H_DBSY# <4>

CLK_MCH _BCLK <16> CLK_MCH _BCLK# <16>

H_DPW R# <5>

H_DRDY# <4> H_HIT# <4> H_HITM# <4>

H_LOCK# <4>

H_TRDY# <4>

H_DINV#0 <5> H_DINV#1 <5> H_DINV#2 <5> H_DINV#3 <5>

H_DSTBN #0 <5 > H_DSTBN #1 <5 > H_DSTBN #2 <5 > H_DSTBN #3 <5 >

H_DSTBP #0 <5> H_DSTBP #1 <5> H_DSTBP #2 <5> H_DSTBP #3 <5>

H_REQ#0 <4> H_REQ#1 <4> H_REQ#2 <4> H_REQ#3 <4> H_REQ#4 <4>

H_RS#0 <4> H_RS#1 <4> H_RS#2 <4>

A A

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH(1/7)-GTL

PWWAA LA6841P M/B

7 44Monday, August 1 6, 2010

1

0.1

of

Strap Pin Table

5

011 = FSB667

CFG[2:0]

Internal pull-u p

CFG5

Internal pull-u p

CFG6

D D

C C

B B

+3VS

A A

Internal pull-u p

CFG7

Internal pull-u p

CFG9

Internal pull-u p

CFG10

CFG[13:12]

Internal pull-u p

CFG16

Internal pull-d own

CFG19

CFG20

Internal pull-d own

(PCIE/SDVO select)

1 2

R52 10K_0402_5%R52 10K_0402_5%

ICH_PWROK<21,30>

010 = FSB800 000 = FSB1067

0 = DMI x 2 1 = DMI x 4

0 = iTPM Host Interface is enabled

1 = iTPM Host Interface is Disabled

0 = Intel Management Engine Crypto Transport Layer Security (TLS) cipher suite with no confidentiality

1 = Intel Management Engine Crypto TLS cipher suite with confidentiality

0 = Lane Reversal Enable

0 = PCIe Loopback Enable 1 = Disable

01 = All Z Mode Enabled 00 = Reserved 10 = XOR Mode Enabled 11 = Normal Operation

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled

0 = Normal Operation 1 = DMI Lane Reversal Enable

(Default)

*

(Default)

*

(Default)

*

(Default)1 = Normal Operation

*

(Default)

*

can support disble by SW.

(Default)

*

(Default)

*

0 = Only PCIE or [SDVO/DP/HDMI] is operational.

1 = PCIE/[SDVO/DP/HDMI] are operating simu.

R35 1K_0402_5%R35 1K_0402_5% R36 1K_0402_5%R36 1K_0402_5% R37 1K_0402_5%R37 1K_0402_5%

R39 2.21K_0402_1%@R39 2.21K_0402_1%@ R40 2.21K_0402_1%@R40 2.21K_0402_1%@ R43 2.21K_0402_1%@R43 2.21K_0402_1%@

R44 2.21K_0402_1%@R44 2.21K_0402_1%@ R45 2.21K_0402_1%@R45 2.21K_0402_1%@

R46 2.21K_0402_1%@R46 2.21K_0402_1%@ R47 2.21K_0402_1%@R47 2.21K_0402_1%@

+3VS

R48 2.21K_0402_1%@R48 2.21K_0402_1%@

R49 4.02K_0402_1%R49 4.02K_0402_1% R50 4.02K_0402_1%@R50 4.02K_0402_1%@

R51 0_0402_5%R51 0_0402_5%

R53 0_0402_5%R53 0_0402_5%

R54 100_0402_5%R54 100_0402_5% R55 0_0402_5%R55 0_0402_5% R56 0_0402_5%R56 0_0402_5%

GMCH_PWROK

1 2 1 2 1 2

1 2 1 2

1 2

1 2 1 2

1 2

1 2 1 2 1 2

PM_EXTTS#_R

Use VGATE for GMCH_PWROK

VGATE<21,30,40>

5

CPU_BSEL0<5,16> CPU_BSEL1<5,16> CPU_BSEL2<5,16>

PM_SYNC#<21>

PM_EXTTS#<14,15>

PLT_RST#<19,25,26,30,31> H_THERMTRIP#<4,20> PM_DPRSLPVR<21,40>

1 2

R58 0_0402_5%@R58 0_0402_5%@

1 2

R59 0_0402_5%R59 0_0402_5%

4

U3B

M36

RSVD1

N36

RSVD2

R33

RSVD3

T33

RSVD4

AH9

RSVD5

AH10

RSVD6

AH12

RSVD7

AH13

RSVD8

K12

RSVD9

PAD

AL34

RSVD10

AK34

RSVD11

AN35

RSVD12

T18

AM35

RSVD13

T24

RSVD14

B31

RSVD15

B2

RSVD16

M1

RSVD17

AY21

RSVD20

BG23

RSVD22

BF23

RSVD23

BH18

RSVD24

BF18

RSVD25

(Default)

*

4

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

T14 PADT14 PAD T15 PADT15 PAD

T16 PADT16 PAD

PM_SYNC#_R

PM_EXTTS#_R GMCH_PWROK MCH_RSTIN# NB_THERMTRIP# DPRSLPVR

MCH_CFG_5 MCH_CFG_6 MCH_CFG_7

MCH_CFG_9 MCH_CFG_10

MCH_CFG_12 MCH_CFG_13

MCH_CFG_16

MCH_CFG_19 MCH_CFG_20

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

CANTIGA ES_FCBGA1329

GM45R3@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12 12 12

H_DPRSTP#<5,20,40>

3

AP24

SA_CK_0

AT21

SA_CK_1

AV24

SB_CK_0

AU20

SB_CK_1

AR24

SA_CK#_0

AR21

SA_CK#_1

AU24

SB_CK#_0

AV20

SB_CK#_1

BC28

SA_CKE_0

AY28

SA_CKE_1

AY36

SB_CKE_0

BB36

SB_CKE_1

BA17

SA_CS#_0

AY16

SA_CS#_1

AV16

SB_CS#_0

AR13

SB_ODT_O

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_PWROK

SM_DRAMRST#

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

CL_PWROK

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

ICH_SYNC#

HDA_BCLK HDA_RST#

HDA_SYNC

3

SB_CS#_1

BD17

SA_ODT_0

AY17

SA_ODT_1

BF15 AY13

SB_ODT_1

SM_VREF

SM_REXT

PEG_CLK

CL_CLK

CL_DATA

CL_RST#

CL_VREF

CLKREQ#

TSATN#

HDA_SDI

HDA_SDO

2009/06/12 2010/06/12

SMRCOMP

BG22

SMRCOMP#

BH21

+SM_RCOMP_VOH

BF28

+SM_RCOMP_VOL

BH28

+SM_VREF

AV42 AR36

SM_REXT

BF17 BC36

CLK_DREF_96M

B38

CLK_DREF_96M#

A38

CLK_DREF_SSC

E41

CLK_DREF_SSC#

F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36

ICH_PWROK

AN36 AJ35

+CL_VREF

AH34

+CL_VREF=0.355V

N28 M28

SDVO_SCLK

G36 E36 K36 H36

MCH_TSATN#

B12

B28 B30 B29 C29 A28

T17 PADT17 PAD

Compal Secret Data

RSVD CFG PM NC

DDR CLK/ CONTROL/ COMPENSATIONHDA

CLKDMIGRAPHICS VIDMEMISC

DDRA_CLK0 <14> DDRA_CLK1 <14> DDRB_CLK0 <15> DDRB_CLK1 <15>

DDRA_CLK0# <14> DDRA_CLK1# <14> DDRB_CLK0# <15> DDRB_CLK1# <15>

DDRA_CKE0 <14> DDRA_CKE1 <14> DDRB_CKE0 <15> DDRB_CKE1 <15>

DDRA_SCS0# <14> DDRA_SCS1# <14> DDRB_SCS0# <15> DDRB_SCS1# <15>

DDRA_ODT0 <14> DDRA_ODT1 <14> DDRB_ODT0 <15> DDRB_ODT1 <15>

R29 80.6_0402_1%R29 80.6_0402_1%

1 2

R30 80.6_0402_1%R30 80.6_0402_1%

1 2

DDR3_SM_PWROK <3 8>

1 2

R33 499_0402_1%R33 499_0402_1%

SM_DRAMRST# <14,15>

CLK_DREF_96M <16> CLK_DREF_96M# <16> CLK_DREF_SSC <16> CLK_DREF_SSC# <16>

CLK_MCH_3GPLL <16> CLK_MCH_3GPLL# <16>

DMI_ITX_MRX_N0 <19> DMI_ITX_MRX_N1 <19> DMI_ITX_MRX_N2 <19> DMI_ITX_MRX_N3 <19>

DMI_ITX_MRX_P0 <19> DMI_ITX_MRX_P1 <19> DMI_ITX_MRX_P2 <19> DMI_ITX_MRX_P3 <19>

DMI_MTX_IRX_N0 <19> DMI_MTX_IRX_N1 <19> DMI_MTX_IRX_N2 <19> DMI_MTX_IRX_N3 <19>

DMI_MTX_IRX_P0 <19> DMI_MTX_IRX_P1 <19> DMI_MTX_IRX_P2 <19> DMI_MTX_IRX_P3 <19>

CL_CLK0 <21> CL_DATA0 <21>

CL_RST#0 <21>

CLKREQ_3GPLL# <16>

MCH_ICH_SYNC# <21>

Deciphered Date

2

SM_DRAMRST# would be needed for DDR3 only

For Cantiga 80 Ohm

+1.5V +1.5V

20mil

1

C58

0.1U_0402_16V4Z

2

@

Lane reversal

SDVO_CTRLDATA

(Internal pull-down)

Width:Spacing 12mil:12mil

1

C59

0.1U_0402_16V4Z

2

+SM_RCOMP_VOH

C54

0.01U_0402_16V7K

+SM_RCOMP_VOL

C56

0.01U_0402_16V7K

R31

R31 1K_0402_1%

1K_0402_1%

1 2

R34

R34 1K_0402_1%

1K_0402_1%

1 2

+1.05VS

12

R38

R38 1K_0402_5%

1K_0402_5%

B

2

E

3 1

C

Q7

Q7 MMBT3904_SOT23-3

MMBT3904_SOT23-3

54.9_0402_1%

MCH_TSATN#

12

R41

Strap Pin Table

0 = SDVO interface disabled 1 = SDVO interface enabled

0 = Digital display (iHDMI/DP) interface disabled 1 = Digital display (iHDMI/DP) interface enabled

+1.05VS

R57

1K_0402_1%

CL_VREF

1 2

should be

0.35 V

R60

499_0402_1%

1 2

SDVO_SCLK

R61 2.2K_0402_5%R61 2.2K_0402_5%

Title

Size Document Number Rev

Date: Sheet

(Default)

*

+3VS

12

Compal Electronics, Inc.

Cantiga GMCH(2/7)-GTL

PWWAA LA6841P M/B

1

2

1

2

1

1K_0402_1%

1

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C55

C55

2

3.01K_0402_1%

1

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C57

C57

1K_0402_1%

2

+3VS

12

R42

R42 1K_0402_5%

1K_0402_5%

*

1

+1.5V

12

R26

12

R27

12

R28

MCH_TSATN_EC# <30>

(Default)DDPC_CTRLDATA

of

8 44Monday, August 16, 2010

of

8 44Monday, August 16, 2010

of

8 44Monday, August 16, 2010

0.1

5

D D

DDR_A_D [0..63]<14 > DDR_B_D [0..63]<15 >

C C

B B

DDR_A_D 0 DDR_A_D 1 DDR_A_D 2 DDR_A_D 3 DDR_A_D 4 DDR_A_D 5 DDR_A_D 6 DDR_A_D 7 DDR_A_D 8 DDR_A_D 9 DDR_A_D 10 DDR_A_D 11 DDR_A_D 12 DDR_A_D 13 DDR_A_D 14 DDR_A_D 15 DDR_A_D 16 DDR_A_D 17 DDR_A_D 18 DDR_A_D 19 DDR_A_D 20 DDR_A_D 21 DDR_A_D 22 DDR_A_D 23 DDR_A_D 24 DDR_A_D 25 DDR_A_D 26 DDR_A_D 27 DDR_A_D 28 DDR_A_D 29 DDR_A_D 30 DDR_A_D 31 DDR_A_D 32 DDR_A_D 33 DDR_A_D 34 DDR_A_D 35 DDR_A_D 36 DDR_A_D 37 DDR_A_D 38 DDR_A_D 39 DDR_A_D 40 DDR_A_D 41 DDR_A_D 42 DDR_A_D 43 DDR_A_D 44 DDR_A_D 45 DDR_A_D 46 DDR_A_D 47 DDR_A_D 48 DDR_A_D 49 DDR_A_D 50 DDR_A_D 51 DDR_A_D 52 DDR_A_D 53 DDR_A_D 54 DDR_A_D 55 DDR_A_D 56 DDR_A_D 57 DDR_A_D 58 DDR_A_D 59 DDR_A_D 60 DDR_A_D 61 DDR_A_D 62 DDR_A_D 63

U3D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA ES _FCBGA1329

GM45R3@

DDR SYSTEM MEMORY A

4

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

BD21 BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7

AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

DDR_A_D M0 DDR_A_D M1 DDR_A_D M2 DDR_A_D M3 DDR_A_D M4 DDR_A_D M5 DDR_A_D M6 DDR_A_D M7

DDR_A_D QS0 DDR_A_D QS1 DDR_A_D QS2 DDR_A_D QS3 DDR_A_D QS4 DDR_A_D QS5 DDR_A_D QS6 DDR_A_D QS7

DDR_A_D QS#0 DDR_A_D QS#1 DDR_A_D QS#2 DDR_A_D QS#3 DDR_A_D QS#4 DDR_A_D QS#5 DDR_A_D QS#6 DDR_A_D QS#7

DDR_A_M A0 DDR_A_M A1 DDR_A_M A2 DDR_A_M A3 DDR_A_M A4 DDR_A_M A5 DDR_A_M A6 DDR_A_M A7 DDR_A_M A8

DDR_A_M A9 DDR_A_M A10 DDR_A_M A11 DDR_A_M A12 DDR_A_M A13 DDR_A_M A14

DDR_A_B S0 <14> DDR_A_B S1 <14> DDR_A_B S2 <14>

DDR_A_R AS# <14> DDR_A_C AS# <14> DDR_A_W E# <14>

DDR_A_D M[0..7] <14>

DDR_A_D QS[0..7] <14>

DDR_A_D QS#[0..7] <14>

DDR_A_M A[0..14] <14>

3

U3E

DDR_B_D 0 DDR_B_D 1 DDR_B_D 2 DDR_B_D 3 DDR_B_D 4 DDR_B_D 5 DDR_B_D 6 DDR_B_D 7 DDR_B_D 8 DDR_B_D 9 DDR_B_D 10 DDR_B_D 11 DDR_B_D 12 DDR_B_D 13 DDR_B_D 14 DDR_B_D 15 DDR_B_D 16 DDR_B_D 17 DDR_B_D 18 DDR_B_D 19 DDR_B_D 20 DDR_B_D 21 DDR_B_D 22 DDR_B_D 23 DDR_B_D 24 DDR_B_D 25 DDR_B_D 26 DDR_B_D 27 DDR_B_D 28 DDR_B_D 29 DDR_B_D 30 DDR_B_D 31 DDR_B_D 32 DDR_B_D 33 DDR_B_D 34 DDR_B_D 35 DDR_B_D 36 DDR_B_D 37 DDR_B_D 38 DDR_B_D 39 DDR_B_D 40 DDR_B_D 41 DDR_B_D 42 DDR_B_D 43 DDR_B_D 44 DDR_B_D 45 DDR_B_D 46 DDR_B_D 47 DDR_B_D 48 DDR_B_D 49 DDR_B_D 50 DDR_B_D 51 DDR_B_D 52 DDR_B_D 53 DDR_B_D 54 DDR_B_D 55 DDR_B_D 56 DDR_B_D 57 DDR_B_D 58 DDR_B_D 59 DDR_B_D 60 DDR_B_D 61 DDR_B_D 62 DDR_B_D 63

U3E

AK47 AH46 AP47 AP46

AJ46

AJ48 AM48 AP48 AU47 AU46 BA48 AY48

AT47 AR47 BA47 BC47 BC46 BC44 BG43

BF43 BE45 BC41

BF40

BF41 BG38

BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BG8

BH12

BF11

BF8 BG7 BC5 BC6 AY3 AY1

BF6

BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1

AL1

AL2

AJ1 AH1 AM2 AM3 AH3

AJ3

CANTIGA ES _FCBGA1329

GM45R3@

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

2

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

DDR_B_D M0

AM47

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2

DDR SYSTEM MEMORY B

SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6

DDR_B_D QS#0

AL46

DDR_B_D QS#1

AV47

DDR_B_D QS#2

BH41

DDR_B_D QS#3

BH37

DDR_B_D QS#4

BG9

DDR_B_D QS#5

BC2

DDR_B_D QS#6

AT2

DDR_B_D QS#7

AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDR_B_D M1 DDR_B_D M2 DDR_B_D M3 DDR_B_D M4 DDR_B_D M5 DDR_B_D M6 DDR_B_D M7

DDR_B_D QS0 DDR_B_D QS1 DDR_B_D QS2 DDR_B_D QS3 DDR_B_D QS4 DDR_B_D QS5 DDR_B_D QS6 DDR_B_D QS7

DDR_B_M A0 DDR_B_M A1 DDR_B_M A2 DDR_B_M A3 DDR_B_M A4 DDR_B_M A5 DDR_B_M A6 DDR_B_M A7 DDR_B_M A8

DDR_B_M A9 DDR_B_M A10 DDR_B_M A11 DDR_B_M A12 DDR_B_M A13 DDR_B_M A14

1

DDR_B_B S0 <15> DDR_B_B S1 <15> DDR_B_B S2 <15>

DDR_B_R AS# <15> DDR_B_C AS# <15> DDR_B_W E# <15>

DDR_B_D M[0..7] <15>

DDR_B_D QS[0..7] <15>

DDR_B_D QS#[0..7] <15>

DDR_B_M A[0..14] <15>

A A

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH(3/7)-GTL

PWWAA LA6841P M/B

9 44Monday, August 1 6, 2010

1

0.1

of

5

4

3

2

1

+3VS

1 2

R64 10K_040 2_5%R64 10K_ 0402_5%

1 2

R66 10K_040 2_5%R66 10K_ 0402_5%

1 2

R67 2.2K_040 2_5%R67 2.2K_ 0402_5%

1 2

R68 2.2K_040 2_5%R68 2.2K_ 0402_5%

D D

LCTLA_C LK

LCTLB_D ATA

UMA_LCD _EDID_CLK

UMA_LCD _EDID_DATA

L_DDC_DATA

(Default)0 = LFP Disable

1 = LFP Card Present; PCIE disable

C C

R73 15 0_0402_1%R73 150 _0402_1%

R74 15 0_0402_1%R74 150 _0402_1%

R75 15 0_0402_1%R75 150 _0402_1%

+3VS

B B

*

1 2

R70 75 _0402_1%R 70 75_0402_ 1%

1 2

R71 75 _0402_1%R 71 75_0402_ 1%

1 2

R72 75 _0402_1%R 72 75_0402_ 1%

1 2

R76 2.2 K_0402_5%R76 2 .2K_0402_5%

1 2

R77 2.2 K_0402_5%R77 2 .2K_0402_5%

1 2

TV_COMP S

TV_LUMA

TV_CRMA

UMA_CRT _B

UMA_CRT _G

UMA_CRT _R

UMA_CRT _CLK

UMA_CRT _DATA

UMA_LCD _EDID_CLK<17> UMA_LCD _EDID_DATA<17>

Reserve

NB_PW M<17> UMA_ENB KL<30>

UMA_ENV DD<17>

R69

2.37K_04 02_1%

2.37K_04 02_1% R501 0_040 2_5%R501 0_040 2_5% R502 0_040 2_5%R502 0_040 2_5%

UMA_LCD _TXCLK-<17> UMA_LCD _TXCLK+<17 >

UMA_LCD _TXOUT0-<17> UMA_LCD _TXOUT1-<17> UMA_LCD _TXOUT2-<17>

UMA_LCD _TXOUT0+<17> UMA_LCD _TXOUT1+<17> UMA_LCD _TXOUT2+<17>

UMA_CRT _B<18 >

UMA_CRT _G<18>

UMA_CRT _R<18>

UMA_CRT _CLK<18> UMA_CRT _DATA<18>

UMA_CRT _HSYNC<18>

R78 1.0 2K_0402_1%R78 1.02K_04 02_1%

UMA_CRT _VSYNC<18>

UMA_LCD _EDID_CLK UMA_LCD _EDID_DATA

1 2

Spacing=20mil

1 2 1 2

TV_COMP S TV_LUMA TV_CRMA

UMA_CRT _B

UMA_CRT _G

UMA_CRT _R

UMA_CRT _CLK UMA_CRT _DATA UMA_CRT _HSYNC UMA_CRT _IREF

12

UMA_CRT _VSYNC

LCTLA_C LK LCTLB_D ATA

UMA_ENV DD

LVDS_IBG

U3C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

LVDS TV VGA

PCI-EXPRESS GRAPHICS

CANTIGA ES _FCBGA1329

GM45R3@

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

within 500 mils

PEG_COM P

T37 T36

H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39

H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40

J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46

J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

1 2

R65 49.9_040 2_1%R65 49.9_040 2_1%

10mils

+1.05VS

A A

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH(4/7)-GTL

PWWAA LA6841P M/B

10 44Monday, August 1 6, 2010

1

0.1

of

5

DDR2,667MHz,2600mA DDR2,800MHz,3000mA

+1.5V

DDR PWR

D D

C C

C78

1

+

2

10U_0805_10V4Z

1

C69

2

390U_2.5V_M_R10

C70

C71

2

0.1U_0402_16V4Z

2

For layout plac ement un-mound C123 and moun d C84

Int. Graphic

1

C225

+

330U_6.3V_M_R15

2

For layout issue to separate 220u*1 to +1.05VS

B B

A A

+1.05VS+1.05VS

10U_0805_10V4Z

1

C85

C86

2

10U_0805_10V4Z

1

C87

2

1U_0402_6.3V4Z

0.47U_0603_10V7K

1

C88

2

1

C89

2

0.1U_0402_16V4Z

Intel:AXG and AXG_NCTF -- 220U*2, ESR 15mOhm

0.1U_0402_16V4Z

1

C90

2

T3PAD T3PAD T4PAD T4PAD

4

U3F

AP33

VCC_SM_1

AN33

VCC_SM_2

BH32

VCC_SM_3

BG32

VCC_SM_4

BF32

VCC_SM_5

BD32

VCC_SM_6

BC32

VCC_SM_7

BB32

VCC_SM_8

BA32

VCC_SM_9

AY32

VCC_SM_10

AW32

VCC_SM_11

AV32

VCC_SM_12

AU32

VCC_SM_13

AT32

VCC_SM_14

AR32

VCC_SM_15

AP32

VCC_SM_16

AN32

VCC_SM_17

BH31

VCC_SM_18

BG31

VCC_SM_19

BF31

VCC_SM_20

BG30

VCC_SM_21

BH29

VCC_SM_22

BG29

VCC_SM_23

BF29

VCC_SM_24

BD29

VCC_SM_25

BC29

VCC_SM_26

BB29

VCC_SM_27

BA29

VCC_SM_28

AY29

VCC_SM_29

AW29

VCC_SM_30

AV29

VCC_SM_31

AU29

VCC_SM_32

AT29

VCC_SM_33

AR29

VCC_SM_34

AP29

VCC_SM_35

BA36

VCC_SM_36/NC

BB24

VCC_SM_37/NC

BD16

VCC_SM_38/NC

BB21

VCC_SM_39/NC

AW16

VCC_SM_40/NC

AW13

VCC_SM_41/NC

AT13

VCC_SM_42/NC

8700mA

Y26

VCC_AXG_1

AE25

VCC_AXG_2

AB25

VCC_AXG_3

AA25

VCC_AXG_4

AE24

VCC_AXG_5

AC24

VCC_AXG_6

AA24

VCC_AXG_7

Y24

VCC_AXG_8

AE23

VCC_AXG_9

AC23

VCC_AXG_10

AB23

VCC_AXG_11

AA23

VCC_AXG_12

AJ21

VCC_AXG_13

AG21

VCC_AXG_14

AE21

VCC_AXG_15

AC21

VCC_AXG_16

AA21

VCC_AXG_17

Y21

VCC_AXG_18

AH20

VCC_AXG_19

AF20

VCC_AXG_20

AE20

VCC_AXG_21

AC20

VCC_AXG_22

AB20

VCC_AXG_23

AA20

VCC_AXG_24

T17

VCC_AXG_25

T16

VCC_AXG_26

AM15

VCC_AXG_27

AL15

VCC_AXG_28

AE15

VCC_AXG_29

AJ15

VCC_AXG_30

AH15

VCC_AXG_31

AG15

VCC_AXG_32

AF15

VCC_AXG_33

AB15

VCC_AXG_34

AA15

VCC_AXG_35

Y15

VCC_AXG_36

V15

VCC_AXG_37

U15

VCC_AXG_38

AN14

VCC_AXG_39

AM14

VCC_AXG_40

U14

VCC_AXG_41

T14

VCC_AXG_42

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA ES_FCBGA1329

GM45R3@

VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC SM

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43

VCC GFX NCTF

VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52

POWER

VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC GFX

VCC SM LF

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

+1.05VS

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

VCCSM_LF1

AV44

VCCSM_LF2

BA37

VCCSM_LF3

AM40

VCCSM_LF4

AV21

VCCSM_LF5

AY5

VCCSM_LF6

AM10

VCCSM_LF7

BB13

0.1U_0402_16V4Z

3

Int. Graphic

1

C91

2

Extnal Graphic: 1210.34mA integrated Graphic: 1930.4mA Intel Management Engine Link:508.12mA

+1.05VS

NB Core,Intel Management Engine Link

1

C72

C73

@+C73

@

+

C74

2

Intel: VCC -- 220U*2, ESR 12mOhm

C93

1

0.22U_0603_10V7K

C92

2

0.1U_0402_16V4Z

C74

2

330U_6.3V_M_R15

10U_0805_10V4Z

1

0.47U_0603_10V7K

C94

2

0.22U_0603_10V7K

0.22U_0402_10V4Z

1

C75

2

C95

1

2

0.1U_0402_16V4Z

1

C77

C76

2

0.22U_0402_10V4Z

C96

1

1U_0402_6.3V4Z

2

1U_0402_6.3V4Z

2

U3G

AG34

VCC_1

AC34

VCC_2

1

2

C97

AB34

VCC_3

AA34

VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7

AM33

VCC_8

AK33

VCC_9

AJ33

VCC_10

AG33

VCC_11

AF33

VCC_12

AE33

VCC_13

AC33

VCC_14

AA33

VCC_15

Y33

VCC_16

W33

VCC_17

V33

VCC_18

U33

VCC_19

AH28

VCC_20

AF28

VCC_21

AC28

VCC_22

AA28

VCC_23

AJ26

VCC_24

AG26

VCC_25

AE26

VCC_26

AC26

VCC_27

AH25

VCC_28

AG25

VCC_29

AF25

VCC_30

AG24

VCC_31

AJ23

VCC_32

AH23

VCC_33

AF23

VCC_34

T32

VCC_35

CANTIGA ES_FCBGA1329

GM45R3@

1

2

VCC CORE

POWER

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28

VCC NCTF

VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

1

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

+1.05VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/06/12 2010/06/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH(5/7)-GTL

PWWAA LA6841P M/B

11 44Monday, August 16, 2010

1

0.1

of

5

+3VS_TVCRT_DACBG +3VS_TVCRT _DAC

D D

10U_FLC-453232-100K_0.25A_10%

220U_B2_2.5VM

KC FBM-L11-160808-121LMT 0603

4.7U_0805_10V4Z

+1.5VS

C C

B B

10U_0805_10V4Z

@

CRT TV

R80

0.01U_0402_25V4Z

12

0_0603_5%

1

C99

0.1U_0402_16V4Z

R81

12

1

+

C108

@

2

R83

12

1

C115

2

PCIe&DMI

1 2

R87 0_0603_5%R87 0_0603_5%

0.1U_0402_16V4Z

Pin AD48 Pin AA48

+3VS_TVCRT_DAC

C135

0.1U_0402_16V4Z

+1.5VS

R95

12

0_0603_5%

1

C139

2

+1.05VS +1.05VS_DHPLL

1 2

0_0402_5%

0.1U_0402_16V4Z

1

C100

Pin B27

2

R81,R82,PN change to SM01000DR00 ,footprint no change

+1.05VS_DPLLA+1.05VS +1.05VS_DPLLB+1.05VS

10U_0805_10V4Z

1

C111

C110

+1.05VS_AHPLL+1.05VS +1.05VS_MPLL+1.05VS

C116

0.1U_0402_16V4Z

Pin AD1

+1.5VS_PEG_BG

C122

Pin F47 Pin L48

2

0.1U_0402_16V4Z

R84

MBK2012121YZF_0805

1

2

1

2

MBK2012121YZF_0805

1 2

R85 0.5_0805_1%R85 0.5_0805_1 %

C114

C114 10U_0805_10V4Z

10U_0805_10V4Z

+1.05VS_PEGPLL

1

C121

0.1U_0402_16V4Z

2

PCIe&DMI

TV

0.01U_0402_25V4Z

1

C136

Pin B24

2

+1.5VS_TVDAC

0.1U_0402_16V4Z

C140

0.01U_0402_25V4Z

R98

TV TV

1

C141

Pin M25 Pin L28

2

C150

Pin AF1

1

+1.5VS

0.1U_0402_16V4Z

+3VS_TVCRT_DACBG

0.01U_0402_25V4Z

1

C102

C101

2

0.1U_0402_16V4Z

R82

10U_FLC-453232-100K_0.25A_10%

220U_B2_2.5VM

12

Pin AE1

0.1U_0402_16V4Z

R96

0_0603_5%

C142

C109

1

C117

2

+1.5VS_QDAC

0.01U_0402_25V4Z

12

1

C143

2

12

@

1U_0402_6.3V4Z

1

2

1

+

2

1

2

4

Pin A25

GNDtoB25

10U_0805_10V4Z

1

C112

C113

2

0.1U_0402_16V4Z

+1.8V_TXLVDS

LVDS

1

C118

C118 1000P_0402_50V7K

1000P_0402_50V7K

2

Pin J48

GND to J47

+1.05VS

R92

1 2

1

0_0603_5%

C155

2

10U_0805_10V4Z

+3VS_TVCRT_DACBG

+3VS

R79

BLM18PG181SN1D_0603

R88

1 2

0_0805_5%

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

C132

2

C98

1

2

2.2U_0603_6.3V4Z

12

1

2

+3VS_TVCRT_DACBG

DDR3

+1.05VS_A_SM

4.7U_0805_10V4Z

1

C125

C124

2

1U_0402_6.3V4Z

DDR3

+1.05VS_A_SM_CK

0.1U_0402_16V4Z

1

C133

C134

2

+1.05VS_PEGPLL

+1.8V_LVDS

+3VS_TVCRT_DAC

+1.05VS_DPLLA

+1.05VS_DPLLB

+1.05VS_AHPLL

+1.05VS_MPLL

+1.8V_TXLVDS

+1.5VS_PEG_BG

+1.05VS_PEGPLL

1

C126

2

Pin AR20

1

2

Pin AP28

+3VS_TVCRT_DAC

R94

1 2

0_0402_5%

+1.5VS_TVDAC

+1.5VS_QDAC

+1.05VS_DHPLL

3

U3H

73mA

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

5mA

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

13.2mA

J48

VCCA_LVDS

J47

VSSA_LVDS

414uA

AD48

VCCA_PEG_BG

50mA

AA48

VCCA_PEG_PLL

667MTs,480mA 800MTs,720mA

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

667MTs,24mA 800MTs,26mA

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NCTF_1

AM26

VCCA_SM_CK_NCTF_2

AM25

VCCA_SM_CK_NCTF_3

AL25

VCCA_SM_CK_NCTF_4

AM24

VCCA_SM_CK_NCTF_5

AL24

VCCA_SM_CK_NCTF_6

AM23

VCCA_SM_CK_NCTF_7

AL23

VCCA_SM_CK_NCTF_8

79mA

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

50mA

A32

VCC_HDA

35mA

M25

VCCD_TVDAC

L28

VCCD_QDAC

157.2mA

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

60.31mA

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA ES_FCBGA1329

GM45R3@

64.8mA

24mA

139.2mA

HDA

500uA

50mA

FSB=1067Mhz,852mA

U13

VTT_1

T13

VTT_2

U12

VTT_3

T12

VTT_4

U11

VTT_5

T11

VTT_6

U10

VTT_7

T10

VTT_8

CRTPLLA LVDSA PEG

VTT

POWER

Host Interface I/O and HSIO

321.35mA

A SM

AXF

DDR2,667MHz,119.85mA DDR2,800MHz,124mA

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

118.8mA

VCC_TX_LVDS

105.3mA

A CK

HV

1782mA

TV

456mA

DMI PEG

VTTLF

LVDS D TV/CRT

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

VCC_HV_1 VCC_HV_2 VCC_HV_3

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

VTTLF1 VTTLF2 VTTLF3

U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

0.47U_0603_10V7K

VTTLF1 VTTLF2 VTTLF3

C147

2

1

C104

0.47U_0603_10V7K

2

+1.05VS_AXF

+1.5V_SM_CK

+1.8V_TXLVDS

+3VS

+1.05VS

1

0.47U_0603_10V7K

2

C148

1

C105

2.2U_0603_6.3V6K

2

1

0.47U_0603_10V7K

2

+1.05VS_AXF

NB I/O

2

C119

C119 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1

C106

4.7U_0805_10V4Z

2

Intel: VTT 270U*1 ESR 12mOhm

Pin B22

+1.5V_SM_CK

DDR2

1

C127

0.1U_0402_16V4Z

2

Pin BF21

+1.8V_TXLVDS +1.8V

LVDS

1

C130

C130 1000P_0402_50V7K

1000P_0402_50V7K

2

Pin K47

R93

R93 10_0603_5%

10_0603_5%

1

C137

0.1U_0402_16V4Z

Pin C35

2

+1.05VS

10U_0805_10V4Z

1

C144

2

10U_0805_10V4Z

Pin V48

+1.05VS

1

C149

2

1

C151

0.1U_0402_16V4Z

2

Pin AH48

AGTL+

C107

4.7U_0805_10V4Z

R86

1 2

0_0603_5%

1

C120

C120 10U_0805_10V4Z

10U_0805_10V4Z

2

@

10U_0805_10V4Z

1

2

12

PCIe&DMI

1

C145

2

PCIe&DMI

1

+1.05VS

1

C103

@+C103

@

+

2

330U_6.3V_M_R15

+1.05VS

R89

1 2

0_0805_5%

1

C128

R90

10U_0805_10V4Z

1_0805_1%

2

@

C129

1 2

R91

1 2

0_0603_5%

C131

C131 10U_0805_10V4Z

10U_0805_10V4Z

D3

21

+1.05VS+3VS

CH751H-40PT_SOD323-2

+1.5V

+1.05VS

A A

BLM18PG121SN1D_0603

R100

1_0805_1%

L1

12

PCIe&DMI

+1.05VS_PEGPLL

0.1U_0402_16V4Z

C154

12

10U_0805_10V4Z

5

C152

1

2

Pin AA47

+1.8V

R99

0_0603_5%

+1.8V_LVDS

12

C153

1U_0402_6.3V4Z

LVDS

1

2

Pin M38

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/12 2010/06/12

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Crestline GMCH (6/7)-VCC

PWWAA LA6841P M/B

12 44Monday, August 16, 2010

1

of

0.1

5

U3I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

VSS_9

AB47

VSS_10

Y47

VSS_11

T47

BD46 BA46

AY46 AV46 AR46

AM46

BF44 AH44 AD44 AA44

BC43 AV43 AU43

AM43

BG42

AY42

AT42 AN42

AJ42 AE42

BD41 AU41

AM41

AH41 AD41 AA41

BG40 BB40 AV40 AN40

AT39

AM39

AJ39 AE39

BH38 BC38 BA38 AU38 AH38 AD38 AA38

BF37 BB37

AW37

AT37 AN37

AJ37

BG36 BD36 AK15 AU36

N47

G47

V46 R46 P46 H46 F46

Y44 U44 T44 M44 F44

C43

N42

Y41 U41 T41 M41 G41 B41

H40 E40

N39

B39

Y38 U38 T38

F38 C38

H37 C37

VSS_12 VSS_13

L47

VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39

J43

VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48

L42

VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72

L39

VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84

J38

VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

VSS

CANTIGA ES_FCBGA1329

GM45R3@

D D

C C

B B

A A

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

4

3

U3J

BG21

AW21

AU21 AP21 AN21 AH21 AF21 AB21

BC20 BA20

AW20

AT20

AJ20

AG20

BG19

BG17 BC17

AW17

AT17

BA16

AU16 AN16

BG15 AC15

W15

BG14 AA14

BG13 BC13 BA13

AN13

AJ13

AE13

BF12 AV12 AT12 AM12 AA12

BD11 BB11 AY11 AN11 AH11

BG10 AV10 AT10

AJ10 AE10 AA10

AM9

R21 M21

G21

N20 K20

C20 A20

A18

R17 M17 H17 C17

N16 K16 G16 E16

A15

C14

N13

G13 E13

A12

N11 G11 C11

M10 BF9 BC9 AN9

AD9

BH8 BB8 AV8 AT8

VSS_199

L12

VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209

J21

VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217

Y20

VSS_218 VSS_219 VSS_220

F20

VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233

VSS_235

VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252

VSS_255 VSS_256 VSS_257 VSS_258

L13

VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266

J12

VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273

Y11

VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290

G9

VSS_291

B9

VSS_292 VSS_293 VSS_294 VSS_295 VSS_296

VSS

CANTIGA ES_FCBGA1329

GM45R3@

VSS NCTF

VSS SCB

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5

NC

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/06/12 2010/06/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH(1/7)-GTL

PWWAA LA6841P M/B

13 44Monday, August 16, 2010

1

0.1

of

5

JDDRH

+V_DDR3 _DIMM_REF

DDR_A_D 0

1

CD1

CD2

2

0.1U_0402_16V4Z

D D

close to JDDRH.1

DDR_A_D 1

1

DDR_A_D M0

2

DDR_A_D 2 DDR_A_D 3

2.2U_0603_6.3V4Z

DDR_A_D 8 DDR_A_D 9

DDR_A_D QS#1 DDR_A_D QS1

DDR_A_D 10 DDR_A_D 11

DDR_A_D 16 DDR_A_D 17

DDR_A_D QS#2 DDR_A_D QS2

DDR_A_D 18 DDR_A_D 19

DDR_A_D 24 DDR_A_D 25

DDR_A_D M3

DDR_A_D 26 DDR_A_D 27

JDDRH

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1

29

DQS1

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25

61

VSS22

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

VSS10

DM1

RESET#

VSS12

DQ14 DQ15

VSS14

DQ20 DQ21

VSS16

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS#3

DQS3

VSS24

DQ30 DQ31

VSS26

4

2

DDR_A_D 4

4

DDR_A_D 5

6 8

DDR_A_D QS#0

10

DDR_A_D QS0

12 14

DDR_A_D 6

16

DDR_A_D 7

18 20

DDR_A_D 12

22

DDR_A_D 13

24 26

DDR_A_D M1

28 30 32

DDR_A_D 14

34

DDR_A_D 15

36 38

DDR_A_D 20

40

DDR_A_D 21

42 44

DDR_A_D M2

46 48

DDR_A_D 22

50

DDR_A_D 23

52 54

DDR_A_D 28

56

DDR_A_D 29

58 60

DDR_A_D QS#3

62

DDR_A_D QS3

64 66

DDR_A_D 30

68

DDR_A_D 31

70 72

SM_DRAM RST# <8,15 >

DDR3 SO-DIMM A REVERSE TYPE

3

1K_0402 _1%

2

DDR_A_D QS[0..7] <9>

DDR_A_D QS#[0..7] <9>

DDR_A_D [0..63] <9>

DDR_A_D M[0..7] <9>

DDR_A_M A[0..14] <9>

+1.5V

12

RD1

12

RD2

1

+V_DDR3 _DIMM_REF

C C

B B

A A

+1.5V +1.5V

+3VS

CD5

DDRA_CK E0<8> DDRA_CK E1 <8>

DDR_A_B S2<9>

DDR_A_M A12 DDR_A_M A9

DDR_A_MA8 DDR_A_M A5

DDR_A_M A3 DDR_A_M A1

DDRA_CL K0<8 > DDRA_CL K0#<8>

DDR_A_B S0<9>

DDR_A_W E#<9>

DDR_A_C AS#<9>

DDRA_SC S1#<8>

1

CD6

2

2.2U_0603_6.3V4Z

DDR_A_M A10

DDR_A_M A13

DDR_A_D 32 DDR_A_D 33

DDR_A_D QS#4 DDR_A_D QS4

DDR_A_D 34 DDR_A_D 35

DDR_A_D 40 DDR_A_D 41

DDR_A_D M5

DDR_A_D 42 DDR_A_D 43

DDR_A_D 48 DDR_A_D 49

DDR_A_D QS#6 DDR_A_D QS6

DDR_A_D 50 DDR_A_D 51

DDR_A_D 56 DDR_A_D 57

DDR_A_D M7

DDR_A_D 58 DDR_A_D 59

RD3

1 2

10K_040 2_5%

1

RD5

2

0.1U_0402_16V4Z

5

12

+0.75VS

10K_0402_5%

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LOTES_A AA-DDR-111-K01

CONN@

CKE1

VDD2

A15 A14

VDD4

A11

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA SCL

VTT2

74 76 78 80 82 84 86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

G2

RD6

1 2

DDR_A_M A14

DDR_A_MA11 DDR_A_M A7

DDR_A_MA6 DDR_A_M A4

DDR_A_M A2 DDR_A_M A0

+DDR_VR EF_CA_DIMMA

DDR_A_D 36 DDR_A_D 37

DDR_A_D M4

DDR_A_D 38 DDR_A_D 39

DDR_A_D 44 DDR_A_D 45

DDR_A_D QS#5 DDR_A_D QS5

DDR_A_D 46 DDR_A_D 47

DDR_A_D 52 DDR_A_D 53

DDR_A_D M6

DDR_A_D 54 DDR_A_D 55

DDR_A_D 60 DDR_A_D 61

DDR_A_D QS#7 DDR_A_D QS7

DDR_A_D 62 DDR_A_D 63

PM_EXTT S# <8,1 5> PM_SMBD ATA <15 ,16,21,25> PM_SMBC LK <15 ,16,21,25>

+0.75VS

4

0_0402_ 5%@

DDRA_CL K1 <8> DDRA_CL K1# <8>

DDR_A_B S1 <9> DDR_A_R AS# <9>

DDRA_SC S0# <8> DDRA_OD T0 <8>

RD4

DDRA_OD T1 <8>

0_0402_ 5%

CD4

2.2U_0603_6.3V4Z

1 2

1

CD3

2

+V_DDR3 _DIMM_REF

1

2

0.1U_0402_16V4Z

close to JDDRH.126

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Layout Note: Place near JDDRH

+1.5V

10U_0805_6.3V6M

1

CD7

CD8

@

2

Layout Note: Place near JDDRH.203 & JDDRH.204

Compal Secret Data

Deciphered Date

10U_0805_6.3V6M

1

CD9

@

2

+0.75VS

2

1

CD18 1U_0402_6.3V4ZCD18 1U_0402_6.3V4Z

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

0.1U_0402_16V4Z

10U_0805_6.3V6M

1

CD11

CD10

@

2

@

2

1

CD20 1U_0402_6.3V4ZCD20 1U_0402_6.3V4Z

CD19 1U_0402_6.3V4ZCD19 1U_0402_6.3V4Z

2

0.1U_0402_16V4Z

10U_0805_6.3V6M

CD13

1

CD12

@

2

1

2

10U_0805_6.3V6M

1

CD22

@

2

CD21 1U_0402_6.3V4ZCD21 1U_0402_6.3V4Z

Date: Sheet

0.1U_0402_16V4Z

CD15

CD14

1

2

Title

Size Document N umber Rev

1

2

Compal Electronics, Inc.

DDRII-SODIMM0

PWWAA LA6841P M/B

1

CD16

+

CD45

@+CD45

@

330U_6.3 V_M_R15

2

of

14 44Monday, August 1 6, 2010

of

14 44Monday, August 1 6, 2010

of

14 44Monday, August 1 6, 2010

1

0.1

A

JDDRL

+V_DDR3 _DIMM_REF

DDR_B_D 0 DDR_B_D 1

1

CD24

CD23

2

0.1U_0402_16V4Z

1 1

close to JDDRL.1

DDR_B_D M0

2

DDR_B_D 2 DDR_B_D 3

2.2U_0603_6.3V4Z

DDR_B_D 8 DDR_B_D 9

DDR_B_D QS#1 DDR_B_D QS1

DDR_B_D 10 DDR_B_D 11

DDR_B_D 16 DDR_B_D 17

DDR_B_D QS#2 DDR_B_D QS2

DDR_B_D 18 DDR_B_D 19

DDR_B_D 24 DDR_B_D 25

DDR_B_D M3

DDR_B_D 26 DDR_B_D 27

JDDRL

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1

29

DQS1

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25

61

VSS22

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

RESET#

VSS12

DQ14 DQ15

VSS14

DQ20 DQ21

VSS16

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS#3

DQS3

VSS24

DQ30 DQ31

VSS26

B

2

DDR_B_D 4

4

DDR_B_D 5

6 8

DDR_B_D QS#0

10

DDR_B_D QS0

12 14

DDR_B_D 6

16

DDR_B_D 7

18 20

DDR_B_D 12

22

DDR_B_D 13

24 26

DDR_B_D M1

28 30 32

DDR_B_D 14

34

DDR_B_D 15

36 38

DDR_B_D 20

40

DDR_B_D 21

42 44

DDR_B_D M2

46 48

DDR_B_D 22

50

DDR_B_D 23

52 54

DDR_B_D 28

56

DDR_B_D 29

58 60

DDR_B_D QS#3

62

DDR_B_D QS3

64 66

DDR_B_D 30

68

DDR_B_D 31

70 72

SM_DRAM RST# <8,14 >

DDR3 SO-DIMM B REVERSE TYPE

C

D

DDR_B_D QS[0..7] <9>

DDR_B_D QS#[0..7] <9>

DDR_B_D [0..63] <9>

DDR_B_D M[0..7] <9>

DDR_B_M A[0..14] <9>

E

2 2

3 3

4 4

+3VS

CD26

DDRB_CK E0<8> DDRB_CK E1 <8>

DDR_B_B S2<9>

DDR_B_M A12 DDR_B_M A9

DDR_B_MA8 DDR_B_M A5

DDR_B_M A3 DDR_B_M A1

DDRB_CL K0<8 > DDRB_CL K0#<8>

DDR_B_B S0<9>

DDR_B_W E#<9>

DDR_B_C AS#<9>

DDRB_SC S1#<8>

1

CD25

2

2.2U_0603_6.3V4Z

DDR_B_M A10

DDR_B_M A13

DDR_B_D 32 DDR_B_D 33

DDR_B_D QS#4 DDR_B_D QS4

DDR_B_D 34 DDR_B_D 35

DDR_B_D 40 DDR_B_D 41

DDR_B_D M5

DDR_B_D 42 DDR_B_D 43

DDR_B_D 48 DDR_B_D 49

DDR_B_D QS#6 DDR_B_D QS6

DDR_B_D 50 DDR_B_D 51

DDR_B_D 56 DDR_B_D 57

DDR_B_D M7

DDR_B_D 58 DDR_B_D 59

RD8

1 2

10K_040 2_5%

1 2

10K_040 2_5%

1

2

0.1U_0402_16V4Z

A

RD9

+0.75VS

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

TYCO_2-201 3289-1

CONN@

CKE1

VDD2

A15 A14

VDD4

A11

VDD6

VDD8

VDD10

CK1 CK1#

VDD12

BA1 RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

74 76 78 80 82 84 86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

G2

RD10

1 2

DDR_B_M A14

DDR_B_MA11 DDR_B_M A7

DDR_B_MA6 DDR_B_M A4

DDR_B_M A2 DDR_B_M A0

+DDR_VR EF_CA_DIMMB

DDR_B_D 36 DDR_B_D 37

DDR_B_D M4

DDR_B_D 38 DDR_B_D 39

DDR_B_D 44 DDR_B_D 45

DDR_B_D QS#5 DDR_B_D QS5

DDR_B_D 46 DDR_B_D 47

DDR_B_D 52 DDR_B_D 53

DDR_B_D M6

DDR_B_D 54 DDR_B_D 55

DDR_B_D 60 DDR_B_D 61

DDR_B_D QS#7 DDR_B_D QS7

DDR_B_D 62 DDR_B_D 63

PM_EXTT S# <8,1 4> PM_SMBD ATA <14 ,16,21,25> PM_SMBC LK <14 ,16,21,25>

+0.75VS

B

0_0402_ 5%@

+1.5V+1.5V

DDRB_CL K1 <8> DDRB_CL K1# <8>

DDR_B_B S1 <9> DDR_B_R AS# <9>

DDRB_SC S0# <8> DDRB_OD T0 <8>

DDRB_OD T1 <8>

1

CD27

CD28

2

2.2U_0603_6.3V4Z

1

2

0.1U_0402_16V4Z

+V_DDR3 _DIMM_REF

RD7

1 2

0_0402_ 5%

Layout Note: Place near JDDRL.203 & JDDRL.204

close to JDDRL.126

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

C

Compal Secret Data

Layout Note: Place near JDDRL

+1.5V

1

CD29

CD30

@

2

22U_0805_6.3V6M

+0.75VS

Deciphered Date

10U_0805_6.3V6M

1

CD31

@

2

1

CD40 1U_0402_6.3V4ZCD40 1U_0402_6.3V4Z

10U_0805_6.3V6M

1

CD32

2

@

22U_0805_6.3V6M

2

1

CD41 1U_0402_6.3V4ZCD41 1U_0402_6.3V4Z

CD42 1U_0402_6.3V4ZCD42 1U_0402_6.3V4Z

D

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

0.1U_0402_16V4Z

10U_0805_6.3V6M

CD38

1

CD34

CD33

2

@

10U_0805_6.3V6M

1

2

CD44

2

1

@

CD43 1U_0402_6.3V4ZCD43 1U_0402_6.3V4Z

CD38

1

2

Title

Size Document N umber Rev

Date: Sheet

0.1U_0402_16V4Z

CD37

CD36

1

2

CD36

1

2

Compal Electronics, Inc.

DDRII-SODIMM0

PWWAA LA6841P M/B

0.1U_0402_16V4Z

CD35

1

2

0.1

of

15 44Monday, August 1 6, 2010

of

15 44Monday, August 1 6, 2010

of

15 44Monday, August 1 6, 2010

E

A

FSC FSB REF

CLKSEL2

CLKSEL1

FSA

CLKSEL0

0

CPU MHz

266

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

1 1

0 1001 166 33.31 14.318 96.0 48.0

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

1 1 1

CLK_XTA L_OUT

Y1

CLK_XTA L_IN

C221

22P_040 2_50V8J

2 2

3 3

4 4

22P_040 2_50V8J

CLK_PCI_D DR< 31>

CLK_ICH

CLK_EC

CPU_BSE L0<5,8>

CPU_BSE L1<5,8>

CPU_BSE L2<5,8>

close to U4 bef or R115 EMI request 6/2 5

0 = SRC8/SRC8# (100MHz) 1 = ITP/ITP# (266MHz) 0 = Enable DOT96 & SRC1(UMA) 1 = Enable SRC0 & 27MHz(DIS)

+3VS +3VS

12

R121

R121 10K_040 2_5%

10K_040 2_5%

@

12

R127

R127 10K_040 2_5%

10K_040 2_5%

A

Y1

1 2

2

14.318MH Z_16PF_7A143 00083

1

R116 2.2 K_0402_5%R116 2.2K_0402 _5%

R109 10 K_0402_5%R109 10 K_0402_5%

2

C854

C854 33P_040 2_50V8J

33P_040 2_50V8J

1

@

CLK_ICH CLK_EC

SRC MHz

1000

2

1

CLK_PCI_E C<30 >

PM

GM

B

PCI MHz

33.30

Reserved

Routing the trace at least 10mil

C220

C220 22P_040 2_50V8J

22P_040 2_50V8J

CLK_FSA

12

CPU_BSE L1

CLK_FSC

12

R113

12

R122

R122 10K_040 2_5%

10K_040 2_5%

@

12

R128

R128 10K_040 2_5%

10K_040 2_5%

B

MHz

14.318 96.0 48.0

2

1

MHz

CLK_48M _ICH<21>

CLK_14M _ICH<21>

1 2

C856

C856 33P_040 2_50V8J

33P_040 2_50V8J

@

place 22ohm for damping resis tor when loading is two device,If one device use 33oh m

CLK_48M _CR<29>

CLK_EC

33_0402 _5%

CLK_PCI_ICH< 19>

DOT_96

C

USB

+1.05VS

MHz

R131 22_0402 _5%R1 31 22_040 2_5%

R117 22_0402 _5%R1 17 22_040 2_5%

1 2

R111 33_04 02_5%R 111 33_0402_5%

1 2

CK_PW RGD<21>

H_STP_C PU#<21>

H_STP_P CI#<2 1>

R115 33_04 02_5%R 115 33_0402_5%

1 2

R112

C

D

R108

1 2

0_0805_ 5%

10U_080 5_10V4Z

+1.05VS_ CK505

12

FSB

1 2

0.1U_040 2_16V4Z

C213

+3VS_CK 505

CLK_FSA

CLK_14ICH

CLK_DDR

Issued Date

1

C214

2

0.1U_040 2_16V4Z

U4

55

VDD_SRC

6

VDD_REF

12

VDD_PCI

72

VDD_CPU

19

VDD_48

27

VDD_PLL3

66

VDD_CPU_IO

31

VDD_PLL3_IO

62

VDD_SRC_IO

52

VDD_SRC_IO

23

VDD_IO

38

VDD_SRC_IO

20

USB_0/FS_A

2

FS_B/TEST_MODE

7

REF_0/FS_C/TEST_

8

REF_1

1

CKPWRGD/PD#

11

NC

53

CPU_STOP#

54

PCI_STOP#

5

XTAL_IN

4

XTAL_OUT

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

3

VSS_REF

22

VSS_48

26

VSS_IO

69

VSS_CPU

30

VSS_PLL3

34

VSS_SRC

59

VSS_SRC

42

VSS_SRC

73

THERMAL_PAD

SLG8SP5 56VTR_QFN72_ 10X10

D

1

2

CPU_BSE L1

CLK_FSC

CLK_XTA L_IN

CLK_XTA L_OUT

CLK_ICH

33_0402 _5%

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10U_080 5_10V4Z

1

2

1

C215

C216

2

2009/06/ 12 2010/06/ 12

E

0.1U_040 2_16V4Z

1

C217

2

0.1U_040 2_16V4Z

Compal Secret Data

E

+1.05VS_ CK505

1

C218

2

0.1U_040 2_16V4Z

SDA

SCL

CPU_0

CPU_0#

CPU_1

CPU_1#

SRC_0/DOT_96

SRC_0#/DOT_96#

LCDCLK/27M

LCDCLK#/27M_SS

SRC_2

SRC_2#

SRC_3

SRC_3#

SRC_4

SRC_4#

SRC_6

SRC_6#

SRC_7

SRC_7#

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

SRC_9

SRC_9#

SRC_10

SRC_10#

SRC_11

SRC_11#

CLKREQ_3#

CLKREQ_4#

CLKREQ_6#

CLKREQ_7#

CLKREQ_9#

SLKREQ_10#

CLKREQ_11#

USB_1/CLKREQ_A#

Deciphered Date

1

C219

2

9

10

71

70

68

67

24

25

28

29

32

33

35

36

39

40

57

56

61

60

64

63

44

45

50

51

48

47

37

41

58

65

43

49

46

21

+3VS

CLKREQ_ SATA#

CLKREQ_ WLAN#

CLKREQ_ 6#

CLKREQ_ 3GPLL#

CLKREQ_ LAN#

CLKREQ_ 10#

CLKREQ_ 11#

R107

1 2

0_0805_ 5%

SRC8_LA N

SRC8_LA N#

SRC9_LA N

SRC9_LA N#

F

+3VS_CK 505

250mA80mA

0.1U_040 2_16V4Z

1

C206

2

10U_080 5_10V4Z

PM_SMBD ATA <14,1 5,21,25>

PM_SMBC LK <14 ,15,21,25>

CLK_CPU _BCLK <4>

CLK_CPU _BCLK# <4>

CLK_MCH _BCLK <7>

CLK_MCH _BCLK# <7>

CLK_DRE F_96M <8>

CLK_DRE F_96M# <8>

CLK_DRE F_SSC <8 >

CLK_DRE F_SSC# < 8>

CLK_PCIE_ ICH <19>

CLK_PCIE_ ICH# <19>

CLK_PCIE_ SATA <20>

CLK_PCIE_ SATA# <20>

CLK_W LAN <25>

CLK_W LAN# <25>

CLK_MCH _3GPLL <8>

CLK_MCH _3GPLL# <8>

R513

1 2

R514

1 2

R511

R512

@R 511

@

1 2

@R 512

@

1 2

Reserve (Check layout)

CLKREQ_ SATA# < 21>

CLKREQ_ WLAN# <25 >

CLKREQ_ 3GPLL# <8>

CLKREQ_ LAN# <26>

Reserve

F

1

C207

2

0.1U_040 2_16V4Z

G

0.1U_040 2_16V4Z

1

C208

2

1

C209

2

0.1U_040 2_16V4Z

1

C210

2

0.1U_040 2_16V4Z

H

1

C211

2

CPU

NB

NB (96MHz)

NB_SSC (100MHz)

ICH-DMI

SATA

WLAN

3G_PLL

0_0402_ 5%

CLKREQ_ SATA#

CLKREQ_ WLAN#

CLKREQ_ 6#

CLKREQ_ 3GPLL#

CLKREQ_ LAN#

CLKREQ_ 10#

CLKREQ_ 11#

Title

Size Document N umber Rev

Date: Sheet

G

CLK_LAN <26>

CLK_LAN # <26 >

R125 10K_0402_ 5%R125 10K_0402_ 5%

R124 10K_0402_ 5%R124 10K_0402_ 5%

R119 10K_0402_ 5%R119 10K_0402_ 5%

R118 10K_0402_ 5%R118 10K_0402_ 5%

R123 10K_0402_ 5%R123 10K_0402_ 5%

R126 10K_0402_ 5%R126 10K_0402_ 5%

R120 10K_0402_ 5%R120 10K_0402_ 5%

Compal Electronics, Inc.

Clock Generator

PWWAA LA6841P M/B

LAN

+3VS

12

16 44Monday, August 1 6, 2010

H

1

C212

0.1U_040 2_16V4Z

2

of

0.1

5

4

3

2

1

LCD/PANEL BD. Conn.

+LCD_VD D

12

D D

2N7002D W-T/R7_SOT3 63-6

UMA_ENV DD<10>

61

Q17A

R626

100K_04 02_5%

R621

R621 150_060 3_5%

150_060 3_5%

2

5

12

+3VS

12

R622

R622 100K_04 02_5%

100K_04 02_5%

0.1U_040 2_16V7K

1 2

R623 47 K_0402_5%R623 47 K_0402_5%

3

0.01U_04 02_25V7K

Q17B

Q17B 2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

4

2

C853

1

2

C671

1

4.7U_080 5_10V4Z

C672

G

@

+3VS

W=60mils

S

Inrush current = 0A

Q18

Q18 AO3413_ SOT23

AO3413_ SOT23

D

1 3

1

2

+LCD_VD D

1

2

W=60mils

C673

0.1U_040 2_16V4Z

+LCDVDD _R

1

C C

+3VS_LV DS_CAM

R8370_04 02_5%C AM@ R8370_04 02_5%C AM@

12

L85

2

USB20_P 11< 19> USB20_N 11<19 >

Camera

B B

2

3

WCM2 012F2SF-900T0 4_0805@

1

4

12

R8410_04 02_5%C AM@ R8410_04 02_5%C AM@

USB20_P 11_R USB20_N 11_R

BKOFF#<30>

+3VS

UMA_LCD _TXOUT0+<10> UMA_LCD _TXOUT0-<10> UMA_LCD _TXOUT1+<10> UMA_LCD _TXOUT1-<10> UMA_LCD _TXOUT2+<10> UMA_LCD _TXOUT2-<10> UMA_LCD _TXCLK+<10 > UMA_LCD _TXCLK-<10>

To prevent EC pin from damage

INVT_PW M< 30> NB_PW M<10>

CAM@

0_0603_ 5%

R104

1 2

R217 0_0402_ 5%R217 0 _0402_5%

1 2

R204 0_0402_ 5%

1 2

@

BKOFF#_ R

R13733_0402 _5% R1 3733_0402 _5%

R627

10K_040 2_5%

0.1U_040 2_16V4Z

1 2

C766

W=20mils

12

INVT_PW M_R

CAM@

JLVDS

@J LVDS

@

112

3

5

7

7 9910 111112

13

14

13

15

16

15

17

18

17

19

20

19

21

22

23

24

23

25

26

27

28

29

30

31

GND1

32

GND2

ACES_88 242-3001

4 6 8

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

68P_040 2_50V8J

UMA_LCD _EDID_CLK <10> UMA_LCD _EDID_DATA <10>

INT_MIC_DATA

INVT_PW M_R

BKOFF#_ R

+3VS

+LCDVDD _R

Rated Current M AX:600mA

1

C391

2

+LCD_INV

1

2

L3

FBMA-L11 -201209-221LMA 30T_0805

C676

0.1U_040 2_25V6

1.5A

L16

12

0_0805_ 5%

C674

0.1U_040 2_16V4Z

12

+LCD_VD D

1

C675

4.7U_080 5_10V4Z

2

B+

INT_MIC_CLK

D84

@D 84

@

2

1

3

PACDN04 2Y3R_SOT23-3

INT_MIC_CLK <27>

INT_MIC_DATA <27>

A A

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

NB9M GDDR2A

PWWAA LA6841P M/B

1

of

17 44Monday, August 1 6, 2010

of

17 44Monday, August 1 6, 2010

of

17 44Monday, August 1 6, 2010

0.1

A

CRT CONNECTOR

1 1

UMA_CRT _R<10>

UMA_CRT _G<1 0>

UMA_CRT _B<10>

12

R671

R672

R670

150_0402_1%

R672

150_0402_1%

B

L18

1 2

NBQ1005 05T-800Y_0402

L19

1 2

NBQ1005 05T-800Y_0402

L20

1 2

NBQ1005 05T-800Y_0402

12

1

C680

C681

2

2.2P_0402_50V8C

150_0402_1%

2.2P_0402_50V8C

1

C682

2

2.2P_0402_50V8C

C683

2.2P_0402_50V8C

1

C684

2

2.2P_0402_50V8C

D55

DAN217_ SC59

@

CRT_R_L

CRT_G_L

CRT_B_L

C685

2.2P_0402_50V8C

C

1

2

3

1

2

2.2P_0402_50V8C

1

D56

DAN217_ SC59

2

3

@

1

D57

DAN217_ SC59

2

3

@

+3VS

D

+5VS

2

3

+CRT_VC C

+CRT_VC C_R +CRT_VCC

D58

RB491D_ SOT23-3

If=1A

CRT_R_L

CRT_DDC _DAT CRT_G_L

HSYNC CRT_B_L

VSYNC

CRT_DDC _CLK

F3

1

21

1.1A_6V_ MINISMDC110F-2

@

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

ALLTO_C 10532-11505-L_ 15P-T

@

30mil

0.1U_040 2_16V4Z

JCRT

E

1

C679

2

6 11 1 7 12 2 8 13 3 9

16

14

G

17

4

G 10 15 5

+CRT_VC C

1 2

C686 0.1U_040 2_16V4ZC 686 0.1U_0 402_16V4Z

UMA_CRT _HSYNC<1 0>

SN74AHC T1G125GW_ SOT353-5

2 2

UMA_CRT _VSYNC<10>

3 3

SN74AHC T1G125GW_ SOT353-5

1

5

P

4

OE#

A2Y

G

U38

3

+CRT_VC C

1

5

P

OE#

A2Y

G

U39

SN74AHC T1G125GW_ SOT353-5

U39

3

12

R673 10K_040 2_5%R673 10K _0402_5%

D_CRT_H SYNC

4

1 2

L21 10_040 2_5%L21 10_0 402_5%

1 2

L22 10_040 2_5%L22 10_0 402_5%

C687

@

HSYNC

VSYNCD_CRT_V SYNC

1

2

1

C688

@

2

10P_0402_50V8J

UMA_CRT _DATA<10>

UMA_CRT _CLK<10>

C850

33P_040 2_50V8K

@

1

2

Q19B

1

C849

C849 33P_040 2_50V8K

33P_040 2_50V8K

2

@

+3VS

2.2K_040 2_5%

2

Q19A

5

2N7002D W-T/R7_SOT3 63-6

3

4

2N7002D W-T/R7_SOT3 63-6

470P_04 02_50V8J

61

R677

C689

@

+CRT_VC C

12

1

2

R678

2.2K_040 2_5%

CRT_DDC _DAT

CRT_DDC _CLK

C690

C690 470P_04 02_50V8J

470P_04 02_50V8J

@

4 4

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

CRT\TV\LVDS

PWWAA LA6841P M/B

18 44Monday, August 1 6, 2010

E

0.1

of

5

4

3

2

1

U9B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

D D

+3VS +3VS

C C

B B

A A

RP18

1 8 2 7 3 6 4 5

8.2K_080 4_8P4R_5%

For LAN

For WLAN

PCI_PIRQA# PCI_PIRQE# PCI_PIRQF# PCI_PIRQH# PCI_REQ#0

PCIE_IRX_C_L ANTX_N3<26> PCIE_IRX_C_L ANTX_P3<26> PCIE_ITX_C_L ANRX_N3<26> PCIE_ITX_C_L ANRX_P3<26>

PCIE_IRX_C_W LANTX_N4<25> PCIE_IRX_C_W LANTX_P4<25> PCIE_ITX_C_W LANRX_N4<25> PCIE_ITX_C_W LANRX_P4<25>

+3VALW

RP21

USB_OC# 4

45

USB_OC# 6

36

USB_OC# 11

27

USB_OC# 10

18

10K_080 4_8P4R_5%

RP22

USB_OC# 5

45

USB_OC# 0

36

USB_OC# 8

27

USB_OC# 2

18

10K_080 4_8P4R_5%

1 2

R183 10K_040 2_5%R183 10K _0402_5%

1 2

R184 10K_040 2_5%R184 10K _0402_5%

1 2

R187 10K_040 2_5%R187 10K _0402_5%

USB_OC# 9

USB_OC# 3

USB_OC# 7

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

C262 0 .1U_0402_16V7 KC262 0.1U_0402_ 16V7K C263 0 .1U_0402_16V7 KC263 0.1U_0402_ 16V7K

C264 0 .1U_0402_16V7 KC264 0.1U_0402_ 16V7K C265 0 .1U_0402_16V7 KC265 0.1U_0402_ 16V7K

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9-M ES_FC BGA676

ICH9R3@

12 12

SPI_CS#1<21>

ICH_SPI_MOSI<21>

USB_OC# 0<23,30>

Within 500 mils

PCI

Interrupt I/F

PCIE_ITX_LAN RX_N3

PCIE_ITX_LAN RX_P3

PCIE_ITX_W LANRX_N4

PCIE_ITX_W LANRX_P4

1 2

R186

22.6_040 2_1%

REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

PCIRST#

DEVSEL#

PLOCK#

FRAME#

PLTRST#

PCICLK

PIRQE#/GPIO2

PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

USB_OC# 2 USB_OC# 3 USB_OC# 4 USB_OC# 5 USB_OC# 6 USB_OC# 7 USB_OC# 8 USB_OC# 9 USB_OC# 10 USB_OC# 11

USBBIAS

REQ0# GNT0#

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PERR#

SERR# STOP# TRDY#

PME#

N29 N28 P27 P26

L29

L28 M27 M26

J29

J28 K27 K26

G29 G28 H27 H26

E29 E28

F27

F26

C29 C28 D27 D26

D23 D24

F23

D25 E23

AG2 AG1

N4 N5 N6 P6

M1

N2 M4 M3

N3

N1

P5

P3

PCI_REQ#0

F1 G4

PCI_REQ#1

B6 A7

PCI_REQ#2

F13 F12

PCI_REQ#3

E6 F6

D8 B4 D6 A5

PCI_IRDY#

D3 E3 R1

PCI_DEVSE L#

C6

PCI_PERR#

E4

PCI_PLOCK #

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME #

D7

C14

CLK_PCI_ICH

D4 R2

PCI_PIRQE#

H4

PCI_PIRQF#

K6

PCI_PIRQG#

F2

PCI_PIRQH#

G2

U9D

PERN1 PERP1 PETN1 PETP1

PERN2 PERP2 PETN2 PETP2

PERN3 PERP3 PETN3 PETP3

PERN4 PERP4 PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6/GLAN_RXN PERP6/GLAN_RXP PETN6/GLAN_TXN PETP6/GLAN_TXP

SPI_CLK SPI_CS0# SPI_CS1#GPIO58/CLGPIO6

SPI_MOSI SPI_MISO

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31 OC8#/GPIO44 OC9#/GPIO45 OC10#/GPIO46 OC11#/GPIO47

USBRBIAS USBRBIAS#

ICH9-M ES_FC BGA676

ICH9R3@

SPI

USB

PCI - Express

PCI_GNT#0 < 21>

STRAP_A 16 <21>

PLT_RST # <8,25,2 6,30,31> CLK_PCI_ICH <16 >

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB27

DMI2RXN

AB26

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

T25

DMI_CLKP

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

AF29 AF28

AC5 AC4 AD3 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2

DMI_ZCOMP

Direct Media Interface

DMI_IRCOMP

PCI_PIRQB# PCI_PERR# PCI_TRDY# PCI_REQ#3

PCI_STOP# PCI_DEVSE L# PCI_FRAME # PCI_REQ#1

PCI_PLOCK # PCI_IRDY# PCI_PIRQD# PCI_REQ#2

DMI_IRCOMP

RP15

1 8 2 7 3 6 4 5

8.2K_080 4_8P4R_5%

8.2K_080 4_8P4R_5% RP16

RP16

1 8 2 7 3 6 4 5

8.2K_080 4_8P4R_5%

8.2K_080 4_8P4R_5% RP17

RP17

1 8 2 7 3 6 4 5

8.2K_080 4_8P4R_5%

CLK_PCI_ICH

PCI_SERR# PCI_PIRQG# PCI_PIRQC#

1 8 2 7 3 6 4 5

8.2K_080 4_8P4R_5%

DMI_MTX_IRX_ N3 < 8> DMI_MTX_IRX_ P3 <8> DMI_ITX_MRX_ N3 < 8> DMI_ITX_MRX_ P3 <8>

DMI_MTX_IRX_ N2 < 8> DMI_MTX_IRX_ P2 <8> DMI_ITX_MRX_ N2 < 8> DMI_ITX_MRX_ P2 <8>

DMI_MTX_IRX_ N1 < 8> DMI_MTX_IRX_ P1 <8> DMI_ITX_MRX_ N1 < 8> DMI_ITX_MRX_ P1 <8>

DMI_MTX_IRX_ N0 < 8> DMI_MTX_IRX_ P0 <8> DMI_ITX_MRX_ N0 < 8> DMI_ITX_MRX_ P0 <8>

CLK_PCIE_ ICH# <16> CLK_PCIE_ ICH <16>

Within 500 mils

1 2

R180 24.9_040 2_1%R180 24.9_040 2_1%

USB20_N 0 <23 > USB20_P 0 <23> USB20_N 1 <23 > USB20_P 1 <23>

USB20_N 7 <25 > USB20_P 7 <25>

USB20_N 10 <2 9> USB20_P 10 <29> USB20_N 11 <1 7> USB20_P 11 <17>

+3VS

R179

12

10_0402 _5%@

RP19

+1.5VS

USB/B-Left

WiMax(WLAN)

Card reader(3 IN 1)

Int. Camera

C257

1 2

10P_040 2_50V8J@

Lane reversal

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

ICH9M(1/4)-PCI

PWWAA LA6841P M/B

19 44Monday, August 1 6, 2010

1

0.1

of

5

4

3

2

1

D D

32.768KH Z_12.5PF_Q13M C14610002

CMOS Setting, near DDR Door

+RTCVCC

R190

1 2

20K_040 2_5%

ICH_RTCRS T#

1U_0402 _6.3V6K

ITPM Setting, near DDR Door

R194

R194 20K_040 2_5%

C C

AZ_BITCLK _HD<27>

AZ_SDOU T_HD<27>

B B

20K_040 2_5%

R196

1M_0402 _5%

close to U9A befor R200

ICH_SRTCR ST#

1 2

1U_0402 _6.3V6K

SM_INTRUD ER#

1 2

2

C855

C855 33P_040 2_50V8J

33P_040 2_50V8J

1

@

R212 33_04 02_5%R 212 33_0402_5%

+3VS

AZ_SYNC_H D<27>

1 2

R215 10 K_0402_5%R215 10 K_0402_5%

AZ_RST_ HD#<27 >

1ST HDD

SHORT PA DS

C273

SHORT PA DS

C274

FBMA-10-1 00505-301T

FBMA-10-1 00505-301T R200

R200

SATA_LE D#

J1

1 2

J2

1 2

AZ_SDOU T

SATA_IRX_ C_DTX_N1<23> SATA_IRX_ C_DTX_P1<23 >

SATA_ITX_ DRX_N1<23> SATA_ITX_ DRX_P1<23>

C270

15P_040 2_50V8J

12

X1

3

NC

2

NC

15P_040 2_50V8J

R205 33_04 02_5%R 205 33_0402_5%

1 2

R209 33_04 02_5%R 209 33_0402_5%

1 2

C272

OSC

ICH_INTVRMEN<21>

LAN100_ SLP<21 >

AZ_SDIN0_ HD<27>

4

1

12

R198

1 2

24.9_040 2_1%

AZ_SDOU T<2 1>

R189

AZ_BITCLK

12

10M_0402_5%

ICH_RTCX1 ICH_RTCX2

ICH_RTCRS T# ICH_SRTCR ST# SM_INTRUD ER#

AZ_SYNC

AZ_RST#

AZ_SDOU T

SATA_LE D#

U9A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD_0

D12

LAN_TXD_1

E13

LAN_TXD_2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9-M ES_FC BGA676

ICH9R3@

LDRQ0#

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

IGNNE#

INIT# INTR

RCIN#

NMI

SMI#

STPCLK#

TP12

K5 K4 L6 K2

K3

J3 J1

N7 AJ27

AJ25 AE23

AJ26

AD22

AF25

AE22 AG25 L3

AF23 AF24

AH27

THRMTRIP_ ICH#

AG26

AG27

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18 AJ7 AH7

GATEA20

R195 56_04 02_5%R 195 56_0402_5%

KB_RST#GLAN_CO MP

R208 54.9_040 2_1%R208 54.9_040 2_1%

TP12

SATARBIAS

R216

24.9_040 2_1%

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

RTC

LAN / GLAN

IHDA

SATA

LPCCPU

LDRQ1#/GPIO23

CPUPWRGD

THRMTRIP#

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

LPC_AD0 <30,31> LPC_AD1 <30,31> LPC_AD2 <30,31> LPC_AD3 <30,31>

LPC_FRA ME# <30,31>

GATEA20 < 30> H_A20M# <4>

H_DPRST P# <5 ,8,40> H_DPSLP # <5>

1 2

H_PW RGOOD <5>

H_IGNNE# <4>

H_INIT# <4> H_INTR < 4> KB_RST# <30>

H_NMI < 4> H_SMI# < 4>

H_STPCL K# <4>

1 2

PADT5PAD

T5

SATA_IRX_ C_DTX_N4 < 23> SATA_IRX_ C_DTX_P4 <23>

SATA_ITX_ DRX_N4 <23>

SATA_ITX_ DRX_P4 < 23>

CLK_PCIE_ SATA# <16>

CLK_PCIE_ SATA <16>

10mils width less than 500mils

1 2

H_FERR#FERR#

H_THERM TRIP#

GATEA20

H_DPRST P#

H_FERR#

KB_RST#

+1.05VS

R201

R201 56_0402 _5%

56_0402 _5%

H_THERM TRIP#

H_THERM TRIP# <4,8>

SATA ODD

R191 10K_040 2_5%@R19 1 10K_04 02_5%@

R192 56_0402 _5%@R 192 56_04 02_5%@

R193 56_0402 _5%R1 93 56_040 2_5%

H_FERR# <4>

R197 10K_0 402_5%@R1 97 10K_0402_5%@

1 2

3

12

R199

R199 330_040 2_5%

330_040 2_5%

2

@

CBE

2SC2411 K_SOT23

1

Q10

12

@

1

2

3

+3VS

+1.05VS

+3VS

+1.05VS+1.5VS

D50

D50 DAN202U T106_SC70-3

DAN202U T106_SC70-3

@

ENTRIP1_H W <37>

ENTRIP2_H W <37>

+RTCVCC

C271

0.1U_040 2_16V4Z

A A

5

1

2

D10

1

CHN202U PT SC-70

LOTES_A AA-BAT-054-K01

2

3

1 2

R16 1K _0402_5%R1 6 1K _0402_5%

R16 locate arou nd RTC battery

@ JRT C

@

+3VL

JRTC

+RTCBAT T

1

+

-

2

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

ICH9M(2/4)-LAN,IDELPC,RTC

PWWAA LA6841P M/B

1

of

20 44Monday, August 1 6, 2010

of

20 44Monday, August 1 6, 2010

of

20 44Monday, August 1 6, 2010

0.1

5

4

3

2

1

+3VS

R2234.7K_0 402_5% R2234.7K_0 402_5%

12

4.7K_040 2_5%

PM_SMBD ATA<14,15 ,16,25>

D D

+3VALW

C C

PM_SMBC LK<1 4,15,16,25>

R230 10K_040 2_5%R230 10K_040 2_5%

1 2

R232 10K_040 2_5%R232 10K_040 2_5%

1 2

R233 10K_040 2_5%R233 10K_040 2_5%

1 2

R234 10K_040 2_5%R234 10K_040 2_5%

1 2

R236 10K_040 2_5%R236 10K_040 2_5%

1 2

R238 10K_040 2_5%R238 10K_040 2_5%

1 2

R240 10K_040 2_5%R240 10K_040 2_5%

1 2

R242 1K_0402 _5%R242 1K_0402_ 5%

+3VALW

+3VS

+3VALW

+3VS

+3VALW

+3VS

1 2

R244 10K_040 2_5%R244 10K_040 2_5%

1 2

R245 8.2K_040 2_5%@R245 8.2K_0402_5%@

1 2

R246 10K_040 2_5%R246 10K_040 2_5%

1 2

ACIN< 30,36>

R250 8.2K_040 2_5%R2 50 8.2K_040 2_5% R251 10K_040 2_5%R251 10K_040 2_5%

R253 8.2K_040 2_5%R2 53 8.2K_040 2_5%

R255 10K_040 2_5%@R255 10K_040 2_5%@ R257 100K_04 02_5%R257 100K_04 02_5%

1 2

R248 3 30K_0402_5%R 248 330K_04 02_5%

1 2 1 2

R807 100K_0402 _5%R807 100K _0402_5%

1 2

R809 10 0K_0402_5%R809 10 0K_0402_5%

1 2

R744 10 0K_0402_5%R744 10 0K_0402_5%

R226

2N7002D W-T/R7_SOT3 63-6

D12 CH751H-4 0PT_SOD323-2D12 C H751H-40PT_SOD 323-2

12 12

2

12

61

5

Q4A

4

LINKALERT #

ME_EC_C LK1

ME_EC_D ATA1

ICH_RI#

XDP_DBR ESET#

EC_LID_OU T#

PM_CLKR UN#

SB_W AKE#

SERIRQ

EC_THER M#

21

THRM# not

OCP#

used, 8.2K to 10K PU to

ICH_ACIN

+3VS.

EC_SMI#

EC_SCI#

2HDD_DE T#

BT_DET#

GPIO57

CIR_EN# CIR_EN#

HDMI_HPD

iTPM Physical Presence

CLGPIO5 Mobil Platform

GPIO57

Assert = iTPM Physical Presence Enable De-assert = iTPM disable **Only used in iAMT w/ME Firmware Desktop Platform used only GPIO10

R221 4.7K_0 402_5%R221 4.7K_0 402_5%

1 2

R224 4.7K_0 402_5%R224 4.7K_0 402_5%

1 2

ICH_SMBDA TA

ICH_SMBCL K

3

2N7002D W-T/R7_SOT3 63-6

Q4B

XDP_DBR ESET#<4>

EC_LID_OU T#<30>

MCH_ICH_S YNC#<8>

+3VALW

U9C

ICH_SMBCL K ICH_SMBDA TA LINKALERT # ME_EC_C LK1 ME_EC_D ATA1

ICH_RI#

XDP_DBR ESET#

PM_SYNC#<8>

H_STP_P CI#< 16> H_STP_C PU#<16>

SB_W AKE#<26 >

SERIRQ<30,31>

EC_THER M#<30 >

VGATE<8,30 ,40>

T6

OCP#<4>

EC_SMI#<3 0> EC_SCI#<30>

CLKREQ_ SATA#<16>

SB_SPKR<27>

T7 T8 T9

PADT6PAD

PADT7PAD PADT8PAD PADT9PAD

EC_LID_OU T#

PM_CLKR UN#

SB_W AKE# SERIRQ EC_THER M#

VGATE

TP11

OCP# ICH_ACIN

EC_SMI# EC_SCI# HDMI_HPD

2HDD_DE T#

BT_DET#

GPIO57

SB_SPKR

ICH_TP3

TP8 TP9 TP10

U9C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9-M ES_FC BGA676

ICH9R3@

SMB

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS / GPIOGPIOMISC

Power MGT

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

Controller Link

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

PWROK

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

WOL_EN/GPIO9

AH23 AF19 AE21 AD20

CLK_14M _ICH

H1

CLK_48M _ICH

AF3

P1

C16 E16 G17

C10

G20

M2

ICH_LOW _BAT#

B13

R3

D20

D22

R5

R6

B16

F24 B19

F22 C19

+CL_VRE F0_ICH

C25 A19

F21 D18

A16 C18 C11 C20

S4_STAT E#

ICH_PW ROK

1 2

R247 0 _0402_5%R247 0 _0402_5%

SB_RSMR ST#

ICH_PW ROK

SUS_PW R_ACK

SUS_PWR_ACK

+3VS

R971

100K_04 02_5%

BT@

1 2

CLK_14M _ICH <16> CLK_48M _ICH <16>

EC_CLK <30>

PM_SLP_ S3# <3 0> PM_SLP_ S4# <3 0> PM_SLP_ S5# <3 0>

PM_DPRS LPVR <8,40>

PBTN_OU T# <30>

CK_PW RGD <16>

ICH_PW ROK <8,30>

CL_CLK0 <8>

CL_DATA 0 <8>

CL_RST# 0 <8>

1 2

R256 10K_0402_ 5%R256 10K_0402_ 5%

Mobile Platform used only

Desktop Platform used only

BT_PW R# <25>

BAV99DW -7_SOT363

Width:Spacing 12mil:12mil

+3VALW

SB_RSMR ST#

R241

R241 10K_040 2_5%

10K_040 2_5%

R249

2.2K_040 2_5%

+3VS

12

R252

3.24K_04 02_1%

12

R254

R254 453_040 2_1%

453_040 2_1%

for EMI request

CLK_14M _ICH

CLK_48M _ICH

S4_STAT E#

ICH_LOW _BAT#

1 2

5

D11B

@

12

R239

0_0402_ 5%

123

C

2

4

3

@R 249

@

CH751H-4 0PT_SOD323-2

POK<35,37>

2

C278

0.1U_040 2_16V4Z

1

1 2

R228

10_0402 _5%@

1 2

R229

@

10_0402 _5%

1 2

R235 10K_0402_ 5%@R235 10K_0402_5 %@

R237 8.2K_0402_ 5%R 237 8.2K_ 0402_5%

12

Q11

E

MMBT390 6_SOT23-3@

B

1 2

R243

1

4.7K_040 2_5%

D11A

D11A BAV99DW -7_SOT363

BAV99DW -7_SOT363

@

6

C276

4.7P_040 2_50V8C@

C277

@

4.7P_040 2_50V8C

12

R275

1 2

1K_0402 _5%

@

1 2

@R 275

@

EC_RSMR ST# <30 >

+3VALW

RSMRST# circuit

D66

2 1

D68

CH751H-4 0PT_SOD323-2

SB_RSMR ST#ICH_PW ROK

21

ICH9M Strap Pin

B B

A A

+3VS

1 2

R258 1K_0402 _5%@R258 1K_0402 _5%@

+3VS

1 2

R263 1K_0402 _5%@R263 1K_040 2_5%@

1 2

R265 1K_0402 _5%@R265 1K_040 2_5%@

1 2

R267 1K_0402 _5%@R267 1K_040 2_5%@

1 2

R261 1K_0402_5 %@R261 1K_040 2_5%@

ICH_SPI_MOSI <19>

SB_SPKR

PCI_GNT#0 < 19>

SPI_CS#1 <19>

STRAP_A 16 <19>

5

Internal TPM Strap(Internal pull-down)

SPI_MOSI Low= Disable

High= iTPM enable by MCH strap*

No Reboot Strap (Internal pull-up)

SB_SPKR

Boot BIOS Strap

Low= *Default High= "No Reboot"

(Internal pull-up)

PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction

0 0 RESERVED 0 1 1

1 0 1

A16 Swap Override Strap

PCI_GNT#3

Low= A16 swap override Enable High= Default* (Internal pull-up)

SPI PCI

LPC*

4

(Default)

Internal VR Enable Strap (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

Low = Internal VR Disabled High = Internal VR Enabled(Default)

+RTCVCC

1 2

R259 330K_04 02_5%R259 330K_0402 _5%

1 2

R260 0_0402_ 5%@R 260 0_04 02_5%@

ICH_INTVRMEN <2 0>

LAN100_ SLP <20>

ICH_INTVRMEN

ICH8M LAN100 SLP Strap (Internal VR for VccLAN1.05 and VccCL1.05)

ICH_LAN100_SLP

XOR Chain Entrance Strap

ICH_TP3 (Internal pull-up)

0

+3VS

R266 1K_0402 _5%@R266 1K_040 2_5%@

R268 1K_0402 _5%@R268 1K_040 2_5%@

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ICH_TP3

2009/06/ 12 2010/06/ 12

3

AZ_SDOU T <20 >

Compal Secret Data

0

1

Deciphered Date

HDA_SDOUT (Internal pull-down)

Flash Descriptor Security Override Strap

GPIO33

DMI Termination Voltage GPIO49

Low= Descriptor Security override High= Default* (Internal pull-up)

Low= Desktop used High= Mobile* (Internal pull-up)

Description

0

1

0

11

2

RSVD

Enter XOR Chain

Normal Operation

(Default)

Set PCIE port config bit 1

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

Compal Electronics, Inc.

ICH9M(3/4)-USB,GPIO,PCIE

PWWAA LA6841P M/B

1

of

21 44Monday, August 1 6, 2010

of

21 44Monday, August 1 6, 2010

of

21 44Monday, August 1 6, 2010

0.1

5

+RTCVCC

1U_0402_6.3V4Z

D D

+1.5VS

For power consumption measurement

C C

1

C279

L14

KC FBM-L11-201209-221LMAT_08 05

0.1U_0402_16V4Z

2

220U_6.3V_M

L15

L15 MBK1608121YZF_0603

MBK1608121YZF_0603

+1.5VS

C280

+1.5VS_PCIE_ICH

12

C293

1 2

10U_0805_10V4Z

1

0.1U_0402_16V4Z

2

+3VS

+5VS

+3VALW

+5VALW

+

1

C307

C307 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

close to AE15 close to AF11

C281

2 1

R270

100_0402_5%

10U_0805_10V4Z

1

C294

2

+1.5VS_SATAPLL_ICH+1.5VS

1

C304

2

1

2

D13

D13 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

12

R269

1

100_0402_5%

C284

C284 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

D14

D14 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+ICH_V5REF_SUS

12

2

C289

C289 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2.2U_0603_6.3V6K

1

C295

2

10U_0805_10V4Z

1

C305

1U_0402_6.3V4Z

2

1

C308

C308 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

Symbol S0 S3 S4/S5

VCCLAN1_05

VCCCL1_5

B B

VCCCL1_05

VCCSUS1_5

VCCSUS1_05

Internal voltage regulators power these wells inside the ICH9 and current for this rail is accounted for in the sourcing voltage rail current requirements.

A A

VCC_1_05

VCCLAN3_3 VCCLAN3_3

VCC_1_5_A VCCCL3_3 VCCCL3_3

VCC_1_05 VCCCL3_3 VCCCL3_3

VCC_1_5_A

VCC_1_05

VCCSUS3_3

0.1U_0402_16V4Z

5

C318

VCCSUS3_3

+1.5VS

1

+3VS

2

0.1U_0402_16V4Z

C324

1

2

+1.5VS

close to AC9

+1.5VS

C314

0.1U_0402_16V4Z

C316

0.1U_0402_16V4Z

1

C322

0.1U_0402_16V4Z

2

1

2

1

C315

2

0.1U_0402_16V4Z

close to AC14

close to AJ5close to AC7

1

C317

0.1U_0402_16V4Z

2

VCCLAN1_05_INT_ICH

+1.5VS

1

C323

0.1U_0402_16V4Z

2

+ICH_V5REF

+ICH_V5REF_SUS

+ICH_V5REF

1

C296

2

1

2

+3VS

4

U9F

A23

VCCRTC

A6

V5REF

AE1

V5REF_SUS

AA24

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AB24

VCC1_5_B[03]

AB25

VCC1_5_B[04]

AC24

VCC1_5_B[05]

AC25

VCC1_5_B[06]

AD24

VCC1_5_B[07]

AD25

VCC1_5_B[08]

AE25

VCC1_5_B[09]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

47mA

AJ19

VCCSATAPLL

1342mA

AC16

VCC1_5_A[01]

AD15

VCC1_5_A[02]

AD16

VCC1_5_A[03]

AE15

VCC1_5_A[04]

AF15

VCC1_5_A[05]

AG15

VCC1_5_A[06]

AH15

VCC1_5_A[07]

AJ15

VCC1_5_A[08]

AC11

VCC1_5_A[09]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

A27

VCCGLANPLL

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

A26

VCCGLAN3_3

ICH9-M ES_FCBGA676

ICH9R3@

6uA at G3 state

2mA

1634mA

646mA

VCCA3GP

ARX

ATX

ATXARX

11mA

USB CORE

78mA

GLAN POWER

23mA

80mA

1mA

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]

CORE

VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]

23mA

VCCDMIPLL

VCC_DMI[1]

48mA

VCC_DMI[2]

V_CPU_IO[1]

2mA

V_CPU_IO[2]

VCC3_3[01]

308mA

VCC3_3[02] VCC3_3[07]

VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06]

VCCP_CORE

VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12]

PCI

VCC3_3[13] VCC3_3[14]

11mA

VCCHDA

11mA

VCCSUSHDA

VCCSUS1_05[1]

VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2]

212mA

VCCSUS3_3[01]

VCCSUS3_3[02]

VCCSUS3_3[03]

VCCSUS3_3[04]

VCCPSUS

VCCSUS3_3[05]

VCCSUS3_3[06]

VCCSUS3_3[07]

VCCSUS3_3[08]

VCCSUS3_3[09]

VCCSUS3_3[10]

VCCSUS3_3[11]

VCCSUS3_3[12]

VCCSUS3_3[13]

VCCSUS3_3[14]

VCCSUS3_3[15]

VCCSUS3_3[16]

VCCPUSB

VCCSUS3_3[17]

VCCSUS3_3[18]

VCCSUS3_3[19]

VCCSUS3_3[20]

VCCCL1_05

VCCCL1_5

VCCCL3_3[1] VCCCL3_3[2]

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29

W23 Y23

AB23 AC23

AG29 AJ6 AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4

AJ3

TP_VCCSUS1_05_ICH_1

AC8

TP_VCCSUS1_05_ICH_2

F17

AD8

F18

A18 D16 D17 E22

AF1

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

VCCCL1_05_INT_ICH

G22

VCCCL1_5_INT_ICH

G23

A24 B24

3

1

C282

0.1U_0402_16V4Z

2

+1.5VS_DMIPLL_ICH +1.5VS

0.01U_0402_16V7K

C285

1

C290

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

close to AG29

C297

0.1U_0402_16V4Z

close to AD19

@

PAD

@

PAD

+VCCSUS1_5_ICH_INT

1

C310

0.1U_0402_16V4Z

2

1

C311

0.022U_0402_16V7K

+3VS

0.022U_0402_16V7K

2

1

C320

C320 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

close to G23

2009/06/12 2010/06/12

+1.05VS

1

C283

0.1U_0402_16V4Z

2

L13

1 2

MBK1608121YZF_0603

1

C286

C286 10U_0805_10V4Z

10U_0805_10V4Z

2

+1.05VS

1

C287

4.7U_0805_10V4Z

2

C291

close to AG24

1

C298

0.1U_0402_16V4Z

2

T10

T10 T11

T11

C312

1

C321

0.1U_0402_16V4Z

2

Compal Secret Data

1

2

1

C299

2

+3VS

1

2

+3VALW

1

2

1

0.1U_0402_16V4Z

2

close to AF1close to T1

1

C319

0.1U_0402_16V4Z

2

Deciphered Date

+1.05VS

1

C292

4.7U_0805_10V4Z

2

0.1U_0402_16V4Z

C300

close to B9, G6, K7

C306

0.1U_0402_16V4Z

C309

0.1U_0402_16V4Z

C313

close to G22

2

1

C301

0.1U_0402_16V4Z

2

1

2

0.1U_0402_16V4Z

1

C302

2

+3VALW

1

C303

0.1U_0402_16V4Z

2

close to AJ6

1

U9E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AC3

VSS[014]

AD1

VSS[015]

AD10

VSS[016]

AD12

VSS[017]

AD13

VSS[018]

AD14

VSS[019]

AD17

VSS[020]

AD18

VSS[021]

AD21

VSS[022]

AD28

VSS[023]

AD29

VSS[024]

AD4

VSS[025]

AD5

VSS[026]

AD6

VSS[027]

AD7

VSS[028]

AD9

VSS[029]

AE12

VSS[030]

AE13

VSS[031]

AE14

VSS[032]

AE16

VSS[033]

AE17

VSS[034]

AE2

VSS[035]

AE20

VSS[036]

AE24

VSS[037]

AE3

VSS[038]

AE4

VSS[039]

AE6

VSS[040]

AE9

+3VS

1

2

Title

Size Document Number Rev

Date: Sheet

VSS[041]

AF13

VSS[042]

AF16

VSS[043]

AF18

VSS[044]

AF22

VSS[045]

AH26

VSS[046]

AF26

VSS[047]

AF27

VSS[048]

AF5

VSS[049]

AF7

VSS[050]

AF9

VSS[051]

AG13

VSS[052]

AG16

VSS[053]

AG18

VSS[054]

AG20

VSS[055]

AG23

VSS[056]

AG3

VSS[057]

AG6

VSS[058]

AG9

VSS[059]

AH12

VSS[060]

AH14

VSS[061]

AH17

VSS[062]

AH19

VSS[063]

AH2

VSS[064]

AH22

VSS[065]

AH25

VSS[066]

AH28

VSS[067]

AH5

VSS[068]

AH8

VSS[069]

AJ12

VSS[070]

AJ14

VSS[071]

AJ17

VSS[072]

AJ8

VSS[073]

B11

VSS[074]

B14

VSS[075]

B17

VSS[076]

B2

VSS[077]

B20

VSS[078]

B23

VSS[079]

B5

VSS[080]

B8

VSS[081]

C26

VSS[082]

C27

VSS[083]

E11

VSS[084]

E14

VSS[085]

E18

VSS[086]

E2

VSS[087]

E21

VSS[088]

E24

VSS[089]

E5

VSS[090]

E8

VSS[091]

F16

VSS[092]

F28

VSS[093]

F29

VSS[094]

G12

VSS[095]

G14

VSS[096]

G18

VSS[097]

G21

VSS[098]

G24

VSS[099]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9-M ES_FCBGA676

ICH9R3@

Compal Electronics, Inc.

ICH9M(4/4)-POWER&GND

PWWAA LA6841P M/B

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

1

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

0.1

of

22 44Monday, August 16, 2010

of

22 44Monday, August 16, 2010

of

22 44Monday, August 16, 2010

5

4

3

2

1

SATA HDD Conn. SATA ODD Conn

+5VS

1

2

D D

C C

24

GND

23

GND

SANTA_1 91201-1

CONN@

this is temp. footprint

Place closely JHDD SATA CONN.

1.2A 1.1A

C697

C697 10U_080 5_10V4Z

10U_080 5_10V4Z

JHDD

GND

A+ A-

GND

BB+

GND

V33 V33

V33 GND GND GND

V5 V5 V5

GND

Reserved

GND

V12

1

2

1 2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

C698

0.1U_040 2_16V4Z

SATA_ITX_ C_DRX_P1 SATA_ITX_ C_DRX_N1

SATA_IRX_ DTX_N1 SATA_IRX_ DTX_P1

1

C699

0.1U_040 2_16V4Z

2

C713 0 .01U_0402_25V 7KC713 0.0 1U_0402_25V7 K C715 0 .01U_0402_25V 7KC715 0.0 1U_0402_25V7 K

C717 0 .01U_0402_25V 7KC717 0.0 1U_0402_25V7 K C719 0 .01U_0402_25V 7KC719 0.0 1U_0402_25V7 K

+3VS

+5VS

1 2 1 2

1

2

C700

0.1U_040 2_16V4Z

SATA_ITX_ DRX_P1 < 20> SATA_ITX_ DRX_N1 <20>

SATA_IRX_ C_DTX_N1 < 20>

SATA_IRX_ C_DTX_P1 <20>

+5VS

1

C721

10U_080 5_10V4Z

2

SATA_ITX_ C_DRX_P4_ODD SATA_ITX_ C_DRX_N4_ODD

SATA_IRX_ DTX_N4_ODD SATA_IRX_ DTX_P4_ODD

Place components close to ODD CONN.

1

C722

10U_080 5_10V4Z

2

JODD

15

GND

14

GND

SANTA_2 06401-1_RV

CONN@

C733 0.01U_04 02_25V7KC733 0.01U_04 02_25V7K C734 0.01U_04 02_25V7KC734 0.01U_04 02_25V7K

C735 0.01U_04 02_25V7KC735 0.01U_04 02_25V7K C736 0.01U_04 02_25V7KC736 0.01U_04 02_25V7K

GND

A+

A-

GND

B-

B+

GND

DP +5V +5V

MD GND GND

1 2 1 2

1

C723

@

1U_0402 _6.3V4Z

2

1 2 3 4 5 6 7

8 9 10 11 12 13

1

C724

0.1U_040 2_16V4Z

2

SATA_ITX_ C_DRX_P4_ODD SATA_ITX_ C_DRX_N4_ODD

SATA_IRX_ DTX_N4_ODD SATA_IRX_ DTX_P4_ODD

+5VS

1

C725

0.1U_040 2_16V4Z

2

SATA_ITX_ DRX_P4 < 20> SATA_ITX_ DRX_N4 <20>

SATA_IRX_ C_DTX_N4 < 20>

SATA_IRX_ C_DTX_P4 <20>

OUT OUT OUT

FLG

W=60mils

8

C693 1000P_0 402_50V7KC 693 1000 P_0402_50V7K

7 6 5

1

C752

4.7U_080 5_10V4Z

2

@

For EMI request

12

USB_OC# 0 <19 ,30>

+5VALW +USB_VC CA

USB_EN#<30>

U42

1 2 3 4

G528_SO 8

1.4A

GND IN IN EN#

USB Conn

+USB_VC CA

C84

12

+

220U_6.3 V_M

B B

R843 0 _0402_5%<BOM Struc ture>R843 0 _0402_5%<BOM Struc ture>

12

WCM2 012F2SF-900T0 4_0805@

3

USB20_N 0< 19>

A A

5

3

2

L87

R839 0 _0402_5%<BOM Struc ture>R839 0 _0402_5%<BOM Struc ture>

4

1

12

4

220U_6.3 V_M

C63

12

0.1U_040 2_16V4Z

C64

1000P_0 402_50V7K

USB20_N 0_R USB20_P 0_R

PJDLC05 _SOT23-3

12

W=60mils

JUSB1

@JUSB1

@

1

VCC

2

D-

3

D+

4

GND

ALLTOP C 107L8-10405-L

2

3

D65

@D6 5

@

1

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ALLTOP C 107L8-10405-L

3

5

GND

6

GND

7

GND

8

GND

2009/06/ 12 2010/06/ 12

USB20_N 1<19>USB20_P 0<19> USB20_P 1<19>

Compal Secret Data

Deciphered Date

R842

WCM2 012F2SF-900T0 4_0805@

3

2

L86

R838 0 _0402_5%<BOM Struc ture>R838 0 _0402_5%<BOM Struc ture>

2

0_0402_ 5%<BOM Structure>

0.1U_040 2_16V4Z

12

4

1

12

1000P_0 402_50V7K

4

1

PJDLC05 _SOT23-3

Title

Size Document N umber Rev

Date: Sheet

+USB_VC CA

C60

12

C61

12

W=60mils

JUSB2

1

USB20_N 1_R USB20_P 1_R

D62

2

3

@D6 2

@

1

Compal Electronics, Inc.

SATA-HDD/ODD/USB

PWWAA LA6841P M/B

VCC

2

D-

3

D+

4

GND

ALLTOP C 107L8-10405-L

1

GND GND GND GND

@JUSB2

@

5 6 7 8

0.1

of

23 44Monday, August 1 6, 2010

of

23 44Monday, August 1 6, 2010

of

23 44Monday, August 1 6, 2010

5

4

3

2

1

POWER/B Connector

D D

SMT1-05-A _4P

ON/OFFBT N#

ON/OFFBT N#<30,32>

PACDN04 2Y3R_SOT23-3

C C

B B

A A

KEYBOARD CONN

JKB

34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

ACES_88 170-3400

@

JKB34 KSO16

KSO17

KSO2 KSO1 KSO0 KSO4 KSO3 KSO5 KSO14 KSO6 KSO7 KSO13 KSO8 KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 JKB4

CAPS_LE D#

NUM_LED #

1 2

R755 3 00_0402_5%R755 300_0402_5 %

R762 3 00_0402_5%R762 300_0402_5 %

12

KSI[0..7]

KSO[0..17]

+3VS

CAPS_LE D# <3 0>

NUM_LED # <30 >

KSI[0..7] <3 0>

KSO[0..17] <30>

please close to JKB1

KSO16

KSO17

KSO2

KSO1

KSO0

KSO4

KSO3

KSO5

KSO14

KSO6

KSO7

KSO13

KSO8

KSO9

KSO10

KSO11

KSO12

KSO15

KSI7

KSI2

KSI3

KSI4

KSI0

KSI5

KSI6

KSI1

CAPS_LE D#

NUM_LED #

1 2

C821 10 0P_0402_50V8 JC821 100P _0402_50V8J

1 2

C818 10 0P_0402_50V8 JC818 100P _0402_50V8J

1 2

C789 10 0P_0402_50V8 JC789 100P _0402_50V8J

1 2

C790 100P_ 0402_50V8JC790 100 P_0402_50V8J

1 2

C791 10 0P_0402_50V8 JC791 100P _0402_50V8J

1 2

C792 100P_ 0402_50V8JC792 100 P_0402_50V8J

1 2

C795 10 0P_0402_50V8 JC795 100P _0402_50V8J

1 2

C796 100P_ 0402_50V8JC796 100 P_0402_50V8J

1 2

C797 100P_ 0402_50V8JC797 100 P_0402_50V8J

1 2

C798 10 0P_0402_50V8 JC798 100P _0402_50V8J

1 2

C799 100P_ 0402_50V8JC799 100 P_0402_50V8J

1 2

C800 10 0P_0402_50V8 JC800 100P _0402_50V8J

1 2

C801 10 0P_0402_50V8 JC801 100P _0402_50V8J

1 2

C802 100P_ 0402_50V8JC802 100 P_0402_50V8J

1 2

C803 10 0P_0402_50V8 JC803 100P _0402_50V8J

1 2

C804 100P_ 0402_50V8JC804 100 P_0402_50V8J

1 2

C805 10 0P_0402_50V8 JC805 100P _0402_50V8J

1 2

C807 10 0P_0402_50V8 JC807 100P _0402_50V8J

1 2

C808 100P_ 0402_50V8JC808 100 P_0402_50V8J

1 2

C810 100P_ 0402_50V8JC810 100 P_0402_50V8J

1 2

C811 10 0P_0402_50V8 JC811 100P _0402_50V8J

1 2

C812 100P_ 0402_50V8JC812 100 P_0402_50V8J

1 2

C813 100P_ 0402_50V8JC813 100 P_0402_50V8J

1 2

C814 100P_ 0402_50V8JC814 100 P_0402_50V8J

1 2

C815 10 0P_0402_50V8 JC815 100P _0402_50V8J

1 2

C816 10 0P_0402_50V8 JC816 100P _0402_50V8J

1 2

C817 10 0P_0402_50V8 JC817 100P _0402_50V8J

1 2

C819 10 0P_0402_50V8 JC819 100P _0402_50V8J

Touch/B Connector

Right Switch

TP_SW R

Left Switch

TP_SW L

PACDN04 2Y3R_SOT23-3

D21

2

@

1

2

1

2

3

SW2

SW3

3

4

5

6

3

4

5

6

Check footprint and pin define

JPOW ER

1

2

3

D79

@

1

3

4

5

G1

6

ACES_85 201-0405N

G2

CONN@

Check signal to TP module through FFC

JTouch

+5VS TP_CLK<30> TP_DATA<30>

PACDN04 2Y3R_SOT23-3

D22

TP_SW L TP_SW R

2

3

@

1

2

3

4

5

5 66G8

P-TWO _161021-06021 _6P-T

@

7

G7

8

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

USB/BT/FP/Int. Cam

PWWAA LA6841P M/B

24 44Monday, August 1 6, 2010

1

0.1

of

E51_TXD<30>

E51_RXD<3 0>

Debug card using

CLKREQ_ WLAN#<16>

CLK_W LAN#<16> CLK_W LAN<16>

PCIE_IRX_C_W LANTX_N4<19> PCIE_IRX_C_W LANTX_P4<19>

PCIE_ITX_C_W LANRX_N4<19> PCIE_ITX_C_W LANRX_P4<19>

R110 0_040 2_5%R110 0_040 2_5%

1 2

R106 0_040 2_5%R106 0_040 2_5%

1 2

R959

R959 100K_04 02_5%

100K_04 02_5%

1 2

PCIe Mini Card-WLAN/WiMax

JWL AN

BT_CTRL

+3V_W LAN

E51_TXD _R E51_RXD _R

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

FOX_AS0 B226-S40N-7F

@

GND2

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

+1.5VS

+3V_W LAN

XMIT_OFF# <30>

PM_SMBC LK <14 ,15,16,21> PM_SMBD ATA <14,1 5,16,21>

USB20_N 7 <19> USB20_P 7 <19>

PJ18

2

JUMP_43 X79

@

PJ19

2

JUMP_43 X79@

WiMaxWLAN/ WiFi

Default

112

+3VS

+3VALW

PLT_RST # <8,19,2 6,30,31>

+3V_W LAN

0.1U_040 2_16V4Z

1

CM17

2

0.01U_04 02_25V4Z

CM18

1

CM19

2

4.7U_080 5_10V4Z

+1.5VS

0.1U_040 2_16V4Z

1

2

1

CM20

2

0.01U_04 02_25V4Z

CM21

1

2

1

CM22

2

4.7U_080 5_10V4Z

WLAN&BT Combo module circuits

BT on module

Enable Disable

BT_CRTL

BT_PWR#

**If +3V_WLAN is +3VS, please remove D77

SUSP#< 30,33,39>

CH751H-4 0PT_SOD323-2

BT_PW R#<2 1>

Add BT_CTRL for WLAN & BT Combo module at DVT

H L

L H

D77

@D7 7

@

21

2

G

BT_CTRLSU SP#

13

D

Q47

BT@

2N7002_ SOT23-3

S

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

Compal Secret Data

Deciphered Date

Title

Size Document N umber Rev

Date: Sheet

Compal Electronics, Inc.

PCIe-WLAN/HDDVD/NAND/NEW

PWWAA LA6841P M/B

Monday, August 16, 2010

of

25 44

of

25 44

of

25 44

0.1

A

RL22 1K_0402_5%RL22 1K_0402_5%

1 2

+LAN_VDDREG

LAN_X2LAN_X1

1

CL27

2

0.1U_0402_25V4K

PCIE_IRX_LANTX_P3

PCIE_IRX_LANTX_N3

RL19 0_0402_5%@RL19 0_0402_5%@

LAN_X1

LAN_X2

SB_WAKE #

ISOLATEB

ENSWR EG

1 2

RL5 2.49K_0402_1%RL5 2.49K_0402_1 %

UL3

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

LFE8456E-R

CL1 0. 1U_0402_16V7KCL1 0. 1U_0402_16V7K

PCIE_IRX_C_LANTX_P3<19>

PCIE_IRX_C_LANTX_N3<19>

1 1

+3V_LAN

CLKREQ_LAN#

@

12

RL8 10K_0402_5%

1 2

RL3 10K_0402_5%@RL3 10K_0402_5%@

1K_0402_1%

15K_0402_5%

2 2

WOL_EN #<30,33>

WOL_EN<30>

3 3

Place these components

4 4

colsed to LAN chip

15K_0402_5%

SB_WAKE #

+3VS

12

RL6

@RL6

@

ISOLATEB

RL7

@

RL11 0_0402_5%

RL12 0_0402_5%RL12 0_0402_5%

27P_0402_50V8J

CL26

0.1U_0402_25V4K

1 2

CL2 0. 1U_0402_16V7KCL2 0. 1U_0402_16V7K

1 2

PCIE_ITX_C_LANRX_P3<19>

PCIE_ITX_C_LANRX_N3<19>

CLKREQ_LAN#<16>

PLT_RST#<8,19,25,30,31>

CLK_LAN<16> CLK_LAN#<16>

SB_WAKE #<21>

+3V_LAN

RL22 need always pull-high for RTL8105E Efuse mode

ISOLATEB

YL1

1 2

25MHZ_20PF_7A25000012

1

27P_0402_50V8J

CL35

1

2

27P_0402_50V8J

1

CL34

2

LAN_MDI0+ LAN_MDI0- RJ45_MIDI0-

LAN_MDI1+ LAN_MDI1-

RX+

TX+

TX-

CT NC NC CT

B

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8105E-GR QFN _6X6

8105E_VB@

RL4

0_0402_5%

RL23

0_0402_5%

RJ45_MIDI0+

16 15 14 13 12 11

RJ45_MIDI1+

10

RJ45_MIDI1-

9

+3V_LAN

8105E_VB@

ENSWR EG

8105E_VC@

31

LED3/EEDO

37

LED1/EESK

40

LED0

30

EECS/SCL

32

EEDI/SDA

1

MDIP0

2

MDIN0

4

MDIP1

5

MDIN1

7

NC/MDIP2

8

NC/MDIN2

10

NC/MDIP3

11

NC/MDIN3

13

DVDD10

29

DVDD10

41

DVDD10

27

DVDD33

39

DVDD33

12

AVDD33

42

AVDD33

47

AVDD33

48

AVDD33

21

EVDD10

3

AVDD10

6

AVDD10

9

AVDD10

45

AVDD10

36

REGOUT

UL1

8105E_VC@

CL42 1000P_0402_50V7KC L42 1000P_0402_50V7K

12

CL41 1000P_0402_50V7KC L41 1000P_0402_50V7K

12

RL2 10K_0402_5%RL2 10K_0402_5% RL1 10K_0402_5%RL1 10K_0402_5%

LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1-

+LAN_REGOUT

12 12

+LAN_VDD10

+3V_LAN

+LAN_EVDD10

+LAN_VDD10

1 2

RL15 75_0402_1%RL15 75_0402_1%

1 2

RL13 75_0402_1%RL13 75_0402_1%

C

+3V_LAN

LL1,CL13 will be changed to

2.2uH&4.7uF after EVT test

+LAN_REGOUT

2.2UH +-5% NLC 252018T-2R2J-N

Layout Note: LL1 must be within 200mil to Pin36, CL13,CL9 must be within 200mil to LL1 +LAN_REGOUT: Width =60mil

+LAN_VDD10

Close to Pin 21

+3V_LAN

RJ45_GND LANGND

RJ45_GND

LL1

8105E_VB@

1 2

4.7U_0603_6.3V6K

12

LL20_0603_5% LL20_0603_5%

1U_0402_6.3V4Z

LL30_0603_5%

8105E_VB@

4.7U_0603_6.3V6K

8105E_VB@

CL13

1

CL18

2

12

CL28

1000P_1808_3KV7K

1

2

+LAN_EVDD10

+LAN_VDDREG

1

2

1 2

CL36

PJDLC05_SOT23-3

D

+LAN_VDD10

2

CL9

0.1U_0402_16V4Z

1

8105E_VB@

2

CL17

0.1U_0402_16V4Z

1

2

CL29

0.1U_0402_16V4Z

1

8105E_VB@

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

D69

CL4,CL5,CL6,CL7 close to Pin 27,39,47,48

CL19,CL20,CL21, CL22 close to Pin 3,13,29,45

1 2

+3V_LAN

CL40.1U_0402_16V4Z CL40.1U_0402_16V4Z

CL50.1U_0402_16V4Z CL50.1U_0402_16V4Z

CL60.1U_0402_16V4Z CL60.1U_0402_16V4Z

CL70.1U_0402_16V4Z CL70.1U_0402_16V4Z

+LAN_VDD10

CL190.1U_0402_16V 4Z CL190.1U_0402_ 16V4Z

CL200.1U_0402_16V 4Z CL200.1U_0402_ 16V4Z

CL210.1U_0402_16V 4Z CL210.1U_0402_ 16V4Z

CL220.1U_0402_16V 4Z CL220.1U_0402_ 16V4Z

Need to change to non-LED type

LAN Conn.

JLAN

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

3

1

PR1+

SANTA_130452-C

@

2

CL37

CL37 120P_0402_50V8J

120P_0402_50V8J

1

SHLD1

SHLD2

1

CL38

@CL38

@

4.7U_0603_6.3V6K

2

9

10

E

CL35 and CL34 for EMI request place near pin 3 and pin 6

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2009/01/23 2010/01/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

RTL8105E 10/100 LAN

PWWAA LA6841P M/B

E

26 44Monday, August 16 , 2010

0.1

5

Codec

1

2

1

2

EC_MUTE #

+DVDD_IO

+3VS_DV DD

35 mA

23 24

14 15

21 22

16 17

2

3

4

11

12

13

18

36

35

31

43 42 49

7

1

9

DVDD

DVDD_IO

LINE1_L LINE1_R

LINE2_L LINE2_R

MIC1_L MIC1_R

MIC2_L MIC2_R

GPIO0/DMIC_DATA

GPIO1/DMIC_CLK

PD#

RESET#

PCBEEP

SENSE A

SENSE B

CBP

CBN

MIC1_VREFO_L

PVSS2 PVSS1 DVSS2 DVSS1

ALC259-G R_QFN48_7X7

0.1U_040 2_16V4Z

1 2

+3VS

RA19 0_060 3_5%RA19 0_ 0603_5%

CA2

+1.5VS

D D

RA20 0_060 3_5%

@

1 2

CA2

place close to chip

RA1

+3VS

Ext. Mic

C C

EC_MUTE #

4.7K_040 2_5%

EC control EC_MUTE# behavior: High-state / low-state

B B

MIC1_R_L<28>

MIC1_R_R<28>

Int. Mic

INT_MIC_DATA<17>

INT_MIC_CLK<17 >

27P_040 2_50V8J @

12

RA45

CA51 0.1U_06 03_50V7KCA51 0.1U_0603_5 0V7K

1 2

CA47 0.1U_06 03_50V7KCA47 0.1U_0603_5 0V7K

1 2

CA48 0.1U_06 03_50V7KCA48 0.1U_0603_5 0V7K

1 2

CA49 0.1U_06 03_50V7KCA49 0.1U_0603_5 0V7K

1 2

CA50 0.1U_06 03_50V7KCA50 0.1U_0603_5 0V7K

1 2

RA18 0_060 3_5%R A18 0_0603_5%

12

0_0603_ 1%

INT_MIC_DATA

INT_MIC_CLK

CA83

CA12 10 0P_0402_50V8 JC A12 100P_040 2_50V8J

CA8

1

2

1 2

+MIC1_VRE FO_L

0.1U_040 2_16V4Z

1

CA1

10U_080 5_10V4Z

2

0.1U_040 2_16V4Z

1

CA7

10U_080 5_10V4Z

2

CA234.7U_080 5_10V4Z CA234 .7U_0805_10V4 Z

12

CA294.7U_080 5_10V4Z CA294 .7U_0805_10V4 Z

RA46

RA46 FBMA-10-1 00505-301T

FBMA-10-1 00505-301T

EC_MUTE #<30 >

AZ_RST_ HD#<20 >

MONO_IN

SENSE_A

1 2

CA15

2.2U_060 3_6.3V4Z

DGND

4

+PVDD1

JA1

JUMP_43 X39

+PVDD2

1

CA61

0.1U_040 2_16V4Z

2

+AVDD

46

AVDD125AVDD2

PVDD139PVDD2

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L

HP_OUT_R

SYNC

BCLK

SDATA_OUT

SDATA_IN

EAPD

SPDIFO

MONO_OUT

MIC2_VREFO

MIC1_VREFO_R

LDO_CAP

VREF

JDREF

CPVEE

AVSS1 AVSS2

600 mA

0.1U_040 2_16V4Z

CA57

2

1

@

place close to chip

1

68 mA

38

CA3

UA1

10U_080 5_10V4Z

40 41

45 44

32 33

10

6

5

AZ_SDIN0_ HD_R

8

47

48

20

29

30 28

AC_VREF

27

AC_JDRE F

19

34

CA14 2.2U_060 3_6.3V4ZCA14 2.2U_0603 _6.3V4Z

26 37

1 2

1

CA56

2

10U_080 5_10V4Z

1 2

1

CA63

2

10U_080 5_10V4Z

1

CA4

2

RA4 75_0 402_1%RA4 75 _0402_1% RA5 75_0 402_1%RA5 75 _0402_1%

RA9 20K_ 0402_1%RA9 20K_04 02_1%

1 2

1

CA5

2

0.1U_040 2_16V4Z

RA6 33_0402 _5%RA 6 33_0402 _5%

+MIC1_VRE FO_R

12

AGND

RA2

0_0603_ 5%

RA11

0_0603_ 5%

@

0.1U_040 2_16V4Z

CA6

SPKL+ <28> SPKL- <28>

SPKR+ <28> SPKR- <28>

0.1U_040 2_16V4Z

CA44

0.1U_040 2_16V4Z

CA62

1 2

1

place close to chip

2

12

CA28 10U_0 805_10V4ZCA28 10 U_0805_10V4Z

1 2

CA17

0.1U_040 2_16V4Z

place close to chip

3

1

2

10U_080 5_10V4Z

1

2

10U_080 5_10V4Z

RA3

@

0_0603_ 5%

HP_L <2 8> HP_R <2 8>

AZ_SYNC_H D <20>

AZ_BITCLK _HD <20>

AZ_SDOU T_HD <20>

AZ_SDIN0_ HD <2 0>

1

CA16

CA16 10U_080 5_10V4Z

10U_080 5_10V4Z

2

@

CA43

CA58

+5VS

@

+5VS

Beep sound

AZ_BITCLK _HD

close to Audio Codec(UA1) for EMI

R222

4.7K_040 2_5% @

AZ_RST_ HD#

2

EC Beep

EC_BEEP #<3 0>

PCI Beep

SB_SPKR<21>

place close to chip

@

+3VS

1 2

R746 1 0_0402_5%

AZ_SYNC_H D

1 2

place close to chip

+MIC1_VRE FO_R +MIC1 _VREFO_L

1

@

CA37

CA37 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

RA7

1 2

47K_040 2_5%

RA8

1 2

47K_040 2_5%

10K_040 2_5%

@

1 2

CA80 22P _0402_50V8J

@

1 2

CA81 22P _0402_50V8J

@

1 2

CA82 22P _0402_50V8J

1

@

CA36

CA36 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

RA12

12

1

CA13

1 2

0.1U_040 2_16V4Z

1

CA18

0.1U_040 2_16V4Z

2

MONO_IN

Sense Pin Impedance

39.2K

SENSE A

A A

20K

10K

5.1K

39.2K

20K

10K

5

Codec Signals

PORT-I (PIN 32, 33)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

(PIN 48)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)SENSE B

PORT-H (PIN 20)

Function

Headphone out

Ext. MIC

Int. MIC

place close to chip

MIC_SENSE< 28>

NBA_PLU G<28>

4

RA10 20K _0402_1%R A10 2 0K_0402_1%

RA21 39.2 K_0402_1%RA21 39.2K_0402_1 %

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

SENSE_A

Compal Secret Data

2009/01/ 23 2010/01/ 23

3

Compal Secret Data

Deciphered Date

Title

Size Document N umber Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HD CODEC ALC272

PWWAA LA6841P M/B

Monday, August 16, 2010

1

of

27 44

of

27 44

of

27 44

0.1

Speaker Connector

placement near Audio Codec UA1

SPKR+<27>

SPKR-< 27>

SPKL+<27>

SPKL-<27>

SPKR+

SPKR-

SPKL+

SPKL-

0_0603_ 5%

RA30

RA34

0_0603_ 5%

RA35

RA36

12

CA25

CA26

12

CA19

CA20

12

Ext. Mic

MIC1_R_L<27>

MIC1_R_R< 27>

1

10U_080 5_10V4Z@

2

1

10U_080 5_10V4Z@

2

12

1

10U_080 5_10V4Z@

2

1

10U_080 5_10V4Z@

2

SPK_R1

2

CA27

CA27 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

@

1

SPK_R2

SPK_L1

2

CA24

CA24 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

@

1

SPK_L2

RA31

1K_0402 _5%

RA22

12

RA32 2.2K _0402_5%RA32 2.2K_ 0402_5%

RA33 2.2K _0402_5%RA33 2.2K_ 0402_5%

12

+MIC1_VRE FO_L

MIC1_L

MIC1_R

+MIC1_VRE FO_R

SPK_L1 SPK_L2 SPK_R1 SPK_R2

HeadPhone/LINE Out JACK

JLINE

5

DA4 PJDLC05 _SOT23-3@ DA4 PJDLC 05_SOT23-3@

1

DA5 PJDLC05 _SOT23-3@ DA5 PJDLC 05_SOT23-3@

1

3

2

3

2

JSPK

1

2

3

4

ACES_85 204-0400N

@

NBA_PLU G<27 >

HP_R<27>

HP_L<27>

LA6

1 2

KC FBM-L1 1-160808-121LM T 0603

KC FBM-L1 1-160808-121LM T 0603 LA7

LA7

1 2

KC FBM-L1 1-160808-121LM T 0603

1

DA6 PJDLC05 _SOT23-3

PJDLC05 _SOT23-3

HP_R_L

HP_L_L

3

2

@DA 6

@

CA45

100P_04 02_50V8J

CA46

100P_04 02_50V8J

1

CA11

@C A11

@

2

0.1U_040 2_16V4Z

For EMI

5

4

3

6 7

6

2

1

FOX_JA6 3331-B39S4-7F

CONN@

10

GND

9

GND

8

8 7

7

Ext.MIC/LINE IN JACK

JEXMIC

5

MIC1_L

MIC_SENSE< 27>

LA8

1 2

KC FBM-L1 1-160808-121LM T 0603

KC FBM-L1 1-160808-121LM T 0603 LA9

LA9

1 2

KC FBM-L1 1-160808-121LM T 0603

1

DA7 PJDLC05 _SOT23-3

PJDLC05 _SOT23-3

@DA 7

@

MIC1_L_RMIC1_R

MIC1_L_L

4

3

6 7

6

2

1

FOX_JA6 3331-B39S4-7F

CONN@

3

2

CA41

100P_04 02_50V8J

CA42

1

CA21

2

0.1U_040 2_16V4Z

CONN@

For EMI

10

GND

9

GND

8

8 7

7

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

Compal Electronics, Inc.

AUDIO AMP/MIC/SPK/VR

PWWAA LA6841P M/B

Monday, August 16, 2010

of

28 44

of

28 44

of

28 44

0.1

5

D D

+3VS_CR

+3VS

C C

1 2

RC4 0_0603 _5%RC4 0_ 0603_5%

1

CC1

4.7U_080 5_10V4Z

2

1

CC3

0.1U_040 2_16V4Z

2

4

1

CC4

CC4 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

@

CC2

CC2 100P_04 02_50V8J

100P_04 02_50V8J

12

RC1

6.19K_04 02_1%

12

USB20_N 10<19 >

SDWP _MSCLK_R

For EMI request

R63 0_ 0402_5%R63 0_0402_5% R62 0_ 0402_5%R62 0_0402_5%

1 2

RC24 0_0402_5%RC24 0_0402 _5%

1

CC10

CC10 10P_040 2_50V8J

10P_040 2_50V8J

2

@

1 2 1 2

+VCC_3IN1

3

SDWP _MSCLK

SD_DATA 0

+V1_8

1

2 3

4 5 6

7

8

9 10 11 12

UC1

REFE

DM DP

3V3_IN CARD_3V3 V18

XD_CD#

SP1 SP2 SP3 SP4 SP5

RTS5138 @

GPIO0

CLK_IN

XD_D7

SP14 SP13 SP12 SP11 SP10

SP9 SP8 SP7 SP6

EPAD

RTS5138 -GR_QFN24_4X4

25

UC1

RTS5137 @

2

17

24

23

22 21 20 19 18 16 15 14 13

CLK_48M _CR

SD_DATA 2_MS_DATA5 MS_DATA 1_SD_DATA3

SDCMD

MS_DATA 2_SDCLKSD_DATA 1

SDCD#

CLK_48M _CR < 16>USB20_P 10<1 9>

1 2

RC22 0_0402_5%RC22 0_0402 _5%

For EMI request

< 48MHz >

MS_DATA 2_SDCLK_R

CC9

1

10P_040 2_50V8J

@

2

1

< 2 in 1 Card Reader >

JREAD

CMD

VSS1

VDD

CLK

VSS2

WP

CD

B B

TAITW_ PSDAT3-09GLAS 1N14N @

A A

5

4

GND1 GND2 GND3 GND4

MS_DATA 1_SD_DATA3

1

D3

2 3 4

MS_DATA 2_SDCLK_R

5 6

7

D0

8

D1

SD_DATA 2_MS_DATA5

9

D2

10 11

12 13 14 15

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SDCMD

SD_DATA 0 SD_DATA 1

SDWP _MSCLK_R

SDCD#

1

CC6

0.1U_040 2_16V4Z

2

Compal Secret Data

2009/10/ 01 2010/10/ 01

3

Compal Secret Data

Deciphered Date

+VCC_3IN1

1

CC5

1U_0402 _6.3V4Z

2

Title

Size Document N umber Rev

Custom

Date: Sheet

for EMI request

CLK_48M _CR

12

R748

@

10_0402 _5%

1

C785

@

Compal Electronics, Inc.

RTS5138 Card Reader

C785

22P_040 2_50V8J

PWWAA LA6841P M/B

2

1

of

29 44Monday, August 1 6, 2010

0.1

5

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z C771

C771

1

C770

2

0.1U_040 2_16V4Z

for EMI request

CLK_PCI_E C

D D

C C

B B

A A

@

22P_040 2_50V8J

+3VL

C780 0.1 U_0402_16V4ZC780 0.1U_ 0402_16V4Z

+3VL

+3VS

C449

18P_0402_50V8J

10_0402 _5%

R739

R739 47K_040 2_5%

47K_040 2_5%

to avoid EC ent ry ENE test mo de

12

R738

1

C778

2

ECRST#

12

+3VL

1 2

R595 47K_040 2_5%R595 47K _0402_5%

1 2

R596 47K_040 2_5%R596 47K _0402_5%

KSI[0..7]<2 4>

KSO[0..17]<2 4>

RP23

1 8 2 7 3 6 4 5

EC_SMB_ CK1 EC_SMB_ DA1 EC_SMB_ CK2 EC_SMB_ DA2

2.2K_8P4 R_5%

CRY1

EC_CLK<21>

R389

CRY2CRY1

1 2

10M_040 2_5%

@

1

2

32.768KH Z_12.5PF_Q13M C14610002

5

1

Y4

2

OSC4OSC

NC3NC

CRY2

C450

PLT_RST #<8,19,25,26,31>

0.1U_040 2_16V4Z

12

KSO1

KSO2

KSI[0..7]

KSO[0..17]

R102 0_040 2_5%

R97 0_ 0402_5%R97 0_0402_5%

1 2

18P_0402_50V8J

MCH_TSA TN_EC#<8>

FAN_SPE ED1<4>

1 2

0.1U_040 2_16V4Z

GATEA20<20>

KB_RST#<20>

SERIRQ<21,31>

LPC_FRA ME#<20,31>

LPC_AD3<20,31> LPC_AD2<20,31> LPC_AD1<20,31> LPC_AD0<20,31>

CLK_PCI_E C<16>

EC_SCI#<21 >

RN3

RN3 100K_04 02_5%

100K_04 02_5%

EC_SMB_ CK1<35> EC_SMB_ DA1<35> EC_SMB_ CK2<4 > EC_SMB_ DA2<4 >

PM_SLP_ S3#<21> PM_SLP_ S5#<21>

EC_SMI#<2 1>

WOL_ EN<26>

INVT_PW M<17>

E51_TXD<25> E51_RXD<25>

ON/OFFBT N#<24,32>

PWR_ LED#<32>

NUM_LED #<24 >

R101 0_040 2_5%

1 2

@

100K_04 02_5%

1

C772

2

@

R624

4

0.1U_040 2_16V4Z

1

C773

2

CLK_PCI_E C

ECRST#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6

KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9

KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_ CK1 EC_SMB_ DA1 EC_SMB_ CK2 EC_SMB_ DA2

1

12

@

2

4

2

C774

C774 1000P_0 402_50V7K

1000P_0 402_50V7K

1

U43

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

C451

18P_0402_50V8J

+3VL

2

C775

C775 1000P_0 402_50V7K

1000P_0 402_50V7K

1

LPC & MISC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SPI Device Interface

SPI Flash ROM

GPIO

SM Bus

GPO

GPIO

GPI

GND

11

24

35

94

113

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+3VL

C769

1 2

0.1U_040 2_16V4Z

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

AGND

KB926QF E0_LQFP128_1 4X14

69

2009/06/ 12 2010/06/ 12

3

SPICS#

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

21 23 26 27

BATT_TE MPA

63 64 65 66 75 76

68 70 71 72

83 84 85 86

TP_CLK

87

TP_DATA

88

VGATE

97 98 99 109

119 120

1 2

126

R749 0_0402_ 5%R749 0 _0402_5%

128

73 74 89 90 91 92 93 95 121 127

100 101 102 103

PM_PW ROK

104 105 106 107 108

110 112 114 115 116 117 118

+EC_V18 R

124

Compal Secret Data

SYSON VR_ON ACIN_D

ENBKL

C782

4.7U_080 5_10V4Z

Deciphered Date

EC_BEEP # <27>

ACOFF <34,36>

BATT_TE MPA <35>

ADP_I <36> ADP_V <36 >

EN_DFAN 1 <4> IREF <36>

CHGVADJ <36>

EC_MUTE # < 27> USB_EN# <23>

TP_CLK <24>

TP_DATA < 24>

VGATE <8,21,4 0>

WOL_ EN# <26,33 >

LID_SW # <31>

EC_SI_SPI_SO <31>

EC_SO_S PI_SI <31>

SPI_CS# <31 >

FSTCHG <36> BATT_FU LL_LED# <32> CAPS_LE D# <2 4> BATT_CH G_LOW_LED # <32>

SYSON <38,39> VR_ON <40>

EC_RSMR ST# <21> EC_LID_OU T# <21> EC_ON <32,37>

BKOFF# <17>

XMIT_OFF# <25>

PM_SLP_ S4# <21 >

EC_THER M# <21> SUSP# <2 5,33,39> PBTN_OU T# <21>

USB_OC# 0 <19 ,23>

2

Reserve for EMI test

PLT_RST #

C784 100P_ 0402_50V8J

EC_SMI#

C781 100P_ 0402_50V8J

KB_RST#

C783 100P_ 0402_50V8J

BATT_TE MPA

C776 100P_ 0402_50V8JC776 100 P_0402_50V8J

ACIN_D

C779 100P_ 0402_50V8JC779 100 P_0402_50V8J

TP_CLK

1 2

TP_DATA

1 2

SYSON

VR_ON

+3VL

ENBKL

2

1

SPI_CLK <31 >

C857

C857 33P_040 2_50V8J

33P_040 2_50V8J

@

VGATE

PM_PW ROK

To reduce CMOS dischage fail rate

2

1 2

R742 3 30K_0402_5%R 742 330K_04 02_5%

ACIN_D

CH751H-4 0PT_SOD323-2

1 2

R745 0_0402_ 5%R745 0 _0402_5%

1 2

R747 100K_04 02_5%R747 100K_0402 _5%

ICH_PW ROK

PM_PW ROK

+3VS

C777 0.1 U_0402_16V4ZC777 0.1U_ 0402_16V4Z

5

2

P

B

Y

1

A

G

U5

3

NC7SZ08 P5X_NL_SC70-5

1 2

R752 0_0402_ 5%@R752 0_0402_ 5%@

Title

Size Document N umber Rev

Monday, August 16, 2010

Date: Sheet

1

1 2

@

1 2

@

1 2

@

1 2

+5VS

R7404.7 K_0402_5% R7404.7 K_0402_5%

R7414.7 K_0402_5% R7414.7 K_0402_5%

R7434.7 K_0402_5% R7434.7 K_0402_5%

R26210 K_0402_5% R2 6210 K_0402_5%

2 1

1 2

R231 10K_0402_ 5%R231 10K_0402_ 5%

1 2

R264 10K_0402_ 5%R264 10K_0402_ 5%

1 2

4

Compal Electronics, Inc.

PWWAA LA6841P M/B

LID_SW #

D64

ENE-KB926 RevD2

ACIN <21,36>

UMA_ENB KL <10>

ICH_PW ROK <8,21>

1

+3VALW

12

R76647K_0402 _5% R76647K_0402_5 %

of

30 44

of

30 44

of

30 44

0.1

SPI Flash (16Mb*1)

+3VL

20mils

1

C786

0.1U_040 2_16V4Z

SPI_CLK

reserve for EMI , close to U46

2

SPI_CS#<30>

SPI_CLK<30>

EC_SO_S PI_SI<3 0>

R953

33_0402 _5%

12

1 2

C852 33P_040 2_50V8JC852 33P_ 0402_50V8J

U47

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

MX25L16 05DM2I-12G_SO8-20 0mil

VSS

4

2

Q

EC_SI_SPI_SO <30>

Lid SW

+3VALW

U48

U48 APX9132 ATI-TRL_SOT23-3

APX9132 ATI-TRL_SOT23-3

VDD2VOUT

1

C822

0.1U_040 2_16V4Z

2

GND

1

10P_040 2_50V8J

LPC Debug Port

Please place the PAD under DDR DIMM.

H1

3

C823

1

2

LID_SW # <30>

SERIRQ<21,30>

R761 0 _0402_5%R761 0 _0402_5%

LPC_AD3<20,30>

LPC_AD1<20,30>

LPC_FRA ME#<20,30>

+3VS

1 2

H1

56

7

8

9

10

DEBUG_P AD

@

4

3

2

1

R764

22_0402 _5%

1 2 2

C820

C820 22P_040 2_50V8J

22P_040 2_50V8J

1

PLT_RST # <8,19,2 5,26,30>

LPC_AD2 <20,30>

LPC_AD0 <20,30>

CLK_PCI_D DR < 16>

close to the H9 boss

+5VALW

1

C68

0.1U_040 2_10V6K

2

for EMI

+3VALW +5VS

1

C62

0.1U_040 2_10V6K

2

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C65

0.1U_040 2_10V6K

2

2009/06/ 12 2010/06/ 12

B+

1

C66

0.1U_040 2_10V6K

2

Compal Secret Data

Deciphered Date

Title

Size Document N umber Rev

Date: Sheet

Compal Electronics, Inc.

SPI ROM/TP/KB/Debug

PWWAA LA6841P M/B

Monday, August 16, 2010

of

31 44

of

31 44

of

31 44

0.1

5

4

3

2

1

Power Button

+3VL

R765

D D

TOP side

BTM side

SW5

@S W5

@

TJG-533-V -T/R_6P

1

2

5

6

SW6

@SW 6

@

TJG-533-V -T/R_6P

1

2

5

6

R765

100K_04 02_5%

1 2

ON/OFFBT N#

3

4

3

For EMI request

4

1

C646

0.1U_040 2_16V4Z

@

2

ON/OFFBT N# <24,30>

EC_ON<30,37>

R767

10K_040 2_5%

61

2

1 2

51_ON# <34>

Q28A

Q28A 2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

another at page 36

ISPD

PCB

ZZZ

DAZ0HE0 0100

NB_GL40_R3

NB_GM45_R1

debug phase usi ng

DC-IN

PJP1

45@

U3

CANTIGA GL 40

GL40R3@

U3

CANTIGA GM4 5

GM45R1@

NB_GL40_R1

SB_R1

U3

CANTIGA GL 40

GL40R1@

U9

ICH9-M ES

ICH9R1@

Screw Hole

C C

DC-IN LED

R768

+5VALW

1 2

BATT CHARGE/FULL LED

+5VALW

B B

Vf=2.0V(typ),2. 4V(max) If=30mA(max)

D67

510_040 2_5%

2 1

HT-110UYG-CT _YEL/GRN

Vf=1.9V(typ),2. 4V(max) for am ber Vf=2.0V(typ),2. 4V(max) for gr een If=30mA(max)

D70

1

HT-210UD /UYG_AMB/GRN

footprint is SC510UYG000

PWR_ LED# <30>

510_040 2_5%

R773

2

1 2

3

1 2

510_040 2_5%

R774

BATT_CH G_LOW_LED # <30>

BATT_FU LL_LED# <30>

footprint is SC510UDG000

H5

1

H2

1

H_3P0

@

H_2P7x3P2 N

@

CPU

H14

1

H_3P0

@

H14

1

H_3P0

@

H9

1

H_3P0

@

H_3P7

@

H9

H33

1

H_3P0

@

H_3P7

@

H34

H10

1

H_3P0

@

1

H_3P7

@

H35

H11

1

H_3P0

@

1

H_3P7

@

H12

H6

1

H_3P0

@

H26

1

H_2P7N

@

H8

H36

1

H_3P0

@

H13

SB

H16

1

H_5P0N

@

MINI CARD

H18

1

H_3P3

@

H19

H15

H_5P0N

@

H_3P3

@

1

PCB Fedical Mark PAD

FD3@FD3

FD2@FD2

FD1@FD1

@

A A

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

3

Compal Secret Data

Deciphered Date

@

1

2

FD4@FD4

@

1

Title

Size Document N umber Rev

Date: Sheet

Compal Electronics, Inc.

Comm. SW/ Sub Conn./LEDS

PWWAA LA6841P M/B

Monday, August 16, 2010

1

32 44

0.1

of

A

B

C

D

E

+3VALW TO +3VS

+3VALW +3VS

Inrush current = 0A Inrush current = 0A

C824

Q32

8

D

7

D

6

D

1 1

5

1

2

4.7U_0805_10V4Z

D

SI4800BDY_SO 8

C830

C824

1

S

2

S

3

S

4

G

1

C831

2

0.022U_0402_25V7K

Vgs=10V,Id=9A,R ds=18.5mohm

1

2

1U_0402 _6.3V4Z

12

R787

R787 330K_04 02_5%

330K_04 02_5%

61

1

C825 4.7U _0805_10V4ZC825 4 .7U_0805_10V4 Z

2

R784

1 2

47K_040 2_5%

Q35A

2N7002D W-T/R7_SOT3 63-6

+VSB

SUSP SUSP

2

R781

5

470_0805_5%

1 2 3

Q35B

4

+5VALW TO +5VS

+5VALW

Q33

S

D

S

D

S

D

G

D

SI4800BDY_SO 8

1 2 3 4

1

C833

2

0.01U_0402_25V7K

8 7 6 5

1

C832

2

4.7U_0805_10V4Z

+5VS

1

C826

2

1U_0402 _6.3V4Z

12

R788

R788 200K_04 02_5%

200K_04 02_5%

@

4.7U_080 5_10V4Z

C827

R785

1 2

47K_040 2_5%

61

Q36A

2

2N7002D W-T/R7_SOT3 63-6

1

2

+VSB

R782

5

1 2 3

4

Vgs=10V,Id=14.5 A,Rds=6mohm

470_0805_5%

Q36B

+1.5V to +1.5VS

+1.5V

Q34

8 7 6 5

FDS6676 AS_SO8

FDS6676AS

1

C834

2

4.7U_0805_10V4Z

1

S

D

2

S

D

3

S

D

4

G

D

C835

+1.5VS

C828

1U_0402 _6.3V4Z

1

2

0.1U_0402_25V6

1

2

12

R789

R789 820K_04 02_5%

820K_04 02_5%

4.7U_080 5_10V4Z

C829

R786

1 2

220K_04 02_5%

61

Q37A

2

2N7002D W-T/R7_SOT3 63-6

1

2

+VSB

SUSP

5

R783

470_0805_5%

1 2 3

Q37B

4

+3VALW TO +3V_LAN

+3VALW

R793

100K_04 02_5%

@

2 2

WOL_ EN#<26,30>

@

0.1U_040 2_16V7K

1 2

R795 47 K_0402_5%@R795 47K_0402 _5%@

0.01U_04 02_25V7K

Vgs=-4.5V,Id=3A ,Rds<97mohm

2

C839

AO3413_ SOT23

@

1

2

C837

@

1

4.7U_080 5_10V4Z

+3VALW

Q41

S

G

2

D

1 3

@

Inrush current = 0A

1

C840

2

@

1

PJ35

1

JUMP_43 X39

@

2

+3V_LAN

1

C841 1U _0402_6.3V4Z

2

@

1

C43

10U_080 5_6.3V6M

2

+3VALW TO +3V_SB

1

C67

10U_080 5_6.3V6M

2

3 3

+5VALW

+0.75VS

R802

470_080 5_5%

1 2

13

D

Q30

2N7002_ SOT23-3

4 4

Security Class ification

2009/06/ 12 2010/06/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/06/ 12 2010/06/ 12

C

Compal Secret Data

Deciphered Date

SUSP

2

G

S

another at page 35

D

SUSP<38>

SUSP#<2 5,30,39>

R799

10K_040 2_5%

Title

Size Document N umber Rev

Date: Sheet

Compal Electronics, Inc.

PSWAA LA6511P M/B

Monday, August 16, 2010

R796

R796 100K_04 02_5%

100K_04 02_5%

1 2

SUSP

3

Q28B

Q28B 2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

another at page 35

5

4

1 2

DC-DC INTERFACE

33 44

E

0.1

of

A

B

C

D

PL1

PF1

DC301001M80

@

PJP1

1 1

SINGA_2DW -0005-B03

1

+

2

+

3

-

4

-

DC_IN_S1

PF1

21

7A_24VDC_429007.W RML

12

DC_IN_S2

PC1

1000P_0402_50V7K

SMB3025500YA_2P

1 2

12

PC2

100P_0402_50V8J

PL1

12

PC3

1000P_0402_50V7K

VIN

12

PC4

100P_0402_50V8J

1 2

1K_1206_5%

1 2

1K_1206_5%

1 2

1K_1206_5%

1 2

1K_1206_5%

1 2

1K_1206_5%

VIN

ACOFF<30, 36>

PD3

RLS4148_LL34-2

1 2

12

PR8

68_1206_5%

PQ4

TP0610K-T1-E3_SOT23- 3

2 2

BATT+

51_ON#<32>

PD4

RLS4148_LL34-2

100K_0402_1%

1 2

22K_0402_1%

12

PR11

PR10

12

+3VLP +3VL

TP0610K-T1-E3_SOT23- 3

N1

PC6

0.22U_0603_25V7K

PJ3

2

JUMP_43X39@

(100mA,40mils ,Via NO.= 2)

JUMP_43X39@

13

2

112

PR9

PR9 68_1206_5%

68_1206_5%

12

PC5

0.1U_0603_25V7K

VS

+5VALWP<37>

PR1

PR2

PR5

PR6

PR12

PreCHG

PD2

2

3

RB715F_SOT323-3

RLS4148_LL34-2

100K_0402_5%

1

PD1

2

PR3

12

PR4

100K_0402_5%

13

PQ2

DTC115EUA_SC70-3

PQ1

TP0610K-T1-E3_SOT23- 3

2

12

PR7

100K_0402_5%

13

2

PQ3

DTC115EUA_SC70-3

13

B+

PJ76

PJ332

3 3

+3VALWP

(5A,200mils ,Via NO.= 10) OCP=7.7A

+5VALWP

(5A,200mils ,Via NO.= 10) OCP=7.9A

(1.46A,60mils ,Via NO.= 3)

+VSBP +VSB

4 4

(120mA,40mils ,Via NO.= 1)

2

112

JUMP_43X118@

PJ352

2

112

JUMP_43X118@

PJ182

2

112

JUMP_43X39@

PJ2

2

112

JUMP_43X39@

A

+3VALW

+5VALW

+1.8V+1.8VP

+0.75VSP

(0.98A,40mils ,Via NO.= 2)

+1.5VP

(7.5A,300mils ,Via NO.= 15) OCP=8.87A

+1.05VSP +1.05VS

(7.5A,300mils ,Via NO.=15) OCP=8.41A

PJ76

2

112

JUMP_43X79@

PJ153

2

112

JUMP_43X118@

PJ152

2

112

JUMP_43X118@

PJ402

2

112

JUMP_43X118@

PJ403

2

112

JUMP_43X118@

+0.75VS

+1.5V

ACIN

Precharge detector

Min. typ. Max. H-->L 14.42V 14.74V 15.23V L-->H 15.39V 15.88V 16.39V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2010/06/122009/06/12

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DCIN & DETECTOR

KSWAA

D

34 44Monday, August 16, 2010

0.1

of

A

B

C

D

PF2

1 1

2 2

@

PJP2

1

2

3

4

5

5 GND GND GND GND

6

7

8

9

10 11 12 13

SUYIN_200045MR009G171ZR

EC_SMCA

PR20

100_0402_1%

BATT_S1

BATT_P3 BATT_P4 BATT_P5 EC_SMDA

1 2

1

2

3

PD5

PJSOT24C_SOT23-3

12

PR21

PR21 100_0402_1%

100_0402_1%

1 2

PR19

1K_0402_1%

PF2

10A_125V_451010MRL

21

12

PR16

6.49K_0402_1%

PR14

PR14 1K_0402_1%

1K_0402_1%

2

3

12

+3VLP

PD6

1

PJSOT24C_SOT23-3

VMB

+3VLP

BATT_TEMPA <30>

EC_SMB_DA1 <30>

EC_SMB_CK1 <30>

12

PC7

1000P_0402_50V7K

PL2

SMB3025500YA_2P

1 2

12

PC8

0.01U_0402_25V7K

BATT+

VL

0.1U_0402_16V4Z

SE070104Z80

VS_ON<37>

PH1 under CPU botten side :

CPU thermal protection at 90 degree C Recovery at 56 degree C

12

PC9

PU1

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

TMSNS1

RHYST1

TMSNS2

RHYST2

8

7

6

5

12

PR15

23.2K_0402_1%

PR18

10.7K_0402_1%

1 2

12

PH1

100K_0402_1%_NCP15W F104F03RC

Rset = 3 * Rtmh Rhyst = (Rset* Rtml) / (3*Rtml - Rset)

Rtmh at 90C = 7.79K, Rtml at 56C = 26.1K Rset = 3 * 7.79K = 23.37K ==> 23.2K Rhyst = (23.2K * 26.1K) / (3 * 26.1K - 23.2K) = 10.99K ==> 10.7K

PQ5

TP0610K-T1-E3_SOT23- 3

B+

3 3

VL

POK<21,37>

PR25

100K_0402_1%

1 2

PR26

1 2

0_0402_5%

PC12

@ PC12

@

.1U_0402_16V7K

12

2

G

1 2

22K_0402_1%

13

D

PQ6

PQ6 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PR24

12

PC10

PR23

@

100K_0402_1%

0.22U_0603_25V7K

13

12

PC11

@PC11

@

0.1U_0603_25V7K

2

0.1U_0603_25V7K

+VSBP

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2009/10/092008/10/09

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN / OTP

KSWAA

D

35 44Monday, August 16, 2010

0.1

of

A

PQ203

AO4435_SO8

VIN

BATT_ON

2

G

12

PR210

200K_0402_1%

2

61

D

PQ212A

S

DMN66D0LDW -7_SOT363-6

ACOFF<30,34>

1 1

2 2

8 7 6 5

2

13

PQ211

PQ211 DTC115EUA_SC70-3

DTC115EUA_SC70-3

47K_0402_5%

PACIN

1 2

DTC115EUA_SC70-3

ACOFF

4

PQ210

DTA144EUA_SC70-3

1 3

DMN66D0LDW -7_SOT363-6

PR211

PQ213

2

P2 P3

1 2 3

12

PC210

0.1U_0603_25V7K

12

PQ212B

34

D

5

G

S

13

PQ204

AO4407A_SO8

1 2 3 6

4

PR212

PR212 200K_0402_1%

200K_0402_1%

PR213

PR213 150K_0402_1%

150K_0402_1%

ADP_I<30>

IREF<30>

FSTCHG<30>

154K_0402_1%

120K_0402_1%

8 7

5

PC211

PC211 5600P_0402_25V7K

5600P_0402_25V7K

1 2

PC214

1 2

0.01U_0402_25V7K

PR220

12

PR221

PR216

10K_0402_1%

100K_0402_1%

PR218

1 2

10K_0402_1%

.1U_0402_16V7K

6251VREF 6251aclim

12

PC216

0.01U_0402_25V7K

PC215

1 2

1

2

ACSETIN

12

PR217

1 2

6800P_0402_25V7K

PR222

1 2

75K_0402_1%

20K_0402_1%

B

PR215

0.02_1206_1%

12

PC213

1 2

47K_0402_1%

PR223

B+

4

3

LDO 5.075V

6251VDD

12

PC212

2.2U_0603_6.3V6K

1

2

6251_EN CSON

3

4

5

6251VREF

6

7

8

9

10

11

12

PR219

12

PC236

10U_1206_25V6M

1 2

RB751V-40_SOD323-2

10_1206_5%

PU200

VDD

DCIN

ACSET

ACPRN

EN

CSON

CELLS

CSOP

ICOMP

CSIN

VCOMP

CSIP

PHASE

ICM

UGATE

VREF

CHLIM

BOOT

ACLIM

VDDP

VADJ

LGATE

PGND

GND

G5209S31U_SSOP24

PD201

PR227

24

23

22

21

20

19

18

17

16

15

14

13

VIN

1 2 12

DCIN

LX_CHG

DH_CHG

BST_CHG

6251VDDP

DL_CHG

HCB2012KF-121T50_0805

0.1U_0603_25V7K

1 2

PL201

PreCHG

12

PC217

1000P_0402_25V8J

PC218

12

ACPRN <37>

PR229 20_0402_5%PR229 20_0402_5%

PC219

0.047U_0402_16V7K

1 2

PR230

PR231 20_0402_5%PR231 20_0402_5%

PC220

0.1U_0603_25V7K

PR232 2_0402_5%PR232 2_0402_5%

PR205

1 2

0_0603_5%

PC221

4.7U_0603_6.3V6M

1 2

12

CSIN

CSIP

PR226

PR226 191K_0402_1%

191K_0402_1%

ACSETIN

1.26V

PR228

14.3K_0402_1%

1 2

20_0402_5%

12

1 2

BST_CHGA

12

0.1U_0603_25V7K

PD202

RB751V-40_SOD323-2

1 2

PR233 4.7_0603_5%PR233 4.7_0603_5 %

PC205

C

PC231

CSOP

12

6251VDD

D

CHG_B+

12

4.7U_0805_25V6-K

12

PC233

PC232

4.7U_0805_25V6-K

6

578

4

123

6

578

4

123

12

PC235

PC234

10U_1206_25V6M

1 2 13

PQ215

DTC115EUA_SC70-3

PQ215

PQ201

PQ201 AO4466L_SO8

AO4466L_SO8

PL202

10UH_MSCDRI-104A-10 0M-E_4.6A_20%

PQ202

AO4466L_SO8

PL202

1 2

12

PR206

4.7_1206_5%

12

PC206

680P_0603_50V7K

PR237

PR237 10K_0402_1%

10K_0402_1%

100K_0402_1%

BATT_ON

CHGCHG

1 2 3

2

PR238

PQ207

AO4435_SO8

4

12

PR235

1

2

0.02_1206_1%

8 7 6 5

PR236

1 2

47K_0402_1%

12

PC222

2200P_0402_25V7K

ACPRN

PQ216

SSM3K7002FU_SC70-3

4

3

12

PC202

10U_1206_25V6M

VIN

13

D

2

G

S

BATT+

@

12

PC204

PC203

10U_1206_25V6M

PR224

CHGVADJ<30>

3 3

CP mode

CHGVADJ=(Vcell-4)*9.445

Iada=0~3.421A(65W) CP= 92%*Iada; CP=3.15A

1 2

15.4K_0402_1%

ACPRN

PR225

31.6K_0402_1%

1 2

PR240

47K_0402_1%

DTC115EUA_SC70-3

12

PQ214

@

PR246

@

PR248

47K_0402_1%

VIN

12

PR247

@ PR247

@

10K_0402_1%

1 2

12

PC223

@ PC223

@

.1U_0402_16V7K

ADP_V <30>

6251VDD

PR241

12

PR242

PR242 10K_0402_1%

10K_0402_1%

13

2

PR241

10K_0402_1%

1 2

12

PR243

14.3K_0402_1%

PACIN

ACIN <21,30>

Vin Detector

High Low

18.089V

17.44V

309K_0402_1%

Vaclim=0.6221V(65W) PR222=75K, PR223=20K

1.26 / 14.3 * 205.3 = 18.089V

4 4

CC=0.25A~3.6A

IREF=0.9133*Icharge

IREF=0.228V~3.29V

VCHLIM need over 95mV

Vcell

4V

4.2V

4.35V

A

CHGVADJ

0V

1.889V

3.30575V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2009/04/28

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

CHARGER

Huron river

D

36 44Monday, August 16, 2010

of

0.1

5

4

3

2

1

2VREF_6182

12

PC363

1U_0603 _10V6K

D D

PR364

PR362

13K_040 2_1%

1 2

PR363

BST_3V

UG_3V

LX_3V

LG_3V

12

PR363

20K_040 2_1%

1 2

PR337

150K_04 02_1%

1 2

PU330

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

12

PR361

100K_0402_5%

2VREF_6182

3

ENTRIP2

6

5

3

4

VFB2

VREF

TONSEL

ENTRIP2

SKIPSEL

EN0

13

VIN16GND

14

15

UP6182_B+

12

PC365

0.1U_060 3_25V7K

Compal Secret Data

2009/11/ 13 2009/04/ 28

Compal Secret Data

UP6182_B+

PL331

HCB2012 KF-121T50_080 5

1 2

B+

12

PC368

2200P_0402_50V7K

C C

+3VALWP

330U_6.3 V_M

15mohm

Ipeak=5A Imax=3.5A F=305KHz Total Capacitor 220uF ESR 15mohm

B B

VS

PR373

ACPRN<3 6>

A A

EC_ON<30,32>

1 2

200K_04 02_1%

5

PC367

10U_1206_25V6M

1

PC332

2

PR371

1 2

100K_04 02_1%

2

12

PC360

10U_120 6_25V6M

4.7UH_SIL1 045R-4R7PF_6.3 A_30%

+

SF000002O00

VL

VS_ON<35>

2

G

13

G

PQ363

DTC115E UA_SC70-3

PL332

1 2

PR336

4.7_1206 _5%

PC336

680P_06 03_50V7K

PQ360A

DMN66D0 LDW-7_SOT3 63-6

13

D

PQ362

S

SSM3K70 02FU_SC70-3

PQ360A

PR370

100K_04 02_1%

12

PR372

42.2K_0402_1%

6

578

PQ331

AO4466L _SO8

4

123

786

12

123

ENTRIP1

61

D

S

12

PC370

2.2U_0603_10V6K

5

PQ332

4

AO4712L _SO8

PR374

@P R374

@

0_0402_ 5%

1 2

2

G

2

4

0.1U_060 3_25V7K

B+

ENTRIP1_H W < 20>

5

G

13

PQ361

PQ361 DTC115E UA_SC70-3

DTC115E UA_SC70-3

+3VLP

12

PC361

4.7U_0805_10V6K

PC335

1 2

PR360

499K_04 02_1%

1 2

@P R375

@

0_0402_ 5%

ENTRIP2

1 2

34

D

PQ360B

PQ360B DMN66D0 LDW-7_SOT3 63-6

DMN66D0 LDW-7_SOT3 63-6

S

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR335

1 2

0_0603_ 5%

1U_0402 _6.3V6K

PR375

Issued Date

PC362

ENTRIP2_H W <20>

PR364

30K_040 2_1%

1 2

PR365

19.1K_04 02_1%

1 2

ENTRIP1

PR357

150K_04 02_1%

1 2

1

2

VFB1

ENTRIP1

VO1

PGOOD

VBST1

DRVH1

LL1

DRVL1

VCLK18VREG5

17

TPS5112 5ARGER_QFN24 _4X4

12

PC364

4.7U_080 5_10V6K

Deciphered Date

UP6182_B+

10U_120 6_25V6M

24

23

22

21

20

19

BST_5V

UG_5V

LX_5V

LG_5V

PR355

1 2

0_0603_ 5%

POK <21,35 >

PC355

0.1U_060 3_25V7K

1 2

PQ352

AO4712L _SO8

6

578

PQ351

4

AO4466L _SO8

123

PL352

4.7UH_SIL1 045R-4R7PF_6.3 A_30%

786

5

4

12

123

PL352

1 2

PR356

4.7_1206 _5%

PC356

680P_06 03_50V7K

15mohm

+5VALWP

1

+

PC352

330U_6.3V_M

PC352

330U_6.3V_M

2

12

PC366

10U_120 6_25V6M

VL

Ipeak=5A Imax=3.5A F=245KHz Total Capacitor 220uF ESR 15mohm

Compal Electronics, Inc.

Title

Size Document N umber Rev

Huron river

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

3VALWP/5VALWP

Monday, August 16, 2010

1

of

37 44

of

37 44

of

37 44

0.1

5

D D

PR160

SYSON<30, 39>

+5VALW

C C

1 2

0_0402_5%

PR161

1 2

100_0603_5%

4.7U_0603_6.3V6K

PC161

12

PC160

.1U_0402_16V7K

12

@

12

PR162

1 2

10K_0402_1%

PR163

PR163 10K_0402_1%

10K_0402_1%

4

PR164

255K_0402_1%

1 2

PR155

DH

LX

DL

PR165

1 2

13

12

11

10

9

PR155

1 2

2.2_0603_1%

DH_1.5V

LX_1.5V

PR157

1 2

15.4K_0402_1%

DL_1.5V

+1.5V

BST_1.5V

14TP15

1

PU150

EN_SKIP

AGND7PGND

G5603RU1U_TQFN14_3P5X3 P5

8

BST

ILIM

VDD

100K_0402_5%

1 2

PC165 .1U_0402_ 16V7K@ PC165 .1U_0402_16V7K@

2

TON

3

OUT

4

VCC

VFB=0.75V

5

FB

6

PGOOD

DDR3_SM_PW ROK<8>

BST_1.5V-1

3

PC155

1 2

0.1U_0603_25V7K

+5VALW

PC162

4.7U_0805_10V6K

1 2

2

PL151

HCB2012KF-121T50_0805

1.5_B+

6

578

PQ151

4

AO4466L_SO8

123

PQ152

AO4712L_SO8

12

786

5

4

123

12

PC163

4.7U_0805_25V6-K

PL152

1.8UH_SIL104R-1R8PF_9.5 A_30%

PR156

4.7_1206_5%

PC156

680P_0603_50V7K

HCB2012KF-121T50_0805

12

PC164

4.7U_0805_25V6-K

12

1 2

12

PC166

2200P_0402_50V7K

1

+

PC152

PC152 330U_6.3V_M

330U_6.3V_M

2

1

B+

+1.5VP

Ipeak=7.5A Imax=5.25A F=315KHz Total Capacitor 880uF, ESR 5mohm

B B

PR260

0_0402_5%

5

1 2

PC260

@ PC260

@

.1U_0402_16V7K

SUSP<33>

A A

2

G

12

+1.5V

1

PJ75

1

JUMP_43X79

@

2

PC261

4.7U_0805_6.3V6K

1 2

13

D

PQ260

S

SSM3K7002FU_SC70-3

PR262

1K_0402_1%

PR263

12

1K_0402_1%

4

12

PC263

.1U_0402_16V7K

For shortage changed

PU75

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

PC262

PC262 10U_0603_6.3V6M

10U_0603_6.3V6M

+0.75VSP

12

3

+3VALW

PC264

1U_0603_10V6K

Compal Secret Data

Deciphered Date

2

6

5

NC

7

NC

8

NC

9

TP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

2010/06/122009/06/12

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

1.8V / 1.5V / 0.75V

KSWAA

38 44Monday, August 16, 2010

1

0.1

A

PR410

1 1

2 2

+5VALW

SUSP#<25,30,33>

PR411

100_0603_1%

1 2

4.7U_0603_6.3V6K

PC411

1 2

12

PR410

0_0402_5%

12

10K_0402_1%

PR412

4.02K_0402_1%

1 2

PR413

12

PC410

@

.1U_0402_16V7K

B

PR414

255K_0402_1%

1 2

PR405

PU400

2

TON

3

OUT

4

VCC

VFB=0.75V

5

FB

6

PGOOD

BST

EN_SKIP

AGND7PGND

G5603RU1U_TQFN14_3P5X3 P5

8

ILIM

VDD

BST_1.05VS

DH_1.05VS

13

DH

LX_1.05VS

12

LX

DL

PR407

1 2

11

15.4K_0402_1%

10

9

14TP15

1

PU400

0_0603_5%

1 2

DL_1.05VS

PR405

0.1U_0603_25V7K

+5VALW

PC405

1 2

PC412

4.7U_0805_10V6K

C

HCB2012KF-121T50_0805

12

PC416

@

12

HCB2012KF-121T50_0805

1

+

2

100U_25V_M

1.05VS_B+

6

578

PQ401

4

AO4466L_SO8

123

786

5

PQ402

4

AO4712L_SO8

123

12

PC413

PC414

4.7U_0805_25V6-K

PL402

1.8UH_SIL104R-1R8PF_9.5 A_30%

12

PR406

4.7_1206_5%

12

PC406

680P_0603_50V7K

PL401

1 2

1

+

2

D

12

PC417

PC418

10U_1206_25V6M

2200P_0402_50V7K

+1.05VSP

PC402

PC402 330U_6.3V_M

330U_6.3V_M

Ipeak=7.5A Imax=5.25A F=315KHz Total Capacitor 1430uF, ESR 2.5mohm

B+

+3VALW

1

2

12

PC182

4.7U_0805_6.3V6K

3 3

4 4

A

4.7U_0805_6.3V6K

SYSON<30,38>

PR183

0_0402_5%

1 2

@ PC183

@

0.01U_0402_25V7K

PJ181

PJ181 JUMP_43X39

JUMP_43X39

@

PC183

12

+5VALW

PU180

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

12

PC181

PC181 1U_0603_6.3V6M

1U_0603_6.3V6M

VOUT VOUT

GND

1

APL5930KAI-TRG_SO8

3 4

2

FB

2.4K_0402_1%

PR181

3K_0402_1%

PR182

B

12

PC184

0.01U_0402_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.8VP

PC185

22U_0805_6.3V6M

Compal Secret Data

Deciphered Date

C

Title

2010/06/122009/06/12

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

1.05V / 1.8V

KSWAA

D

39 44Monday, August 16, 2010

0.1

of

5

D D

PR550 0_0402_5%PR55 0 0_0402_5%

PM_DPRSLPVR<8, 21>

H_DPRSTP#<5,8,20>

12

1 2

12

PR553 0_0402_5%PR55 3 0_0402_5%

12

PR520

PC530 330P_0603_50V 8PC530 330P_0 603_50V8

12

PC531

PC531 330P_0603_50V8

330P_0603_50V8

PR536 1K_0402_1%PR536 1K_0402_1%

0.22U_0603_10V7K

+3VS

PR521

499_0402_1%

1 2

VGATE<8,21,30>

H_PSI#<5>

C C

VR_TT#

PR527 97.6K_0402 _1%PR527 97.6K_0402_1%

B B

VCCSENSE<6>

+CPU_CORE

PR534 20_0402_5%PR534 20_0402_5%

A A

1 2

PR523 147K_0402_1%PR523 147K_040 2_1%

PR525 13K_0402_1%PR525 13K_0402_1%

1 2

PR526 8.25K_0402 _1%PR526 8.25K_0402_1%

1 2

PC525 1000P_0402_50V 7KPC525 1000P_0402_50V7K

1 2

PC527 220P_0402_50V8JPC527 220P_0402_50V8 J

100_0402_1%

1 2

PR529

PR530 1K_0402_1%PR530 1K_0402_1%

1 2

PR533 0_0402_5%PR53 3 0_0402_5%

1 2

VSSSENSE<6>

PC5230. 022U_0603_25V7K PC5230.022U_0603_25V7K

1 2

PC5241000P _0402_50V7K PC5241000P_0402_ 50V7K

PC526 270P_0402_50V 7KPC526 270P_0402_50V7K

PC528 2200P_0402_50V 7KPC528 2200P_0402_50V7K

1 2

PR532

20_0402_5%

VCC_PRM

PR551 0_0402_5%PR55 1 0_0402_5%

1 2

12

PC540

1U_0603_6.3V6M

PU500

1.91K_0402_1%

1

2

3

4

5

6

7

8

9

10

11

12

PR528

1K_0402_5%

1 2

PR531 0_0402_5%PR53 1 0_0402_5%

PC532 180P_0402_50V 8JPC532 180P_0402_50V8J

1 2

PC535

1 2

PGOOD

PSI#

PMON

RBIAS

VR_TT#

NTC

SOFT

OCSET

VW

COMP

FB

FB2

PR535 4.53K_0402 _1%PR535 4.53K_0402_1%

47

48

3V3

CLK_EN#

VSEN

VDIFF

14

13

12

1 2

12

4

CPU_VID6

VR_ON

PR548

PR549

12

0_0402_5%

46

43

45

44

VR_ON

DPRSTP#

DPRSLPVR

ISL6266AHRZ-T_QFN48_7X7

DFB

RTN

DROOP

VO

17

15

16

18

PC529

0.01U_0603_50V7K

PC533 .1U_0402_ 16V7KPC 533 .1U_0402_16V7K

1 2

PC534 0.22U_040 2_6.3V6KPC5 34 0.22U_0402_6.3V6K

12

CPU_VID5

PR547

12

0_0402_5%

VSUM

19

<30>

CPU_VID4

CPU_VID3

PR545

PR546

12

0_0402_5%

GND21ISEN2

VIN

20

12

PC536

0.1U_0603_25V7K

12

PR537

11K_0402_1%

<6>

PR544

12

22

12

1 2

PR538

<6>

CPU_VID2

CPU_VID1

CPU_VID0

PR543

PR542

12

0_0402_5%

VID037VID138VID239VID340VID441VID542VID6

BOOT1

UGATE1

PHASE1

PGND1

LGATE1

PVCC

LGATE2

PGND2

PHASE2

UGATE2

BOOT2

NC

VDD

10_0603_5%

12

1 2

TP

ISEN1

23

24

ISEN1

ISEN2

1 2

PR540 1_0603_5%PR540 1_0603_5%

PC537

1U_0402_6.3V6K

PR539

VSUM

2.61K_0402_1%

PH501

10K_0402_5%_ERTJ0ER103 J

<6>

36

35

34

33

32

31

30

29

28

27

26

25

49

+CPU_B+

<6>

BOOT_CPU1

UGATE_CPU1

PHASE_CPU1

LGATE_CPU1

LGATE_CPU2

PHASE_CPU2

UGATE_CPU2

BOOT_CPU2

+5VALW

3

+5VALW

1 2

12

PC538

PC539

0.022U_0402_16V7K

2.2U_0603_6.3V6K

2.2_0603_1%

2.2_0603_1% PR505

PR505

1 2

PR515

2.2_0603_1%

1 2

PC515

0.22U_0603_10V7K

Rfset = (Fsw/2232)^(-1.1202) Fsw = 339KHz Rfset = 8.25K

PR541

PR541 1_0603_5%

1_0603_5%

0.22U_0603_10V7K

0.22U_0603_10V7K PC505

PC505

1 2

5

4

123

3 5

241

5

4

3 5

241

12

PC541

PC542

PQ501

TPCA8030-H_SOP-AD V8-5

PQ502

PQ502 MDU2653RH_POW ERDFN56-8-5

MDU2653RH_POW ERDFN56-8-5

PQ503

TPCA8030-H_SOP-AD V8-5

123

PQ504

PQ504 MDU2653RH_POW ERDFN56-8-5

MDU2653RH_POW ERDFN56-8-5

PC542

4.7U_0805_25V6-K

PC546

12

4.7U_0805_25V6-K

2

+CPU_B+

12

PC543

4.7U_0805_25V6-K

12

PR506

4.7_1206_5%

12

PC506

680P_0603_50V7K

12

PC547

4.7U_0805_25V6-K

12

PR516

4.7_1206_5%

12

680P_0603_50V7K

PC548

PC516

1

+

2

PC544

4.7U_0805_25V6-K

2

PC545

100U_25V_M

0.36UH_PCMC104T-R 36MN1R17_30A_20%

12

PR555

PR554

10K_0402_1%

3.65K_0805_1%

VSUM

12

0.36UH_PCMC104T-R 36MN1R17_30A_20%

12

PR558

3.65K_0805_1%

VSUM

1

+

2

PC549

PC550

100U_25V_M

@

PL503

1

2

12

PR556 0_0603_5%@ PR556 0_0603_5%@

1 2

ISEN1

PC552

0.22U_0603_10V7K

+CPU_B+

1

2

12

PR559

10K_0402_1%

PR560 0_0603_5%@ PR560 0_0603_5%@

1 2

0.22U_0603_10V7K

ISEN2

PL502

FBMA-L18-453215-900LM A90T_1812

1 2

1

+

2

100U_25V_M

4

3

12

PR557

1_0402_5%

VCC_PRM

PL504

4

3

12

PR561

PR561 1_0402_5%

1_0402_5%

PC555

VCC_PRM

Ipeak=38A Imax=26.6A Iocp=60A F=339KHz Total Capacitor 1320uF, ESR 3.75mohm

1

B+

+CPU_CORE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/11/12 2008/11/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

+CPU_CORE

Monday, August 16, 2010

KSWAA

0.1

40 44

1

0.1

5

4

3

2

1

PIR (Product Improve Record)

REVISION CHANGE: 0.1 TO 0.2 PVT NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------------------------------------

1. 07/23 32 Change R768,R773 from 120 ohm to 510 ohm for changed 5mA LED

2. 07/23 32 Chage LED power rail from +3valw to +5valw for changed 5mA LED

3. 07/23 23 del. L86,L87 EMI component for EMI request

4. 07/23 31 Add 1PCS(C62) 0.1uF_0402 on +3Valw-->GND for EMI request

D D

5. 07/23 31 Add 1PCS(C65) 0.1uF_0402 on +5Vs-->GND for EMI request

6. 07/23 31 Add 0.1uF_0402(C66) on B+-->GND close to H8 for EMI request

7. 07/23 28 JLINE and JEXMIC change from DC2300006300 to DC230004L00 for SMT DFx request

8. 07/27 30 change R742 from +3VALW to +3VL for LED no function issue

9. 07/27 8 add test pad ON U3.E36,U3.AK34 for ATE request

10. 07/27 33 change part number of Q30 (SB770020010) for Reduce BOM part type

11. 07/27 32 Change D67(power on LED) from SC510UYG000 to SC500009D00 for changed 5mA LED

12. 07/27 32 Change D70(DC in LED) from SC510UDG000 to SC500009800 for changed 5mA LED

13. 07/29 14 un-mount CD7,CD8,CD9,CD10,CD11,CD12,CD30,CD31,CD32,CD34,and mount(22uF) CD29,CD33 for design change

14. 07/29 11 For +1.5V ,C78 from 330uF to 390u (SF000002O00) for design change

15. 07/29 12 Change R82 and R81 from inductor to Bead for design change

16. 07/29 15 +0.75VS filter un-mount CD22 and CD44 for design change

17. 08/03 25 un-mount D77 for If +3V_WLAN is +3VS, please un-mount D77

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/06/12 2010/06/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR

PWWAA LA6841P M/B

41 44Monday, August 16, 2010

1

0.1

of

5

4

3

2

1

PIR (Product Improve Record)

REVISION CHANGE: 0.2 TO 0.3 Pre-MP NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------------------------------------

1. 08/09 29 Change net V1_8 to +v1_8 for power trace

2. 08/09 32 add R774 for LED control

D D

3. 08/12 32 un-mount SW5 and SW6 for Pre-MP do need power SW

4. 08/12 20 add R16 (for RTC battery) for design change

5. 08/13 26 add D69 and un-mount CL38 for EMI request

6. 08/13 26 CL37 from 0.1uF to 120pF for EMI request

7. 08/13 26 add CL35 for EMI request

8. 08/13 27 add CA51 for EMI request

9. 08/13 33 add C67 and C43 for EMI request

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/06/12 2010/06/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR

PWWAA LA6841P M/B

42 44Monday, August 16, 2010

1

0.1

of

5

4

3

2

1

PIR (Product Improve Record)

REVISION CHANGE: 0.1 TO 1.0 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------------------------------------

D D

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/06/12 2010/06/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR

PWWAA LA6841P M/B

43 44Monday, August 16, 2010

1

0.1

of

Version Change List ( P. I. R. List ) for Power Circuit

Version Change List ( P. I. R. List ) for Power CircuitVersion Change List ( P. I. R. List ) for Power Circuit

Page#

Page# Item Title

Page#Page#

PVT : modification from EVT

P35 mount ESD diode mount PD5, PD6

P36 EMI request add PC236 10uF

P37 EMI request add PC367 10uF, PC368 2200pF

P37 change 3/5V IC main source change PU330 to UP6182

P39 EMI request add PC417 10uF, PC418 2200pF

P40 adjust loadine change PR535 to 3.09K

P34 unify source change PD1 to SC11N414880

P36 unify source change PQ216 to SB000009610

P37 unify source change PQ362 to SB000009610

P40 unify source change PL502 to SM010020720

P40 turn on speed too quick change PQ502, PQ504 to MDU2653RH

P37 change cap to 330uF with same price change PC332, PC352 to SF000002000

P38 change cap to 330uF with same price change PC152 to SF000002000

P39 change cap to 330uF with same price change PC402 to SF000002000

P36 EMI request to mount snubber circuit, ISN caps add PR206, PC206; PC234, PC235

P37 EMI request to mount snubber circuit add PR336, PC336; PR356, PC356

P38 EMI request to mount snubber circuit & boost resistor add PR156, PC156; change PR155 to 2.2ohm

P39 EMI request to mount snubber circuit add PR406, PC406

P40 EMI request to mount snubber circuit add PR506, PC506; PR516, PC516

PreMP : modification from PVT

P34 increase precharge design margin add PR12 1K

P35 change OTP setting change PR15 to 23.2K, PR18 to 10.7K

P35 change source chagne PC9 to SE070104Z80

P37 change 3/5V IC main source change PU330 to TPS51125A

P38 change 0.75V IC main source change PU75 to G2992

P40 adjust loadine change PR535 to 4.53K

P40 adjust transient stability change PR527 to 220pF

Item Title Solution Description

Item TitleItem Title

EMI request add PC166 2200pFP38

Solution Description

Solution DescriptionSolution Description

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2009/06/12 2010/06/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

PIR

PWWAA LA6841P M/B

44 44Monday, August 16, 2010

0.1

Quanta Computer LA-6841P PWWAA Marseille LC, Satellite C660 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual