Quanta Computer LA-2811 HBT10 Sakhir 10E, Satellite A80, Satellite A85 Schematic

5
4
COMPAL CONFIDENTIAL
3
2
1
D D
MODEL NAME : COMPAL P/N : PCB NO : Revision :
LA-2811
1.0
HBT10
DA600001K10
Sakhir 10E
C C
LA-2811 Rev1.0 Schematic
HBT10 Schematics Document
uFCBGA/uFCPGA Mobile Dothan
B B
ATI RL300MB + SB200(IXP150)
2005-05-04<A>
Function/B LS-2811
LAN/B LS-2812
M/B LA-2811
USB/B LS-2813
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/01 2006/03/01
Deciphered Date
2
TP/B LS-2814
Title
Cover Sheet
Size Docu ment Number Re v
Sakhir 10E<HBT10> 1.0
Custom
Date: Sheet
星期三 五月
04, 2005
1
of
144,
A
B
C
D
E
Compal confidential
BLOCK DIAGRAM
Model Name : HBT10 File Na m e : L A-2811 Rev: 0.1
4 4
Dothan
(uFCPGA-478)
PAGE 4,5
Thermal Sensor
ADM1032
PAGE 4
Clock G enerator ICS951402AGT
PAGE 16
CPU VID
PAGE 40
FSB
400/533MHz
266/333MHz
LVDS
PAGE 15
(2.5V)
Memory Bus
SO-DI M M x 2 ( DDR)
BANK 0,1,2,3
PAGE 1 2 , 1 3,14
ATI-RL300MB
TV-OUT
3 3
RJ-45
PAGE 29
2 2
Slot 0
PAGE 27
CB PWR SW
TPS2211AIDBR
PAGE 27
PAGE 15
CRT
PAGE 15
Mini PCI
PAGE 25
LAN
RTL8100CL
CARDBUS
TI-1410
PAGE 24
PAGE 26
PCI BUS
33MHz (3.3V)
NEC USB
Controller
PAGE 41
VGA M9 Embeded
868 pin u-BGA
66MHz(3.3V)
ATI-IXP150
BGA 457 pin
LPC BUS 33MHz (3.3V)
Embedded Controller
ENE KB910
PAGE 6-->11
A-Link
PAGE 17-->20
PAGE 28
Primary ATA-100 (5V)
Secondary ATA-100 (5V)
AC-LINK
24.576MHz(3.3V)
IDE HDD
IDE ODD
AC97 CODEC
ALC 250D
MDC
Connector
PAGE 21
PAGE 21
PAGE 22
PAGE 32
Audio Amplifier
APA2121
PAGE 23
FAN Conn
RTC Battery
DC/DC Interface
LID/ Kill Sw itch Power Buttom& LED & Hibernation
DCIN&DETECTOR
BATT CONN/OTP
CHARGER
3V/5V/12V
DDR_1.5V/2.5V
1.8V/1.05V/1.25V
CPU_CORE
PAGE 30
PAGE 17
PAGE 33
PAGE 3 0,32
PAGE 34
PAGE 35
PAGE 36
PAGE 37
PAGE 38
PAGE 39
PAGE 40
USB 2.0 Port *3 0, 2, 4
1 1
A
480MHz(5V)
PAGE 29
B
Scan KB
PAGE 29
BIOS(512K)
& I/O PORT
PAGE 31
Security Classification
Issued Date
THIS SH EE T OF E NG INE E RIN G DRA WI NG IS T H E PR OPR IE TARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRA DE S EC RE T IN FO RM AT IO N. T H IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELEC TRONICS , INC. NEITHER THIS SHEET NOR THE INFORMATIO N IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTE N CONSEN T OF COMPA L ELECTRONICS, I NC.
2005/03/01 2006/03/01
C
Compa l S e c r et Data
Deciphered Date
D
Title
Notes
Size Document Num ber Re v
Sakhir 10E<HBT10> 1.0
Custom
Dat e: Sheet
星期三 五月
4, 2005
E
of
244, 0
A
B
C
D
E
Voltage Rails
Power Plane Description
VIN
1 1
2 2
B+ +CPU_CORE +CPUVID +VGA_CORE ON OF F O F F1.0V/1 . 2V sw i t c h ed p o w e r r ai l f o r VGA chip +1.25VS 1.25V switched power rail +1.5VS +1.8VS 1.8VS switched power rail OFFOFFON +2.5VALW 2.5V always on power rail ON*ONON +2.5V
+3VALW +3V +3VS
+5VS +12VALW +RTCVCC
Adapter power supply (19V) AC or bat t er y p o w e r ra i l fo r p o w er circuit. Core v o ltage for CPU
1.2V swi tch ed p ower rai l f or CPU AG TL Bus
AGP 4X/8X
2.5V po wer rail
2.5V switched power rail+2.5VS
3.3V always on power rail
3.3V po wer rail
3.3V switched power rail 5V always on power rail 5V switched power rail 12V always on power rail RTC power
S1 S3 S5
ON ON ONONON ON OFF ON OFF
ON OFF OFF ON OFF OFF
ON ON ON ON ON ON ON+5VALW ON ON ON
OFF
ON OFF ON OFF ON ON
ON
OFF OFF
OFF OFF ON*ON OFF OFF ON* OFF ON* ON
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM) ON
S4 (Suspend to Disk)
S5 (Soft OFF)
Board ID Table f or AD channel
Vcc Ra
Board ID
0 1 2 3 4 5 6
3.3V +/- 5% 100K +/- 5%
Rb
0
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
NC7
SIGNAL
Note : O N * mean s that thi s po wer p lan e is ON o nl y wi th AC p ow er avail abl e, o therw ise i t is O FF .
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
CardBus
LAN
Mini-PCI1
AD20
AD19
AD18
2
3PIRQD
1(for W i r eless Lan)
PIRQA
PIRQC/P IRQD
Board ID
0 1 2 3 4 5 6 7
HIGH
LOW
LOW
AD_BID
0.436 V
0.712 V
1.036 V
1.935 V
2.500 V
SLP_S5#STATE
HIGHHIGH
HIGH
HIGH
HIGH
LOWLOW
minV
0 V
PCB Revision
+VALW
ON
ON
ON
ON
ON
0.1
+V
ON
ON
OFF
OFF
AD_BID
0.503 V
0.819 V
1.650 V1.453 V
2.200 V
3.300 V
typV
0 V
+VSSL P_S3#
ON
OFF
OFF
OFF
Clock
ONON
LOW
OFF
OFF
OFF
V
AD_BID
0.289 V0.250 V0.216 V
0.538 V
0.875 V
1.264 V1.185 V
1.759 V
2.341 V
3.300 V
max
0 V
3 3
SKU ID
EC SM Bus1 address
Device
Smart Battery EEPROM(24C16/02)
(24C04)
Address Address
1010 000X b 1011 000Xb
EC SM Bus2 address
Device
ADM1032
1001 110X b0001 011X b
Table
10E
SKU_ID
1-Button 7-Buttons-W 7-Buttons-J
1-Butt on-J -HDD
Board ID Scan Code
7 5 4
3 2
10
311
IXP150 SM Bus address
Device
Clock Generator
4 4
(ICS951402AGT)
DDR DIMM0
DDR DIMM2
A
Address
1101 001Xb
1010 000Xb 1010 001Xb
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
C
Compal S e cr e t Data
Deciphered Date
Title
Notes
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10>
Custom
星期三 五月
D
Date: Sheet
005
E
1.0
of
344, 04, 2
5
H_A#[ 3. .31]6
D D
H_REQ#[0..4]6
C C
H_RS#[0..2]6
B B
A A
H_A#[3..31]
H_REQ#[0..4]
H_RS#[0..2]
H_ADSTB#06 H_ADSTB#16
CLK_BCLK16
CLK_BCLK#16
H_ADS#6 H_BNR#6
H_BPRI#6
H_DEFER#6
H_DRDY#6
H_HIT#6 H_HITM#6
H_LOCK#6
H_RESET#6
H_TRDY#6
H_DBSY#6
H_DPWR#6
H_PW RGOOD17
H_SLP#17
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_BR0#
H_IERR# H_RESET#
H_RS#0 H_RS#1 H_RS#2
ITP_DBRRESET# H_DPSLP#
H_DPRSLP#
PREQ# H_PROCHOT#
H_PW RGOOD H_SLP# ITP_TCK ITP_TDI ITP_TDO TEST1 TEST2 ITP_TMS ITP_TRST#
THERMDA THERMDC H_THERMTRIP#
AA3 AA2
AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1
AE5
A16 A15
B15 B14
B11
C19 A10 B10 B17
A13 C12 A12
F23 C11 B13
B18 A18 C17
4
JP5A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13# A14#
Y3
A15# A16# A17# A18# A19# A20# A21# A22# A23# A24#
ADDR GROUP
A25# A26# A27# A28# A29# A30# A31#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
U3
ADSTB0# ADSTB1#
ITP_CLK0 ITP_CLK1
BCLK0
HOST CLK
BCLK1
N2
ADS#
L1
BNR#
J3
BPRI#
N4
BR0#
L4
DEFER#
H2
DRDY#
K3
HIT#
K4 A4
J2
H1 K1 L2 M3
C8 B8 A9 C9
A7 M2 B7 G1
E4 A6
C5
CONTROL GROUP
HITM# IERR# LOCK# RESET#
RS0# RS1# RS2# TRDY#
BPM0# BPM1# BPM2# BPM3#
DBR# DBSY# DPSLP# DPRSTP# DPWR# PRDY# PREQ# PROCHOT#
PWRGOOD SLP# TCK TDI TDO TEST1 TEST2 TMS TRST#
THERMDA THERMDC THERMTRIP#
TYCO_ 1612365- 1_Dothan
Dothan
MISC
THERMAL DIODE
DATA GROUP
LEGACY CPU
D0# D1# D2# D3# D4# D5# D6# D7# D8#
D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DINV0# DINV1# DINV2# DINV3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
A20M#
FERR#
IGNNE#
INIT#
LINT0 LINT1
STPCLK#
SMI#
A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26
D25 J26 T24 AD20
C23 K24 W25 AE24 C22 L24 W24 AE25
C2 D3 A3 B5 D1 D4
C6 B4
H_D#[0..63]
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8
H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
3
H_D#[0..63] 6
H_DINV#0 6 H_DINV#1 6 H_DINV#2 6 H_DINV#3 6
H_DSTBN#0 6 H_DSTBN#1 6 H_DSTBN#2 6 H_DSTBN#3 6 H_DSTBP#0 6 H_DSTBP#1 6 H_DSTBP#2 6 H_DSTBP#3 6
H_A20M# 17 H_FERR# 17 H_IGNNE# 17 H_INIT# 17 H_INTR 17 H_NMI 17
H_STPCLK# 17 H_SMI# 17
2
1
EC_SMB_CK228 EC_SMB_DA228
1 2
R34
56_0402_5%
C32
12
R7 47K_0402_5%
2
B
2
1
C
Q5
E
2SC2411K_SC59
3
THERMDA THERMDC
H_INIT# H_A20M# H_SLP# H_INTR H_NMI H_SMI# H_STPCLK# H_IGNNE# H_PW RGOOD
2200P_0402_50V7K
+1.05VS +CPU_CORE
12
R6
@
47K_0402_5%
1 2
C13
0.1U_0603_25V7K@
+1.05VS
H_THERMTRIP#
Place Caps Close to CPU Socket
C31 180P_0402_50V8J
1 2
C33 180P_0402_50V8J
1 2
C30 180P_0402_50V8J
1 2
C35 180P_0402_50V8J
1 2
C21 180P_0402_50V8J
1 2
C28 180P_0402_50V8J
1 2
C29 180P_0402_50V8J
1 2
C34 180P_0402_50V8J
1 2
C20 180P_0402_50V8J
1 2
U4
2
D+
3
D-
8
SCLK
7
SDATA
ADM1032ARM_RM8
MAINPWON 34,35,37
PM_STPCPU#9,16,17,40
+3VS
1
C36
0.1U_0402_16V4Z
2
VDD1
ALERT#
THERM#
GND
PREQ# H_DPSLP# H_BR0# H_DPRSLP# ITP_TDI ITP_TDO H_RESET# ITP_TMS H_PROCHOT# H_IERR# H_PW RGOOD
ITP_DBRRESET#
ITP_TRST#
ITP_TCK TEST1 TEST2
1 6 4 5
R14 470_0402_5%
1
12
R27
10K_0402_5%@
+1.05VS
R11
470_0402_5%
1 2
Q1
2
12
2
Q7 MMBT3904_SOT23
3 1
3 1
MMBT3904_SOT23
R19 56_0402_5%@ R46 200_0402_5% R22 200_0402_5%
R36 56_0402_5%@ R21 150_0402_5% R38 54.9_0402_1%@ R37 54.9_0402_1%@ R43 40.2_0402_1% R41 56_0402_5% R35 56_0402_5% R15 200_0402_5%
R45 150_0402_5%
R39 680_0402_5% R40 27.4_0402_1% R10 1K_0402_5%@ R55 1K_0402_5%@
12 1 2 1 2
12
12
12
12
12
12
12
12
12
12
12
12
12
H_DPSLP#
+1.05VS
+3VS
THERMDA & THERMDC Trace / Space = 10 / 10 mil
5
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED FRO M TH E CU ST OD Y O F T HE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE I NFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHO UT PRIOR W RITTEN CONSENT O F COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Compal Secret Data
Deciphered Date
Title
Dothan(1/2)
Size Document Number R e v
Sakhir 1 0 E <H B T10> 1.0
Custom
Date: Sheet
T, 04, 2005
2
薑五月
444
1
of
5
JP5B
AE7
VCCSENSE
AF6
VSSSENSE
F26
VCCA0
B1
VCCA1
N1
VCCA2
AC26
VCCA3
P23
VCCQ0
W4
VCCQ1
D10
VCCP
D12
VCCP
D14
VCCP
D16
VCCP
E11
VCCP
E13
VCCP
E15
VCCP
F10
VCCP
F12
VCCP
F14
VCCP
F16
VCCP
K6
VCCP
L5
VCCP
L21
VCCP
M6
VCCP
M22
VCCP
N5
VCCP
N21
VCCP
P6
VCCP
P22
VCCP
R5
VCCP
R21
VCCP
T6
VCCP
T22
VCCP
U21
VCCP
D6
VCC
D8
VCC
D18
VCC
D20
VCC
D22
VCC
E5
VCC
E7
VCC
E9
VCC
E17
VCC
E19
VCC
E21
VCC
F6
VCC
F8
VCC
F18
VCC
E1
PSI#
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AD26
GTLREF
C16
BSEL0
C14
BSEL1
P25
COMP0
P26
COMP1
AB2
COMP2
AB1
COMP3
B2
RSVD
C3
RSVD
E26
RSVD
AF7
RSVD
AC1
RSVD
TYCO_1612365-1_Dothan
1
2
+1.05VS
C49
VCCSENSE VSSSENSE
GTL_REF0
CPU_BSEL0 CPU_BSEL1
COMP0 COMP1 COMP2 COMP3
R79 54.9_0402_1%@
1 2
R78 54.9_0402_1%@
1 2
+VCCA
1.8V FOR DOTHAN-A
D D
1 2
+1.8VS
R51 0_1206_5%@
1.5V FOR DOTHAN-B
1 2
+1.5VS
R54 0_1206_5%
C C
R58 1K_0402_1%
1 2
R59 2K_0402_1%
B B
20mils
1
C48
2
0.01U_0402_16V7K 10U_0805_6.3V6M
+CPU_CORE
+1.05VS
12
PSI#40
CPU_VID040 CPU_VID140 CPU_VID240 CPU_VID340 CPU_VID440 CPU_VID540
4
A2
VSS
A5
VSS
A8
VSS
A11
VSS
A14
VSS
A17
VSS
A20
VSS
A23
VSS
A26
VSS
B3
VSS
B6
VSS
B9
VSS
B12
Dothan
VSS
B16
VSS
B19
VSS
B22
VSS
B25
VSS
C1
VSS
C4
VSS
C7
VSS
C10
VSS
C13
VSS
C15
VSS
C18
VSS
C21
VSS
C24
VSS
D2
VSS
D5
VSS
D7
VSS
D9
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
D19
VSS
D21
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E10
VSS
E12
VSS
E14
VSS
E16
VSS
E18
VSS
E20
VSS
E22
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1
POWER, GROUNG, RESERVED SIGNALS AND NC
+1.05VS
1
+
2
150U_D2_6.3VM
330U_D_2VM
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
Vcc-core Decoupling
SPCAP,Polymer MLCC 0805 X5R
0.1U_0402_16V4Z
1
C411
C403
2
+CPU_CORE
1
+
C99
2
+CPU_CORE
10U_0805_6.3V6M
1
C50
2
+CPU_CORE
10U_0805_6.3V6M
1
C401
2
+CPU_CORE
10U_0805_6.3V6M
1
C105
2
+CPU_CORE
10U_0805_6.3V6M
1
C56
2
+CPU_CORE
10U_0805_6.3V6M
1
C53
2
0.1U_0402_16V4Z
1
2
3
330U_D_2VM
1
2
1
C68
2
1
C106
2
1
C61
2
1
C54
2
1
+
C100
2
C58
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
330U_D_2VM
1
C417
2
1
C414
2
1
C104
2
1
C426
2
1
C418
2
330U_D_2VM@
1
+
C402
2
10U_0805_6.3V6M
1
C69
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C65
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C423
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C107
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C102
2
10U_0805_6.3V6M
1
+
C421
4 x 270uF(12mOhm/4)
2
1
C422
2
1
C67
2
1
C425
2
1
C57
2
1
C60
2
C,uF ESR, mohm ESL,nH
2X330uF 7m ohm/2 3.5nH/2 35X10uF 5m ohm/35 0.6nH/35
0.1U_0402_16V4Z
1
1
C396
C397
2
0.1U_0402_16V4Z
C406
2
0.1U_0402_16V4Z
1
C409
2
10U_0805_6.3V6M
1
C404
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C66
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C424
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C51
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C405
2
10U_0805_6.3V6M
0.1U_0402_16V4Z
1
C420
2
0.1U_0402_16V4Z
C413
C103
C52
C415
C101
1
2
1
2
1
2
1
2
1
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C408
0.1U_0402_16V4Z
2
+CPU_CORE
1
C395
2
1
C398
2
1
C400
2
1
C410
2
JP5C
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
W21
VCC
Y6
VCC
Y22
VCC
AA5
VCC
AA7
VCC
AA9
VCC
AA11
VCC
AA13
VCC
AA15
VCC
AA17
VCC
AA19
VCC
AA21
VCC
AB6
VCC
AB8
VCC
AB10
VCC
AB12
VCC
AB14
VCC
AB16
VCC
AB18
VCC
AB20
VCC
AB22
VCC
AC9
VCC
AC11
VCC
AC13
VCC
AC15
VCC
AC17
VCC
AC19
VCC
AD8
VCC
AD10
VCC
AD12
VCC
AD14
VCC
AD16
VCC
AD18
VCC
AE9
VCC
AE11
VCC
AE13
VCC
AE15
VCC
AE17
VCC
AE19
VCC
AF8
VCC
AF10
VCC
AF12
VCC
AF14
VCC
AF16
VCC
AF18
VCC
M4
VSS
M5
VSS
M21
VSS
M24
VSS
N3
VSS
N6
VSS
N22
VSS
N23
VSS
N26
VSS
P2
VSS
P5
VSS
P21
VSS
P24
VSS
R1
VSS
R4
VSS
R6
VSS
R22
VSS
R25
VSS
T3
VSS
T5
VSS
T21
VSS
T23
VSS
TYCO_1612365-1_Dothan
Dothan
POWER, GROUND
1
T26
VSS
U2
VSS
U6
VSS
U22
VSS
U24
VSS
V1
VSS
V4
VSS
V5
VSS
V21
VSS
V25
VSS
W3
VSS
W6
VSS
W22
VSS
W23
VSS
W26
VSS
Y2
VSS
Y5
VSS
Y21
VSS
Y24
VSS
AA1
VSS
AA4
VSS
AA6
VSS
AA8
VSS
AA10
VSS
AA12
VSS
AA14
VSS
AA16
VSS
AA18
VSS
AA20
VSS
AA22
VSS
AA25
VSS
AB3
VSS
AB5
VSS
AB7
VSS
AB9
VSS
AB11
VSS
AB13
VSS
AB15
VSS
AB17
VSS
AB19
VSS
AB21
VSS
AB23
VSS
AB26
VSS
AC2
VSS
AC5
VSS
AC8
VSS
AC10
VSS
AC12
VSS
AC14
VSS
AC16
VSS
AC18
VSS
AC21
VSS
AC24
VSS
AD1
VSS
AD4
VSS
AD7
VSS
AD9
VSS
AD11
VSS
AD13
VSS
AD15
VSS
AD17
VSS
AD19
VSS
AD22
VSS
AD25
VSS
AE3
VSS
AE6
VSS
AE8
VSS
AE10
VSS
AE12
VSS
AE14
VSS
AE16
VSS
AE18
VSS
AE20
VSS
AE23
VSS
AE26
VSS
AF2
VSS
AF5
VSS
AF9
VSS
AF11
VSS
AF13
VSS
AF15
VSS
AF17
VSS
AF19
VSS
AF21
VSS
AF24
VSS
R57 27.4_0402_1%
1 2
R56 54.9_0402_1%
1 2
R80 27.4_0402_1%
1 2
R77 54.9_0402_1%
1 2
TRACE CLOSELY CPU < 0.5'
COMP0, COMP2 layout : Width 18mils and Space 25mils
A A
COMP1, COMP3 layout : Space 25mils
COMP0 COMP1 COMP2 COMP3
CPU_BSEL1
+1.05VS
R20 56_0402_5%
1 2
CPU_BSEL0
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+1.05VS
R42 56_0402_5%
1 2
R18
2
12
470_0402_5%
2005/03/01 2006/03/01
3
1 2
Q2 MMBT3904_SOT23
3 1
Deciphered Date
R171K_0402_1%
+3VS
BSEL0 11,16
Title
Dothan(2/2)
Size Document Nu mber Re v
Sakhir 10E<HBT10> 1.0
Custom
Date: Sheet
星期三 五月
2
04, 2005
1
of
544,
5
4
3
2
1
H_A#[3..31] H_REQ#[0..4]
H_D#[0..63]
U6A
M28
CPU_A3#
P25
CPU_A4#
M25
CPU_A5#
N29
CPU_A6#
N30
CPU_A7#
M26
CPU_A8#
N28
CPU_A9#
P29
CPU_A10#
P26
CPU_A11#
R29
CPU_A12#
P30
CPU_A13#
P28
CPU_A14#
N26
CPU_A15#
N27
CPU_A16#
M29
CPU_REQ0#
N25
CPU_REQ1#
R26
CPU_REQ2#
L28
CPU_REQ3#
L29
CPU_REQ4#
R27
CPU_ADSTB0#
U30
CPU_A17#
T30
CPU_A18#
R28
CPU_A19#
R25
CPU_A20#
U25
CPU_A21#
T28
CPU_A22#
V29
CPU_A23#
T26
CPU_A24#
U29
CPU_A25#
U26
CPU_A26#
V26
CPU_A27#
T25
CPU_A28#
V25
CPU_A29#
U27
CPU_A30#
U28
CPU_A31#
T29
CPU_ADSTB1#
L27
CPU_ADS#
K25
CPU_BNR#
H26
CPU_BPRI#
J27
CPU_DEFER#
L26
CPU_DRDY#
G27
CPU_DBSY#
F25
CPU_BR0#
K26
CPU_LOCK#
A17
CPU_CPURSET#
G25
CPU_RS2#
G26
CPU_RS1#
J25
CPU_RS0#
F26
CPU_TRDY#
J26
CPU_HIT#
H25
CPU_HITM#
A9
CPU_RSET
AH5
SUS_STAT#
AG5
SYSRESET#
C7
POWERGOOD
V28
CPU_COMP_N
W29
CPU_COMP_P
H23
CPVDD
J23
CPVSS
W28
CPU_VREF
Y29
THERMALDIODE_N
Y28
THERMALDIODE_P
B17
TESTMODE
CHS-216IGP9050A21_BGA718
R60 0_0402_5%@
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_ADSTB#1
H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY# H_DPWR# H_LOCK#
H_RESET# H_RS#2 H_RS#1 H_RS#0
H_TRDY# H_HIT# H_HITM#
NB_SUS_STAT_A# NB_RST_A#
COMP_N COMP_P CPVDD
C442
CPVSS
1 2 1 2
C45510U_0805_10V4Z
12
R61 10_0402_5%
D D
H_ADSTB#04
H_ADSTB#14
H_ADS#4
H_BNR#4
H_BPRI#4
H_DEFER#4
H_DRDY#4 H_DBSY#4
H_DPWR#4
H_LOCK#4
H_RESET#4
H_RS#24 H_RS#14 H_RS#04
H_TRDY#4
H_HIT#4
H_HITM#4
NB_PWRGD8,15,20
R65 24.9_0402_1%
1 2
R67 49.9_0402_1%
1 2
L32
1 2
1U_0603_10V4Z@
NB_GTLREF
+1.05VS
1 2
R108
1 2
270K_0402_5%
+1.8VS+2.5V
12
12
+1.05VS
R104 27K_0402_5%
NB_SUS_STAT_A#
R103 330K_0402_5%
NB_RST_A#
0.1U_0402_10V6K C89
R72
1 2
330_0402_5%
+1.8VS
12
HB-1M2012-121JT03_0805
**
12
R109 27K_0402_5%
D15
NB_SUS_STAT#18
C C
NB_RST#9,17
Note: P LACE CLOSE TO RC300M,
B B
L
USE 10/10 WIDTH/SPACE
+1.05VS
12
R64
49.9_0402_1%
R66
100_0402_1%
1 2
1
C84 1U_0603_10V4Z
2
21
RB751V_SOD323
D14
21
RB751V_SOD323
1
C88
220P_0402_50V7K
2
H_A#[3..31] 4 H_REQ#[0..4] 4 H_D#[0..63] 4
H_D#0
L30
CPU_D0# CPU_D1# CPU_D2# CPU_D3# CPU_D4# CPU_D5# CPU_D6# CPU_D7# CPU_D8#
PART 1 OF 6
CPU_D9# CPU_D10# CPU_D11#
DATA GROUP 0DAT A GROUP 1DATA GROUP 2DATA GROUP 3
CPU_D12# CPU_D13# CPU_D14# CPU_D15#
CPU_DBI0# CPU_DSTBN0# CPU_DSTBP0#
CPU_D16# CPU_D17# CPU_D18# CPU_D19# CPU_D20# CPU_D21# CPU_D22# CPU_D23# CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28# CPU_D29# CPU_D30# CPU_D31#
MISC.
CPU_DSTBN1# CPU_DSTBP1#
AGTL+ I/F
PENTIUM
IV
CPU_DSTBN2# CPU_DSTBP2#
CPU_DSTBN3# CPU_DSTBP3#
CPU_DBI1#
CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36# CPU_D37# CPU_D38# CPU_D39# CPU_D40# CPU_D41# CPU_D42# CPU_D43# CPU_D44# CPU_D45# CPU_D46# CPU_D47#
CPU_DBI2#
CPU_D48# CPU_D49# CPU_D50# CPU_D51# CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59# CPU_D60# CPU_D61# CPU_D62# CPU_D63#
CPU_DBI3#
ADDR. GROUP 1 ADDR. GROUP 0CONTROL
H_D#1
K29
H_D#2
J29
H_D#3
H28
H_D#4
K28
H_D#5
K30
H_D#6
H29
H_D#7
J28
H_D#8
F28
H_D#9
H30
H_D#10
E30
H_D#11
D29
H_D#12
G28
H_D#13
E29
H_D#14
D30
H_D#15
F29
H_DINV#0
E28
H_DSTBN#0
G30
H_DSTBP#0
G29
H_D#16
B26
H_D#17
C30
H_D#18
A27
H_D#19
B29
H_D#20
C28
H_D#21
C29
H_D#22
B28
H_D#23
D28
H_D#24
D26
H_D#25
B27
H_D#26
C26
H_D#27
E25
H_D#28
E26
H_D#29
A26
H_D#30
B25
H_D#31
C25
H_DINV#1
A28
H_DSTBN#1
D27
H_DSTBP#1
E27
H_D#32
F24
H_D#33
D24
H_D#34
E23
H_D#35
E24
H_D#36
F23
H_D#37
C24
H_D#38
B24
H_D#39
A24
H_D#40
F21
H_D#41
A23
H_D#42
B23
H_D#43
C22
H_D#44
B22
H_D#45
C21
H_D#46
E21
H_D#47
D22
H_DINV#2
D23
H_DSTBN#2
E22
H_DSTBP#2
F22
H_D#48
B21
H_D#49
F20
H_D#50
A21
H_D#51
C20
H_D#52
E20
H_D#53
D20
H_D#54
A20
H_D#55
D19
H_D#56
C18
H_D#57
B20
H_D#58
E18
H_D#59
B19
H_D#60
D18
H_D#61
B18
H_D#62
C17
H_D#63
A18
H_DINV#3
F19
H_DSTBN#3
E19
H_DSTBP#3
F18
H_DINV#0 4 H_DSTBN#0 4 H_DSTBP#0 4
H_DINV#1 4 H_DSTBN#1 4 H_DSTBP#1 4
H_DINV#2 4 H_DSTBN#2 4 H_DSTBP#2 4
H_DINV#3 4 H_DSTBN#3 4 H_DSTBP#3 4
A A
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Compal S e cr e t Data
Deciphered Date
Title
ATI RL300MB-AGTL+
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
2
Date: Sheet
005
1
of
644, 04, 2
5
D D
DDR_SBS012,13 DDR_SBS112,13
DDR_SRAS#12,13 DDR_SCAS#12,13
DDR_SWE#12,13
C C
DDR_CLK012
DDR_CLK0#12
DDR_CLK112
DDR_CLK1#12
DDR_CLK313
DDR_CLK3#13
DDR_CLK413
DDR_CLK4#13
DDR_SCKE012,13 DDR_SCKE112,13 DDR_SCKE213 DDR_SCKE313
DDR_SCS#012,13 DDR_SCS#112,13
B B
+1.8VS
DDR_SCS#213 DDR_SCS#313
L12
1 2
HB-1M2012-121JT03_0805
2.2U_0805_16V4Z
4
U6B
DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_DQ2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12
DDR_SMA13 DDR_DM0
DDR_DM1 DDR_DM2 DDR_DM3 DDR_DM4 DDR_DM5
DDR_DM7
DDR_SRAS# DDR_SCAS#
DDR_SWE# DDR_DQS0
DDR_DQS1 DDR_DQS2 DDR_DQS3 DDR_DQS4 DDR_DQS5 DDR_DQS6 DDR_DQS7
DDR_CLK0 DDR_CLK0#
DDR_CLK1 DDR_CLK1#
DDR_CLK3 DDR_CLK3#
DDR_CLK4 DDR_CLK4#
DDR_SCKE0 DDR_SCKE1 DDR_SCKE2 DDR_SCKE3
DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3
MPVDD
C115
MPVSS
1 2
AH19
AJ17 AK17 AH16 AK16 AF17 AE18 AF16 AE17 AE16
AJ20 AG15 AF15 AE23 AH20 AE25
AF10
AJ14 AF21 AH23 AK28 AD29 AB26
AF24 AF25
AE24
AH13 AE21
AJ23
AJ27 AC28 AA25
AK10 AH10
AH18
AJ19 AG30
AG29 AK11
AJ11 AH17
AJ18 AF28
AG28 AF13
AE13 AG14 AF14
AH26 AH27 AF26 AG27
AC18
AD18
AH7
AJ8 AF9
PART 2 OF 6
MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13 MEM_A14 MEM_A15
MEM_DM0 MEM_DM1 MEM_DM2 MEM_DM3 MEM_DM4 MEM_DM5 MEM_DM6 MEM_DM7
MEM_RAS# MEM_CAS#
MEM_WE# MEM_DQS0
MEM_DQS1 MEM_DQS2 MEM_DQS3 MEM_DQS4 MEM_DQS5 MEM_DQS6 MEM_DQS7
MEM_CK0 MEM_CK0#
MEM_CK1 MEM_CK1#
MEM_CK2 MEM_CK2#
MEM_CK3 MEM_CK3#
MEM_CK4 MEM_CK4#
MEM_CK5 MEM_CK5#
MEM_CKE0 MEM_CKE1 MEM_CKE2 MEM_CKE3
MEM_CS#0 MEM_CS#1 MEM_CS#2 MEM_CS#3
MPVDD
MPVSS
CHS-216IGP9050A21_BGA718
MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8
MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_DQ16 MEM_DQ17 MEM_DQ18 MEM_DQ19 MEM_DQ20 MEM_DQ21 MEM_DQ22 MEM_DQ23 MEM_DQ24 MEM_DQ25 MEM_DQ26 MEM_DQ27 MEM_DQ28 MEM_DQ29 MEM_DQ30 MEM_DQ31 MEM_DQ32 MEM_DQ33 MEM_DQ34 MEM_DQ35 MEM_DQ36 MEM_DQ37 MEM_DQ38 MEM_DQ39
MEM I/F
MEM_DQ40 MEM_DQ41 MEM_DQ42 MEM_DQ43 MEM_DQ44 MEM_DQ45 MEM_DQ46 MEM_DQ47 MEM_DQ48 MEM_DQ49 MEM_DQ50 MEM_DQ51 MEM_DQ52 MEM_DQ53 MEM_DQ54 MEM_DQ55 MEM_DQ56 MEM_DQ57 MEM_DQ58 MEM_DQ59 MEM_DQ60 MEM_DQ61 MEM_DQ62 MEM_DQ63
MEM_CAP1 MEM_CAP2
MEM_COMP
MEM_DDRVREF
AG6 AJ7 AJ9 AJ10 AJ6 AH6 AH8 AH9 AE7 AE8 AE12 AF12 AF7 AF8 AE11 AF11 AJ12 AH12 AH14 AH15 AH11 AJ13 AJ15 AJ16 AF18 AG20 AG21 AF22 AF19 AF20 AE22 AF23 AJ21 AJ22 AJ24 AK25 AH21 AH22 AH24 AJ25 AK26 AK27 AJ28 AH29 AH25 AJ26 AJ29 AH30 AF29 AE29 AB28 AA28 AE28 AD28 AC29 AB29 AC26 AB25 Y26 W26 AE26 AD26 AA26 Y27
C118 0.47U_0603_10V7K
AF6
C90 0.47U_0603_10V7K
AA29 AK19
AK20
3
DDR_DQ0 DDR_DQ1
DDR_DQ3 DDR_DQ4 DDR_DQ5 DDR_DQ6 DDR_DQ7 DDR_DQ8 DDR_DQ9 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15 DDR_DQ16 DDR_DQ17 DDR_DQ18 DDR_DQ19 DDR_DQ20 DDR_DQ21 DDR_DQ22 DDR_DQ23DDR_DM6 DDR_DQ24 DDR_DQ25 DDR_DQ26 DDR_DQ27 DDR_DQ28 DDR_DQ29 DDR_DQ30 DDR_DQ31 DDR_DQ32 DDR_DQ33 DDR_DQ34 DDR_DQ35 DDR_DQ36 DDR_DQ37 DDR_DQ38 DDR_DQ39 DDR_DQ40 DDR_DQ41 DDR_DQ42 DDR_DQ43 DDR_DQ44 DDR_DQ45 DDR_DQ46 DDR_DQ47 DDR_DQ48 DDR_DQ49 DDR_DQ50 DDR_DQ51 DDR_DQ52 DDR_DQ53 DDR_DQ54 DDR_DQ55 DDR_DQ56 DDR_DQ57 DDR_DQ58 DDR_DQ59 DDR_DQ60 DDR_DQ61 DDR_DQ62 DDR_DQ63
1 2 1 2
MEN_COMP
R93 49.9_0402_1%
1 2
DDR_DM[0..7]
DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_SMA[0..13]
2
DDR_DM[0..7] 12,13
DDR_DQ[0..63] 12,13
DDR_DQS[0..7] 12,13
DDR_SMA[0.. 13] 12,13
1
+2.5V+2.5V
Issued Date
12
R87 1K_0402_1%
12
R88 1K_0402_1%
3
2005/03/01 2006/03/01
Compal S e cr e t Data
Deciphered Date
2
Title
ATI RL 30 0MB-DDR I/F
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
Date: Sheet
005
1
of
744, 04, 2
2
C110
0.1U_0402_10V6K
0.1U_0402_10V6K
A A
L
1
DDR_VREF
2
C112
1
DDR_VREF trace width of 20mils and space 20mils(min)
Security Classification
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
1
A_AD[0..31]11,17
A_CBE#[0..3]17
D D
C C
?
B B
A_PAR11,17
A_STROBE#17
A_ACAT#17
A_END#17
PCI_PIRQA#17,26,41
+1.5VS
A_DEVSEL#17
A_SBREQ#17 A_SBGNT#17
R102
A_AD[0..31] A_CBE#[0..3]
A_AD0 A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31
A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3
A_PAR A_STROBE# A_ACAT#
1 2
1 2
169_0402_1%@
A_END# A_DEVSEL#
A_OFF# A_SBREQ#
A_SBGNT#
R381
4.7K_0402_5%
AGP8X_DET# AGPREF_8X
AGP_COMP
R99 0_0402_5%
A_OFF#17
+3VS
AK5
AJ5 AJ4
AH4
AJ3
AJ2 AH2 AH1 AG2 AG1 AG3 AF3 AF1 AF2 AF4 AE3 AE4 AE5 AE6 AC2 AC4 AB3 AB2 AB5 AB6 AA2 AA4 AA5 AA6
Y3 Y5 Y6
AG4 AE2 AC3 AA3
AD5 AC6 AC5 AD2
W4 AD3 AD6
W5
W6
12
V5 V6
K5 K6
M5
J6
J5
U6C
ALINK_AD0 ALINK_AD1 ALINK_AD2 ALINK_AD3 ALINK_AD4 ALINK_AD5 ALINK_AD6 ALINK_AD7 ALINK_AD8 ALINK_AD9 ALINK_AD10 ALINK_AD11 ALINK_AD12 ALINK_AD13 ALINK_AD14 ALINK_AD15 ALINK_AD16 ALINK_AD17 ALINK_AD18 ALINK_AD19 ALINK_AD20 ALINK_AD21 ALINK_AD22 ALINK_AD23 ALINK_AD24 ALINK_AD25 ALINK_AD26 ALINK_AD27 ALINK_AD28 ALINK_AD29 ALINK_AD30 ALINK_AD31
ALINK_CBE#0 ALINK_CBE#1 ALINK_CBE#2 ALINK_CBE#3
PCI_PAR/ALINK_NC PCI_FRAME#/ALINK_STROBE# PCI_IRDY#/ALINK_ACAT# PCI_TRDY#/ALINK_END# INTA# ALINK_DEVSEL# PCI_STOP#/ALINK_OFF#
ALINK_SBREQ# ALINK_SBGNT#
PCI_REQ#0/ALINK_NC PCI_GNT#0/ALINK_NC
AGP2_GNT#/AGP3_GNT AGP2_REQ#/AGP3_REQ
AGP8X_DET# AGP_VREF/TMDS_VREF
AGP_COMP
CHS-216IGP9050A21_BGA718
PART 3 OF 6
PCI Bus 0 / A-Link I/F
AGP_AD0/TMD2_HSYNC AGP_AD1/TMD2_VSYNC
AGP_AD11/TMD2_D11 AGP_AD12/TMD2_D10
AGP_AD16/TMD1_VSYNC AGP_AD17/TMD1_HSYNC
AGP_AD18/TMD1_DE
AGP_AD28/TMD1_D11 AGP_AD29/TMD1_D10
AGP_AD30/TMDS_HPD
AGP2_SBSTB/AGP3_SBSTBF/NC/LVDS_BLON
AGP2_SBSTB#/AGP3_SBSTBS/NC/ENA_BL AGP2_ADSTB0/AGP3_ADSTBF0/TMD2_CLK# AGP2_ADSTB0#/AGP3_ADSTBS0/TMD2_CLK AGP2_ADSTB1/AGP3_ADSTBF1/TMD1_CLK# AGP2_ADSTB1#/AGP3_ADSTBS1/TMD1_CLK
AGP2_CBE#0/AGP3_CBE0/TMD2_D7 AGP2_CBE#1/AGP3_CBE1/TMD2_DE
AGP2_CBE#2/AGP3_CBE2
AGP2_CBE#3/AGP3_CBE3/TMD1_D5
AGP2_IRDY#/AGP3_IRDY/GPIO8/I2C_CLK
AGP2_TRDY#/AGP3_TRDY/TMDS_DVI_CLK
AGP2_STOP#/AGP3_STOP/GPIO10/DDC_DATA
AGP2_FRAME#/AGP3_FRAME/TMDS_DVI_DATA
AGP2_DEVSEL#/AGP3_DEVSEL/GPIO9/I2C_DATA
PCI BUS 1 / AGP Bus (GPIO , TMDS , ZVPort)
AGP2_SBA0/AGP3_SBA#0/GPIO0/VDDC_CNTL0 AGP2_SBA1/AGP3_SBA#1/GPIO1/VDDC_CNTL1 AGP2_SBA2/AGP3_SBA#2/GPIO2/LVDS_BLON# AGP2_SBA3/AGP3_SBA#3/GPIO3/LVDS_DIGON
AGP2_SBA4/AGP3_SBA#4/GPIO4/STP_AGP#
AGP2_SBA5/AGP3_SBA#5/GPIO5/AGP_BUSY#
AGP2_SBA6/AGP3_SBA#6/GPIO6/LVDS_SSOUT
AGP2_SBA7/AGP3_SBA#7/GPIO7/LVDS_SSIN
AGP2_PIPE#/AGP3_DBI_HI
AGP2_NC/AGP3_DBI_LO
AGP2_RBF#/AGP3_RBF
AGP2_WBF#/AGP3_WBF
AGP_AD2/TMD2_D1 AGP_AD3/TMD2_D0 AGP_AD4/TMD2_D3 AGP_AD5/TMD2_D2 AGP_AD6/TMD2_D5 AGP_AD7/TMD2_D4 AGP_AD8/TMD2_D6 AGP_AD9/TMD2_D9
AGP_AD10/TMD2_D8
AGP_AD13 AGP_AD14 AGP_AD15
AGP_AD19/TMD1_D0 AGP_AD20/TMD1_D1 AGP_AD21/TMD1_D2 AGP_AD22/TMD1_D3 AGP_AD23/TMD1_D4 AGP_AD24/TMD1_D7 AGP_AD25/TMD1_D6 AGP_AD26/TMD1_D9 AGP_AD27/TMD1_D8
AGP_AD31
AGP_PAR
AGP_ST0 AGP_ST1 AGP_ST2
Y2 W3 W2 V3 V2 V1 U1 U3 T2 R2 P3 P2 N3 N2 M3 M2 L1 L2 K3 K2 J3 J2 J1 H3 F3 G2 F2 F1 E2 E1 D2 D1
E5 E6 T3 U2 G3 H2
R3 M1 L3 H1
P5 R6 T6 T5 P6 R5 C1 D3 N6 N5
C3 C2 D4 E4 F6 F5 G6 G5
L6 M6 L5
AGP_PAR
NB_EDID_CLK NB_EDID_DAT ENBKL#
R380
10K_0402_5%@
12
R89
2.2K_0402_5%
NB_PWRGD6,15,20
1 2
+3VS
2.2K_0402_5%
1 2
R91
2N7002_SOT23
ENBKL#
NB_EDID_CLK 15 NB_EDID_DAT 15
ENVDD 15 AGP_STP# 18 AGP_BUSY# 18
R374
10K_0402_5%
Q42
2
G
+3VALW
+3VS
R373 10K_0402_5%
1 2
13
1 2
13
D
S
2
G
D
S
Q43
2N7002_SOT23
ENBKL 28
+1.5VS
AGP8X_DET#
12
R101 0_0402_5%@
A A
5
12
R379 1K_0402_1%
AGPREF_8X
12
R377
1K_0402_1%
2
1
4
C513
0.1U_0402_10V6K
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Compal S e cr e t Data
Deciphered Date
2
Title
ATI RL300MB-AGP, ALINK BUS
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
Date: Sheet
005
1
of
844, 04, 2
5
4
3
2
1
FBM-11-160808-700T_0603
+3VS_VDDR3
D D
KC FBM-L11-201209-221LMAT_0805
KC FBM-L11-201209-221LMAT_0805
L31
+1.8VS
C C
CLK_AGP_66M
12
R86
10_0402_5%@
1
C98
15P_0402_50V8J@
2
CLK_MEM
12
R85
B B
10_0402_5%@
1
C97
15P_0402_50V8J@
2
1 2
0.1U_0402_10V6K L9
+1.8VS
+1.8VS
REFCLK1_NB16
1 2
KC FBM-L11-201209-221LMAT_0805
L33
KC FBM-L11-201209-221LMAT_0805
1
C433
2
0.1U_0402_10V6K
1 2
10U_0805_10V4Z
+3VS
1
1
C74
2
2
C482
0.1U_0402_10V6K
R63 715_0402_1%
R84
56_0402_5%
1 2
R76
10K_0402_5%
+2.5VS
L30
C76
0.1U_0402_10V6K
1
1
C497
2
2
NB_CRT_R15 NB_CRT_G15
NB_CRT_B15 CRT_HSYNC15 CRT_VSYNC15
1 2
CLK_NB_BCLK16
CLK_NB_BCLK#16
CLK_AGP_66M16
CLK_MEM16
12
12
1
C431
0.1U_0402_10V6K
2
+1.8VS_AVDDDI
+1.8VS_AVDDQ
PLLVDD_18
1
PLLVSS_18
C479
0.1U_0402_10V6K
2
CRT_HSYNC CRT_VSYNC
CLK_NB_BCLK CLK_NB_BCLK#
10K_0402_5%@
1 2 1 2
10K_0402_5%@
1 2 1 2
CLK_AGP_66M CLK_MEM
+2.5VS_AVDD
1 2
R81
R83 R37110K_0402_5%@ R37510K_0402_5%@
R37210K_0402_5%@
1 2
1
C476
0.1U_0402_10V6K
2
U6D
G9
VDDR3
H9
VDDR3
A14
AVDD_25
B13
AVSSN
B14
AVDDDI_18
C13
AVSSDI
A15
AVDDQ
B15
AVSSQ
H11
PLLVDD_18
G11
PLLVSS
F14
RED
F15
GREEN
E14
BLUE
C8
DACHSYNC
D9
DACVSYNC
C14
RSET
A4
XTALIN
B4
XTALOUT
A5
HCLKIN
B5
HCLKIN#
B6
SYS_FBCLKOUT
A6
SYS_FBCLKOUT#
D8
ALINK_CLK
B2
AGPCLKOUT
B3
AGPCLKIN
A3
EXT_MEM_CLK
D7
USBCLK
B7
REF27
C5
OSC
CHS-216IGP9050A21_BGA718
R82
10K_0402_5%@
1 2
+3VS
L34
PART 4 OF 6
CRT
CLK. GEN.
TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P
LVDS
TXCLK_UN
TXCLK_UP
TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P
TXCLK_LN TXCLK_LP
LPVDD_18
LPVSS
LVDDR_18 LVDDR_18
LVSSR LVSSR
C_R Y_G
COMP_B
SVID
DACSCL
DACSDA
CPUSTOP#
SYSCLK
SYSCLK#
10K_0402_5%@
D12 E12 F11 F12 D13 D14 E13 F13
E10 D10 B9 C9 D11 E11 B10 C10
A12 A11
B12 C12
B11 C11
TV_CRMA
E15
TV_LUMA
C15
TV_COMPS
D15
3VDDCCL
D6
3VDDCDA
C6
D5
A8 B8
R74
1 2
+1.8VS_LPVDD
+1.8VS_LVDDR
R370 75_0402_1%
R73
@
10K_0402_5%
1 2
TXB0-_NB 15 TXB0+_NB 15 TXB1-_NB 15 TXB1+_NB 15 TXB2-_NB 15 TXB2+_NB 15 TXBCLK-_NB 15 TXBCLK+_NB 15
TXA0-_NB 15 TXA0+_NB 15 TXA1-_NB 15 TXA1+_NB 15 TXA2-_NB 15 TXA2+_NB 15 TXACLK-_NB 15 TXACLK+_NB 15
TV_CRMA 15 TV_LUMA 15
1 2
3VDDCCL 15 3VDDCDA 15
0.1U_0402_10V6K
1
C85
C82
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C79
C80
2
0.1U_0402_10V6K
Q12
@
2N7002_SOT23
1 2
R8 0_0402_5%@
KC FBM-L11-201209-221LMAT_0805
1 2
1
1
C81
2
2
10U_0805_10V4Z
KC FBM-L11-201209-221LMAT_0805
1
1
C75
2
2
10U_0805_10V4Z
1 2
R92 1K_0402_5%
13
D
2
NB_RST# 6,17
G
S
PM_STPCPU# 4,16,17,40
L10
1 2
L8
+1.8VS
+1.8VS
+3VS
A A
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Compal S e cr e t Data
Deciphered Date
Title
ATI RL300MB-AGP, ALINK BUS
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
2
Date: Sheet
005
1
of
944, 04, 2
5
4
3
2
1
+1.5VS +2.5V
U6E
F10
VDD_CORE
F9
VDD_CORE
G12
VDD_CORE
H12
VDD_CORE
H13
VDD_CORE
M12
VDD_CORE
M13
VDD_CORE
M14
VDD_CORE
M17
VDD_CORE
D D
C C
B B
+1.05VS
+3VS
M18
VDD_CORE
M19
VDD_CORE
N12
VDD_CORE
N13
VDD_CORE
N14
VDD_CORE
N17
VDD_CORE
N18
VDD_CORE
N19
VDD_CORE
P12
VDD_CORE
P13
VDD_CORE
P14
VDD_CORE
P17
VDD_CORE
P18
VDD_CORE
P19
VDD_CORE
U12
VDD_CORE
U13
VDD_CORE
U14
VDD_CORE
U17
VDD_CORE
U18
VDD_CORE
U19
VDD_CORE
V12
VDD_CORE
V13
VDD_CORE
V14
VDD_CORE
V17
VDD_CORE
V18
VDD_CORE
V19
VDD_CORE
W12
VDD_CORE
W13
VDD_CORE
W14
VDD_CORE
W17
VDD_CORE
W18
VDD_CORE
W19
VDD_CORE
C16
VDDR2_CPU
D16
VDDR2_CPU
D17
VDDR2_CPU
E16
VDDR2_CPU
E17
VDDR2_CPU
F16
VDDR2_CPU
F17
VDDR2_CPU
G17
VDDR2_CPU
G21
VDDR2_CPU
G23
VDDR2_CPU
G24
VDDR2_CPU
H16
VDDR2_CPU
H17
VDDR2_CPU
H19
VDDR2_CPU
H21
VDDR2_CPU
H24
VDDR2_CPU
K23
VDDR2_CPU
K24
VDDR2_CPU
M23
VDDR2_CPU
P23
VDDR2_CPU
P24
VDDR2_CPU
T23
VDDR2_CPU
T24
VDDR2_CPU
U23
VDDR2_CPU
U24
VDDR2_CPU
W30
VDDR2_CPU
AA1
VDDL_ALINK
AA7
VDDL_ALINK
AA8
VDDL_ALINK
AC7
VDDL_ALINK
AC8
VDDL_ALINK
AD1
VDDL_ALINK
AD7
VDDL_ALINK
AD8
VDDL_ALINK
AK3
VDDL_ALINK
W8
VDDL_ALINK
CHS-216IGP9050A21_BGA718
CORE PWR
CPU I/F PWRALINK PWR
VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM
PART 5 OF 6
VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM
MEM I/F PWR
VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM
POWER
VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM
AGP PWR
VDDP_AGP/VDDP33 VDDP_AGP/VDDP33 VDDP_AGP/VDDP33
VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP
VDD_18 VDD_18 VDD_18 VDD_18
AA23 AA27 AB30 AC10 AC12 AC13 AC15 AC17 AC19 AC21 AC23 AC24 AC25 AC27 AD10 AD12 AD13 AD15 AD17 AD19 AD21 AD23 AD24 AD25 AD27 AE10 AE14 AE15 AE19 AE20 AE30 AE9 AF27 AG11 AG12 AG17 AG18 AG23 AG24 AG26 AG8 AG9 AJ30 AK14 AK23 AK8 V23 W23 W24 W25 Y25
A2 G4 H5 H6 H7 J4 K8 L4 M7 M8 N4 P1 P7 P8 R4 T8 U4 U5 U6 E7 F7 G8
AC22 AC9 H10 H22
+1.5VS
+3VS
+1.8VS
U6F
PART 6 OF 6
A29
VSS
AB23
VSS
AB24
VSS
AB27
VSS
AB4
VSS
AB8
VSS
AC1
VSS
AC11
VSS
AC14
VSS
AC16
VSS
AC20
VSS
AC30
VSS
AD11
VSS
AD14
VSS
AD16
VSS
AD20
VSS
AD4
VSS
AE27
VSS
AF30
VSS
AF5
VSS
AG10
VSS
AG13
VSS
AG16
VSS
AG19
VSS
AG22
VSS
AG25
VSS
AG7
VSS
AH28
VSS
AH3
VSS
GND
AJ1
VSS
AK13
VSS
AK2
VSS
AK22
VSS
AK29
VSS
AK4
VSS
AK7
VSS
B1
VSS
B16
VSS
B30
VSS
C19
VSS
C23
VSS
C27
VSS
C4
VSS
D21
VSS
D25
VSS
E3
VSS
E8
VSS
E9
VSS
F27
VSS
F4
VSS
F8
VSS
G14
VSS
G15
VSS
G18
VSS
G20
VSS
H14
VSS
H15
VSS
H18
VSS
H20
VSS
H27
VSS
H4
VSS
H8
VSS
J7
VSS
CHS-216IGP9050A21_BGA718
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
R23 R7 R8 T12 T13 T14 T15 T16 T17 T18 T19 T27 T4 U15 U16 U7 U8 V15 V16 V27 V4 V7 V8 W15 W16 W27 Y1 Y23 Y24 Y30 Y4 Y7 Y8 R19 R18 R17 R16 R15 R14 R13 R12 R1 P4 P27 P16 P15 N8 N24 N23 N16 N15 M4 M27 M16 M15 L8 L7 L25 L24 L23 K4 K27 J8
C59
22U_1206_10V4Z
C63
10U_0805_10V4Z
C123
10U_0805_10V4Z
+1.05VS
1
2
+1.8VS
1
2
0.1U_0402_10V6K
+3VS
1
2
0.1U_0402_10V6K
1
C447
C454
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C481
C491
2
1
C557
2
0.1U_0402_10V6K
1
C448
2
0.1U_0402_10V6K
1
C534
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C545
C552
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C451
2
1
2
0.1U_0402_10V6K
1
C532
2
1
1
C437
2
2
0.1U_0402_10V6K
1
C440
0.1U_0402_10V6K
2
1
C541
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C444
C456
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C525
2
2
1
2
0.1U_0402_10V6K
1
C489
2
0.1U_0402_10V6K
1
C445
0.1U_0402_10V6K
2
1
C487
2
+1.5VS
0.1U_0402_10V6K
1
1
C500
2
2
0.1U_0402_10V6K
1
1
C474
C527
2
2
1
C519
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C503
2
0.1U_0402_10V6K
C508
4
1
C515
2
0.1U_0402_10V6K
150U_D2_6.3VM
1
2
1
1
C509
2
2
0.1U_0402_10V6K
1
C464
2
0.1U_0402_10V6K
5
0.1U_0402_10V6K
1
C549
C501
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C494
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C485
2
1
C502
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
+
C505
C116
220U_D2_4VM
2
A A
C514
2
0.1U_0402_10V6K
+1.5VS
0.1U_0402_10V6K
1
C522
C517
2
0.1U_0402_10V6K
1
2
+2.5V
C124
0.1U_0402_10V6K
1
C477
C496
2
0.1U_0402_10V6K
1
1
+
C492
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C484
2
1
C555
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C526
2
0.1U_0402_10V6K
1
1
C547
C523
2
2
0.1U_0402_10V6K
1
1
C495
C467
2
2
0.1U_0402_10V6K
Compal S e cr e t Data
Deciphered Date
0.1U_0402_10V6K
1
1
C486
2
2
0.1U_0402_10V6K
0.01U_0402_25V4Z
1
2
0.01U_0402_25V4Z
C521
1
2
C493
2
0.1U_0402_10V6K
C465
1
C498
2
0.1U_0402_10V6K
1
1
C466
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C510
2
0.1U_0402_10V6K
C504
1
C470
2
0.1U_0402_10V6K
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
0.1U_0402_10V6K
1
1
C530
C524
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C506
C478
2
2
0.1U_0402_10V6K
2005/03/01 2006/03/01
0.1U_0402_10V6K
1
1
C472
2
2
1
C536
2
4.7U_0805_10V4Z
0.1U_0402_10V6K
1
C459
C537
2
0.1U_0402_10V6K
1
C540
2
4.7U_0805_10V4Z
Title
Size D ocu m ent N um b er R e v
Custom
Date: Sheet
1
1
C551
2
2
0.1U_0402_10V6K
ATI RL300MB-POWER
Sakhir 1 0 E<HBT10> 1 .0
星期三 五月
0.1U_0402_10V6K
1
C480
2
0.1U_0402_10V6K
005
C516
0.1U_0402_10V6K
1
C528
2
1
1
1
C462
2
2
0.1U_0402_10V6K
of
10 44, 04, 2
5
4
3
2
1
1 2
A_AD31
D D
C C
A_AD30
A_AD29
A_AD28
A_AD27
A_AD26
A_AD25
A_AD24
R388 4.7K_0402_5%@
1 2
R385 4.7K_0402_5%
R384
1 2
4.7K_0402_5%
1 2
R402 4.7K_0402_5%
1 2
R396 4.7K_0402_5%@
1 2
R390 4.7K_0402_5% @
1 2
R387 4.7K_0402_5%
1 2
R410 4.7K_0402_5%
1 2
R406 4.7K_0402_5%@
1 2
R405 4.7K_0402_5%
1 2
R399 4.7K_0402_5%@
1 2
R392 4.7K_0402_5%@
1 2
R389 4.7K_0402_5%
1 2
R408 4.7K_0402_5%@
1 2
R403 4.7K_0402_5%
+3VS
1 2
D45
2 1
CH751H-40_SC76
R38610K_0402_5%
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
BSEL0 5,16
A_AD[ 3 1 . . 3 0 ] : F SB CLK SPEED
DEFAULT: 01
00: 100 MHZ 01: 133 MHZ 10: 200MHZ 11:166 MHZ
A_AD2 9 : ST RAP CONFIGURATION
DEFAULT:1
0: REDU C EDE SET 1: FULL SET
A_AD28: SPREAD SPECTRUM ENABLE
DEFAULT:0
0: DISABLE 1: ENABLE
A_AD27: FrcShortReset#
DEFAULT: 1
0: TEST MODE 1: NORMAL MODE
A_AD26 : ENABLE IOQ
DEFAULT: 1
0: IOQ=1 1: IOQ=12
A_AD25/A_AD17 : CPU VOLTAGE[1..0]
DEFAULT: 10
00: 1.05V 01: 1.35V 11: 1.75V 10: 1.45V
AD25=1 DESTOP CPU AD25=0 MOBILE CPU AD17--DON'T CARE
A_AD2 4 : M O B I L E C P U SELECT
DEFAULT: 1
0: BANIAS CPU 1: OTHER CPU
A_AD[0..31]8, 17
A_AD[0..31]
R415 4.7K_0402_5%
A_AD19
A_AD18
A_AD17
A_PAR8,17
A_PAR
1 2 1 2
R413 4.7K_0402_5%@
R397 4.7K_0402_5%@
1 2 1 2
R393 4.7K_0402_5%
R404 4.7K_0402_5%@
1 2 1 2
R398 4.7K_0402_5%
R407 4.7K_0402_5%
1 2 1 2
R401 4.7K_0402_5%@
+3VS
+3VS
+3VS
+3VS
A_AD19 : MEMORY IO VOLTAGE
DEFAULT: 1
0: 1.8V 1: 2.5V
A_AD1 8 : ENABLE PHASE CALIBRATION
DEFAULT: 0
0: DISABLE 1:ENABLE
A_AD25/A_AD17 : CPU VOLTAGE[1..0]
DEFAULT: 0
00: 1.05V 01: 1.35V 11: 1.75V 10: 1.45V
PAR: EXTENDED DEBUG MODE
DEFAULT : 1
0: DEBUG MODE 1: NORMAL
1 2
A_AD23
B B
A_AD22
A_AD21
A_AD20
A A
5
R394 4.7K_0402_5%
1 2
R391 4.7K_0402_5%@
1 2
R414 4.7K_0402_5%
1 2
R411 4.7K_0402_5%@
1 2
R412 4.7K_0402_5%
1 2
R409 4.7K_0402_5%@
1 2
R400 4.7K_0402_5%@
1 2
R395 4.7K_0402_5%
+3VS
+3VS
+3VS
+3VS
4
A_AD2 3 : C L O CK BYPASS DISABLE
DEFAULT: 1
0: TEST MODE 1: NORMAL
A_AD22 : OSC PAD OUTPUT PCICLK
DEFAULT : 1
0: PCICLK OUT 1: OSC CLK OUT
A_AD2 1 : A UTO_CAL ENABLE
DEFAULT : 1
0: DISABLE 1: ENABLE
A_AD20 : INTERNAL CLK GEN ENABLE
DEFAULT : 0
0: DISABLE 1: ENABLE
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Compal S e cr e t Data
Deciphered Date
Title
ATI RL3 00MB-SYSTEM STRAP
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
2
Date: Sheet
005
1
of
11 44, 04, 2
A
1 1
DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DM[0..7]
DDR_SMA[0..13]
2 2
DDR_SCKE17,13
DDR_SCS#07,13
3 3
4 4
DDR_DQ[0..63] 7,13 DDR_DQS[0..7] 7,13
DDR_DM[0..7] 7,13
DDR_SMA[0..13] 7,13
10_0402_5%
10_0402_5%
R383
1 2
R378
1 2
B
DDR_DQ1 DDR_DQ4
DDR_DQS0 DDR_DQ3
DDR_DQ2 DDR_DQ13
DDR_DQ15 DDR_DQS1
DDR_DQ14 DDR_DQ10
DDR_CLK07 DDR_CLK0#7
DDR_DQ17 DDR_DQ21
DDR_DQS2 DDR_DQ23
DDR_DQ18 DDR_DQ29
DDR_DQ25 DDR_DQS3
DDR_DQ30 DDR_DQ31
DDR_CKE1DDR_SCKE1 DDR_SMA12
DDR_SMA9 DDR_SMA7
DDR_SMA5 DDR_SMA3 DDR_SMA1
DDR_SMA10
DDR_SBS07,13
DDR_SWE#7,13
DDR_SBS0 DDR_SWE# DDR_CS#0DDR_SCS#0 DDR_SMA13
DDR_DQ33 DDR_DQ37
DDR_DQS4 DDR_DM4 DDR_DQ39
DDR_DQ35 DDR_DQ45
DDR_DQ41 DDR_DQS5
DDR_DQ43 DDR_DQ47
DDR_DQ49 DDR_DQ53
DDR_DQ55 DDR_DQ51
DDR_DQ56 DDR_DQ63
DDR_DQS7 DDR_DQ62
DDR_DQ58
SMDATA13,16,18
SMCLK13,16,18
C
+2.5V +2.5V +2.5V
JP9
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
+3VS
197
VDD_SPD
199
VDD_ID
AMP_1565917-1
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
VSS
DM8
VDD
DU/RESET#
VSS
VSS
VDD
VDD CKE0
DU/BA2
VSS
VDD RAS#
CAS#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD
CK1#
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
CB4 CB5
CB6 CB7
A11
BA1
S1#
CK1
SA0 SA1 SA2
D
+2.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122 124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DDR_DQ0 DDR_DQ6
DDR_DM0 DDR_DQ5
DDR_DQ7 DDR_DQ12
DDR_DQ8 DDR_DM1
DDR_DQ9 DDR_DQ11
DDR_DQ20
DDR_DQ16 DDR_DM2
DDR_DQ22 DDR_DQ19
DDR_DQ24
DDR_DQ28
DDR_DM3 DDR_DQ26
DDR_DQ27
DDR_CKE0 DDR_SCKE0 DDR_SMA11
DDR_SMA8 DDR_SMA6
DDR_SMA4 DDR_SMA2 DDR_SMA0
DDR_SBS1 DDR_SRAS# DDR_SCAS# DDR_CS#1 DDR_SCS#1
DDR_DQ32
DDR_DQ36
DDR_DQ38
DDR_DQ34 DDR_DQ44
DDR_DQ40 DDR_DM5
DDR_DQ42 DDR_DQ46
DDR_DQ48
DDR_DQ52 DDR_DM6DDR_DQS6
DDR_DQ54
DDR_DQ50
DDR_DQ61
DDR_DQ60 DDR_DM7
DDR_DQ57
DDR_DQ59
E
0.1U_0402_10V6K
0.1U_0402_10V6K
L
DDR_SBS1 7,13
DDR_SRAS# 7,13 DDR_SCAS# 7,13
DDR_CLK1# 7 DDR_CLK1 7
2
C587
1
DDRA_VREF
2
C586
1
DDRA_VREF trace width of 20mils and space 20mils(min)
R382
10_0402_5%
12
R439 1K_0402_1%
12
R438 1K_0402_1%
12
12
R37610_0402_5%
F
DDR_SCKE0 7,13
DDR_SCS#1 7,13
G
H
Layout note
A
B
Layout note Place Add/Command resisotrs Close to Pin, max L = 300 mils
C
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2005/03/01 2006/03/01
E
Compal S e cr e t Data
Deciphered Date
F
Title
DDR-SODIMM SLOT0
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
Date: Sheet
G
005
of
12 44, 04, 2
H
A
+1.25VS
RP33
56_0804_8P4R_5%
56_0804_8P4R_5%
56_0804_8P4R_5%
56_0804_8P4R_5%
56_0804_8P4R_5%
DDR_SMA7
DDR_SMA8 DDR_SMA5 DDR_SMA1
33_0804_8P4R_5%
33_0804_8P4R_5%
33_0804_8P4R_5%
33_0804_8P4R_5%
RP32
RP30
RP29
RP26
RP24
RP21
RP22
RP23
1 8 2 7 3 6 4 5
RP16
18 27 36 45
56_0804_8P4R_5%
RP31
18 27 36 45
56_0804_8P4R_5%
RP28
18 27 36 45
56_0804_8P4R_5%
RP27
18 27 36 45
56_0804_8P4R_5%
RP25
18 27 36 45
56_0804_8P4R_5%
18 27 36 45
RP20
18 27 36 45
33_0804_8P4R_5%
RP19
33_0804_8P4R_5%
33_0804_8P4R_5%
18 27 36 45
RP13
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
45 36 27 18
DDR_DQS0 DDR_DM0 DDR_DQ5 DDR_DQ7
1 1
DDR_DQ9 DDR_DQ13 DDR_DQS1 DDR_DM1
DDR_DQ14 DDR_DQ15 DDR_DQ10 DDR_DQ11
DDR_DQ18 DDR_DQ19
2 2
3 3
4 4
DDR_DQ23 DDR_DQ24
DDR_DQ31 DDR_DQ30 DDR_DQ26 DDR_DQ27 DDR_DQ29
DDR_SCKE2 DDR_SMA11
DDR_SMA9
DDR_SCKE07,12 DDR_SCKE17,12
DDR_SCKE0 DDR_SCKE3
DDR_SBS1 DDR_SMA10 DDR_SBS0 DDR_SMA0
DDR_SMA4 DDR_SMA2 DDR_SMA6DDR_SMA12 DDR_SMA3
DDR_SCS#3 DDR_SCS#1 DDR_SCS#2 DDR_SCS#0
DDR_SW E# DDR_SMA13 DDR_SRAS# DDR_SCAS#
DDR_DQ1 DDR_DQ4 DDR_DQ0 DDR_DQ6
DDR_DQ12 DDR_DQ8 DDR_DQ2 DDR_DQ3
DDR_DQ21 DDR_DQ17 DDR_DQ16 DDR_DQ20
DDR_DQ22 DDR_DQS2DDR_DQ28 DDR_DM2
DDR_SCKE37
DDR_DQS3 DDR_DM3 DDR_DQ25
DDR_SBS07,12
DDR_SWE#7,12
DDR_SCS#27
DDR_SCKE3 DDR_SMA12 DDR_SMA9 DDR_SMA7
DDR_SMA5 DDR_SMA3 DDR_SMA1 DDR_SMA10
DDR_SBS0 DDR_SW E# DDR_SMA13 DDR_SCS#2
DDR_SCS#1 7,12
DDR_SCS#0 7,12
DDR TOPOLOGY 1 FOR SMAA[0, 3, 6:12], SBA[1, 0], SRAS#, SCAS#, SWE#
A
10_0804_8P4R_5%
10_0804_8P4R_5%
10_0804_8P4R_5%
B
DDR_CLK37 DDR_CLK3#7
45 36 27 18
RP17
45 36 27 18
RP14
45 36
DDR_SMAA13
27
DDR_CS#2
18
RP12
SMDATA12,16,18
SMCLK12,16,18
B
DDR_DQ0 DDR_DQ6
DDR_DQS0 DDR_DQ5
DDR_DQ7
DDR_DQ12
DDR_DQ8 DDR_DQS1
DDR_DQ9
DDR_DQ11
DDR_DQ20
DDR_DQ16
DDR_DQS2
DDR_DQ22 DDR_DQ19
DDR_DQ24
DDR_DQ28 DDR_DQS3
DDR_DQ26
DDR_DQ27
DDR_CKE3 DDR_SMAA12
DDR_SMAA9 DDR_SMAA7
DDR_SMAA5 DDR_SMAA3 DDR_SMAA1
DDR_SMAA10 DDR_BS0 DDR_WE# DDR_CS#2 DDR_SMAA13
DDR_DQ32 DDR_DQ36
DDR_DQS4
DDR_DQ38 DDR_DQ34
DDR_DQ44
DDR_DQ40
DDR_DQS5
DDR_DQ42
DDR_DQ46
DDR_DQ48 DDR_DQ52
DDR_DQS6
DDR_DQ54 DDR_DQ50
DDR_DQ61 DDR_DQ60
DDR_DQS7 DDR_DQ57
DDR_DQ59
+3VS
+2.5V
JP19
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
AMP_1565918-1
VREF VSS DQ0 DQ1 VDD DQS0 DQ2 VSS DQ3 DQ8 VDD DQ9 DQS1 VSS DQ10 DQ11 VDD CK0 CK0# VSS
DQ16 DQ17 VDD DQS2 DQ18 VSS DQ19 DQ24 VDD DQ25 DQS3 VSS DQ26 DQ27 VDD CB0 CB1 VSS DQS8 CB2 VDD CB3 DU VSS CK2 CK2# VDD CKE1 DU/A13 A12 A9 VSS A7 A5 A3 A1 VDD A10/AP BA0 WE# S0# DU VSS DQ32 DQ33 VDD DQS4 DQ34 VSS DQ35 DQ40 VDD DQ41 DQS5 VSS DQ42 DQ43 VDD VDD VSS VSS DQ48 DQ49 VDD DQS6 DQ50 VSS DQ51 DQ56 VDD DQ57 DQS7 VSS DQ58 DQ59 VDD SDA SCL VDD_SPD VDD_ID
C
C
+2.5V
2
VREF
4
VSS
6
DQ4
8
DQ5
10
VDD
12
DM0
14
DQ6
16
VSS
18
DQ7
20
DQ12
22
VDD
24
DQ13
26
DM1
28
VSS
30
DQ14
32
DQ15
34
VDD
36
VDD
38
VSS
40
VSS
42
DQ20
44
DQ21
46
VDD
48
DM2
50
DQ22
52
VSS
54
DQ23
56
DQ28
58
VDD
60
DQ29
62
DM3
64
VSS
66
DQ30
68
DQ31
70
VDD
72
CB4
74
CB5
76
VSS
78
DM8
80
CB6
82
VDD
84
CB7
86
DU/RESET#
88
VSS
90
VSS
92
VDD
94
VDD
96
CKE0
98
DU/BA2
100
A11
102
A8
104
VSS
106
A6
108
A4
110
A2
112
A0
114
VDD
116
BA1
118
RAS#
120
CAS#
122
S1#
124
DU
126
VSS
128
DQ36
130
DQ37
132
VDD
134
DM4
136
DQ38
138
VSS
140
DQ39
142
DQ44
144
VDD
146
DQ45
148
DM5
150
VSS
152
DQ46
154
DQ47
156
VDD
158
CK1#
160
CK1
162
VSS
164
DQ52
166
DQ53
168
VDD
170
DM6
172
DQ54
174
VSS
176
DQ55
178
DQ60
180
VDD
182
DQ61
184
DM7
186
VSS
188
DQ62
190
DQ63
192
VDD
194
SA0
196
SA1
198
SA2
200
DU
Security Classification
THIS SH EE T OF E N G INEER ING DR AWING I S THE PRO PRIETAR Y PROPERTY O F COMPAL EL ECTR ONICS, INC . AND C ONTAIN S CONF IDENT IAL AND T RA D E SECR ET INFO RMATION . THI S SHEET MAY NOT BE TRANSFER ED FR OM THE CU STODY OF T HE COMPET ENT DIVI SION O F R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONICS, I NC. NEITHER THIS S HEET NOR THE INF ORMATION IT CONT AINS MAY BE U SED BY O R DISC LOSED T O ANY THI RD PART Y WITHO UT PRI OR WRI TTEN CO NSENT OF COMPAL EL ECTRO NICS, INC.
DDR_DQ1 DDR_DQ4
DDR_DM0 DDR_DQ3
DDR_DQ2
DDR_DQ13 DDR_DQ15
DDR_DM1
DDR_DQ14
DDR_DQ10
DDR_DQ17
DDR_DQ21
DDR_DM2
DDR_DQ23 DDR_DQ18
DDR_DQ29
DDR_DQ25 DDR_DM3
DDR_DQ30
DDR_DQ31
DDR_CKE2 DDR_SMAA11
DDR_SMAA8 DDR_SMAA6
DDR_SMAA4 DDR_SMAA2 DDR_SMAA0
DDR_BS1 DDR_RAS# DDR_CAS# DDR_CS#3
DDR_DQ33
DDR_DQ37
DDR_DM4
DDR_DQ39
DDR_DQ35 DDR_DQ45
DDR_DQ41
DDR_DM5
DDR_DQ43 DDR_DQ47
DDR_DQ49
DDR_DQ53 DDR_DM6
DDR_DQ55
DDR_DQ51 DDR_DQ56
DDR_DQ63
DDR_DM7
DDR_DQ62
DDR_DQ58
Layout note Place these resistor
close by DIMM1, all trace length Max=0.8"
Issued Date
L
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
DDR_CLK4# 7 DDR_CLK4 7
+3VS
2005/03/01 2006/03/01
D
2
C148
0.1U_0402_10V6K
1
DDRB_VREF
2
C147
0.1U_0402_10V6K
1
DDRB_VREF trace width of 20mils and space 20mils(min)
10_0804_8P4R_5%
RP18
10_0804_8P4R_5%
RP15
10_0804_8P4R_5%
RP11
Compal Secret Data
Deciphered Date
D
+2.5V+2.5V
12
12
DDR_SCKE2 DDR_SMA11 DDR_SMA8
DDR_SMA6 DDR_SMA4 DDR_SMA2 DDR_SMA0
R131 1K_0402_1%
R132 1K_0402_1%
DDR_SBS1 DDR_SRAS# DDR_SCAS# DDR_SCS#3
DDR_SMA[0..13]
DDR_DQ S[0..7] DDR_DQ [0..63] DDR_DM[0..7]
DDR_SCKE2 7
DDR_SBS1 7,12 DDR_SRAS# 7,12 DDR_SCAS# 7,12
DDR_SCS#3 7
DDR_SMA[0..13] 7,12
DDR_DQS[0..7] 7,12 DDR_DQ [0..63] 7,12 DDR_DM[0..7] 7,12
+1.25VS
DDR_DQ36 DDR_DQ32 DDR_DQ38 DDR_DQ37
DDR_DQ33
DDR_DQ39 DDR_DQ35 DDR_DQ44 DDR_DQ40
DDR_DQ48 DDR_DQ52 DDR_DQ49 DDR_DQ53
DDR_DM6 DDR_DQS6 DDR_DQ54 DDR_DQ50
DDR_DQ56 DDR_DQ63 DDR_DQ57 DDR_DM7 DDR_DQS7
RP10
18 27 36
56_0804_8P4R_5%
56_0804_8P4R_5%
56_0804_8P4R_5%
56_0804_8P4R_5%
56_0804_8P4R_5%
Custom
45
RP8
18 27 36 45
RP5
18 27 36 45
RP4
18 27 36 45
RP2
18 27 36 45
Title
DDR-SODIMM SLOT1
Size Docum en t N u m ber Re v
Sakhir 10E<HBT10> 1.0
Date: Sheet
星期三 五月
E
RP9
18 27 36 45
56_0804_8P4R_5%
RP7
18 27 36 45
56_0804_8P4R_5%
RP6
18 27 36 45
56_0804_8P4R_5%
RP3
18 27 36 45
56_0804_8P4R_5%
RP1
18 27 36 45
56_0804_8P4R_5%
, 2005
E
DDR_DQ34 DDR_DQS4
DDR_DM4
DDR_DQS5 DDR_DM5 DDR_DQ41 DDR_DQ45
DDR_DQ46
DDR_DQ42 DDR_DQ43 DDR_DQ47
DDR_DQ61 DDR_DQ60 DDR_DQ51 DDR_DQ55
DDR_DQ62 DDR_DQ59
DDR_DQ58
13 44, 04
of
A
Layout note :
Distribute as close as possible to DDR-SODIMM0.
+2.5V
1 1
1
+
C165 220U_D2_4VM
2
1
C121
0.1U_0402_10V6K
2
@
1
C108
0.1U_0402_10V6K
2
1
C125
0.1U_0402_10V6K
2
1
C93
0.1U_0402_10V6K
2
1
C114
0.1U_0402_10V6K
2
1
C109
0.1U_0402_10V6K
2
1
C83
0.1U_0402_10V6K
2
1
C145
0.1U_0402_10V6K
2
1
C70
0.1U_0402_10V6K
2
B
1
C129
0.1U_0402_10V6K
2
1
C91
0.1U_0402_10V6K
2
1
C138
0.1U_0402_10V6K
2
1
C113
0.1U_0402_10V6K
2
1
C117
0.1U_0402_10V6K
2
1
C73
0.1U_0402_10V6K
2
1
C120
0.1U_0402_10V6K
2
1
C87
0.1U_0402_10V6K
2
C
D
E
Layout note :
Distribute as close as possible to DDR-SODIMM1.
+2.5V
0.1U_0402_10V6K
1
+
C399 220U_D2_4VM
2
1
C543
0.1U_0402_10V6K
2
1
C435
0.1U_0402_10V6K
2
1
C511
0.1U_0402_10V6K
2
1
C577
0.1U_0402_10V6K
2
1
C554
0.1U_0402_10V6K
2
1
C583
0.1U_0402_10V6K
2
1
C518
0.1U_0402_10V6K
2
1
C471
0.1U_0402_10V6K
2
1
C558
0.1U_0402_10V6K
2
1
C439
0.1U_0402_10V6K
2
1
C427
0.1U_0402_10V6K
2
1
C452
0.1U_0402_10V6K
2
1
C574
0.1U_0402_10V6K
2
1
C559
0.1U_0402_10V6K
2
0.1U_0402_10V6K
1
C566
0.1U_0402_10V6K
2
1
C468
2
1
C581
2
1
C450
0.1U_0402_10V6K
2
1
C582
0.1U_0402_10V6K
2
1
C473
0.1U_0402_10V6K
2
Layout note :
for EMI solution
1000P_0402_50V7K
C429
+2.5V
1
2
1
C458
2
1000P_0402_50V7K
1000P_0402_50V7K
1
C441
2
1000P_0402_50V7K
C78
1000P_0402_50V7K
1
2
C77
1
C95
2
1000P_0402_50V7K
1000P_0402_50V7K
1
C96
2
1
1
C564
2
2
1000P_0402_50V7K
1000P_0402_50V7K
1
C561
2
1
+
C407 220U_D2_4VM
2
2 2
3 3
+1.25VS
1
C533
0.1U_0402_10V6K
2
+1.25VS
1
C565
0.1U_0402_10V6K
2
+1.25VS
1
C570
0.1U_0402_10V6K
2
+1.25VS
1
C469
0.1U_0402_10V6K
2
1
+
C164 220U_D2_4VM
2
Layout note :
Place one cap close to every 2 pull up resistors termination to +1.25VS
1
C529
0.1U_0402_10V6K
2
1
C569
0.1U_0402_10V6K
2
1
C520
0.1U_0402_10V6K
2
1
C463
0.1U_0402_10V6K
2
2
C693
1
22U_1206_10V4Z
1
C499
0.1U_0402_10V6K
2
1
C428
0.1U_0402_10V6K
2
1
C434
0.1U_0402_10V6K
2
1
C490
0.1U_0402_10V6K
2
22U_1206_10V4Z
2
C694
1
22U_1206_10V4Z
1
C544
0.1U_0402_10V6K
2
1
C430
0.1U_0402_10V6K
2
1
C436
0.1U_0402_10V6K
2
1
C449
0.1U_0402_10V6K
2
2
C695
1
2
1
22U_1206_10V4Z
1
C432
0.1U_0402_10V6K
2
1
C483
0.1U_0402_10V6K
2
1
C475
0.1U_0402_10V6K
2
1
C578
0.1U_0402_10V6K
2
C696
1
C419
0.1U_0402_10V6K
2
1
C573
0.1U_0402_10V6K
2
1
C460
0.1U_0402_10V6K
2
1
C453
0.1U_0402_10V6K
2
1
C457
0.1U_0402_10V6K
2
1
C531
0.1U_0402_10V6K
2
1
C507
0.1U_0402_10V6K
2
1
C548
0.1U_0402_10V6K
2
1
C560
0.1U_0402_10V6K
2
1
C438
0.1U_0402_10V6K
2
1
C488
0.1U_0402_10V6K
2
1
C535
0.1U_0402_10V6K
2
1
C412
0.1U_0402_10V6K
2
+1.25VS
1
C512
0.1U_0402_10V6K
2
4 4
+1.25VS
1
C563
0.1U_0402_10V6K
2
1
C567
0.1U_0402_10V6K
2
1
C568
0.1U_0402_10V6K
2
1
C461
0.1U_0402_10V6K
2
1
C572
0.1U_0402_10V6K
2
1
C443
0.1U_0402_10V6K
2
1
C542
0.1U_0402_10V6K
2
1
C550
0.1U_0402_10V6K
2
1
C416
0.1U_0402_10V6K
2
1
C446
0.1U_0402_10V6K
2
1
C539
0.1U_0402_10V6K
2
1
C562
0.1U_0402_10V6K
2
1
C571
0.1U_0402_10V6K
2
Security Classification
1
C580
0.1U_0402_10V6K
2
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
C579
0.1U_0402_10V6K
2
2005/03/01 2006/03/01
C
Compal S e cr e t Data
Deciphered Date
Title
DDR SODIMM Decoupling
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
D
Date: Sheet
005
E
of
14 44, 04, 2
A
B
C
D
E
ENVDD
+3VS
5
U3
1
P
B
Y
2
A
G
TC7SH08FU_SSOP5
3
ENVDD
100P_0402_25V8K
4
R12
C72
1 2
0_0402_5% @
1
C94
2
1 2
R28 10K_0402_5%
+LCDVDD
12
R29
300_0402_5%
13
D
S
TV-OUT Conn.
22P_0402_50V8J@
C92
1 2
1 2
L11 CHB1608B121_0603
1 2
L7 CHB1608B121_0603
1 2
C71
1
22P_0402_50V8J@
100P_0402_25V8K
2
2
G
Q42N7002_SOT23
2
G
Q6
2N7002_SOT23
1
C64
2
+5VALW
12
10K_0402_5% R13
1 2
180K_0402_5%
13
D
S
2
D11
DAN217_SOT23@
LUMA_1 CRMA_1
C86
100P_0402_25V8K
R5
1
3
1
2
2
2
1
C14
0.01U _ 0402_16V7K
1
2
100P_0402_25V8K
+3VS
80mil
S
Q3
G
AOS 3401_SOT23
D
1 3
80mil
1
C16
0.1U_0402_16V4Z
2
D12 DAN21 7_SOT 23@
3
+3VS
JP7
1
1
2
2
3
3
4
4
SUYIN_030244FS004TX01ZA
1
C19
4.7U_0805_10V4Z
2
+LCDVDD
5
5
6
6
1
C12
4.7U_0805_10V4Z
2
1. Y ground
2. C ground
3. Y (luminance+sync)
4. C (crominance)
NB_EDID_CLK8
NB_EDID_DAT8
TXB0-_NB9 TXB0+_NB9
TXB1+_NB9
TXB1-_NB9 TXB2+_NB9 TXA2+_ NB 9 TXB2-_NB9
TXBCLK-_NB9 TXBCLK+_NB9
BKOFF#28
C11
12
0.1U_ 0 402_16V4Z
NB_PWRGD6,8,20
1 1
ENVDD8
2 2
TV_LUMA9
75_0402_1%
TV_CRMA9
75_0402_1%
R75
12
R62
12
Width: 40mils
KC FBM-L11-201209-221LMAT _0805
+3VS
B+
C23 1000P_0402_50V7K
B1+
1 2
C27 1000P_0402_50V7K
1 2
D4
CH751H-40_SC76
L6
12
NB_EDID_CLK NB_EDID_DAT
+3VS
21
1 2
B1+
R47 10K_0402_5%
DISPOFF#
JP3
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
ACES_ 8 7216-4012
1
C37
2
220P_0402_50V7K
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
NB_EDID_CLK
NB_EDID_DAT
DAC_BRIG INVT_PWM DISPOFF#
C25 47P_ 0 402_50V8J@
1 2
C24 47P_ 0 402_50V8J@
1 2
DAC_BRIG 28 INVT_PWM 28
+LCDVDD
TXA0-_NB 9 TXA0+_ NB 9
TXA1-_NB 9
TXA1+_ NB 9
TXA2-_NB 9 TXACLK-_NB 9
TXACLK+_NB 9
B+
Use for B+ discharge
R9
100K_0402_5%@
1 2
3 3
NB_CRT_R9
NB_CRT_G9
NB_CRT_B9
CRT_HSYNC9
4 4
CRT_VSYNC9
R275_0402_1%
12
R375_0402_1%
12
R475_0402_1%
12
SN74A H C T1G125GW_SOT353-5
A
C393
1 2
0.1U_0402_16V4Z
U1
6P_0402_50V8K
+CRT_VCC
1
5
P
OE#
A2Y
G
3
1
C10
2
6P_0402_50V8K
DACA_HSYNC_1
+CRT_VCC
4
1 2
C7
0.1U_ 0 402_16V4Z
L3
1 2
FCM2012C-800_0805
L4
1 2
FCM2012C-800_0805
1 2
FCM2012C-800_0805
1
1
C8
C9
2
2
6P_0402_50V8K
1 2
5
1
P
DAC A_VSYNC_1
4
OE#
A2Y
U2
G
SN74A H C T1G125GW_SOT353-5
3
L5
R1 1K_0402_5%
D1
DAN21 7_SOT 23@
1
C1
2
6P_0402_50V8K
L1 CHB1608B121_0603
1 2
L2 CHB1608B121_0603
1 2
B
2
1
CRT_R
CRT_G
CRT_B
3
D2
DAN21 7_SOT 23@
2
1
C2
2
6P_0402_50V8K
1
C5
@
68P_0402_50V8K
2
1
3
D3
DAN21 7_SOT 23@
1
2
3
1
C4 6P_0402_50V8K
2
DACA_HSYNC_2
DAC A_VSYNC_2
1
C6 68P_0402_50V8K@
2
+5VS +CRT_VCC+R_CRT_VCC
D43
2 1
CH491D_SC59
+3VS
F1
1A_6VDC_MINISMDC110
0.1U_ 0 402_16V4Z
1
C3
2
220P_0402_50V7K
1
C392
2
220P_0402_50V7K
C
21
CRT Conn.
1
C394
2
1
C391
2
Security Classification
Issued Date
THIS SHEET OF ENGIN EERING DRAWI N G IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AN D CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZ ED BY COM PAL ELECT RONIC S, INC. NEITHE R THIS S HEET NO R THE IN FORMAT ION IT C ONTAIN S MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT PRIOR W RITTEN CONSEN T OF COM PAL ELECT RONICS , INC.
JP1
6
11
1 7
12
2 8
13
3
+CRT_VCC
9
14
4 10 15
5
SUYIN_070453FR015S208CU
220P_0402_50V7K
R562
@
0_0603_5%
1 2
+CRT_VCC
16 17
R559
@
0_0603_5%
1 2
DDC_DATA_1
DDC_CLK_1
2005/03/01 2006/03/01
+CRT_VCC
R365
2.2K_0402_5%
1 2
2N7002_SOT23
Compal Secret Data
+3VS +3VS +3VS
Q40
2N7002_SOT23
1 2 2
1 3
D
R368 0_0402_5%
G
S
Q39
1 3
D
R364
2.2K_ 0402_5%
1 2
Deciphered Date
D
2
G
S
R367
4.7K_ 0402_5%
1 2
R366
4.7K_0402_5%
1 2
3VDDCDA 9
3VDDCCL 9
Title
CRT,TV -OUT & LVDS Conne ctor
Size Document Number Re v
Sakhir 10E<HBT10> 1. 0
C
星期
T, 04, 2005
Date: Sheet
五月
E
15 44
of
A
1 1
Unpop when support S1
10K_0402_5%
R94 0_0402_5%@
PM_STPCPU#4,9,17,40 PCI_STP#17
2 2
1 2
R436 0_0402_5%@
1 2
REFCLK1_NB9
CLK_14M_CODEC22
NEC_USB4841 CLK_USB4818
CLK_SB_14M18
Pop when using LPC debug card
B
C575 2.2P_0402_50V8C
1 2
1 2
14.31818MHZ_20P_6X1430004201
+3VS
12
12
R420
CLK_14M30
C576
2.2P_0402_50V8C
SMCLK12,13,18
R432 10K_0402_5%
SMDATA12,13,18
VTT_PWRGD18,20
R452 10K_0402_5%
1 2
R448 33_0402_5%@
1 2
R444 33_0402_5%
1 2
R423 68_0402_5%
1 2
R422 39_0402_5%
1 2
R416 39_0402_5%
1 2 1 2
R123 33_0402_5%@
12
Y4
XTALOUT_CLK
C
+3VS
XTALIN_CLK
12
VTT_PWRGD
PCI33/66#
FS2 FS1 FS0
CLK_IREF
R435 475_0402_1%
1 2
L14
1 2
HB-1M2012-121JT03_0805
U32
6
R418 1M_0402_5%@
XIN
7
XOUT
35
SCLK
34
SDATA
10
VTTPWRGD/PD#
45
CPU_STP#
12
PCI_STOP#
26
24/48#SEL
11
PCI33/66#SEL
27
48MHz_1
28
48MHz_0
4
FS2/REF2
3
FS1/REF1
2
FS0/REF0
38
IREF
+3V_CLK
42
8
D
Width=40 mils
C156
10U_0805_10V4Z
30
29
13
19
48
VDDSD
VDDPCI
VDD48M
VDDCPU
VDDAGP
GNDREF
GNDXTAL
GNDPCI
GNDPCI
GND48M
5
18
24
25
33
0.1U_0402_10V6K
1
C159
2
+3VS_VDDA
1
9
VDDA
VDDPCI
VDDREF
VDDXTAL
VSSA
CPUT0
CPUC0 CPUT1
CPUC1
SDRAMOUT
AGPCLK0 AGPCLK1
FS3/PCICLK_F0 FS4/PCICLK_F1
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5
GNDSD
GNDCPU
GNDAGP
ICS951402AGT_TSSOP48
46
41
E
0.1U_0402_10V6K
1
1
C136
2
0.1U_0402_10V6K
36
37 40
39 44
43 47 32
31 14
15
16 17 20 21 22 23
1
C158
2
2
+3VS_VDDA
C144
VSSA
100P_0402_25V8K
CLK_NB
CLK_NB#
CLK_CPU_CLK CLK_BCLK
MEM_133M
AGP_66M FS3
FS4
1
C151
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C149
2
R430 33_0402_5%
R433 33_0402_5% R426 33_0402_5%
R427 33_0402_5% R417 33_0402_5%
R440 33_0402_5% R442 33_0402_5%
2
1
2
1 2
1 2 1 2
1 2 1 2
1 2 1 2
C142
0.1U_0402_10V6K
C133
10U_0805_10V4Z
F
100P_0402_25V8K
C150
1
C140
2
1 2
1 2
1 2
1 2
CLK_BCLK#CLK_CPU_CLK#
1
C139
2
2200P_0402_25V7K
1
C143
2
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
2
R129 49.9_0402_1%
R130 49.9_0402_1%
R127 49.9_0402_1%
R128 49.9_0402_1%
100P_0402_25V8K
1
C160
2
0.1U_0402_10V6K
1
C141
2
100P_0402_25V8K
CLK_NB_BCLK 9
CLK_NB_BCLK# 9 CLK_BCLK 4
CLK_BCLK# 4 CLK_MEM 9
CLK_AGP_66M 9 CLK_ALINK_SB 17
1
2
2200P_0402_25V7K
1
C153
2
1
C135
2
2200P_0402_25V7K
1
C137
2
G
L13
1 2
CHB2012U121_0805
H
+3VS
3 3
CLOCK FR EQ UENCY SELECT TABLE
FS2 MEMFS1
FS3
0 0 0 1 0 0 0 0 0 1
**
0 0 0 0 0
4 4
Note: 0 = PULL LOW
1 = PULL HIGH
A
FS0
CPUFS4 With Spread Enabl ed…
200
200
*
Spreaf OF F O R
133
133 100 100
B
Center spread +/-0.3%
BSEL05,11
D16 CH751H-40_SC76
C
A-LINK FREQ
PCI33/66# = HIGH
**
PCI33/66# = LOW 33MHZ
21
+3V_CLK
12
R111 10K_0402_5%
12
R449
10K_0402_5%@
12
R450 10K_0402_5%
+3V_CLK
12
12
F
66MHZ
12
R419
FS0 FS1 FS2 FS3 FS4 PCI33/66#
4.7K_0402_5%
R110
12
10K_0402_5%@
12
R421 10K_0402_5%
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
12
R424
10K_0402_5%@
12
R425 10K_0402_5%
2005/03/01 2006/03/01
E
12
R441
10K_0402_5%@
12
R443 10K_0402_5%
Compal S e cr e t Data
Deciphered Date
R429
10K_0402_5%
R428 10K_0402_5%@
Title
Clock Generator
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
Date: Sheet
G
005
of
16 44, 04, 2
H
5
+1.05VS+1.05VS
12
R126 470_0402_5%
2
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
Y1
12
A_AD[0..31] A_CBE#[0..3]
12P_0402_50V8J
1
C170
2
PM_DPRSLPVR40
+3VS
12
R125 130_0402_5%
H_CPUFERR#
PM_STPCPU# PCI_STP#
A_SERR#
12
20M_0603_5%
@
R145
100K_0402_5%
+1.05VS
R116
R115 8.2K_0402_5%
PULL DO WN FOR S 3
CLK_ALINK_ SB
12
R447
1
C590
2
R124 0_0402_5% R445 10K_0402_5% R453 10K_0402_5% R446 1K_0402_1%
A_AD[0..31]8,11
A_CBE#[0..3]8
H_FERR#4
R112
56_0402_5%
1 2
+3VS
R113 1K_0402_5%@ R122 4.7K_0402_5%@ R118 8.2K_0402_5%
H_INIT# H_A20M# H_SLP# H_INTR H_NMI H_SMI# H_STPCLK# H_IGNNE#
20M_0603_5%
12P_0402_50V8J
1
C169
2
32.768KHZ_12.5P_1TJS125DJ2A073
Q13 MMBT3904_SOT23
3 1
1 2 1 2
R24 200_0402_5% R32 200_0402_5% R26 200_0402_5% R31 200_0402_5% R16 200_0402_5% R23 200_0402_5% R25 200_0402_5% R33 200_0402_5%
R144
1 2
RTCX1RTCX2
1
4
IN
OUT
NC3NC
2
D D
C C
B B
1 2
RTC Battery
BATT1
-+
Place J1 close to DDR-SODIMM
+SB_VBAT
C254
1
R223 220_0805_5%
1 2
W=20mils
A A
2
1U_0603_10V4Z
R206 220_0805_5%
No short
1 2
5
RTCBATT45@
+RTCVCC
1 2
JOPEN1@
+RTCBATT
12
1
C230
0.1U_0402_16V4Z
2
+RTCBATT
1
3
D18 BAS40-04_SOT23
2
+CHGRTC
CLK_ALINK_ SB16
1 2
10_0402_5%@
15P_0402_50V8J@
PM_STPCPU#4,9,16,40 PCI_STP#16
4.7K_0402_5%
1 2 1 2 1 2 1 2
4
CLK_ALINK_ SB
NBRST# A_AD0
A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31 A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3
+3VS
A_STROBE# A_DEVSEL# A_ACAT# A_END# A_PAR A_OFF# A_SERR# A_SBREQ# A_SBGNT#
PM_STPCPU# PCI_STP#
PCI_ PI RQA# PCI_ PI RQB# PCI_PIRQC# PCI_PIRQD#
RTCX1
12
RTCX2
CPURSTIN# H_PW RGOOD
H_A20M# H_CPUFERR#
GPIO0 SB_APIC_D0
SB_APIC_D1
A_STROBE#8
A_DEVSEL#8
A_ACAT#8
A_END#8
A_PAR8,11
A_OFF#8
A_SBREQ#8 A_SBGNT#8
PCI_PIR QA#8,26,41 PCI_PIRQC#25,41
PCI_PIRQD#24,25,41
R437
H_PWRGOOD4
H_INTR4
H_NMI4 H_INIT#4 H_SMI#4
H_SLP#4
H_IGNNE#4
H_A20M#4
H_STPCLK#4
B22 R22
H22 P23 L23 N23
N22 M23 M22
K22 M21 M20
L21
K21
L20
N21
K23
K20
F23 G21
F20
H21
F22
F21 G20
E21
E20
D23
D22
E22
D20
C23
D21
C22
L22
J23 G22
E23
H20
J21 G23
H23
J20
J22
P22
B21
B20
N20
R23
C20
P20
B23
P21
AC12
AC11
B18
E4 B17 B16 C17 C16 F19 D17 D18 E19 E16 E17 E18 C19 C18 B19
SB_PCI_RST#
R141
10K_0402_5%
1 2
U9A
PCICLKF A_RST#
A_AD0 A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31 A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3 A_STROBE# A_DEVSEL# A_ACAT# A_END# A_PAR A_OFF# A_SERR# A_SBREQ# A_SBGNT#
CPU_STP#/DPSLP# PCI_STP#
A_INTA# INTB# INTC# INTD#
A-LINK INTERFACE
X1
X2
CPURSTIN# CPU_PWRGD INTR/LINT0 NMI/LINT1 INIT SMI# SLP# IGNNE# A20M# FERR# STPCLK# SSMUXSEL/GPIO0 DPRSLPVR APIC_D0 APIC_D1 APIC_CLK
South bridge SB 2 0 0
+3VALW
C167 0.1U_0402_16V4Z
1
14
U8A
P
OE#
I2O G
7
SN74LVC125APWLE_TSSOP14
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O F THE CO MPETENT DIVISIO N OF R& D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE IN FORMATIO N IT CO NTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.
SB200 SB
Part 1 of 3
PCI INTERFACE
REQ#4/PLLBP33/PDMAREQ1#
XTAL
GNT#4/PLLBP50/PDMAGNT1#
LPC
CPU
RTC
PCIRST#
3
3
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7
PCICLK_FB
PCI CLKS
PCIRST# AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11
AD8/ROMA9
AD9/ROMA8 AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7
AD24/RTC_AD7 AD25/RTC_AD6 AD26/RTC_AD5 AD27/RTC_AD4 AD28/RTC_AD3 AD29/RTC_AD2 AD30/RTC_AD1 AD31/RTC_AD0
CBE#0/ROMA10
CBE#1/ROMA1
CBE#2/ROMWE#
CBE#3/RTC_RD#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR STOP# PERR# SERR# REQ#0 REQ#1 REQ#2
REQ#3/PDMAREQ0#
GNT#0 GNT#1 GNT#2
GNT#3/PDMAGNT0#
CLKRUN#
GPIO1/ROMCS#
LAD0 LAD1 LAD2 LAD3
LFRAME#
LDRQ#0 LDRQ#1
SERIRQ
USBOC5#/GPM1
RTC_ALE/USBOC4#/GPIO3
RTC_WR#/RTC_CLKOUT
RTC_CS#/USBOC3#/GPIO2
VBAT
RTC_GND
PCIRST# 24,25,26,28,30,32,41
2005/03/01 2006/03/01
3
2
Layout note:
Trace length of PCI_CL K_R + PCI _CLK_FB should be less t h an 200 mils.
PCICLK0
R136 39_0402_5%
B15 D16 A14 A15 A16 A17 D15 A18 A19
C15 B1 C1 A1 D2 B2 C2 A2 D3 C3 A3 D4 B4 C4 A4 D5 B5 C8 D8 B8 A8 C9 D9 B9 A9 C10 B10 D11 A10 C11 B11 D12 A11 B3 C5 A7 D10 B7 A6 C7 D7 A5 B6 C6 D6 B12 C12 D13 A12 C13 A13 B13 C14 D14 B14 A20
AB5
Y14 AA14 AB14 AA13 AB13 AC14 Y13
AC13
AA2 AB7 AB8 AC8 AC10 AB11
PCICLK1 PCICLK2 PCICLK3 PCICLK4
PCICLK6 PCI_CLK_R PCI_CLK_FB
SB_PCI_RST# PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_ C /BE# 0 PCI_ C /BE# 1 PCI_ C /BE# 2 PCI_ C /BE# 3 PCI_FRAM E# PCI_DEVSEL # PCI_IRDY# PCI_TRDY# PCI_ PAR PCI_STOP# PCI_P ERR# PCI_S ERR# PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4 PM_CLKRUN#
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ0# LPC_DRQ1#
SIRQ
USB_OC5# USB_OC4#
USB_OC3#
1 2
R456 39_0402_5%
1 2
R142 39_0402_5% R140 39_0402_5% R134 39_0402_5%
R143 39_0402_5%
R455 39_0402_5%
R165 10K_0402_5%
1 2
R504 10K_0402_5% R161 10K_0402_5%
R160 10K_0402_5%
+SB_VBAT
1 2 1 2 1 2
1 2
1 2
PCI_AD[0..31]
PCI_C/ B E#[0..3]
PCI_FRAME# 24,25,26,32,41 PCI_DEVSEL# 24,2 5, 26 ,41 PCI_ I RD Y# 24,25,26,41 PCI_TRDY# 24,25,26,32,41 PCI_PAR 24,25,26,41 PCI_STOP# 24,25,26,41 PCI_PERR# 24,25,26,41 PCI_SERR# 24,25,26,41 PCI_REQ#0 41 PCI_REQ#1 25 PCI_REQ#2 26 PCI_REQ#3 24
PCI_GNT#0 41 PCI_GNT#1 25 PCI_GNT#2 26 PCI_GNT#3 24
PM_CLKRUN# 24,25,26,28,41
LPC_AD0 28,30 LPC_AD1 28,30 LPC_AD2 28,30 LPC_AD3 28,30 LPC_FRAME# 28,30
LPC_DRQ1# 30
SERIRQ 26,28,30
1 2
12 12
SB_PCI_RST#
C595 22P_0402_50V8J
+3V
Compal Secret Data
Deciphered Date
2
CLK_PCI_MINI1 25 CLK_PCI_CB 26 CLK_PCI_LPC 28 CLK_PCI_U SB20 32, 41 CLK_PCI_LAN 24
CLK_PCI6 30
1 2
PCI_AD[0..31] 20,24,25,26,32,41
PCI_C/BE#[0..3] 24,25,26,32,41
+3V +3V
10
U8C
8
OE#
I9O
SN74LVC125APWLE_TSSOP14
1
PCI_TRDY#
4 5
PCI_IRDY#
3 6
PCI_S ERR#
2 7
PCI_P ERR#
1 8
8.2K _ 8 P 4 R _ 0 8 04_5%
PCI_FRAM E#
4 5
PCI_DEVSEL #
3 6
PCI_STOP#
2 7
PCI_ PAR
1 8
8.2K _ 8 P 4 R _ 0 8 04_5%
PCI_ PI RQA#
1 2
8.2K_0402_5%
PCI_ PI RQB#
1 2
8.2K_0402_5%
PCI_PIRQC#
1 2
8.2K_0402_5%
PCI_PIRQD#
1 2
8.2K_0402_5%
PCI_REQ#0
4 5
PCI_REQ#1
3 6
PCI_GNT#3
2 7
PCI_REQ#2
1 8
8.2K _ 8 P 4 R _ 0 8 04_5%
PCI_GNT#0
4 5
PCI_REQ#3
3 6
PCI_GNT#1
2 7
PCI_GNT#2
1 8
8.2K _ 8 P 4 R _ 0 8 04_5%
PCI_REQ#4
8.2K_0402_5%
PCI_GNT#4
8.2K_0402_5%
LPC_AD0
4 5
LPC_AD1
3 6
LPC_AD3
2 7
LPC_AD2
1 8
15K_0804_8P4R_5%
SIRQ LPC_DRQ0# LPC_FRAME# LPC_DRQ1#
PM_CLKRUN#
GPIO0
4
U8B
6
OE#
I5O
SN74LVC125APWLE_TSSOP14
SB_IDERST# 21
Title
SB200M(1/4)- PCI/CPU/LPC
Size Docu ment N u m ber Re v
Sakhir 1 0 E <HBT10> 1.0
Custom
Date: Sheet of
星期三 五月
005
RP35
1 8 2 7 3 6 4 5
R434 4.7K_0402_5%
R454 10K_0402_5%
12
12
NB_RST#NBRST#
1
+3VS
RP42
RP44
R431 R117 R120 R114 RP40
RP39
R151
1 2
R147
1 2
RP34
10K_0804_8P4R_5%
NB_RST# 6,9
17 44, 04, 2
5
+3V
100K_0402_5% 100K_0402_5% 100K_0402_5%
+3V
KC FBM-L11-201209-221LMAT_0805@
L17
1 2 1
C214
0.1U_0402_10V6K@
2
USB_OC0# USB_OC1# USB_OC2#
Can't be used in oscillator condition
SB_USB48
12
R469 10_0402_5%@
1
C661 15P_0402_50V8J@
2
R488
1 2
15K_0402_5%
R489
1 2
15K_0402_5%
R499
1 2
15K_0402_5%
R500
1 2
15K_0402_5%
RP59
1 8 2 7 3 6 4 5
15K_0804_8P4R_5%
R486
1 2
15K_0402_5%
R487
1 2
15K_0402_5%
R502
1 2
15K_0402_5%
R501
1 2
15K_0402_5%
AGP_STP#8
12
R205 10K_0402_5%@
X2
4
VDD
1
OE
48MHZ_4P_FN4800002@
5
1 2
R483
1 2
R195
1 2
R200
D D
ICH_AC_BITCLK
12
R490 10_0402_5%@
1
C668 15P_0402_50V8J@
2
CLK_SB_14M
12
R119 10_0402_5%@
1
C128 15P_0402_50V8J@
2
C C
B B
A A
1
C216
2
1000P_0402_50V7K@
CLK_USB4816
USBP2+29
USBP2-29
USBP1+29
USBP1-29
USBP0+29
USBP0-29
USB20P2+ USB20P2­USB20P4­USB20P4+
USB20P5­USB20P5+ USB20P3­USB20P3+
USB20P1+ USB20P1­USB20P0+ USB20P0-
R462 100K_0402_5%
1 2
R181 10K_0402_5%
OUT GND
12
AGP_STP# ICH_AC_BITCLK
OSCLIN
3 2
OSCLIN
R178 0_0402_5%@ R476 0_0402_5%
R187 12.4K_0603_1%
R463 10K_0402_5%
+3V
R494 10K_0402_5%
SB_EEDO20 SB_EECLK20
EC_RSMRST#28,41
CLK_SB_14M16
R198 10K_0402_5%
+3V
EC_FLASH#31
RTC_CLKIN20
D17
2 1
CH751H-40_SC76
R167 33_0402_5%
1 2
1 2
1 2 1 2
MII_TXD320 MII_TXD220 MII_TXD120 MII_TXD020
MII_TXEN20
SPKR22
PIDERST#21 SIDERST#21
4
R466 15K_0402_5%@
1 2
12
12
CLK_SB_14M
12
VTT_PWRGD 16,20
4
SB_USB48
USB_RCOMP
USB_OC0# USB20P5+ USB20P5-
USB20P4+ USB20P4-
USB20P3+ USB20P3-
USB20P2+ USB20P2-
USB20P1+ USB20P1-
USB20P0+ USB20P0-
EC_RSMRST#
FLASH# USB_OC2#
USB_OC1# SPKR
AGP_STP#_R AGP_BUSY#_R
U9B
P3
USBCLK/CLK48
R1
USB_RCOMP
P1
USB_VREFOUT
N4
USB_ATEST1
N3
USB_ATEST0
P4
USBOC0#/GPM7
M2
USB_HSDP5+
M1
USB_FLDP5+
N2
USB_HSDM5-
N1
USB_FLDM5-
L4
USB_HSDP4+
L3
USB_FLDP4+
M4
USB_HSDM4-
M3
USB_FLDM4-
K2
USB_HSDP3+
K1
USB_FLDP3+
L2
USB_HSDM3-
L1
USB_FLDM3-
H2
USB_HSDP2+
H1
USB_FLDP2+
J2
USB_HSDM2-
J1
USB_FLDM2-
G3
USB_HSDP1+
J3
USB_FLDP1+
H3
USB_HSDM1-
K3
USB_FLDM1-
F1
USB_HSDP0+
F2
USB_FLDP0+
G1
USB_HSDM0-
G2
USB_FLDM0-
R5
MCOL
W1
MCRS
V4
MDCK
V2
MDIO
T1
RX_CLK
T3
RXD3
U2
RXD2
T5
RXD1
W4
RXD0
T2
RX_DV
U1
RX_ERR
T4
TX_CLK
U4
TXD3
V1
TXD2
U3
TXD1
V3
TXD0
W2
TX_EN
W3
PHY_PD
U5
PHY_RST#
Y7
CLK_25M
P2
EE_CS
R3
EE_DI
R2
EE_DO
R4
EE_CK
AB9
RSMRST#
A23
OSC_IN
W6
SIO_CLK
AB2
BLINK/GPM0
AA3
FANOUT1/USBOC2#/GPM2
W11
32KHZ_IN/GPM3
AB1
USBOC1#/GPM4
Y4
SPEAKER/GPM5
AA1
FANOUT0/GPM6
AC1
GPIO_X0/AGP_STP#
AC6
GPIO_X1/AGP_BUSY#
AC2
GPIO_X2/GHI#
AC3
GPIO_X3/VGATE
AC4
GPIO_X4
AC5
GPIO_X5
South b r id g e S B200
+3VS
R199 1K_0402_5%
1 2
3
SB200 SB
Part 2 of 3
USB INTERFACE
ETHERNET MIIEEPROMCLK / RST
GPIOGPIO_XTRA
1 3
TALERT#/ETH_TALERT#
PME#/EXT_EVNT0#
RI#/EXT_EVNT1#
SLP_S3# SLP_S5#
PWR_BTN#
PWR_GOOD
PCI_REQACT#
SUS_STAT#
GA20_IN/GEVNT0#
KB_RST#/GEVNT1#
SMB_ALERT#/GEVNT2#
LPC_PME#/GEVNT3#
LPC_SMI#/GEVNT4# GEVENT5#/ETH_VALERT# GEVENT6#/ETH_FALERT#
ACPI / WAKE UP EVENTS
GEVENT7#/ETH_CALERT#
GPOC0#/SCL0 GPOC1#/SDA0 GPOC2#/SCL1 GPOC3#/SDA1
RTC_IRQ#/PWR_STRP
PIDE_IORDY
PIDE_IRQ
PIDE_A0 PIDE_A1 PIDE_A2
PIDE_DACK#
PIDE_DRQ PIDE_IOR# PIDE_IOW# PIDE_CS1# PIDE_CS3#
PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7 PIDE_D8
PIDE_D9 PIDE_D10 PIDE_D11
PRIMARY ATA 66/100
SECONDARY ATA 66/100
AC97
Q16 2N7002_SOT23
D
PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15
SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ SIDE_IOR# SIDE_IOW# SIDE_CS1# SIDE_CS3#
SIDE_D0 SIDE_D1 SIDE_D2 SIDE_D3 SIDE_D4 SIDE_D5 SIDE_D6 SIDE_D7 SIDE_D8
SIDE_D9 SIDE_D10 SIDE_D11 SIDE_D12 SIDE_D13 SIDE_D14 SIDE_D15
AC_BITCLK AC_SDOUT
AC_SDIN0 AC_SDIN1 AC_SDIN2 AC_SYNC
AC_RST#
SPDIF_OUT
S
AGP_BUSY#AGP_BUSY#_R
G
2
TEST1 TEST0
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
SB_EC_THERM#
AB4
SB_PM_BATLOW#
AC9
RI#
AC7
PM_SLP_S3#
AA11
PM_SLP_S5#
AB10
PBTN_OUT#
AA10
SB_PWRGD
Y11
PCI_ACT_REQ#
C21
SUS_STAT#
Y10
SB_TEST1
AA5
SB_TEST0
AA6
SB_GA20
Y5
SB_KBRST#
AA4
SB_AC_IN
AB3
SB_EC_SWI#
Y6
LPC_SMI#
W5
SB_EC_SMI#
Y8
SB_SCI#
AA7
SB_LID_OUT#
AB6
SMCLK
AA12
SMDATA
W12
SMB_CLK1
Y12
SMB_DAT1
AB12
PWR_STRP
AA8
IDE_PDIORDY
AB17
INT_IRQ14
AC16
IDE_PDA0
AB15
IDE_PDA1
AB16
IDE_PDA2
AC15
IDE_PDDACK#
Y16
IDE_PDDREQ
AA17
IDE_PDIOR#
AA16
IDE_PDIOW#
AC17
IDE_PDCS1#
Y15
IDE_PDCS3#
AA15
IDE_PDD0
AC18
IDE_PDD1
AA18
IDE_PDD2
AC19
IDE_PDD3
AA19
IDE_PDD4
AC20
IDE_PDD5
AA20
IDE_PDD6
AC21
IDE_PDD7
AB21
IDE_PDD8
AA21
IDE_PDD9
Y20
IDE_PDD10
AB20
IDE_PDD11
Y19
IDE_PDD12
AB19
IDE_PDD13
Y18
IDE_PDD14
AB18
IDE_PDD15
Y17
IDE_SDIORDY
AA23
INT_IRQ15
AA22
IDE_SDA0
AC23
IDE_SDA1
Y21
IDE_SDA2
AB23
IDE_SDDACK#
Y22
IDE_SDDREQ
W21
IDE_SDIOR#
Y23
IDE_SDIOW#
W20
IDE_SDCS1#
AC22
IDE_SDCS3#
AB22
IDE_SDD0
W23
IDE_SDD1
V21
IDE_SDD2
V23
IDE_SDD3
U21
IDE_SDD4
U23
IDE_SDD5
T21
IDE_SDD6
T23
IDE_SDD7
R21
IDE_SDD8
R20
IDE_SDD9
T22
IDE_SDD10
T20
IDE_SDD11
U22
IDE_SDD12
U20
IDE_SDD13
V22
IDE_SDD14
V20
IDE_SDD15
W22 E1
E2 Y1 Y2 Y3 E3 V5 E5
AGP_BUSY# 8
2005/03/01 2006/03/01
PM_SLP_S3# 28 PM_SLP_S5# 28 PBTN_OUT# 28 SB_PWRGD 20
NB_SUS_STAT# 6
SMCLK 12,13,16 SMDATA 12,13,16
PWR_STRP 20 IDE_PDIORDY 21
INT_IRQ14 21 IDE_PDA0 21 IDE_PDA1 21 IDE_PDA2 21 IDE_PDDACK# 21 IDE_PDDREQ 21 IDE_PDIOR# 21 IDE_PDIOW# 21 IDE_PDCS1# 21 IDE_PDCS3# 21
IDE_PDD[0..15] 21
IDE_SDIORDY 21 INT_IRQ15 21 IDE_SDA0 21 IDE_SDA1 21 IDE_SDA2 21 IDE_SDDACK# 21 IDE_SDDREQ 21 IDE_SDIOR# 21 IDE_SDIOW# 21 IDE_SDCS1# 21 IDE_SDCS3# 21
IDE_SDD[0..15] 21
R477 0_0402_5%
1 2
R475 33_0402_5%
1 2
1 2
R478 0_0402_5%
Compal S e cr e t Data
Deciphered Date
ICH_AC_SDOUT
ICH_AC_SDIN0 ICH_AC_SDIN1 ICH_AC_SDIN2 ICH_AC_SYNC ICH_AC_RST# SPDIF_OUT
2
LPC_SMI# USB_SMI# SB_EC_THERM# EC_THRM# SB_EC_SWI# SB_GA20 GATEA20 SB_KBRST#
SB_EC_SMI# SB_SCI# EC_SCI# SB_LID_OUT#
2
D23 CH751H-40_SC76NEC@ D27 CH751H-40_SC76 D21 CH751H-40_SC76 D26 CH751H-40_SC76 D24 CH751H-40_SC76 D19 CH751H-40_SC76 D22 CH751H-40_SC76 D25 CH751H-40_SC76 D28 CH751H-40_SC76
ICH_AC_BITCLK 22, 32 ICH_AC_SDO UT 22,32 ICH_A C _ S DIN0 20,22 ICH_AC_S DIN1 32
ICH_A C _ S Y N C 20, 22,32
ICH_AC_RST# 22,32
SPDIF_OUT 20
1
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
PM_SLP_S3# PBTN_OUT# PM_SLP_S5#
SB_LID_OUT# AGP_STP#_R AGP_BUSY#_R SB_PM_BATLOW#
SB_SCI# SB_KBRST# SB_EC_THERM#
RI# SB_AC_IN PCI_ACT_REQ#
SB_GA20 SB_EC_SWI# LPC_SMI# SB_EC_SMI#
SMDATA SMB_CLK1 SMCLK SMB_DAT1
ICH_AC_RST#
AGP_STP# AGP_BUSY#
SB_TEST1 SB_TEST0 ICH_AC_BITCLK ICH_AC_SDIN2 ICH_AC_SDIN1 ICH_AC_SDIN0
Title
SB200M(2/4) - IDE/USB/MII
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
Date: Sheet
EC_SWI#
KBRST# ACINSB_AC_IN EC_SMI#
EC_LID_OUT#
1 8 2 7 3 6 4 5
RP36 10K_0804_8P4R_5%
1 8 2 7 3 6 4 5
RP60
1 8 2 7 3 6 4 5
RP61
1 2
R163 10K_0402_5%
1 2
R186 10K_0402_5%
1 2
R121 10K_0402_5%
4 5 3 6 2 7 1 8
RP62 10K_0804_8P4R_5%
1 8 2 7 3 6 4 5
RP37 2.2K_0804_8P4R_5%
1 2
R484
1 2 1 2
1 2 1 2 1 2 1 2 1 2 1 2
005
1
USB_SMI# 41 EC_THRM# 28 EC_SWI# 28 GATEA20 28 KBRST# 28 AC IN 28,31,34 EC_SMI# 28 EC_SCI# 28 EC_LID_OUT# 28
+3VALW
+3V
10K_0804_8P4R_5%
10K_0804_8P4R_5%
+3VS
8.2K_0402_5%
+3VS
R1928.2K_0402_5% R1968.2K_0402_5%
R4658.2K_0402_5% R4648.2K_0402_5% R4988.2K_0402_5% R4678.2K_0402_5% R1858.2K_0402_5% R1888.2K_0402_5%
18 44, 04, 2
+3V
of
5
4
3
2
1
+3VS +3VS
22U_1206_10V4Z
1
C131
D D
C C
R197
1 2
+3V
FBM-10-201209-260-T_0805
B B
R203
1 2
+3V
FBM-10-201209-260-T_0805
22U_1206_10V4Z
R107
1 2
+2.5VS
FBM-10-201209-260-T_0805
A A
C132
22U_1206_10V4Z
C127
22U_1206_10V4Z
C154
22U_1206_10V4Z
C233
22U_1206_10V4Z
+3V_AVDDC
1
2
0.1U_0402_10V6K
1
C219
2
+2.5V_AVDDCK
1
2
1U_0603_10V4Z
2
+2.5VS
1
2
+2.5V
0.1U_0402_10V6K
1
C649
2
+3V
0.1U_0402_10V6K
1
C633
2
C218 1U_0603_10V4Z
1
C660
C654
2
0.1U_0402_10V6K
C134
0.1U_0402_10V6K
1
1
C603
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C613
C612
2
2
0.1U_0402_10V6K
1
1
C646
C645
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C641
C625
2
2
0.1U_0402_10V6K
1
C659
0.1U_0402_10V6K
2
0.1U_0402_10V6K
1
1
C658
2
2
0.1U_0402_10V6K
1
C584
0.1U_0402_10V6K
2
1
C642
C589
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C634
C638
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C647
0.1U_0402_10V6K
2
2
1
1
C648
0.1U_0402_10V6K
2
2
0.01U_0402_25V4Z
C650
0.1U_0402_10V6K
1
1
C653
C657
2
2
0.01U_0402_25V4Z
C588
0.1U_0402_10V6K
1
2
1
C637
2
0.1U_0402_10V6K
1
2
1000P_0402_50V7K
1
2
1
2
1000P_0402_50V7K
0.1U_0402_10V6K
1
1
C594
C643
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C626
C627
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C655
2
C656
0.1U_0402_10V6K
1
C585
2
0.1U_0402_10V6K
1
1
C596
1
2
C598
C597
2
2
0.1U_0402_10V6K
1
C616
0.1U_0402_10V6K
2
ATI request
+3V
1
C631
2
ATI request
10U_0805_10V4Z
ATI request
+3V_AVDDUSB
47U_B_6.3VM
ATI request
22U_1206_10V4Z
1
1
C593
2
2
0.1U_0402_10V6K
0.01U_0402_25V4Z
1
C644
0.1U_0402_10V6K
2
+3V_AVDDC
1
C224
2
1
+
C226
2
+2.5V_AVDDCK
1
C126
2
0.1U_0402_10V6K
1
C652
C651
2
0.1U_0402_10V6K
+3VS
C599
C130
0.01U_0402_25V4Z
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
C601
2
0.01U_0402_25V4Z
+2.5VS
0.01U_0402_25V4Z
1
C635
2
+2.5V
1
C615
2
+3VALW
1
C208
4.7U_0805_10V4Z
2
1
C628
2
ATI request
0.01U_0402_25V4Z
1
C591
2
1
1
C600
2
2
0.01U_0402_25V4Z
1
2
ATI request
1
1
1
C605
2
2
2
0.01U_0402_25V4Z
ATI request CLOSE TO L6,H6,J6
1
1
C614
2
2
0.1U_0402_10V6K
+3VS+3V_AVDDUSB
D20
2 1
CH751H-40_SC76
C592
0.1U_0402_10V6K
1
C602
0.01U_0402_25V4Z
2
C640
0.01U_0402_25V4Z
C620
0.1U_0402_10V6K
+5VS
12
R190 1K_0402_5%
1
C217
2
1U_0603_10V4Z
+2.5V
+3V_AVDDC
+3V
+3V_AVDDUSB
+2.5VS
+5VS_VREF
+2.5V_AVDDCK
+2.5VALW
+3VALW
0.1U_0402_10V6K
+2.5VS
C639
1
1
2
2
U9C
E11 E12 E15
E7
E8 F11 F12 F15 F16 F17
F7
F8 G18 G19 H18 H19 M18 M19 N18 N19
T18
T19 U18 U19 V17 V18
W17 W18
J10
J11
J13
J14 K15
K9
L15
L9
N15
N9
P15
P9 R10 R11 R13 R14
P6
R6 V13
W13
V12
L6
H6
J6
P5
T6 U6 V9
V10 V11
W9
W10
F4
J4 K5
F3 K4
L5
D19
D1
A21
Y9
AA9
South b r id g e S B200
C636
0.1U_0402_10V6K
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE
STB_2.5V STB_2.5V STB_2.5V STB_2.5V STB_2.5V
VDD_USB VDD_USB VDD_USB
AVDDC STB_3.3V
STB_3.3V STB_3.3V STB_3.3V STB_3.3V STB_3.3V STB_3.3V
AVDDTX0 AVDDTX1 AVDDTX2 AVDDRX0 AVDDRX1 AVDDRX2
VREF_CPU 5V_VREF AVDD_CK S5_2.5V S5_3.3V
SB200 SB
Part 3 of 3
POWER
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS_USB VSS_USB
AVSSC
AVSSRX2 AVSSRX1 AVSSRX0 AVSSTX2 AVSSTX1 AVSSTX0
AVSSCK
E10 E13 E14 E6 E9 F10 F13 F14 F18 F6 F9 G6 J12 J15 J18 J19 J9 K10 K11 K12 K13 K14 K18 K19 L10 L11 L12 L13 L14 L18 L19 M10 M11 M12 M13 M14 M15 M6 M9 N10 N11 N12 N13 N14 N6 P10 P11 P12 P13 P14 P18 P19 R12 R15 R18 R19 R9 V14 V15 V16 V19 V6 V7 V8 W14 W15 W16 W19 W7 W8 H5 G5
N5 M5
J5 G4 K6 H4 F5
A22
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Compal S e cr e t Data
Deciphered Date
Title
SB200M(3/4) - PWR
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
2
Date: Sheet
005
1
of
19 44, 04, 2
5
4
3
2
1
R491
@
10K_0402_5%
R497 10K_0 402_5%
INIT ACTIVE HIGH
INIT ACTIVE LOW (PIII)
DEFAULT
+3VS
12
1 2
IAC_SYNC
9
SN74LVC14APWLE_TSSOP14
+3VALW +3V +3V
12
D D
PCI_AD2617,24,25,26,41
C C
B B
R472
10K_0 402_5%
VGATE40
R471
1M_0402_5%
+3VS
12
R155 10K_0 402_5%
12
R461
PCI_AD26 H: ENE910
L: NS87591
+3VS
12
12
PWR_STRP18 SB_EEDO18
SB_EECLK18 ICH_AC_SYNC18,22,32 ICH_A C_S DIN018,22
SPDIF_OUT18
MII_TXEN18
MII_TXD318
MII_TXD218
MII_TXD118
MII_TXD018
RTC_CLKIN18
10K_0 402_5%@
REQUIRED SYSTEM STRAPS
+3VALW +3VALW
14
P
1
O2I
G
U11A
7
SN74LVC14APWLE_TSSOP14
3
SN74LVC14APWLE_TSSOP14
STRAP HIGH
STRAP LOW
14
P
G
7
U11B
R468 10K_0 402_5%
12
R470
@
MANUAL PWR ON
DEFAULT
PWR
ON
1 2
O4I
330K_0402_5%
0.1U_0402_10V6K
VTT_PWRGD
12
R184
@
10K_0402_5%
12
10K_0402_5%
R474
R193 10K_0 402_5%
IGN DEBUG FREQLTCH
EEDO
DEBUG STRAPS
IGNORE DEBUG STRAPS
DEFAULT
1
C662
2
12
12
EECK
ROM ON PCI BUS
ROM ON LPC BUS
DEFAULT
14
P
5
O6I
G
U11C
7
SN74LVC14APWLE_TSSOP14
VTT_PWRGD 16,18
R503
@
10K_0402_5%
R492 10K_0 402_5%
14
P
O8I
G
U11D
7
+3VS +3VS
12
R194
@
10K_0402_5%
12
R179 10K_0 402_5%
33MHz NB BUS
HI SPEED A-LINK
DEFAULT
VTT_PWRGD
12
R162
@
10K_0402_5%
12
R164 10K_0 402_5%
TX_EN
SIO 24MHzUSE
SIO 48MHzAUTO
DEFAULT
DISABLE CPU FREQ SETTING
DEFAULT
ENABLE CPU FREQSETTING
please close to SB200
+3VALW+3VALW +3VALW
C194 0.1U_0402_16V4Z
14
U18C
9
P
A
8
O
10
B
G
SN74LVC08APW_TSSOP14
7
+3V +3V +3V +3V +3V
12
12
@
PROCESSOR FREQ MULTIPLIER
R496 10K_0 402_5%
R480 10K_0402_5%
ETHERNET TXD[3:0]IAC_SDATAO SPDIF_OUTPWR_STRP
330K_0402_5%
12
R481 10K_0402_5%
12
R493
@
10K_0402_5%
R473
1 2
C203
0.47U_0603_10V7K
NB_P W RGD 6,8,15
1
2
12
R191 10K_0402_5%
12
R180
@
10K_0402_5%
12
R482 10K_0402_5%
12
R479
@
10K_0402_5%
32KHZ_S5
RTC_CLKIN
32KHZ OUTPUT FROM SB200 (INT RTC)
DEFAULT
32KHZ INPUT TO SB200 (EXT RTC)
14
P
11
O10I
G
U11E
7
SN74LVC14APWLE_TSSOP14
13
+3VALW
12
R495 10K_0402_5%
12
R485
@
14
P
G
7
12
12
@
10K_0402_5%
C196 0.1U_0402_16V4Z
O12I
VTT_PWRGD
U11F
SN74LVC14APWLE_TSSOP14
R459 10K_0 402_5%
R458 10K_0402_5%
+3VALW+3VALW+3VALW
14
12
P
A
13
B
G
7
C195 0.1U_0402_16V4Z
U18D
11
O
SN74LVC08APW_TSSOP14
SB_PWRGD 18
A A
Security Classification
Issued Date
THIS S H E E T O F E N G I NEERIN G D RAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELEC TR ONI CS, IN C. AND CO NT AIN S CON FI DEN TIAL AND T R A DE SECR E T I NFORMAT I O N. TH IS SH EET MAY NO T BE TR ANSF ERED FRO M THE C UST OD Y OF TH E CO MPETEN T DI VISI ON OF R &D DEPARTMENT EXCEPT AS AUT HOR IZED BY COMPAL ELEC TRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
5
4
MAY BE USED BY OR D ISC L OSED TO ANY THIRD PARTY WITHOUT P RIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
3
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
2
Title
SB200M(4/4) - STRAPS
Size Document Num ber Re v
Sakh i r 10E <H B T10> 1.0
Custom
星期三
?04, 2005
Date: Sheet
1
20 44, 
of
PD_D9IDE_PDD9 IDE_PDD6 PD_D6 IDE_PDD8 PD_D8
IDE_PDD4 PD_D4 IDE_PDD11 PD_D11 IDE_PDD5 PD_D5 IDE_PDD10 PD_D10
IDE_PDD13 PD_D13 IDE_PDD2 PD_D2
IDE_PDD15 PD_D15 IDE_PDD0 PD_D0 IDE_PDD14 PD_D14
IDE_PDDACK#18
IDE_PDIOR#18 IDE_PDIOW#18
IDE_PDDREQ18
IDE_PDCS1#18
IDE_PDA018 IDE_PDA218 IDE_PDA118
IDE_PDCS3#18
INT_IRQ1418
IDE_PDDACK# PD_PDDACK# IDE_PDIOW# PD_PDIOW#
IDE_PDDREQ PD_ PDDREQ IDE_PDCS1# PD_PDCS1#
IDE_PDA0 IDE_PDA2
18 27 36
PD_D7IDE_PDD7
45
RP48 33_0804_8P4R_5%
18 27 36 45
RP49 33_0804_8P4R_5%
18 27
PD_D3IDE_PDD3
36
PD_D12IDE_PDD12
45
RP50 33_0804_8P4R_5%
18 27 36
PD_D1IDE_PDD1
45
RP51 33_0804_8P4R_5%
18
PD_PDIOR#IDE_PDIOR#
27 36 45
RP53 33_0804_8P4R_5%
18
PD_PDA0
27
PD_PDA2
36
PD_PDA1IDE_PDA1
45
RP55 33_0804_8P4R_5%
R333 33_0402_5%
R300 33_0402_5%
PD_PDCS3#IDE_PDCS3#
12
PD_IRQ14INT_IRQ14
12
1 2
R305 8.2K_0402_5%
HDD CONNECTOR
PHDD_LED#28 +5VS
1 2
R337
IDE_PDD[0..15]
100K_0402_5%
IDE_SDD[0..15]
PIDE_RST#
PD_D7 PD_D6 PD_D5 PD_D4 PD_D3 PD_D2 PD_D1 PD_D0
PD_PDDREQ PD_PDIOW# PD_PDIOR# PD_PDIORDY PD_PDDACK# PD_IRQ14 PD_PDA1 PD_PDA0 PD_PDCS1#
+5VS
ALLTOP_C178B1-144A1-L_44P
JP16
48
12
474748
34 56 78
910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 4142 4344
PD_D8 PD_D9 PD_D10 PD_D11 PD_D12 PD_D13 PD_D14 PD_D15
PCSEL
R288
1 2
470_0805_5%
R308 10K_0402_1%@
1 2
R313 10K_0402_1%@
1 2
PD_PDA2
PD_PDCS3#
+5VS
Check with Sam
Check with ME new connector and Pin 1
SB_IDERST#17
PIDERST#18
SIDERST#18
SB_IDERST#
SB_IDERST#
IDE_PDD[0..15]18
IDE_SDD[0..15]18
+3VALW
C274
0.1U_0402_16V4Z
14
U18A
1
P
A
2
B
PIDE_RST#
3
O
G
SN74LVC08APW_TSSOP14
7
Place U11 ne a r SB side
+3VALW
14
U18B
4
P
A
5
B
G
7
SIDE_RST#
6
O
SN74LVC08APW_TSSOP14
IDE_SDD7 SD_D7
IDE_SDD3 SD_D3
IDE_SDIOW#18
IDE_SDA118 IDE_SDA018 IDE_SDA218
IDE_SDCS1#18 IDE_SDCS3#18
IDE_SDDACK#18
IDE_SDIOR#18
IDE_SDDREQ18
INT_IRQ1518
IDE_PDIORDY18
IDE_SDA0 SD_SDA0
IDE_SDDACK# SD_SDDACK#
IDE_SDD12 SD_D12
IDE_SDD9 SD_D9 IDE_SDDREQ SD_SDDREQ
IDE_SDD13 SD_D13
IDE_SDD8 SD_D8
R295 33_0402_5%
18
SD_D6IDE_SDD6
27
SD_D5IDE_SDD5
36
SD_D4IDE_SDD4
45
RP43 33_0804_8P4R_5%
18
SD_D2IDE_SDD2
27
SD_D1IDE_SDD1
36
SD_D0IDE_SDD0
45
RP41 33_0804_8P4R_5%
RP38 33_0804_8P4R_5%
RP56 33_0804_8P4R_5%
RP58 33_0804_8P4R_5%
RP57 33_0804_8P4R_5%
R159 33_0402_5%
R152 33_0402_5%
12
R246 10K_0402_1%
R279 5.6K_0603_1%
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
12
12
1 2
SD_SDIOW#IDE_SDIOW# SD_SDA1IDE_SDA1
SD_SDA2IDE_SDA2 SD_SDCS1#IDE_SDCS1#
SD_SDCS3#IDE_SDCS3# SD_SDIOR#IDE_SDIOR#
SD_D11IDE_SDD11 SD_D10IDE_SDD10
SD_D15IDE_SDD15 SD_D14IDE_SDD14
SD_IRQ15INT_IRQ15
1 2
R150 8.2K_0402_5%
R298
4.7K_0402_5%
1 2
12
PD_PDIORDY
PD_D7
PD_PDDREQ
+5VS
1 2
R139 100K_0402_5%
IDE_SDIORDY18
INT_CD_L22 INT_CD_R 22 CD_AGND22
INT_CD_L INT_CD_R CD_AGND SIDE_RST# SD_D7 SD_D6 SD_D5 SD_D4 SD_D3 SD_D2 SD_D1 SD_D0
SD_SDIOW# SD_SDIORDY SD_IRQ15 SD_SDA1 SD_SDA0 SD_SDCS1# SD_SDCS3#
SHDD_LED#
+5VS
R133
1 2
R149 33_0402_5%
JP10
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
GND53GND
54
470_0805_5%
@
+3VS+3VS
1 2
12
1 2
R156 10K_0402_1%
12
R460 5.6K_0603_1%
R158 0_0402_5%@
1 2
SD_D8 SD_D9 SD_D10 SD_D11 SD_D12 SD_D13 SD_D14 SD_D15 SD_SDDREQ SD_SDIOR#
SD_SDDACK#
R153 100K_0402_5%
1 2
SD_SDA2
1 2
C157 0.1U_0402_10V6K
OCTEK_TCDR-040623400A_50P
R146
4.7K_0402_5%
SD_SDIORDY
SD_D7
SD_SDDREQ
+5VS
+5VS +5VS
Plac ea caps. n ear HDD
+5VS
CONN.
C371 1000P_0402_50V7K
+5VS
C161 1000P_0402_50V7K
1
C351 10U_0805_10V4Z
2
W=80mils
1
C155
4.7U_0805_10V4Z
2
Place c omponent's c losel y MODULE CONNECTOR.
1
C373 10U_0805_10V4Z
2
1
C163 1U_0603_10V4Z
2
1
C372 1U_0603_10V4Z
2
C162
0.1U_0402_16V4Z
C356
0.1U_0402_16V4Z
1
C152
4.7U_0805_10V4Z
2
1
C234 10U_0805_10V4Z
2
1
C231 10U_0805_10V4Z
2
1
C350 10U_0805_10V4Z
2
1
C146 10U_0805_10V4Z
2
Should place close to SB side
Security Classification
Issued Date
THIS SH EE T OF E N G INEER ING DR AWING I S THE PRO PRIETAR Y PROPERTY O F COMPAL EL ECTR ONICS, INC . AND C ONTAIN S CONF IDENT IAL AND T RA D E SECR ET INFO RMATION . THI S SHEET MAY NOT BE TRANSFER ED FR OM THE CU STODY OF T HE COMPET ENT DIVI SION O F R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONICS, I NC. NEITHER THIS S HEET NOR THE INF ORMATION IT CONT AINS MAY BE U SED BY O R DISC LOSED T O ANY THI RD PART Y WITHO UT PRI OR WRI TTEN CO NSENT OF COMPAL EL ECTRO NICS, INC.
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
Title
IDE/ FD D MODULE CONN.
Size Docum en t N u m ber Re v
Sakhir 10E<HBT10> 1.0
Custom
Date: Sheet
星期三 五月
, 2005
of
21 44, 04
A
TI_BUG28
EC Beep
BEEP#28
1 1
CardB us Beep
PCM_SPK#26
1U_0603_10V4Z
1U_0603_10V4Z
2
C305
0.01U_0402_16V7K
1
B
R555 0_0402_5%
1 2
1 2
1 2
R276
C304
560_0402_5%
1 2
R272 560_0402_5%
C307
1 2
C
+AVDD_AC97
12
12
R330 10K_0402_5%
2
3 1
R341 10K_0402_5%
1
2
Q32 MMBT3904_SOT23
C357 10U_0805_10V4Z
C313
1 2
1U_0603_10V4Z R323
2.4K_0402_5%
1 2
D
MONO_IN
+5VALW
E
1
C324 22U_1206_16V4Z_V1
2
SUSP#28,31,33,38
1
C319
0.1U_0402_16V4Z
2
F
40mil
U27
4
VIN
2
SENSE or ADJ
DELAY ERROR7CNOISE
8
SD
SI9182DH-AD_MSOP8
G
H
28.7K for Module Design (VDDA = 4.702)
(outpu t = 250 mA)
40mil
VOUT
GND
5 6 1 3
1
C320
2
0.1U_0402_16V4Z
R326 30K_0402_1%
1 2 12
+VDDA
4.85V
1
C367 10U_0805_6.3V6M
2
R327 10K_0402_1%
PCI Beep
C303
1 2
SPKR18
2 2
1U_0603_10V4Z
1 2
R269 560_0402_5%
R268 10K_0402_5%
12
D34
CH751H-40_SC76
2 1
AC97 Codec
+AVDD_AC97
L26
+VDDA
R316 6.8K_0402_5% R336 6.8K_0402_5%
3 3
4 4
INT_CD_L21 INT_CD_R21 CD_AGND21
**
1 2
R342 0_0603_5%
1 2
R331 0_0603_5%
1 2
R310 0_0603_5%
R312 20K_0402_5% R335 20K_0402_5%
R328 20K_0402_5%
12
R325 0_0402_5%
12 12 12 12
1 2
FBM-L11-160808-800LMT_0603
NBA_PLUG23,29
12
12
R332
6.8K_0402_5%
ICH_AC_RST#18,32 ICH_AC_SYNC18,20,32
ICH_AC_SDOUT18,32
10U_0805_6.3V6M
CD_L_R CD_R_R CD_R_RC CD_AGND_R
MIC23
0.1U_0402_16V4Z
1
C358
C345
2
C331 1U_0603_10V4Z
1 2
C333 1U_0603_10V4Z
1 2
1 2
C365 1U_0603_10V4Z
1 2
C366 1U_0603_10V4Z
1 2
C336 1U_0603_10V4Z
1 2
C349 1U_0603_10V4Z
1 2
C346 1U_0603_10V4Z
1 2
C353 1U_0603_10V4Z
1 2
C354 1U_0603_10V4Z
1 2
C330 0.1U_0402_16V4Z
R292 22_0402_5%
1 2
R285 22_0402_5%
1 2
R294 22_0402_5%
1 2
R307 0_0402_5%
1 2
GND G NDA
40mil
1
1
C347
2
2
0.1U_0402_16V4Z
AVDD125AVDD2
14
AUX_L
15
AUX_R
16
JD2
17
JD1
23
LINE_IN_L
24
CD_L_RC
CD_AGND_RC
MIC_C
MONO_IN
EAPD28
LINE_IN_R
18
CD_L
20
CD_R
19
CD_GND
21
MIC1
22
MIC2
13
PHONE
12
PC_BEEP
11
RESET#
10
SYNC
5
SDATA_OUT
45
SDA
46
XTLSEL
47
SPDIFI/EAPD
48
SPDIFO
4
DVSS1
7
DVSS2
U28 ALC250-VD_LQFP48
DGND AGND
20mil
38
DVDD11DVDD2
LINE_OUT_L
LINE_OUT_R
MONO_OUT/VREFOUT3
HP_OUT_L
HP_OUT_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
AFILT1 AFILT2
VREFOUT
VREF
DCVOL
VREFOUT2
VAUX
DISABLE#
SCK
AVSS1 AVSS2
0.1U_0402_16V4Z
1
C327
2
9
NC
NC
0.1U_0402_16V4Z
AMP_OUT_L
35
AMP_OUT_R
36 37 39 41
R293 39_0402_5%
6
R284 22_0402_5%
8 2
3
AFILT1
29
AFILT2
30 28
10mil
27 32
C375 1U_0603_10V4Z@
31
R344 0_0402_5%@
33
R350 0_0603_5%@
34 43 44
40 26 42
+AC97_DVDD
1
1
C314
C326
2
C378 1U_0603_10V4Z C377 1U_0603_10V4Z C364 1000P_0402_50V7K@ C363 1000P_0402_50V7K@
1 2 1 2
C360 1000P_0402_50V7K C361 1000P_0402_50V7K
C362 0.01U_0402_16V7K C376 1U_0603_10V4Z
1 2 1 2
10U_0805_6.3V6M
2
1 2 1 2 1 2 1 2
R291
1M_0402_5%@
1 2
1 2 1 2
+AUD_VREF
1 2 1 2
1 2
R314 10K_0402_5%
AC97_VREF
1 2
+3VS
AMP_LEFT 23 AMP_RIGHT 23
ICH_AC_BITCLK 18,32
ICH_AC_SDIN0 18,20
@
24.576MHz_16P_3XG-24576-43E1
1
C315
22P_0402_50V8J@
2
+AVDD_AC97
+3VS
X3
1 2
10mil
R283 0_0402_5%
1 2
1
C316
22P_0402_50V8J@
2
2
C374
1U_0603_10V4Z
1
1
2
C359
0.1U_0402_16V4Z
+AUD_VREF
1
2
CLK_14M_CODEC 16
C352 10U_0805_10V4Z
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2005/03/01 2006/03/01
E
Deciphered Date
Title
AC97 COD EC ALC250D
Size Docu ment Number Re v
Sakhir 10E<HBT10> 1.0
Custom
Date: Sheet
星期三 五月
F
04, 2005
G
of
22 44,
H
A
R553 0_0603_5%
+VDDA
+5VS
S
1 1
NBA_PLUG
AOS 3401_SOT23
Q46
2
G
D
1 3
@
1 2
R552 0_0603_5%
@
1 2
W=40mil
1
2
U31
7 18 19
2
3
4 21
5 23
6 20
17
APA2121PI-TR_TSSOP24
1
C389
0.047U_0402_16V7K
2
1
2
PVDD PVDD VDD
HP/LINE# VOLUME LOUT+ ROUT+ LLINEIN RLINEIN LHPIN RHPIN
CLK
C386
0.1U_0402_16V4Z
AMP_LEFT_C AMP_RIGHT_C
1
2
NBA_PLUG
2 2
AMP_LEFT22
AMP_RIGHT22
SPKL+ SPKR+
VOL_AMP29
1 2
C382 1U_0603_10V4Z
1 2
C381 1U_0603_10V4Z
1 2
C383 1U_0603_10V4Z
1 2
C384 1U_0603_10V4Z
VOL_AMP SPKR-
HP_L HP_R
C379
0.1U_0402_16V4Z
21
CH551H-30_SC76 D46
C387 10U_0805_10V4Z
SHUTDOWN#
SE/BTL#
PC-BEEP
BYPASS
ROUT­LBYPASS RBYPASS
B
LOUT-
GND GND GND GND
22 15 14 11 9 16 10 8
1 12 13 24
+5VS
12
R358 100K_0402_5%
SHUTDOWN#
NBA_PLUG BYPASS
20mil
C388
4.7U_0805_10V4Z
Q35
13
D
2N7002_SOT23
2
G
S
1 2
C390 0.1U_0402_16V4Z
SPKL-
2
1
C
EC_MUTE 28
SPKL+ SPKL­SPKR+ SPKR-
20mil
D
R69 0_0603_5%
1 2
R71 0_0603_5%
1 2
R68 0_0603_5%
1 2
R70 0_0603_5%
1 2
Speaker Conn.
PSOT24C_SOT23@
D10
E
1
1
2
3
D9
PSOT24C_SOT23@
2
3
SPK_L+ SPK_L­SPK_R+ SPK_R-
JP6
4 3 2 1
ACES_85204-0400
Headphone JACK 1
3 3
NBA_PLUG22,29
NBA_PLUG
10mil
+
SPKR+
C380 150U_D_6.3VM
SPKL+
C385 150U_D_6.3VM
4 4
A
HPOUT1_R_2 HPOUT1_R_3
1 2
+
1 2
HPOUT1_L_2
R338 0_0603_5% R339 0_0603_5%
1 2 1 2
HPOUT1_L_3 MIC MIC_L
R343 1K_0402_5%
1 2
2
C355 1U_0603_10V4Z
1
C369
330P_0402_50V7K
B
+5VS
12
R347 100K_0402_5%
C368
330P_0402_50V7K
+AUD_VREF
JP17
5 4 3
6 2 1
FOX_JA6033L-5S3-TR
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
C
Compal Secret Data
15mil
MIC22
Deciphered Date
1 2
L27 FBM-11-160808-700T_0603
R345
4.7K_0402_5%@
C370
220P_0402_50V7K
D
MIC JACK
12
12
R346
4.7K_0402_5%
1
2
Title
Size Do cu m ent N umber R e v
B
Dat e : Sheet
JP18
5 4 3
6 2 1
FOX_JA6033L-5S3-TR
AMP & Audio Jack
Sakhir 10E<HBT10> 1 . 0
期三 五月
E
of
23 44¬P , 04, 2005
5
PCI_AD[0..31]17,20,25,26,32,41
R182
C211
CLK_PCI_LAN
12
1
2
Y2
D D
10_0402_5%@
18P_0402_50V8K@
C C
B B
LAN_X1 LAN_X2
25MHZ_20P_1BX25000CK1A
1
C228 27P_0402_50V8J
2
A A
PCI_AD[0..31]
PCI_C/BE#017,25,26,32,41 PCI_C/BE#117,25,26,32,41 PCI_C/BE#217,25,26,32,41 PCI_C/BE#317,25,26,32,41
PCI_AD19 LAN_IDSEL
LAN_EN#28
PCIRST#17,25,26,28,30,32,41
PCI_FRAME#17,25,26,32,41
PCI_IRDY#17,25,26,41
PCI_TRDY#17,25,26,32,41
PCI_DEVSEL#17,25,26,41
PCI_STOP#17,25,26,41
PCI_PERR#17,25,26,41 PCI_SERR#17,25,26,41
PCI_REQ#317 PCI_GNT#317
PCI_PIRQD#17,25,41
LAN_PME#25,28,41
CLK_PCI_LAN17 PM_CLKRUN#17,25,26,28,41
5
1 2
R209 100_0402_5%
PCI_PAR17,25,26,41
1
C225 27P_0402_50V8J
2
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
LAN_RST#
CLK_PCI_LAN PM_CLKRUN#
SN74LVC125APWLE_TSSOP14
R138 0_0402_5% @
104 103 102
128
101 119
100
13
U8D
OE#
I12O
1 2
U13
AD0 AD1 AD2
98
AD3
97
AD4
96
AD5
95
AD6
93
AD7
90
AD8
89
AD9
87
AD10
86
AD11
85
AD12
83
AD13
82
AD14
79
AD15
59
AD16
58
AD17
57
AD18
55
AD19
53
AD20
50
AD21
49
AD22
47
AD23
43
AD24
42
AD25
40
AD26
39
AD27
37
AD28
36
AD29
34
AD30
33
AD31
92
C/BE#0
77
C/BE#1
60
C/BE#2
44
C/BE#3
46
IDSEL
76
PAR
61
FRAME#
63
IRDY#
67
TRDY#
68
DEVSEL#
69
STOP#
70
PERR#
75
SERR#
30
REQ#
29
GNT#
25
INTA#
31
PME#
27
RST#
28
CLK
65
CLKRUN#
4
GND/VSS
17
GND/VSS GND/VSS
21
GND/VSSPST
38
GND/VSSPST
51
GND/VSSPST
66
GND/VSSPST
81
GND/VSSPST
91
GND/VSSPST GND/VSSPST GND/VSSPST
35
GND
52
GND
80
GND GND
RTL8100CL_LQFP128
11
1 2
R135 0_0402_5%
4
EEDO
AUX/EEDI
EESK
EECS
LED0 LED1 LED2
NC/LED3
TXD+/MDI0+
TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
NC/MDI2+
NC/MDI2-
NC/MDI3+
NC/MDI3-
X1 X2
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
NC/M66EN NC/AVDDH
PCI I/F
NC/HV
NC/HSDAC+
NC/HG
NC/LG2
NC/LV2
NC/VSS NC/VSS
NC/GND NC/GND NC/GND NC/GND NC/GND
LAN I/F
NC/GND
CTRL25
RTT3/CRTL18
VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33
AVDD33/AVDDL AVDD33/AVDDL AVDD33/AVDDL
NC/AVDDL
VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18
NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18
Power
AVDD25/HSDAC-
R137 15K_0402_5%
1 2
4
LAN_EEDO
108
LAN_EEDI
109
LAN_EECLK
111
LAN_EECS
106
LAN_ACTIVITY#
117
LAN_LINK10_100#
115 114 113
LAN_TD+
1
LAN_TD-
2
LAN_RD+
5
LAN_RD-
6 14
15 18 19
LAN_X1
121
LAN_X2
122 105
23
10mil
127
10mil
72 74
88 10
120 11
123 124 126
1 2
R172 0_0805_5%
9 13
22 48 62 73 112 118
CTRL25
8 125 26
41 56 71 84 94 107
+LAN_AVDDL
3 7 20 16
32 54 78
+LAN_DVDD
99
24 45 64 110 116
+2.5V_LAN_VDD
12
20mil
C665
0.1U_0402_16V4Z
LAN_RST#
3
U19
4
DO
3
DI
2
SK
1
CS
AT93C46-10SI-2.7_SO8
R239 4.7K_0402_5%
1 2
R171 1K_0402_5%
1 2
R183 15K_0402_5%
1 2 1 2
R173 5.6K_0603_1%
+LAN_DVDD
+3VALW
40mil
1
1
0.1U_0402_16V4Z
C666
0.1U_0402_16V4Z
40mil
0.1U_0402_16V4Z
1
2
C664
2
2
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C260
C675
2
2
L15
1 2
1
KC F BM-L11-201209-221LMAT_0805 C215 10U_0805_10V4Z
2
+3VS
1 2
1
C213
0.1U_0402_16V4Z
2
L18
1 2
KC F BM-L11-201209-221LMAT_0805
1
C236
2
+2.5V_LAN
L16
KC F BM-L11-201209-221LMAT_0805
+3VALW
1
C674
2
0.1U_0402_16V4Z
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
5
GND
6
NC
7
NC
8
VCC
R175
49.9_0402_1%
C210
0.01U_0402_25V7Z
CTRL25
10U_0805_10V4Z
+3VALW
+2.5V_LAN
0.1U_0402_16V4Z
1
C258
2
Compal Secret Data
C268
0.1U_0402_16V4Z
+3VALW
12
12
R174
49.9_0402_1%
49.9_0402_1%
1
2
+3VALW
2
B
C
C202
1
C669
2
0.1U_0402_16V4Z
Deciphered Date
2
1
12
R177
0.01U_0402_25V7Z
31
E
Q15 2SB1197K_SOT23
40mil
1
1
2
2
0.1U_0402_16V4Z
1
C672
2
2
+3VALW
LAN_RD+ LAN_RD-
LAN_TD+ LAN_TD-
12
R176
49.9_0402_1%
1
C209
2
+2.5V_LAN
C198
0.1U_0402_16V4Z
1
C257
2
0.1U_0402_16V4Z
2
1
C15
0.01U_0402_25V7Z
2
+3VALW
1
C259
0.1U_0402_16V4Z
2
1
LAN RTL8100C(L)
U5
12
12
R30 75_0402_1%
RJ45_GND
Q22 DTA114YKA_SOT23
C
Q21 DTA114YKA_SOT23
C
RJ45_RX+ RJ45_RX-
RJ45_TX+ RJ45_TX-
RJ45_RX+ 29 RJ45_RX- 29
RJ45_TX+ 29 RJ45_TX- 29
RJ45_GND 29
ACTIVITY_LED# 29
LINK10_100_LED# 29
24 44¬P , 04, 2005
1
1
RD+
2
RD-
3
CT
6
CT
7
TD+ TD-8TX-
NS0013_16P
LAN_ACTIVITY#
+3VALW
LAN_LINK10_100#
Title
Size Do cu m ent N umber R e v
B
Dat e : Sheet
16
RX+
15
RX-
14
CT
11
CT
10
TX+
9
R44
75_0402_1%
E
3 1
47K
B
10K
2
E
3 1
47K
B
10K
2
LAN RE ALTEK RTL8100CL
Sakhir 10E<HBT10> 1 . 0
期三 五月
of
WL_OFF#28 KILL_SW#28,30
CLK_PCI_MINI1
12
R235 10_0402_5%
@
1
C262 15P_0402_50V8J
@
2
+3VS
+3VALW
C276 0.1U_0402_16V4ZKW@ U21
5
1
P
B
4
Y
2
A
G
3
TC7SH08FU_SSOP5KW@
LAN RESERVED
D33
PCI_PIRQD#17,24,41
W=40mils
CLK_PCI_MINI117
PCI_REQ#117
PCI_C/BE#317,24,26,32,41
PCI_C/BE#217,24,26,32,41
PCI_IR D Y#17,24,26,41
PM_CLKRUN#17,24,26,28,41
PCI_SERR#17,24, 26,41
PCI_PERR#17,24,26,41 PCI_C/BE#117,24,26,32,41
CLK_PCI_MINI1
+5VS
CH751H-40_SC76KW@
PCI_AD31 PCI_AD29
PCI_AD27 PCI_AD25
PCI_AD23 PCI_AD21
PCI_AD19 PCI_AD17
PCI_AD14 PCI_AD12
PCI_AD10 PCI_AD8
PCI_AD7 PCI_AD5 PCI_AD3
W=30mils
PCI_AD1
W=30mils W=20mils
+5VS
PCI_AD[0..31]
PCI_AD [0. .31] 17, 20,24, 26,32,41
MINI_PCI 1 SOCKET for Wireless Lan
1 3
5 7 9
101 103 105 107 109 111 113 115 117 119 121 123
JP20
1 3
5 7 9 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100 101 103 105 107 109 111 113 115 117 119 121 123
127
QTC_C102A-040B31-4KW@
127
RING
2
2
4
4
6
6
8
8
10
102 104 106 108 110 112 114 116 118 120 122 124
128
128
LAN RESERVED
10 12 14 16 18 20 22
W=40mils
24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
TIP
21
W=30mils
PCIRST#
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24
PCI_AD22 PCI_AD20
PCI_AD18 PCI_AD16
PCI_AD15 PCI_AD13 PCI_AD11
PCI_AD9
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
2
C265
1
+3VALW
0.1U_0402_16V4ZKW@
+5VS
PCI_PIRQC# 17,41
+3VALW
PCIRST# 17,24,26,28,30,32,41 PCI_GNT#1 17 WLANPME# 24,28,41
1 2
100_0402_5%
R208
KW@
PCI_PAR 17,24,26,41
PCI_FRAME# 17,24,26,32,41 PCI_TRDY# 17,24,26,32,41 PCI_STOP# 17, 24,26,41
PCI_DEVSEL# 17,24,26,41
PCI_C/BE#0 17,24,26, 32,41
PCI_AD18
W=40mils
+3VS
IDSEL : PCI_AD18
1
2
2
1
+3VALW
2
1
C272
KW@
1000P_0402_50V7K
C269
KW@
0.1U_0402_16V4Z
C264
KW@
0.1U_0402_16V4Z
2
C197
KW@
0.1U_0402_16V4Z
1
2
C205
KW@
0.1U_0402_16V4Z
1
1
C256
KW@
10U_0805_10V4Z
2
2
C171
KW@
0.1U_0402_16V4Z
1
2
C232
KW@
0.1U_0402_16V4Z
1
1
2
2
C206
KW@
0.1U_0402_16V4Z
1
+5VS
C173
KW@
10U_0805_10V4Z
2
1
C229
KW@
0.1U_0402_16V4Z
1
C207
KW@
10U_0805_10V4Z
2
1
C266
KW@
10U_0805_10V4Z
2
+3VS
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
Compal S e cr e t Data
Deciphered Date
Title
MINI_PCI
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
Date: Sheet
星期三 五月
005
of
25 44, 04, 2
5
4
3
2
1
+S1_VCC
S1_A16
+3VS
1
2
+3VS
1
2
1
2
C685
0.1U_0402_16V4Z
C687
0.1U_0402_16V4Z
C310
0.1U_0402_16V4Z
1
C682
0.1U_0402_16V4Z
2
1
C688
0.1U_0402_16V4Z
2
1
C311
0.1U_0402_16V4Z
2
S1_CD1# S1_CD2#
10P_0402_50V8J
C321
1
C691
0.1U_0402_16V4Z
2
1
C690
0.1U_0402_16V4Z
2
1
2
1
2
C299
0.1U_0402_16V4Z
Close chip termenal
+S1_VCC
12
R281 43K_0402_5%@
10P_0402_50V8J
Closed to Pin A4Closed to Pin L12
2
C683
0.1U_0402_16V4Z
1
1
C686
0.1U_0402_16V4Z
2
1
C289
0.1U_0402_16V4Z
2
1
C297
2
G1
F3
VCC2
VCC1
CAD31/D10
CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0 CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6
CAD19/A25
CAD18/A7 CAD17/A24 CAD16/A17
CAD14/A9 CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4 CAD0/D3
CCBE2#/A12
CCBE1#/A8
CIRDY#/A15
CTRDY#/A22 CSTOP#/A20
CPERR#/A14
CPAR/A13
CGNT#/WE#
CCLK/A16
SPKROUT
CCD2#/CD2# CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2 CRSV2/A18 CRSV1/D14
+S1_VCC +3VS
B2 C3 B3 A3 C4 A6 D7 C7 A8 D8 A9 C9 A10 B10 D10 E12 F10 E13 F13 F11 G10 G11 G12 H12 H10 J11 J12 K13 J10 K10 K12 L13
B7 A11 E11 H13
B9 B11 A12 A13 B13 C12 C13 A5 D13 B8 C11 B12
C5 D5
D11 D6 M9
B5 A4
L12 D9 C6 A2 E10 J13
S1_A[0..25] S1_D[0..15]
S1_D10 S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17 S1_IOWR# S1_A9 S1_IORD# S1_A11 S1_OE# S1_CE2# S1_A10 S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3
S1_REG# S1_A12 S1_A8 S1_CE1#
S1_RST S1_A23 S1_A15 S1_A22 S1_A21 S1_A20 S1_A14 S1_WAIT# S1_A13 S1_INPACK# S1_WE#
S1_BVD1 S1_WP
S1_A19 S1_RDY# PCM_SPK#
S1_BVD2 S1_CD2#
S1_CD1# S1_VS2 S1_VS1 S1_D2 S1_A18 S1_D14
S1_A[0..25] 27 S1_D[0..15] 27
S1_IOWR# 27 S1_IORD# 27 S1_OE# 27
S1_CE2# 27
S1_REG# 27
S1_CE1# 27 S1_RST 27
S1_WAIT# 27 S1_INPACK# 27
S1_WE# 27
1 2
R271 33_0402_5%
S1_BVD1 27 S1_WP 27
S1_RDY# 27 PCM_SPK# 22
S1_BVD2 27 S1_CD2# 27
S1_CD1# 27 S1_VS2 27 S1_VS1 27
VPPD027
VPPD127 VCCD0#27 VCCD1#27
D D
CLK_PCI_CB
12
R296 10_0402_5%@
C C
B B
1
C325
18P_0402_50V8K@
2
IDSEL: PCI_AD20
PCI_PIRQA#8,17,41
SERIRQ17,28,30
PM_CLKRUN#17,24,25,28,41
PCI_AD[0..31]17,20,24,25,32,41
PCI_C/BE#317,24,25,32,41 PCI_C/BE#217,24,25,32,41 PCI_C/BE#117,24,25,32,41 PCI_C/BE#017,24,25,32,41
PCIRST#17,24,25,28,30,32,41
PCI_FRAME#17,24,25,32,41
PCI_IR D Y#17,24,25,41 PCI_TRDY#17,24,25,32,41
PCI_DEVSEL#17,24,25,41
PCI_STOP#17,24,25,41 PCI_PERR#17,24,25,41
PCI_SERR#17,24, 25,41
PCI_PAR17,24,25,41 PCI_REQ#217 PCI_GNT#217
CLK_PCI_CB17
+3VS
PCI_PIRQA# S1_WP
PCI_AD[0..31]
PCI_AD31
C2
PCI_AD30
C1
PCI_AD29
D4
PCI_AD28
D2
PCI_AD27
D1
PCI_AD26
E4
PCI_AD25
E3
PCI_AD24
E2
PCI_AD23
F2
PCI_AD22
F1
PCI_AD21
G2
PCI_AD20
G3
PCI_AD19
H3
PCI_AD18
H4
PCI_AD17
J1
PCI_AD16
J2
PCI_AD15
N2
PCI_AD14
M3
PCI_AD13
N3
PCI_AD12
K4
PCI_AD11
M4
PCI_AD10
K5
PCI_AD9
L5
PCI_AD8
M5
PCI_AD7
K6
PCI_AD6
M6
PCI_AD5
N6
PCI_AD4
M7
PCI_AD3
N7
PCI_AD2
L7
PCI_AD1
K7
PCI_AD0
N8 E1
J3 N1 N5
PCIRST#
G4
J4 K1 K3
L1
L2
L3
M1 M2
A1
R31910K_0402_5%@ R53210K_0402_5%@
R31710K_0402_5%@ R31810K_0402_5%@
PCIRST#
M11
M10
B1 H1
L8
L11
F4 K8
N9 K9
N10
L10
N11
J9
CLK_PCI_CB A16_CLK
3V_PCM_SUSP
1 2
R321 10K_0402_5% R303 100_0402_5%
1 2
1 2 1 2
1 2 1 2
1 2
R320 0_0402_5%
PCM_IDPCI_AD20
M13
U25
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
CBE3# CBE2# CBE1# CBE0#
PCIRST# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR PCIREQ# PCIGNT# PCICLK
RIOUT#_PME# SUSPEND#
IDSEL MFUNC0
MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6 MFUNC7
GRST#
N13
VCCD0#
VCCD1#
M12
VPPD1
N12
VPPD0
PCI Interface
A7
VCCA2
G13
VCCA1
B4
VCC10
K2
N4
L6
C8
L9
H11
D12
VCC3
VCC4
VCC5
VCC9
VCC6
VCC7
VCC8
CAD15/IOWR#
CAD13/IORD#
CCBE3#/REG#
CCBE0#/CE1#
CARDBUS
CRST#/RESET
CFRAME#/A23
CDEVSEL#/A21
CSERR#/WAIT#
CREQ#/INPACK#
CSTSCHG/BVD1_STSCHG#
CCLKRUN#/WP_IOIS16#
CBLOCK#/A19
CINT#/READY_IREQ#
CAUDIO/BVD2_SPKR#
GND1D3GND2H2GND3L4GND4M8GND5
GND6
GND7
GND8
PCI1410AGGU_PBGA144
B6
F12
K11
C10
A A
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Compal S e cr e t Data
Deciphered Date
Title
PCMCIA Controller TI1410
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
2
Date: Sheet
005
1
of
26 44, 04, 2
PCMCIA P o w e r Controller
W=40mil
1
1
C329
C323
C318
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
2
W=40mil
C317
0.1U_0402_16V4Z
10U_0805_6.3V6M
10U_0805_6.3V6M
2
C328
+S1_VCC
40mil
U23
9
12V
+5VS
1
2
1
2
+3VS
5 6
3 4
12
R274 10K_0402_5%
5V 5V
3.3V
3.3V
VCC VCC VCC
VPP
VCCD0 VCCD1 VPPD0 VPPD1
GND
SHDN
TPS2211AIDBR_SSOP16
7
16
OC
1
VCCD0# VCCD1# VPPD0 VPPD1
C296
4.7U_0805_10V4Z
2
+S1_VPP
40mil
1
C302
0.1U_0402_16V4Z
2
VCCD0# 26
VCCD1# 26 VPPD0 26 VPPD1 26
13 12 11
10
1 2 15 14
8
CardBus Socket
S1_A[0..25]26
S1_D[0..15]26
Close to CardBus Conn.
C284
10U_0805_10V4Z
1
C298
4.7U_0805_10V4Z
0.01U_0402_25V4Z
2
S1_A[0..25] S1_D[0..15]
1
0.1U_0402_16V4Z
2
+S1_VCC
C285
+S1_VPP
C293
JP15
1
S1_D3 S1_D4 S1_D5 S1_D6 S1_D7
S1_CE1#26
1
2
1
2
S1_OE#26
S1_WE#26
S1_RDY#26
S1_WP26
S1_CE1# S1_A10 S1_OE# S1_A11 S1_A9 S1_A8 S1_A13 S1_A14 S1_WE# S1_RDY#
+S1_VCC
+S1_VPP
S1_A16 S1_A15 S1_A12 S1_A7 S1_A6 S1_A5 S1_A4 S1_A3 S1_A2 S1_A1 S1_A0
S1_D0 S1_D1 S1_D2
S1_WP S 1_CD2#
GND
2
D3 / CAD0
3
D4 / CAD1
4
D5 / CAD3
5
D6 / CAD5
6
D7 / CAD7
7
CE1# / CCBE0#
8
A10 / CAD9
9
OE# / CAD11
10
A11 / CAD12
11
A9 / CAD14
12
A8 / CCBE1#
13
A13 / CPAR
14
A14 / CPERR#
15
WE# / CGNT#
16
IREQ# / CINT#
17
VCC
18
VPP1
19
A16 / CCLK
20
A15 / CIRDY#
21
A12 / CCBE2#
22
A7 / CAD18
23
A6 / CAD20
24
A5 / CAD21
25
A4 / CAD22
26
A3 / CAD23
27
A2 / CAD24
28
A1 / CAD25
29
A0 / CAD26
30
D0 / CAD27
31
D1 / CAD29
32
D2 / RFU
33
IOIS16# / CCLKRUN#
34
GND
69
GND
71
GND
73
GND
75
GND
77
GND
79
GND
81
GND
83
GND
85
GND
87
GND
FOX_W Z21131-G2-P4_RT
CD1# / CCD1#
CE2# / CAD10
VS1# / CVS1 IORD# / CAD13 IOWR# /CAD15
A17 / CAD16
A19 / CBLOCK#
A20 / CSTOP#
A21 / CDEVSEL#
A22 / CTRDY#
A23 / CFRAME#
A24 / CAD17
A25 / CAD19
VS2# / CVS2
RESET / CRST#
WAIT# / CSERR#
INPACK# / CREQ#
REG# / CCBE3#
SPKR# / CAUDIO
STSCHG# / CSTSCHG
D8 / CAD28
D9 / CAD30
D10 / CAD31 CD2# / CCD2#
GND
D11 / CAD2 D12 / CAD4
D13/ CAD6
D14/ RFU
D15 / CAD8
A18 / RFU
VCC
VPP2
GND
GND GND GND GND GND GND GND GND GND GND
35
S1_CD1#
36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
70 72 74 76 78 80 82 84 86 88
S1_D11 S1_D12 S1_D13 S1_D14 S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17 S1_A18 S1_A19 S1_A20 S1_A21
S1_A22 S1_A23 S1_A24 S1_A25 S1_VS2 S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2 S1_BVD1
S1_D8 S1_D9 S1_D10
S1_CD1# 26
S1_CE2# 26 S1_VS1 26 S1_IORD# 26 S1_IOWR# 26
+S1_VCC +S1_VPP
S1_VS2 26 S1_RST 26 S1_WAIT# 26 S1_INPACK# 26 S1_REG# 26 S1_BVD2 26 S1_BVD1 26
S1_CD2# 26
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
Compal S e cr e t Data
Deciphered Date
Reserve for Debug.
S1_WP S1_OE# S1_RST S1_CE1# S1_CE2#
Title
PCMCIA Socket
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
Date: Sheet
星期三 五月
+S1_VCC
12
R30643K_0402_5%
12
R24547K_0402_5%
12
R27747K_0402_5%
12
R23847K_0402_5%
12
R24147K_0402_5%
005
of
27 44, 04, 2
5
KBA[0..19]
ADB[0 ..7 ]
L22
1 2
FBM-L11-160808-800LMT_0603
D D
WLANPME#24 ,25,41
C C
B B
A A
LAN_PME#24,25,41
USB20_PME#2 4,25,41
+3VALW
RP47
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
+3VALW
RP46
1 8 2 7 3 6 4 5
+5VALW
Analog Board ID definition, Please see page 3.
Ra
Rb
100K_1206_8P4R_5%
RP45
1 8 2 7 3 6 4 5
4.7K_1206_8P4R_5%
+3VALW
1 2
R231 100K_0402_5%
1 2
R234 100K_0402_5%
+3VALW
R244 100K_0402_5%
1 2
R243
1 2
0_0402_5%
ECAGND
PSCLK1 PSDATA1 PSCLK2 PSDATA2
EC_FUNC_BTN#
FRD# SELIO# FSEL#
EC_SMB_CK2 EC_SMB_DA2 EC_SMB_DA1 EC_SMB_CK1
EC_IE_BTN#
ENBKL
AD_BID0
1
C275
2
0.1U_0402_16V4Z
KBA[0..19] 31 ADB[0..7 ] 31
CLK_ PCI_LPC17
12
R219 10_0402_5%@
C244
@
22P_0402_50V8J
+3VALW
R189 10K_0402_5%
1 2
EC_PME#
1
C204
2
10P_0402_50V8J
32.768KHZ_12.5P_1TJS125DJ2A073
5
12
C250 0.1U_0402_16V4Z
+3VALW
R166
1 2
20M_0603_5%@
1
4
IN
OUT
NC3NC
2
0.1U_0402_16V4Z
PM_CLKRUN#17,24,25,26,41
12
12
R220 47K_0402_5%
CRY2CRY1
1
C199
X1
2
10P_0402_50V8J
1
C220
2
EC_FUNC_BTN#29
+3VALW
4
+3VALW
0.1U_0402_16V4Z
LPC_ FRAME#17,30
EC_IE_BTN#29
+3VALW
EC_SMB_CK131,35 EC_SMB_DA131,35 EC_SMB_CK24 EC_SMB_DA24
PBTN_OUT#18
PADS_LED#29
CAPS_LED#29
NUM_LED#29
PHDD_LED#21
1 2
1
2
0.1U_0402_16V4Z
C280
1
2
LPC_AD017,30 LPC_AD117,30 LPC_AD217,30 LPC_AD317,30
PCIRST#17,24,25,26,30,32,41
SERIRQ1 7,26,30
FRD#31
FWR#31
FSEL#31
TP_CLK29
TP_DATA29
LAN_EN#24 EC_SCI#18
ENBKL8 BKOFF#15
FSTCHG36
EC_SMI#18
WL_OFF#25
EC_SWI#18
S4_LATCH32 S4_DATA32 EAPD 22
LID_SW#29
SYSON32,33 SUSP#2 2,31,33,38
VR_ON40
GATEA2018 KBRST#18
R247 100K_0402_5%
SKU_ID
C281
0.1U_0402_16V4Z
1
1
C235
2
2
0.1U_0402_16V4Z
LPC_ AD0 LPC_ AD1 LPC_ AD2 LPC_ AD3
1 2
R228 0_0402_5%
FRD# FWR# FSEL# SELIO# ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19 EC_IE_BTN#
12
R232 100K_0402_5%
PSCLK1 PSDATA1 PSCLK2 PSDATA2 TP_CLK TP_DATA
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
LAN_EN# EC_SCI#
ENBKL BKOFF# FSTCHG EC_SMI#
LID_SW#
EC_FUNC_BTN#
SYSON SUSP# VR_ON
PBTN_OUT#
PADS_LED# CAPS_LED# NUM_LED#
SKU_ID 29
4
2
C239
1000P_0402_50V7K
1
15 14 13 10
165
18 25
24
150 151 173 152 138 139 140 141 144 145 146 147 124 125 126 127 128 131 132 133 143 142 135 134 130 129 121 120 113 112 104 103 108 105
110 111 114 115 116 117
163 164 169 170
20 21 22 27 28 48 62 63 69 70
75 109 118 119 148 149 155 156 162 168
55
54
23
41
19
31
C267
U15
LAD0 LAD1 LAD2 LAD3
9
LFRAME# LRST#/GPIO2C LCLK
7
SERIRQ CLKRUN#/GPIO0C LPCPD#/GPIO0B
RD# WR# MEMCS# IOCS# D0 D1 D2 D3 D4 D5 D6 D7 A0 A1/XIOP_TP A2 A3 A4/DMRP_TP A5/EMWB_TP A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20/GPIO23 E51CS#/GPIO20/ISPEN
PSCLK1 PSDAT1 PSCLK2
PS2 Interface
PSDAT2 PSCLK3 PSDAT3
SCL1 SDA1 SCL2 SDA2
8
GPIO04 GPIO07 GPIO08 GPIO09 GPIO0D GPIO0E GPIO10 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO2A GPIO2B GPIO2D
FnLock#/GPIO12 CapLock#/GPIO011 NumLock#/GPIO0A ScrollLock#/GPIO0F ECRST#
5
GA20/GPIO02
6
KBRST#/GPIO03 ECSCI#
FBM-L11-160808-800LMT_0603
2
1
LPC Interface
1 2
C221 1000P_0402_50V7K
VCC16VCC34VCC45VCC
*
*
X-BUS Interface
SMBus
GPIO
*
*
* *
MISC
L23
123
136
VCC
Analog To Digital
Digital To Analog
3
1
C263
2
0.1U_0402_16V4Z
ECAGND
159
161
157
166
96
95
VCC
VCC
VCCA
AGND
VCCBAT
BATGND
FAN2PWM/GPOW2/PWM2
Pulse Width
FAN1PWM/GPOW7/PWM7
Wake Up Pin
ENE-KB910-B4
Expanded I/O
GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
FAN
TEST_TP/GPIO05/FAN3PWM
Timer Pin
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT
GND17GND35GND46GND
GND
GND
122
137
167
Security Cla s sification
Issued Date
THIS SHEET OF ENGINEERI NG DR AWING IS T HE PROPR IETARY PR OPERTY OF C OMPAL EL ECTRON ICS, I NC. AND CO NTAINS CONFIDENTIAL AND TRADE SECRET INFOR MATION . THI S SHEET MAY NOT BE TRANSFER ED FRO M THE CU STODY OF T HE COMPETENT DIVISION O F R&D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECT RONI CS, IN C. NEI THER T HIS SHEET NOR TH E INFORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO AN Y THIR D PARTY W ITHOU T PRIOR WRIT TEN CON SENT OF C OMPAL EL ECTRONICS, INC.
3
0.1U_0402_16V4Z
GPOK0/KSO0 GPOK1/KSO1 GPOK2/KSO2 GPOK3/KSO3 GPOK4/KSO4 GPOK5/KSO5 GPOK6/KSO6 GPOK7/KSO7 GPOK8/KSO8
GPOK9/KSO9 GPOK10/KSO10 GPOK11/KSO11 GPOK12/KSO12 GPOK13/KSO13 GPOK14/KSO14 GPOK15/KSO15 GPOK16/KSO16 GPOK17/KSO17
GPIK0/KSI0 GPIK1/KSI1 GPIK2/KSI2 GPIK3/KSI3 GPIK4/KSI4
Internal Keyboard
GPIK5/KSI5 GPIK6/KSI6 GPIK7/KSI7
GPOW0/PWM0 GPOW1/PWM1
GPOW3/PWM3 GPOW4/PWM4 GPOW5/PWM5 GPOW6/PWM6
GPWU0 GPWU1 GPWU2 GPWU3 GPWU4 GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7
GPIAD0/AD0 GPIAD1/AD1 GPIAD2/AD2 GPIAD3/AD3 GPIAD4/AD4 GPIAD5/AD5 GPIAD6/AD6 GPIAD7/AD7
GPODA0/DA0 GPODA1/DA1 GPODA2/DA2 GPODA3/DA3 GPODA4/DA4 GPODA5/DA5 GPODA6/DA6 GPODA7/DA7
GPIO18/XIO8CS#
*
GPIO19/XIO9CS#
*
GPIO1A/XIOACS#
* *
GPIO1B/XIOBCS#
GPIO1C/XIOCCS#
*
GPIO1D/XIODCS#
*
GPIO1E/XIOECS#
*
GPIO1F/XIOFCS#
*
TOUT2/GPIO2F
E51IT0/GPIO00 E51IT1/GPIO01
XCLKI
XCLKO
KB910Q B4_LQFP176
2005/03/01 2006/03/01
C222
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68 153 154
71 72 73 74 77 78 79 80
32 33
PWR _SUSP_LED
36 37 38 39 40 43
2 26 29 30 44 76 172 176
81 82 83 84 87 88 89 90
99 100 101 102 1 42 47 174
85 86 91
BATT_LOW_LED#
92
BATT_CHGI_LED#
93 94 97 98
171 12 11
175 3
4 106 107
158 160
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
KSO17
INVT_PWM BEEP#
ACOFF EC_ON
EC_L ID_OUT#
KILL_SW#
EC_PME#
BATT_TEMP SKU_ID BATT_OVP
ALI/MH# AD_BID0
DAC_BRIG IREF
EN_DFAN1#
PWR _LED# HDD_LED#
FAN_SPEED1
EC_THRM#
+3VALW
R169 0_0805_5%
1 2
1
1
C212 1U_0603_10V4Z
2
2
KSO0 29 KSO1 29 KSO2 29 KSO3 29 KSO4 29 KSO5 29 KSO6 29 KSO7 29 KSO8 29 KSO9 29
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
12
R2260_0402_5%
1 2
R214 1K_0402_5%
1 2
R211 1K_0402_5%
E51_RXD E51_TXD
CRY2 CRY1
Compal Secret Data
Deciphered Date
KSO10 29 KSO11 29 KSO12 29 KSO13 29 KSO14 29 KSO15 29
KSO17 29 KSI0 29
KSI1 29 KSI2 29 KSI3 29 KSI4 29 KSI5 29 KSI6 29 KSI7 29
INVT_PWM 15 BEEP# 22
PWR _SUSP_LED 31
ACOFF 36 EC_ON 30
EC_L ID_OUT# 18
ON/OFF 30
KILL_SW# 25,30 PM_SLP_S3# 18 PM_SLP_S5# 18
BATT_AOVP 36 ALI/MH# 35,36
DAC_BRIG 15 IREF 36
EN_DFAN1 30
PWR _LED# 31
WL_LED# 31 HDD_ LED# 31 BATT_LOW_LED# 31 BATT_CHGI_LED# 31
FAN_SPEED1 30
EC_THRM# 18
EC_RSMRST# 18,41
12
R2070_0402_5%
EC_MUTE 23
2
C279 0.01U_0402_16V7K
1 2
R240
1 2
C271 0.22 U_0603_16V4Z
2
+3VALW
R230 10K_0402_5%
1 2
2 1
CH75 1H-40_SC76
12
100K_0402_5%
TI_BUG 22
D31
ECAGND
1
For EC T ools
+3VALW
JP13
1
1
E51_RXD
2
2
E51_TXD
3
3
4
4
ACES_85205-0400@
ACIN 18 ,31,34
BATT_TEMPA 35
ADP_I 36
R558
12
+S1_VCC
10K_0402_5%
**
1
C697
2
0.1U_0402_16V4Z
Title
ENE-KB910
Size Document Number R ev
Sakhir 10E<HBT10> 1.0
Custom
Date: Sheet of
星期三 五月
4, 2005
TP_CLK
R216
TP_DATA
R217
KBA1
R210 1K_0402_5%
KBA4
R204 1K_0402_5%
KBA5
R202 1K_0402_5%
1 2 1 2
1 2 1 2 1 2
1
4.7K_0402_5%
4.7K_0402_5%
+3VALW
28 44, 0
+5VS
5
RJ45 Board Conn.
RJ45_TX+24 RJ45_RX+ 24
RJ45_TX-24
RJ45_GND24
D D
RJ45_TX+
RJ45_TX-
RJ45_GND
ACTIVITY_LED#
JP2
112 334 556 778 9910
11
11
13
13 151516
17
17
19
19
ACES_87216-2012
RJ45_RX+
2
RJ45_RX-
4 6 8
RJ45_GND
10 12
12
14
14
16 18
18 20
20
LINK10_100_LED#
Power / LED Board Conn.
SKU_ID28
KSO1728
ON/OFFBTN#30,32
PWR_LED0#31
PWR_SUSP_LED0#31
KSI228 KSI328
KSI028 KSI128
C C
B B
TP_DATA28
TP_CLK28
A A
SKU_ID KSO17 ON/OFFBTN# PWR_LED0# PWR_SUSP_LED0# IEBTN# FUNC_BTN# EC_REVBTN# EC_FRDBTN# EC_PLAYBTN# EC_STOPBTN#
IEBTN#
FUNC_BTN#
T/P Co nn ector
TP_DATA TP_CLK
TP_DATA TP_CLK PWR_LED0# PWR_SUSP_LED0# KSO17 FUNC_BTN# IEBTN# ON/OFFBTN#
JP4
1
1
13
2
2
14
3
3
15
4
4
16
5
5
17
6
6
18
7
7
19
8
8
20
9
9
21
10
10
22
11
11
23
12
12
24
ACES_85203-1202
2
1
D6 DAN202U_SC70
1
D7 DAN202U_SC70
JP12
8 6 4 2
ACES_87153-0801-01
3
2 3
7 5 3 1
C243 220P_0402_50V7K@
1 2
C242 220P_0402_50V7K@
1 2
C42 220P_0402_50V7K@
1 2
C43 220P_0402_50V7K@
1 2
C40 220P_0402_50V7K@
1 2
C45 220P_0402_50V7K@
1 2
C44 220P_0402_50V7K@
1 2
C41 220P_0402_50V7K@
1 2
51ON#
51ON#
13 14 15 16
PWR_SUSP_LED0#
17 18 19 20 21
EC_PLAYBTN#
22
EC_STOPBTN#
23 24
TP_DATA TP_CLK
SKU_ID
KSO17
ON/OFFBTN#
PWR_LED0#
IEBTN#
FUNC_BTN# EC_REVBTN# EC_FRDBTN#
EC_IE_BTN# 28
EC_FUNC_BTN# 28 51ON# 30,34
+5VS
C39 220P_0402_50V7K@
1 2
C192
0.1U_0402_16V4Z
4
RJ45_RX- 24
LINK10_100_LED# 24ACTIVITY_LED#24
2
1
C193
RTCVREF
+3VALW
3
USB Board Conn.
+5VALW
JP14
2
112
4
334
6
556
8
778
10
9910
11
11
13
13 151516
17
17
19
19
ACES_87216-2012
12
12
14
14
16 18
18
20
20
+5VS
+5VALW
SYSON# NBA_PLUG VOL_AMP
2
C227 1U_0603_10V4Z
1
SYSON#33
R221
NBA_PLUG22,23 VOL_AMP23
12 12
R2220_0603_5%
2
C223 10U_0805_10V4Z
1
0_0603_5%@
2
2
3
WCM2012F2S-900T04_0805
WCM2012F2S-900T04_0805
3
2
WCM2012F2S-900T04_0805
3
2
LID LID_SW#
2
3
1 2
R510 0_0402_1%@
1 2
R509 0_0402_1%@
3
2
1 2
R508 0_0402_1%@
1 2
R511 0_0402_1%@
3
2
1 2
R506 0_0402_1%@
1 2
R507 0_0402_1%@
D30 RB751V_SOD323
NEC_USBP0- 41 NEC_USBP0+ 41
L19
1
4
4
1
L20
NEC_USBP1+ 41 NEC_USBP1- 41
4
1
L21
NEC_USBP2+ 41 NEC_USBP2- 41
1 2
0_0402_5%@
1
4
4
1
4
1
21
R225
1 2
LID_SW# 28
S4_LID_SW# 32
USBP0- 18
USBP0+ 18
USBP1- 18
USBP1+ 18
USBP2- 18
USBP2+ 18
1
R229100K_0402_5%
+3VALW
INT_KBD CONN.
KSI[0 ..7 ] KSO[0..15]
KSO7
C181 100P_0402_25V8K
220P_0402_50V7K@
KSO6
C611 100P_0402_25V8K
KSO5
C178 100P_0402_25V8K
KSO4
C174 100P_0402_25V8K
KSO3
C630 100P_0402_25V8K
KSI4
C180 100P_0402_25V8K
KSO2
C609 100P_0402_25V8K
KSO1
C176 100P_0402_25V8K
KSO0
C608 100P_0402_25V8K
KSI5
C179 100P_0402_25V8K
KSI6
C624 100P_0402_25V8K
KSI7
C182 100P_0402_25V8K
KSO8
C617 100P_0402_25V8K
KSO15 KSO14 KSO13 KSO12 KSI0 KSO11 KSO10 KSI1 KSI2 KSO9 KSI3 PADS_LED# KSO4 NUM_LED# CAPS_LED#
KSI[0..7 ] 28 KSO[0..15] 28
C619 100P_0402_25V8K C185 100P_0402_25V8K C618 100P_0402_25V8K C632 100P_0402_25V8K C177 100P_0402_25V8K C184 100P_0402_25V8K C629 100P_0402_25V8K C607 100P_0402_25V8K C175 100P_0402_25V8K C183 100P_0402_25V8K C610 100P_0402_25V8K C186 100P_0402_25V8K C172 100P_0402_25V8K C187 100P_0402_25V8K
+3VS
R154 300_0402_5%
+3VS
R148 300_0402_5%
PADS_LED#28
12
KSO14 KSO11 KSO9 KSI7 KSO7 KSI4 KSI5 KSO5 KSI0 KSO1 KSI2
12
JP11
37 38 33 31 29 27 25 23 21 19 17 15 13 11
9
7
5
3
1 35
ACES_88172-3400
34 32
KSO15
30
KSO10
28
KSO8
26
KSO13
24
KSO3
22
KSO12
20
KSI6
18
KSO6
16
KSI3
14
KSO0
12
KSI1
10
KSO2
8 6 4 2 36
NUM_LED# 28
CAPS_LED# 28
1 2
+3VS
R457300_0402_5%
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/01 2006/03/01
Deciphered Date
Title
Switchs & LED
Size Docu ment Number Re v
Sakhir 10E<HBT10> 1.0
Custom
Date: Sheet
星期三 五月
2
04, 2005
1
of
29 44,
5
4
3
2
1
Kill SWITCH
+3VALW
2
3
D35
D D
SW2 1BS003-1211L_3PKW@
DAN217_SOT23@
1
3
11223
FAN CONN.
+12VALW
C122
0.1U_0402_16V4Z
1 2
C C
EN_DFAN128
EN_DFAN1
R96
10K_0402_5%
12
3
+IN
2
-IN
1 2
R97
8
P
OUT G
4
U7A
1
LM358A_SO8
8.2K_0402_5%
EN_FAN1
1 2
R95 100_0402_5%
+3VS
FAN_SPEED128
+3VALW
R362 100K_0402_5%
1 2
KILL_SW#
2
2
1
1 2
R90 10K_0402_5%
B
C546
0.1U_0402_16V4Z
1
3
+5VALW
1
C
FMMT619_SOT23 Q44
E
3
FAN1
2
KILL_SW# 25,28
D13 1N4148_SOT23
1
C538
2
1000P_0402_50V7K
1
C111
1000P_0402_50V7K
2
D44
CH355_SC76
2 1
1
C556 10U_0805_10V4Z
2
JP8
1 2 3
ACES_85205-0300
For EMI solution
+3VS +3VS +3VS +3VS
1
C312
100P_0402_25V8K@
2
Close to CLK_PCI_CB Close to CLK_PCI_LAN Close to CLK_PCI_LPC Close to CLK_PCI6
+3VS
1
C166
100P_0402_25V8K@
2
Close to CLK_PCI_MINI1
LPC Debug Port
+5VS +3VS
JP21
1
1
2
2
3
3
4
4
5
5
CLK_SIO_14M_
6
6
LPC_AD0
7
7
LPC_AD1
8
8
LPC_AD2
9
9
LPC_AD3
10
10
LPC_FRAME#
11
11
LPC_DRQ1#
12
12
PCIRST#
13
13
1 2
14
14
R518 0_0402_5%@
15
15
SERIRQ
16
16
17
17
18
18
19
19
20
20
ACES_85201-2005@
1
2
+CPU_CORE
1
C17
0.1U_0402_10V6K
2
+1.05VS
1 2
R505
LPC_AD0 17,28 LPC_AD1 17,28 LPC_AD2 17,28 LPC_AD3 17,28 LPC_FRAME# 17,28
LPC_DRQ1# 17
PCIRST# 17,24,25,26,28,32,41
C604
100P_0402_25V8K@
0.1U_0402_10V6K
0_0402_5%@
CLK_PCI_SIO_33M
SERIRQ 17, 26,28
+CPU_CORE
1
C26
2
+1.05VS
1 2
R519 0_0402_5% @
1
2
0.1U_0402_10V6K
@
CLK_14M 16
C168
100P_0402_25V8K@
C38
CLK_PCI6
R520
22_0402_5%
C676
+CPU_CORE
1
2
+1.05VS
1 2
1
2
@
CLK_PCI6 17
10P_0402_50V8J
1
C663
2
0.1U_0402_10V6K
100P_0402_25V8K@
+CPU_CORE
C22
+1.05VS
1
2
EC_ON
R554
10K_0402_5%
Power Button
SW1 SMT1-05_4P@
5
6
13
D
S
3 4
2N7002_SOT23 Q47
2N7002_SOT23
1 2
2
G
1 2
5
C62
C670
+2.5V
1
2
+1.05VS
+3V
1
2
+2.5VS
1000P_0402_50V7K@
1000P_0402_50V7K@
2
+3VALW
1
R53
100K_0402_5%
1 2
D8
3
1
2
CHN202U_SC70
+3VALW
R49
@
4.7K_0402_5%
1 2
R52
1 2
2
33K_0603_1%
Q11
@
DTC124EK_SC59
13
D
Q9
@
S
@
2
G
51ON#
13
4
ON/OFF 28 51ON# 29,34
1000P_0402_50V7K
C55
D5
12
MMGZ5248B_LL34
2 1
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C245
100P_0402_25V8K@
2
100P_0402_25V8K @
1000P_0402_50V7K@
2005/03/01 2006/03/01
3
1
C671
C606
2
+3VS
1
2
+2.5VS
1000P_0402_50V7K@
1000P_0402_50V7K@
Compal S e cr e t Data
Deciphered Date
C18
C623
+3VS
1
1000P_0402_50V7K@
2
+1.05VS
+2.5VALW
1
1000P_0402_50V7K@
2
+2.5V
Custom
Date: Sheet
+3VS
1
C282
2
+3VALW
+3VALW
1
C677
2
+2.5VALW
Title
Switchs & Connectors
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
星期三 五月
+3VS
1
C334
+3VALW
+3VALW
C339
+5VS
1
100P_0402_25V8K @
2
1
100P_0402_25V8K @
2
1000P_0402_50V7K@
1000P_0402_50V7K@
005
+2.5VALW+3VALW+3VS
1
C667
2
+3VALW
1
C673
2
of
30 44, 04, 2
B B
ON/OFFBTN#29,32
A A
EC_ON28
SMBus EEPROM
+5VALW
1 2
EC_SMB_CK128,35 EC_SMB_DA128,35
AT24C16AN-10SI-2.7_SO8
C201
0.1U_0402_16V4Z
8
VCC
7
WP
6
SCL
5
SDA
GND
+5VALW
12
R170
U12
A0 A1 A2
100K_0402_5%
1 2 3 4
12
R168
100K_0402_5%
HDD LED
HT-191UYG-DT_GRN_0603
HDD_LED#28
+5VS +5VS
R357
300_0603_1%
1 2
21
D41
WL LED
WL_LED#28
R363
300_0603_1%
1 2
HT-110UD_1204 D42
1 2
150_0402_5%
BATT_CHGI_LED#28
R360
+3V
31
E
47K
1 2 21
SUSPEND LED
B
Amber
2
10K
C
DTA114YKA_SOT23
Q34
1 2
R354 150_0402_5%
HT-191UD_AMBER_0603 D38
PWR_ SUSP_ L ED 28
PWR_ SUSP_ L ED0#
Battery LED
+5VALW
BATTERY LOWBATTERY CHG
21
21
HT-191UYG-DT_GRN_0603
D39
R355
300_0603_1%
Title
BIOS & EXT. I/O PORT
Size Docu ment N u m ber Re v
Sakhir 1 0 E <HBT10> 1.0
Custom
星期三 五月
Date: Sheet
1 2
HT-191UD_AMBER_0603 D40
R356 300_0603_1%
1 2
005
PWR_SUSP_ LED 0# 29
BATT_LOW_LED# 28
of
31 44, 04, 2
System BIOS
+3VALW
C680
0.1U_0402_16V4Z
TC7SH32FU_SSOP5~D
C679
0.1U_0402_16V4Z@
KBA[0..19]28
ADB[0..7]28
KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1 KBA0 ADB0 ADB1 ADB2
KBA[0..19] ADB[0..7]
U33
1
NC
2
A16
3
A15
4
A12
5
A7
6
A6
7
A5
8
A4
9
A3
10
A2
11
A1
12
A0
13
DQ0
14
DQ1
15
DQ2
16
VSS
29F040/SST39VF040_PLCC
VCC WE*
DQ7 DQ6 DQ5 DQ4 DQ3
32 31 30
A17
29
A14
28
A13
27
A8
26
A9
25
A11
24
OE*
23
A10
22
CE*
21 20 19 18 17
FWE#
4
+3VALW
KBA11 KBA9 KBA8 KBA13 KBA14 KBA17 FWE#
KBA18 KBA16 KBA15 KBA12 KBA7
KBA5
C678
0.1U_0402_16V4Z
+3VALW
FWE# KBA17 KBA14 KBA13 KBA8 KBA9 KBA11 FRD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3
12
U35
O
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16
FRD# 28 FSEL# 28
5
P
INB INA
G
3
U34
A11 A9 A8 A13 A14 A17 WE# VCC A18 A16 A15 A12 A7 A6 A5 A4
+3VALW
12
R521 100K_0402_5%
2
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
G
1 3
D
Q45 2N7002_SOT23
FRD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3
ADB2 ADB1 ADB0 KBA0 KBA1KBA6 KBA2 KBA3KBA4
S
FWR# 28
1 2
OE#
A10 CE# DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0
A0 A1 A2 A3
SST39VF040_TSOP @
1MB Flash ROM
KBA0
21
KBA1
20
KBA2
19
KBA3
18
KBA4
17
KBA5
16
KBA6
15
KBA7
14
KBA8 KBA9 KBA10
36
KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17
40
KBA18
13
KBA19
37
FSEL#
22
FRD#
24
FWE#
8 7
6 5 4 3 2 1
9
U20
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
CE# OE# WE#
SST39VF080-70_TSOP40@
SUSP# 22,28,33,38
EC_FLASH# 18
VCC0 VCC1
RP#
READY/BUSY#
NC0 NC1
GND0 GND1
Power LED
PWR_LED#28
+3VALW
PWR_LED0#29
31 30
ADB0
25
D0
ADB1
26
D1
ADB2
27
D2
ADB3
28
D3
ADB4
32
D4
ADB5
33
D5
ADB6
34
D6
ADB7
35
D7
1 2
10
R253
11
NC
100K_0402_5%@
12 29 38
23 39
C249
0.1U_0402_16V4Z
@
+3VALW
1
2
PWR_LED0#
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O F THE CO MPETENT DIVISIO N OF R& D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE IN FORMATIO N IT CO NTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.
AC-IN LED
HT-191UYG-DT_GRN_0603
ACIN18,28,34
PWR_LED#
DTA114YKA_SOT23
HT-191UYG-DT_GRN_0603
2005/03/01 2006/03/01
+5VALW
D36
R359
300_0603_1%
2
G
+3V
47K
B
2
10K
C
Q33
12
R353150_0402_5%
R361
150_0402_5%
D37
Compal Secret Data
21
1 2
13
D
Q37
S
2N7002_SOT23
31
E
1 2 21
Deciphered Date
5
Port 80 Debug Card Connector
PCI_C/BE#017,24,25,26,41
PCI_AD617,24,25,26,41 PCI_AD417,24,25,26,41 PCI_AD217,24,25,26,41 PCI_AD017,24,25,26,41
D D
CLK_PCI_USB20
12
R533
10_0402_5%@
1
C692
18P_0402_50V8K@
C C
B B
H1
SCRE W 8.5X2.8
1
R560
@
0_0603_5%
1 2
H2
H_C315D197
1
R561
@
0_0603_5%
1 2
H12
SCRE W 8.5X2.8
1
H7
H_C315D157
2
H19
SCRE W 8.5X2.8
1
H10
SCRE W 8.5X2.8
1
H20
SCRE W 8.5X2.8
1
H24
H_S315D110
1
H15
H_C315D157
PCI_AD117,24,25,26,41 PCI_AD317,24,25,26,41 PCI_AD517,24,25,26,41 PCI_AD717,24,25,26,41
PCI_AD817,24,25,26,41 PCI_C/BE#117,24,25,26,41 PCI_C/BE#217,24,25,26,41 PCI_C/BE#317,24,25,26,41
CLK_PCI_USB2017,41
+5VS
PCIRST#17,24,25,26,28,30,41
PCI_FRAME#17,24,25,26,41
PCI_TRDY#17,24,25,26,41
PCI_AD917,24,25,26,41
H3
SCRE W 8.5X2.8
1
H14
SCRE W 8.5X2.8
1
H21
SCRE W 8.5X2.8
1
H23
H_C315D110BS315
1
H11
H_S315D157
R534 33_0402_5% R535 33_0402_5% R536 33_0402_5% R537 33_0402_5% R538 33_0402_5% R539 33_0402_5% R540 33_0402_5% R541 33_0402_5% R542 33_0402_5% R543 33_0402_5% R544 33_0402_5% R545 33_0402_5% R546 33_0402_5%
R547 33_0402_5% R548 33_0402_5%
R549 33_0402_5% R550 33_0402_5% R551 33_0402_5%
SCRE W 8.5X2.8
H8
SCRE W 8.5X2.8
H17
SCRE W 8.5X2.8
H22
H_S315D110
H16
H_C315D157
12 12 12 12 12 12 12 12 12 12 12 12 12
CLK_PCI_USB20
12 12
12 12 12
H5
1
1
1
1
4
**
H9
SCRE W 8.5X2.8
1
H4
SCRE W 8.5X2.8
1
H13
SCRE W 8.5X2.8
1
H6
H_C276D118BC315
1
H18
H_C315D118
3
1
12
R218
1
C273
2
D32
2 1
RB751V_SOD323
D29
1N4148_SOT23@
C277
RTCVREF
JP23
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
HEADER 20@
S4_LID_SW#29
S4_LATCH28
R242
10K_0402_5%@
100K_0402_5%
@
S4_LID_SW#
12
R212
<>
RTCVREF
+3VALW
S4_DATA28
RTCVREF RTCVREF RTCVREF
12
R213
100K_0402_5%
@
12
1 2
R236 10K_0402_5%@
2
G
RTCVREF
1 2
R237
10K_0402_5%@
<>
13
D
S
1U_0805_16V7K@
680K_0402_5%@
1 2
C246 1U_0603_10V6K@ Q19
2N7002_SOT23@
1 2
R248 10K_0402_5%@
@
MDC CONN.
JP22
1
MONO_OUT/PC_BEEP
3
GND
5
AUXA_RIGHT
7
AUXA_LEFT
9
CD_GND
11
R250 0_0402_5%
+3V
ICH_AC_SDOUT18,22
+3VS
ICH_AC_RST#18,22
1 2
Change to 0 ohm
1 2
L24 CHB1608B121_0603
+3VS_MDC
CD_RIGHT
13
CD_LEFT
15
GND
17
+3.3Vaux/BT_VCC
19
GND
21
+3.3Vmain
23
AC97_SDATA_OUT
25
AC97_RESET#
27
GND
29
AC97_MSTRCLK
ACES_88018-3010
AUDIO_PWRDN/DETECH
MONO_PHONE
RESERVED/BT_ON#
+5Vmain
RESERVED/USB+
RESERVED/USB-
RESERVED/PRIMARY_DN
RESERVED/+5VD/WAKEUP
RESERVED/GND
AC97_SYNC AC97_SDATA_IN1 AC97_SDATA_IN0
AC97_BITCLK
3
2
2
1U_0805_16V7K@
A
1 2
1 2 3 4 5 6 7
GND
GND
C241 0.1U_0402_16V4Z@
1 2
5
P
Y
G
3
U22
CD1# D1 CP1 SD1# Q1 Q1# GND
74LCX74MTC_TSSOP14@
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
2
U14
4
NC7SZ14M5X_SOT23-5@
CD2#
SD2#
D_SET_S4
1 2
R224 10K_0402_5%@
SYSON28,33
14
VCC
13 12
D2
11
CP2
10 09
Q2
08
Q2#
Change to 0 ohm
+5VS_MDC
1 2
L25 CHB1608B121_0603
1 2
R263 10K_0402_5%
1 2
R264
2
G
RTCVREF
1
C294
0.1U_0402_10V6K@
2
1
C278 1U_0805_25V4Z
2
0_0402_5%
1 2
R252 22_0402_5%
1 2
R261 22_0402_5%
1
ON/OFFBTN# 29,30
1
C252
0.1U_0402_16V4Z@
2
13
D
Q23
2
2N7002_SOT23@
G
S
13
D
Q20
2N7002_SOT23@
S
13
D
2
G
S
2N7002_SOT23@
+3VS_MDC
1
C283 1U_0805_25V4Z
2
+5VS
+3VS
ICH_AC_SYNC 18,20,22
ICH_AC_SDIN1 18 ICH_AC_BITCLK 18,22
Q26
1
C270
0.1U_0402_16V4Z
@
2
+5VS_MDC+3V
1
2
C300 1U_0805_25V4Z
A A
M2
SCRE W 8.5X2.8
1
<BOM S t ructure>
1
1
M4
SCRE W 8.5X2.8
5
1
1
M3
SCRE W 8.5X2.8
1
1
M1
SCRE W 8.5X2.8
1
1
Security Classification
Issued Date
THIS S HE ET O F E NG I NE ERI NG DRA WI N G IS T HE PR OP RI ET A RY PROPERTY OF CO MPAL ELECTRO NICS, I NC. AND CONTAI NS CONFIDENTIAL AND TRAD E SEC RET INF ORM ATI O N. T HIS SHE ET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPA L ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
Title
HIBERNATION & MDC
Size Document Number R ev
Sakhir 10E<HBT10> 1.0
Custom
星期三 五月
2
Date: Sheet
2005
1
of
32 44, 04,
A
B
C
D
E
+1.5VS
R249 470_0805_5%
1 2 13
D
SUSP
1 1
2 2
2
G
Q27
S
2N7002_SOT23
SYSON#29 SUSP39
SYSON28,32 SUSP#22,28,31,38
SYSON#
SYSON
10K_0402_5%
R352
1 2
1 2 13
D
S
2
G
R50 470_0805_5%
2
G
Q10 2N7002_SOT23
+5VALW
R351 10K_0402_5%
1 2 13
D
S
Q38 2N7002_SOT23
1 2 13
D
S
R215 470_0805_5%
2
G
Q17 2N7002_SOT23
R349
10K_0402_5%
SUSP
R267 470_0805_5%
1 2 13
D
2
G
Q28
S
2N7002_SOT23
+5VALW
R348 10K_0402_5%
1 2 13
D
Q36
2
2N7002_SOT23
G
S
1 2
+5VS+3VS
R311 470_0805_5%
1 2 13
D
2
G
Q31
S
2N7002_SOT23
+3VALW +1.8VS
R100
1.2K_0402_1%
1K_0402_1%
1 2
R98
1 2
SUSPSUSP SYSON#
5 6
2
C119
0.1U_0402_16V4Z
1
2
C553
0.1U_0402_16V4Z
1
+IN
-IN
D
S
OUT
U7B LM358A_SO8
+2.5V+1.8VS +2.5VS
1 2 13
7
R48 470_0805_5%
SYSON#SUSP SUSP
2
G
Q8 2N7002_SOT23
12
25.5K_0402_1%
R106
VS_OK
R105
10K_0402_1%
1 2
+3V
1 2 13
D
S
VS_OK 38
R227 470_0805_5%
2
G
Q24 2N7002_SOT23
VS_OK#39
VS_OK
VS_OK#
2
G
+5VALW
1 2
13
R369 10K_0402_5%
D
S
Q41 2N7002_SOT23
+3VALW TO +3V+2.5VALW TO +2.5V
+2.5V+2.5VALW
U10
S
D
S
D
S
D
G
D
SI4800DY_SO8
U17
8
D
7
D
6
D
5
D
1
SI4800DY_SO8
C255
2
4.7U_0805_10V4Z
1 2 3 4
2
1
S S S G
1
C188 1U_0603_10V4Z
2
<BOM S t ructure>
**
C189
0.1U_0402_16V7K
+2.5V TO +2.5VS
+2.5VS+2.5VALW
1 2 3 4
**
2
C253
0.1U_0402_16V7K
1
1
C237 1U_0603_10V4Z
2
1
C191
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C190
4.7U_0805_10V4Z
2
13
D
S
1
C247
2
R157
100K_0402_1%
1 2
2
G
Q14 2N7002_SOT23
1
C251
4.7U_0805_10V4Z
2
R233
1 2
91K_0402_1%
13
D
Q25
S
2N7002_SOT23
SYSON#
+12VALW
+3VALW
U16
8
D
7
D
6
D
5
D
SI4800DY_SO8
1
10U_0805_10V4Z
C261
2
1
C248 10U_0805_10V4Z
2
1
S
2
S
3
S
4
G
2
**
C240
0.1U_0402_16V7K
1
+3V
D
S
+3VALW TO +3VS
**
2
C306
0.1U_0402_16V7K
1
1
C301 10U_0805_10V4Z
2
D
S
+3VALW
U24
S
D
S
D
S
D
G
D
SI4800DY_SO8
C322 10U_0805_10V4Z
1 2 3 4
8 7 6
+12VALW
SUSP SUSP
2
G
5
1
2
1
C238 1U_0603_10V4Z
2
R201
95.3K_0603_1%
1 2
13
2
G
Q18 2N7002_SOT23
+3VS
1
2
R280
1 2
91K_0402_1%
13
2
G
Q29 2N7002_SOT23
SYSON#
C308 1U_0603_10V4Z
+12VALW
+12VALW
+5VALW
1
2
+5VALW TO +5VS
U29
8 7 6 5
1
S
D
2
S
D
3
S
D
4
G
D
SI4800DY_SO8
C338
4.7U_0805_10V4Z
1
2
**
2
C332
0.1U_0402_16V7K
1
C335
4.7U_0805_10V4Z
D
S
+5VS
1
C348 1U_0603_10V4Z
2
R304 84.5K_0402_1%
1 2
13
SUSP
2
G
Q30 2N7002_SOT23
+12VALW
8 7 6 5
1
C200
2
4.7U_0805_10V4Z
3 3
4 4
Security Classification
Issued Date
THIS S HE ET O F ENG I NEERI NG DRAWING IS THE PROP RIETARY PROPERTY O F COMPAL EL ECTRONICS, INC. AND CO NTAINS CONFI DENTIAL AND TR ADE SECRET INFORM ATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
C
Compal S e cr e t Data
Deciphered Date
Title
POWE R C O NTROL CKT
Size D ocu m ent N um b er R e v
Sakhir 1 0 E<HBT10> 1 .0
Custom
星期三 五月
D
Date: Sheet
005
E
of
33 44, 04, 2
A
PF1
PJP1
1
1
2
2
3
1 1
2 2
+CHGRTC
3 3
+3VALWP +3VALW
+5VALWP +5VALW
+12VALWP +12VALW
+2.5VALWP +2.5VALW
4 4
3
4
4
JST_S4B-EH
112
112
112
112
112
112
PD1
1N4148_SOD80
PR10
1 2
200_0603_5%
100K_0402_5%
1 2
22K_0402_5%
RTCVREF
3.3V
12
A
BATT+
CHGRTCP
51ON#29,30
PR16
1 2
510_0603_5%
(5A,200mils ,Via NO.= 10)
(5A,200mils ,Via NO.= 10)
(120mA,40mils ,Via NO.= 2)
(8A,320mils ,Via NO.= 16)
(3.5A,140mils ,Via NO.= 7)
1 2
510_0603_5%
PJ1
2
JUMP_43X118
@
PJ3
2
JUMP_43X118
@
PJ5
2
JUMP_43X39
@
PJ7
2
JUMP_43X118
PJ8
@
2
JUMP_43X118
@
PJ9
2
JUMP_43X118
@
PR17
21
7A_24VDC_429007
12
1538VCC
12
PR11
PR13
S-812C33AUA-C2N-T2_SOT89
3
OUT
PC10 10U_0805_10V4Z
+1.05VS+VCCPP
12
1000P_0402_50V7K
12
PC7
0.22U_1206_25V7M
PU2
IN
GND
1
PC1
2
+1.8VSP +1.8VS
FBM-L18-453215-900LMA90T_1812
1 2
PL1
PC2
VIN
1 2 12
12
PJ2
2
JUMP_43X79
@
PJ4
2
JUMP_43X118
@
2
1000P_0402_50V7K
PD2
1N4148_SOD80
PR8 33_1206_5%
PC8
0.1U_0603_25V7K
112
112
PJ6
112
JUMP_43X118
@
12
100P_0402_50V8J
TP0610T_SOT23
13
PQ1
2
12
PC9 1U_0805_25V4Z
(1A,40mils ,Via NO.= 2)
(3.5A,140mils ,Via NO.= 7)
(2A,80mils ,Via NO.= 4)
B
VIN
12
PC3
VS
+1.5VS+1.5VSP
+1.25VS+DDRVTTP
PC4
12
100P_0402_50V8J
MAINPWON4,35,37
ACON36
VIN
12
PR3
84.5K_0402_1%
12
PR6 20K_0402_1%
PC5
1000P_0402_50V7K
12
VIN
PR19
VL
1 2
100K_0402_5%
PD5
2 3
RB715F_SOT323
PC12
1000P_0402_50V7K
1
Precharge detector
PR5
1 2
22K_0402_1%
PD4
12
1N4148_SOD80
PU1B
7
O
12
LM393M_SO8
1000P_0402_50V7K
12
15.97V/14.84V/ for adapter
PC6
8
4
PC13
0.1U_0402_16V7K
5
P
+
6
-
G
C
PR1
1 2
1M_0402_1%
VS
8
3
+
2
-
4
PR9
10K_0402_5%
PR12
1 2
1K_1206_5%
PR14
1 2
1K_1206_5%
PR15
1 2
1K_1206_5%
PR20
1 2
2.2M_0402_5%
1 2
34K_0402_1%
12
12
PR24
66.5K_0402_1%
PU1A
P
1
O
G
LM393M_SO8
12
RTCVREF
3.3V
PR22
2N7002_SOT23
PD3
RLZ4.3B_LL34
VL
12
PR23
13
D
PQ2
S
PQ3
DTC115EUA_SC70
VS
12
12
237K_0402_1%
2
G
13
PR2
5.6K_0402_5%
12
PR18 499K_0402_1%
12
PR21 499K_0402_1%
PR25
1 2
47K_0402_5%
2
1 2
1K_0402_5%
12
PR7 10K_0402_5%
BL+
PR4
PACIN
PACIN
D
ACIN 18,28,31
PACIN 36,37
Vin Detector
High 18.384 17.901 17.430 Low 17.728 17.257 16.976
12
PC11 1000P_0402_50V7K
+5VALWP
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2005/03/10 2006/03/10
Compal Secret Data
Deciphered Date
C
Compal El e ct r o nics, Inc.
Title
Size Do cu m ent N umber R e v
B
Dat e : Sheet
DCIN & DETECTOR
Sakhir 10E<HBT10>
, 04, 20
星期三 五月
05
1.0
of
D
34 44
A
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 84 degree C Recovery at 45 degree C
1 1
PJP2
BATT+
ID B/I TS
SMD SMC GND
GND8GND
TYCO_1775828-1_7P_RV
9
BATT_A_S1
1
ALI/NIMH#
2
AB/I
3
TS_A
4
EC_SMDA
5
EC_SMCA
6 7
PR32
100_0402_5%
100_0402_5%
1 2
1 2
1K_0402_5%
PR33
PR27
1 2
1K_0402_5%
PR30
12
PF2 12A_65VDC_451012
21
1 2
PR28 47K_0402_5%
PR34
+3VALWP
12
12
PR37
1K_0402_5%
2 2
PD21
BAS40-04_SOT23 @
1
2
3
1
2
3
6.49K_0402_1%
PD20
BAS40-04_SOT23 @
+3VALWP
VMB
FBM-L18-453215-900LMA90T_1812
1 2
PL2
12
PC15 1000P_0402_50V7K
ALI/MH# 28,36
BATT_TEMPA 28
EC_SMB_DA1 28,31 EC_SMB_CK1 28,31
12
PC16
0.01U_0402_25V7Z
BATT+
PH2 near main Battery CONN :
BAT. thermal protection at 79 degree C
VL VS
12
PC17
12
PH1
100K_0603_1%_TH11-4H104FT
12
PR35
0.22U_ 0805_16V7K_V2
PC14
0.1U_0603_25V7K
PR31
1 2
13.7K_0402_1%
12
22K_0402_1%
TM_REF1
12
PC18
12
PR38
1000P_0402_50V7K
100K_0402_1%
1 2
8
47K_0402_1% PU3A
3
P
+
2
-
G
LM393M_SO8
4
PR36
100K_0402_1%
O
12
PR29
VL
PR26 47K_0402_1%
1 2
1
VL
PD6
1SS355_SOD323
2
12
13
PQ4 DTC115EUA_SC70
MAINPWON 4,34,37
Recovery at 45 degree C
+5VALW
12
PH2
12
12
PR42 22K_0402_1%
PR41
100K_0603_1%_TH11-4H104FT
1 2
10.7K_0402_1%
TM_REF1
1 2
47K_0402_1%
5
+
6
-
3 3
PC19
0.22U_0805_16V7K_V2
PR40
8
PU3B
P
O
G
LM393M_SO8
4
7
VLVL
PR39 47K_0402_1%
1 2
PD7
1SS355_SOD323
12
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2005/03/10 2006/03/10
Compal Secret Data
Deciphered Date
C
Compal El e ct r o nics, Inc.
Title
Size Do cu m ent N umber R e v
B
Dat e : Sheet
BATTE RY CONN / OTP
Sakhir 10E<HBT10>
, 04, 20
星期三 五月
05
1.0
of
D
35 44
A
B
C
D
P2
PQ6 AO4407_SO8
VIN
1 1
12
PR46
47K_0402_5%
2
13
D
PQ12
2
G
S
2N7002_SOT23
2 2
PACIN34,37
ACON34
8 7
5
47K
2
47K
13
PQ10
DTC115EUA_SC70
ACOFF#
1SS355_SOD323
PACIN
1 3
DTA144EUA_SC70
1 2
4
PQ8
100K_0402_1%
PD9
1 2
PR56
3K_0402_1%
1 2 36
12
PC23
0.1U_0603_25V7K
PR52
2
G
1 2 3 6
12
PR44
200K_0402_1%
12
PC26
13
D
IREF28
PQ13
S
2N7002_SOT23
PQ7 AO4407_SO8
4
12
0.1U_0402_16V7K
8 7
5
ADP_I28
12
PR50
10K_0402_1%
143K_0402_1%
1 2
PR55
33K_0402_1%
12
PR49
12
PC29
0.1U_0402_16V7K
PR60
IREF=1.31*Icharge IREF=0.6V~3.21V
+3VALWP
12
PR63 47K_0402_5%
3 3
FSTCHG28
2
13
PQ15 DTC115EUA_SC70
13
2
CS
PQ14 DTC115EUA_SC70
DTC115EUA_SC70
13
PQ34
P3
33.2K_0402_1%
12
2
Iadp=0~4.7A
0.02_2512_1%
100K_0402_5%
PC27
1 2
4700P_0402_25V7K
PC30
1 2
1000P_0402_50V7K
12
10K_0402_5%
PC33
0.1U_0402_16V7K
ALI/MH# 28,35
VMB
PR43
PR48
12
PR51
1 2
10K_0402_5%
PR53
1 2
1K_0402_5%
PR58
12
12
BL+
SE_CHG-
PU4
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
MB3887_SSOP24
95.3K_0603_0.1%
95.3K_0603_0.1%
+INC2
VCC(o)
+INC1
PR61
PR138
GND
CS
OUT
VH
VCC
RT
-INE3
FB3
CTL
2
24
23
22
21
20
19
0.1U_0603_25V7K
18
17
16
15
14
13
12
12
PJ10
112
JUMP_43X118
@
SE_CHG+
CS
PC28
1 2
PR54
1 2
68K_0402_5%
PR59
1 2
47K_0402_5%
ACON
12
PC20
4.7U_1206_25V6K
PC24
0.022U_0402_16V7K
1 2
PC25
1 2
0.1U_0603_25V7K
PC31
1 2
0.1U_0603_25V7K
PC32
1 2
1500P_0402_50V7K
4.2V
PQ5 AO4407_SO8
1
PR57
2 3 6
PR47
10K_0402_5%
1 2 13
PQ11
DTC115EUA_SC70
PC34
36
241
578
1 2
12
PD11 EC31QS04
B++
PQ9 AO4407_SO8
LXCHRG
PL3
ACOFF#
1 2
0.02_2512_1%
PD10
EC31QS04
12
PC22
4.7U_1206_25V6K
DH_CHG
16UH_D104C-919AS-160M_3.7A_20%
12
PR62
12
143K_0603_0.1%
12
PC21
4.7U_1206_25V6K
4
PR45
1 2
47K_0402_5%
2
1 2
PD8
12
4.7U_1206_25V6K
8 7
5
1SS355_SOD323
12
PC35
PC36
4.7U_1206_25V6K
VIN
ACOFF 28
BATT+
12
4.7U_1206_25V6K
4 Cell
CC=0.5~1.5A CV=16.8V(4 CELLS LI-ION)
12
PR64 340K_0402_1%
OVP voltage : LI
4S1P : 18V--> BATT_OVP= 2.0V 4S2P : 18V--> BATT_OVP= 2.0V
(BAT_OVP=0.1111 *VMB)
BATT_AOVP28
4 4
A
12
PR66
2.2K_0402_5%
1
+12VALWP
8
0
4
PU5A LM358A_SO8
3
P
+
2
-
G
105K_0402_1%
PR67
12
PR65 499K_0402_1%
12
PJ14
2
JUMP_43X118
PU5B
LM358A_SO8
7
12
PC37
0.01U_0402_25V7Z
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
5
+
0
6
-
2005/03/10 2006/03/10
Compal Secret Data
@
Deciphered Date
SCREW 8.5X2.8@
112
C
HL2
1
B+ BL+
HL1
SCR E W 8. 5X2.8@
PJ15
1
2
112
JUMP_43X118
@
8 Cell
CC=0.5~3.0A CV=16.8V(8 CELLS LI-ION)
Compal El e ct r o nics, Inc.
Title
Size Do cu m ent N umber R e v
B
星期三 五月
Dat e : Sheet
CHARGER
Sakhir 10E<HBT10>
, 04, 20
05
1.0
of
D
36 44
5
4
3
2
1
N4
D D
C C
B B
PJ11
2
B+
JUMP_43X118
@
B+++
112
12
12
PC42
PC41
4.7U_1206_25V6K
+3VALWP
PC53
220U_6.3VM_R15
4.7U_1206_25V6K
12
12
PL4
1
+
2
PC49
10UH_D104C-919AS-100M_4.5A_20%
PR73
PD15
2 1
SKUL30-02AT_SMA
PC58
100P_0402_50V8J@
47P_0402_50V8J
1 2
1M_0402_1%
PR78
12
D8D7D6D
S1S2S3G
D8D7D6D
S1S2S3G
1.87K_0402_1%
3.74K_0402_1%
0_0402_5%
PC54
1 2
3.32K_0402_1%
PR81 10K_0402_1%
1 2
5
PQ16 SI4800DY-T1_SO8
4
5
PQ18 SI4810DY_SO8
4
PR70
12
PR71
PR74
12
12
100P_0402_50V8J
PC40
1 2
0.1U_0603_25V7K
DH_3.3V
DL_3.3V
12
PC51
1 2
PACIN34,36
1 2
VS
47K_0402_5%
0.047U_0603_25V7M@
LX_3.3V
0.47U_0603_16V7K
PR75
1.24K_0402_1%
1 2
PR76
10K_0402_5%
PR79
PC60
BST_3.3V
12
CSH_3.3V CSL_3.3V
12
1SS355_SOD323
12
PC47
0.1U_0603_25V7K
PU6
25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
3
FB3
10
SKIP#
23
SHDN#
7
TIME/ON5
28
RUN/ON3
12
PC56 1000P_0402_50V7K
220K_0402_5%
12
PC62
0.47U_0603_16V7K
PD14
PR83
VS
1 2
22
V+
12
2
3
1
VL
12
21
12OUT
VL
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#
GND
8
MAX1902EAI_SSOP28
VL
MAINPWON 4,34,35
PD13 DAP202U_SOT323
PC46
4.7U_0 8 05_6.3V6K
4 5 18 16 17 19 20 14 13 12 15 9 6 11
BST_5V
+12VALWP
12
PC48
4.7U_1206_25V6K
12
4.7U_0805_6.3V6K
POK 38
PC55
2.5VREF
PC43
1 2
0.1U_0603_25V7K
DH_5V
LX_5V
10.2K_0402_1%
10K_0402_1%
PC44
4.7U_1206_25V6K
12
PC52
0.47U_0603_16V7K
PR80
PR82
PR77
12
12
12
DL_5V
12
1.82K_0402_1%
B+++
12
PC45
4.7U_1206_25V6K
SI4810DY_SO8
12
PC57 100P_0402_50V8J
12
PC61
100P_0402_50V8J@
PC39 470P_0805_100V7K
1 2
PQ17
PQ19
CSL_5V
22_1206_5%
5
4
5
4
PR68
D8D7D6D
S1S2S3G
D8D7D6D
S1S2S3G
12
SI4800DY-T1_SO8
CSH_5V
FLYBACKSNB
10uH_SDT-1205P-100-118_5A_20%
12
12
PC50
47P_0402_50V8J
12
PR72
2M_0402_1%
220U_6.3VM_R15
PC38
1 2
12
PD12
4.7U_1206_25V6K EC11FS2_SOD106
PT1
1 4
3 2
PR69
1.27K_0402_1%
1
+
PC59
2
PD16
SKUL30-02AT_SMA
2 1
+5VALWP
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/10 2006/03/10
3
Compal Secret Data
Deciphered Date
Compal El e ct r o nics, Inc.
Title
Size Do cu m ent N umber R e v
B
2
Dat e : Sheet
5V/3.3V/12V
Sakhir 10E<HBT10>
, 04, 20
星期三 五月
05
1
37 44
1.0
of
A
B
C
D
PL5
1 2
FBM-L18-453215-900LMA90T_1812
1 2
PL7
12
PR143
12
@
12
PC76
PR144 0_0402_5%
0_0402_5%
SOFT1
BOOT1
UGATE1 PHASE1
ISEN1 LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1
OCSET1
PR84
12
12
12
PC65
4.7U_1206_25V6K
5
D8D7D6D
PQ21
SI4800DY-T1_SO8
S1S2S3G
4
4.7UH_D104C-919AS-100M_5.2A_20%
5
D8D7D6D
PQ23 SI4810DY_SO8
S1S2S3G
4
VS_OK 33
SUSP# 22,28,31,33
+3VS
+5VALWP
12
PR85
14
VIN
2.2_0603_5%
1 2
28
SOFT2
VCC
BOOT2
UGATE2 PHASE2
ISEN2
LGATE2
PGND2
VOUT2 VSEN2
EN2
PG2/REF
GND
1
OCSET2
DDR
13
ISL6227CA-T_SSOP28
200K_0402_1%
PC68
PC70
17
12
0.01U_0402_25V7Z PR87
BST1.5VBST_2.5V
23
1 2
0_0603_5%
24
LX_1.5VLX_2.5V
25
PR90
22
1 2
2.4K_0402_1%
27
26
20 19 21 16
18
12
PR97
2.2U_0805_10V6K
PC72
0.1U_0402_16V7K
DH_1.5V
1 2
1 2
1 2
12
PC78
12
DL_1.5V
PR92 0_0402_5%@ PR96
PR140 0_0402_5%
0.1U_0402_16V7K@
0_0402_5%@
12
1 1
PC64
4.7U_1206_25V6K
4.7U_0805_6.3V6K
PC66
12
5
D8D7D6D
+2.5VALWP
+2.5VALWP
1.8UH_D104C-919AS-1R8N_9.5A_20%
1 2
12
PR141 0_0402_5%
PL6
1
+
2 2
PC73
220U_6.3VM_R15
2
PR88
18.2K_0402_1%
12
12
PC74
0.01U_ 0 402_25V7Z
PQ20
SI4800DY-T1_SO8
PQ22
SI4810DY_SO8
S1S2S3G
D8D7D6D
S1S2S3G
4
5
4
DH_2.5V
DL_2.5V
PC71
0.1U_0402_16V7K
12
PC63
4.7U_1206_25V6K
PD17
1
DAP202U_SOT323
2
3
0.01U_0402_25V7Z PR86
12
1 2
0_0603_5%
PR89
1 2
1.87K_0402_1%
0.1U_0603_25V7K
PC69
12
PC67
12
6
5 4
7 2
0_1206_5%
PU7
3
9
10
12
PR98 107K_0402_1%
8
15 11
PR93
12
PR95 10K_0402_1%
3 3
12
PR142
0_0402_5%
@
POK37
1 2
0_0402_5%
0.1U_0402_16V7K@
12
PC77
0.01U_ 0 402_25V7Z
B+
12
PR91
12
+1.5VSP
PC75
7.15K_0402_1% 220U_6.3VM_R15
PR94 10K_0402_1%
+1.5VSP
1
+
2
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2005/03/10 2006/03/10
Compal Secret Data
Deciphered Date
C
Compal El e ct r o nics, Inc.
Title
Size Do cu m ent N umber R e v
B
Dat e : Sheet
1.5VSP/2.5V AL WP
Sakhir 10E<HBT10>
, 04, 20
星期三 五月
05
1.0
of
D
38 44
5
+2.5V
2
PJP3
JUMP_43X118@
D D
10U_1206_6.3V7K
VS_OK#
C C
PR99 80.6K_0402_1%
1 2
1 2
PR101 0_0402_5%@
0.1U_0402_16V7K
N45SUSP
PC83
2
1
1
VIN1.05
12
PC79
13
D
PQ24
2
G
S
12
2N7002_SOT23
PR100
1.37K_0603_1%
12
VREF1.05
12
PR102
1K_0402_1%
12
PC82
0.1U_0402_16V7K
4
PU8
VIN1VCNTL
2
GND
3
VREF
4
VOUT
APL5331KAC-TR_SO8
12
PC84
10U_1206_6.3V7K
6 5
NC
7
NC
8
NC
9
TP
+VCCPP
1 2
PC80
1U_0603_10V6K
+3VALWP
+1.05V
3
+2.5V
1
PJ12
1
JUMP_43X118
@
2
2
1
2
12
PU10
VIN1VCNTL
2
GND
3
VREF
4
VOUT
APL5331KAC-TR_SO8
+DDRVTTP
PC91 10U_1206_6.3V7K
6 5
NC
7
NC
8
NC
9
TP
+1.25V
+3VALWP
12
PC86 1U_0603_6.3V6M
PU11
+3VS
B B
VIN1.8
PC88
4.7U_0 8 05_6.3V6K
1 2
100P_0402_50V8J
APL1085UC-TR_TO252
3
PC89
VIN
VOUT
ADJUST
1
1 2
2
12
N27
PR104 100_0402_1%
12
PR105
44.2_0402_1%
+1.8VSP
12
PC87 10U_1206_6.3V7K
12
12
13
D
2
G
S
2N7002_SOT23
1K_0402_1%
PC85
10U_1206_6.3V7K
PR139 80.6K_0402_1%
VS_OK#
1 2
VS_OK#33
SUSP33
SUSP
PR106 0_0402_5%@
0.1U_0402_16V7K
1 2
PC92
PQ25
PR103
PR107
12
12
1K_0402_1%
12
PC90
0.1U_0402_16V7K
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/10 2006/03/10
3
Compal Secret Data
Deciphered Date
Compal El e ct r o nics, Inc.
Title
Size Do cu m ent N umber R e v
Custom
2
Dat e : Sheet
VCCPP/1.8VSP/DDRVTTP
Sakhir 10E<HBT10>
, 04, 20
星期三 五月
05
1
of
39 44
1.0
9
,16,17
VR_ON28
PM_STPCPU#
PM_DPRSLPVR17
PR125
1 2
66.5K_0402_1%
FB
1 2
PR126 100K_0402_1%
PQ28
RHU002N06_SOT323
PSI#5
PR120
1 2
0_0402_5%
13
D
2
G
S
1 2
0_0402_5%
200K_0402_1%
PR128
PR130
CPU_VID05 CPU_VID15 CPU_VID25 CPU_VID35 CPU_VID45 CPU_VID55
VGATE20
PR123
1 2
1 2
10.7K_0402_1%
+5VS
PR134
100K_0402_1%
1U_0603_6.3V6M
VCC
PR115 0_0402_5%@
REF
PR118 0_0402_5%@
PR121 30.1K_0402_1%
PC103 270P_0402_50V7K
PC105 0.22U_0603_16V7K
12
PC107
2
100P_0402_50V8J
G
20K_0402_1%
1 2
1
C
PQ33
2
B
E
HMBT2222A_SOT23
3
PC97
PR113 0_0402_5%
1 2 1 2 1 2
1 2
1 2
13
D
S
PQ29
RHU002N06_SOT323
1 2
PR131
2
G
PR108
1 2
12
REF
1 2
PC108
27P_0402_50V8J
PR133
10K_0402_1%
1 2 13
D
PQ32 RHU002N06_SOT323
S
12
VCC
VCC
10_0402_5%
10 24 23 22 21 20 19 25
12
18 11
+5VS
PU12
VCC D0 D1 D2 D3 D4 D5 VROK
4
S0
5
S1
6
SHDN#
1
TIME CCV
2
TON
8
REF
9
ILIM
7
OFS
3
SUS SKIP GND
MAX1532AETL_TQFN40
12
PC114 10U_0805_6.3V6M
PC96
2.2U_0603_6.3V6K
VDD
V+
BSTM
DHM
LXM DLM
PGND
CMP CMN
OAIN+
OAIN-
FB
CCI
BSTS
DHS
LXS
DLS CSP CSN
GNDS
2
1
30 36
BSTM_CPU
26 28
LXM_CPU
27
DLM_CPU
29 31
CMP_CPU
37
CMN_CPU
38
OAIN+_CPU
17
OAIN-_CPU
16
FB
15 14
PC104 470P_0402_50V8J
BSTS_CPU
35
DHS_CPU
33
LXS_CPU
34
DLS_CPU
32
CSP_CPU
40
CSN_CPU
39 13
2 1
EP10QY03
PC98
3.3_0603_5%
1 2
PD18
12
PR109
0.01U_ 0 402_25V7Z
12
12
PC99
PR129
1 2
12
PC111
PR110
0.22U_0603_16V7K
0_0603_5%
3.3_0603_5%
0.22U_0603_16V7K
12
PD19
EP10QY03
AO4408_SO8
PR132
0_0603_5%
AO4410_SO8
12
PQ31
21
PQ30
12
CPU_B+ BL+
1 2
12
PC93
12
4.7U_1206_25V6K
PC94
4.7U_1206_25V6K
1
+
2
FBM-L18-453215-900LMA90T_1812
PC95
220U_25V_M
578
PQ26 AO4408_SO8
3 6
241
0.56UH_ETQP4LR56WFC_21A_20%
1 2
578
PQ27 AO4410_SO8
3 6
241
PR122 909_0402_1%
1 2
+5VS
PC115 10U_0805_6.3V6M
578
3 6
241
578
3 6
241
12
PR112
4.7_1206_5%
12
PC100 680P_0603_50V8J
12
PC109
4.7U_1206_25V6K
12
PR135
4.7_1206_5%
12
PC112 680P_0603_50V8J
12
PC110
4.7U_1206_25V6K
PL9
12
PR114 909_0402_1%
CPU_B+
PC102
1 2
0.47U_0603_16V7K
PC106
1 2
2200P_0402_50V7K
0.56UH_ETQP4LR56WFC_21A_20%
1 2
12
PR136
909_0402_1%
0.47U_0603_16V7K
PL10
1 2
PC113
PR116
PR124
1 2
3K_0402_1%
PL8
1 2
0.001_2512_5%
12
499_0402_1%
1 2
0_0402_5%
PR111
PR127
+CPU_CORE
CPU VCC SENSE
12
PR117
499_0402_1%
PR119
3K_0402_1%
1 2
1 2
PC101
@
1000P_0402_50V7K
909_0402_1%
1 2
PR137
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/10 2006/03/10
Compal Secret Data
Deciphered Date
Compal El e ct r o nics, Inc.
Title
Size Do cu m ent N umber R e v
A3
Dat e : Sheet
CPU_CORE
Sakhir 10E<HBT10>
, 04, 2005
星期三 五月
of
40 44
1.0
A
R287 0_0402_5%NEC@
+3VS
+3VALW
PCI_AD[0..31]17,20,24,25,26,32
1 1
CLK_PCI_USB20
12
R256 10_0402_5%@
C286 15P_0402_50V8J@
PCI_C/BE#[0..3]17,24,25,26,32
2 2
PCI_AD23
EC_RSMRST#18,28
3 3
PCIRST#17,24,25,26,28,30,32
4 4
PCIRST#
USB20_PME#24,25,28
USB_SMI#18
+3VALW
PCIRST#
PM_CLKRUN#17,24,25,26,28
PCI_REQ#017 PCI_GNT#017
A
PCI_AD[0..31]
PCI_C/BE#[0..3 ]
PCI_PAR17,24,25,26
PCI_FRAME#17,24,25,26,32
PCI_IRD Y#17,24,25,26 PCI_TRDY#17,24,25,26,32 PCI_STOP#17,24,25,26
R275 100_0402_5%NEC@
1 2
PCI_DEVSEL#17,24,25,26
PCI_PERR#17,24,25,26
PCI_SERR#17,24,25,26 PCI_PIRQA#8,17,26 PCI_PIRQC#17,25
PCI_PIRQD#17,24,25
CLK_PCI_USB2017,32
R524 0_0402_5%NEC@
1 2
R525 0_0402_5%@
1 2
R531 1.5K_0402_5%NEC@
1 2
R529 1.5K_0402_5%NEC@
1 2
R528 1.5K_0402_5%NEC@
1 2
R527 1.5K_0402_5%NEC@
1 2
R522 1.5K_0402_5%@
R523 0_0402_5%NEC@
PM_CLKRUN#
1 2
1 2
R526 0_0402_5%NEC@
1 2
R530 0_0402_5%@
1 2
PCI_REQ#0 PCI_REQ#
R255 0_0402_5%NEC@
PCI_GNT#0
1 2
R254 0_0402_5%NEC@
1 2
1 2
R289 0_0402_5%@
1 2
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 US B20_NEC _P0-_R PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0
PCI_PAR PCI_FRAME# PCI_IR DY# PCI_TRDY# PCI_STOP#
PCI_DEVSEL# PCI_REQ# PCI_GNT# PCI_PERR# PCI_SERR# PCI_PIRQA# PCI_PIRQC# PCI_PIRQD# CLK_PCI_USB20
C5 C4
C1 C2 D2 D1 D3
M1 N3 M3 N4
N5 M5 C3
M2
G1 G3
G2 C6 D6 H2 H1 C7
D9
M6 C9
N6
A6 B6
A5 B5
A4 B4
E1 E3 F2 J1 J2 K3 K1 L3 K2 L1 L2
P4 P5
F1 J3
J4 F3 F4
B3
B7 A7 A8 B8
L6 L7
P6
U26
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
CBE3# CBE2# CBE1# CBE0#
PAR FRAME# IRDY# TRDY# STOP# IDSEL DEVSEL# REQ0# GNT0# PERR# SERR# INTA# INTB# INTC# PCLK VBBRST# PME#
SMI# LEGC
N.C. N.C
VCCRST#
CRUN#
PCI_GNT#
B
B
+3VALW +3V_USB20
P2
P3
P12
A13
A12
H3
M4
C8
VDD_PCI
VDD_PCI
A3
VDD
VDD
VDD
VDD
VDD
VDD_PCI
VDD
USB 2.0 CONTROLLER uPD720101F1-EA8 FBGA144
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B1
A2
B2
N1
N2
P10
B14
N14
B13
H14
N13
M11
0.1U_0402_10V6KNEC@
C
E2
N8
L13
VDD
VDD
VDD
VSS
VSS
VSS
L12
D12
H12
+3VALW +3V_USB20
C684
G12
J13
H13
F13
D13
H4
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
D8
G4
J11
F11
NEC@
0.1U_0402_10V6K
1
1
C309
2
2
0.1U_0402_10V6K
D7
VDD
C689
NEC@
N10
N12
AVDD
AVDD
XT1/SCLK
XT2
RSDM1
DM1
DP1
RSDP1
RSDM2
DM2
DP2
RSDP2
RSDM3
DM3
DP3
RSDP3
RSDM4
DM4
DP4
RSDP4
RSDM5
DM5
DP5
RSDP5
RREF
AVSS(R)
OCI1 OCI2 OCI3 OCI4 OCI5
PPON1 PPON2 PPON3 PPON4 PPON5
NTEST1
SMC AMC
TEB
TEST
NANDTEST
SRCLK SRDTA
SRMOD
AVSS
AVSS
NEC@
UPD720101F1-EA8_FBGA144
P13
M12
NEC@
0.1U_0402_10V6K
1
1
C681
2
2
0.1U_0402_10V6K
NEC@
NEC@
C342
16P_0603_50V8J
L9 P8
M14
USB20_NEC_P0- USB20_NEC_P0-
M13
USB20_NEC_P0+
L14
USB20_NEC_P0+_R
K13
USB20_NEC_P1-_R
K14
USB20_NEC_P1- USB20_NEC_P1-
K12
USB20_NEC_P1+
J14
USB20_NEC_P1+_R
J12
USB20_NEC_P2-_R
H11
USB20_NEC_P2-
G11
USB20_NEC_P2+
G13
USB20_NEC_P2+_R
G14
USB20_NEC_P3-_R
F12
USB20_NEC_P3- USB20_NEC_P3-
F14
USB20_NEC_P3+
E12
USB20_NEC_P3+_R
E14
USB20_NEC_P4-_R
E13
USB20_NEC_P4-
D14
USB20_NEC_P4+
C13
USB20_NEC_P4+_R
C14
NEC@
9.1K_0402_1%
P11 N11
R329
OVCUR_USB20#0
B12
OVCUR_USB20#1
B11
OVCUR_USB20#2
B10
OVCUR_USB20#3
A10
OVCUR_USB20#4
B9 C12
A11 C11 C10 A9
M8 M7
P7 N7 L8 M10
M9 N9 P9
1 2
R322 1.5K_0402_5%
1 2
R340 1.5K_0402_5%@
R334
1.5K_0402_5%
NEC@
1 2
NEC@
10U_0805_10V4Z
1
C295
C343
2
Security Classification
Issued Date
THIS S HE ET O F E NG I NE ERI NG DRA WI N G IS T HE PR OP RI ET A RY PROPERTY OF CO MPAL ELECTRO NICS, I NC. AND CONTAI NS CONFIDENTIAL AND TRAD E SEC RET INF ORM ATI O N. T HIS SHE ET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPA L ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
NEC@
30MHZ_30PPM
Y3
1 2
1
100_0402_5%
2
R309 36_0603_1%NEC@
R301 36_0603_1%NEC@
R297 36_0603_1%NEC@
R290 36_0603_1%NEC@
R286 36_0603_1%NEC@
R282 36_0603_1%NEC@
R278 36_0603_1%@
R273 36_0603_1%@
R270 36_0603_1%@
R262 36_0603_1%@
+3V_USB20
1
C337
0.1U_0402_10V6K@
2
12
1
C344
0.1U_0402_10V6K@
2
R265 10K_0402_5%NEC@ R266 10K_0402_5%NEC@ R259 10K_0402_5%NEC@ R258 10K_0402_5%NEC@ R257 10K_0402_5%NEC@
NEC@
1
1
C292
2
2
10U_0805_10V4Z
NEC@
NEC@
R315
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2 1 2 1 2 1 2 1 2
+3VALW
+3VALW
R260
1 2
0_0603_5%
NEC@
R251
0_0603_5%
NEC@
1 2
12
8 7 6 5
0.1U_0402_10V6K
C291
2005/03/04 2006/03/04
Note: PLACE CLOSE TO U38 For N E C USB2.0 only .
L
1
NEC@
C341 16P_0603_50V8J
2
R451 0_0402_5%@
1 2
R324 0_0402_5%@
1 2
USB20_NEC_P0+
USB20_NEC_P1+
USB20_NEC_P2­USB20_NEC_P2+
USB20_NEC_P3+
USB20_NEC_P4­USB20_NEC_P4+
+3VALW
0.1U_0402_10V6K@
U30
VCC WC SCL SDA
AT24C02N-10SC-2.7_SO8@
NEC@
1
2
0.1U_0402_10V6K
C290
NEC@
GND
1
A0
2
A1
3
A2
4
1
C287
2
Compal Secret Data
Deciphered Date
1
C340
2
NEC@
10U_0805_10V4Z
1
2
D
R516 0_0402_5%NEC@
1 2
R517 0_0402_5%NEC@
1 2
R515 0_0402_5%NEC@
1 2
R514 0_0402_5%NEC@
1 2
R513 0_0402_5%NEC@
1 2
R512 0_0402_5%NEC@
1 2
USB20_NEC_P0­USB20_NEC_P0+
USB20_NEC_P2+ USB20_NEC_P2­USB20_NEC_P1+ USB20_NEC_P1-
USB20_NEC_P4+ USB20_NEC_P4­USB20_NEC_P3+ USB20_NEC_P3-
1
C288
NEC@
10U_0805_10V4Z
2
D
E
NEC_USB48 16
NEC_USBP0- 29 NEC_USBP0+ 29
NEC_USBP1- 29 NEC_USBP1+ 29
NEC_USBP2- 29 NEC_USBP2+ 29
R302 15K_0402_5%NEC@
1 2
R299 15K_0402_5%NEC@
1 2
RP54
1 8 2 7 3 6 4 5
15K_1206_8P4R_5%NEC@
RP52
1 8 2 7 3 6 4 5
15K_1206_8P4R_5%NEC@
Title
NEC uPD720101 - USB2.0 Controller
Size Document Number R ev
Date: Sheet
Note: PLACE CLOSE TO L36,R545,R546
Note: PLACE CLOSE TO L37,R547,R548
Note: PLACE CLOSE TO L38,R549,R550
Compal Electronics, In c.
Sakhir 10E<HBT10>
星期
, 04, 2005
三五月
E
of
41 44
1.0
5
4
3
2
1
ZZZ
D D
LA-2811
C C
B B
A A
Title
<Title>
Size Do cument Number Rev
EBQ10 M/ B LA-2741 1.0
B
of
星期三 五月
5
4
3
2
Date: Sheet
4, 2005
42 44, 0
1
5
4
Versio n Chan ge L ist ( P. I. R. List ) for HW Circuit
3
2
1
Item DescriptionDate
D D
1
23 04/07/2005 CompalDesign change Add Q46,R552,R553,D46 for Audio noise issue
Title
Owner
2 5 Design change 04/07/2005 Compal Del C46,C47
3 15 Design change 04/07/2005 Compal
Del R12 Add U3,C11 for backlight flash issue
4 17 Design change 04/12/2005 Compal Change R136,R456,R142,R140,R134 from 33 to 39Ohm for EMI issue
5 22 Design change 04/12/2005 Compal Add R555 for TI1410 bug.
6 23 Design change 04/07/2005 Compal
C C
Del R510,R509,R508,R511,R506,R507 Add L19,L20,L21 for EMI solution
7 32 Design change 04/07/2005 Compal Add R534-R551 for bebug port.
8 33 Design change 04/12/2005 Compal Change R304 to 84.5K,R280,R233 to 91K,R157 to 100k for power sequence.
9 22 Design change 04/19/2005 Compal
10
16 Design change 04/19/2005 Compal Change R416,R422 from 33 to 39Ohm for EMI 0.3
Add R331,R310 for EMI. Change R293 from 33 to 39Ohm for EMI.
11 28 Design change 04/29/2005 Compal Add R558,C697 for TI bug 1.0
Rev.Page#
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.3
Request
B B
A A
Title
Size D ocum e n t Number R e v
5
4
3
2
Date: Sheet
Compa l Electr oni cs, In c. Changed-List Histor y-1
LA-2811
星期三 五月
04, 2005
1
1.0
of
43 44,
5
4
Version Chan ge List ( P. I. R. List ) for Power Circuit
3
2
1
Item DescriptionDate
D D
1
39 04/07/2005 CompalDesign change Change PR99,PR139 from 0_0402_5% to 80.6K_0402_1% for HW sequence
Title
Owner
2 39 Design change 04/07/2005 Compal Add 0.1U_0402 on PC83,PC92 for HW sequence.
3 35 Design change 04/07/2005 Compal Reserve the battery SMC and SMD ESD diode on PD20,PD21
C C
Rev.Page#
0.1
0.2
0.2
0.2
0.2
0.2
0.2
0.2
Request
B B
A A
Title
Size D ocum e n t Number R e v
5
4
3
2
Date: Sheet
Compa l Electr oni cs, In c. Changed-List Histor y-1
LA-2811
星期三 五月
04, 2005
1
1.0
of
44 44,
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