Quanta BD3A DABD3AMB6D0, Satellite A300D, Satellite A305D, Satellite P305D, Satellite P300D Schematic

...
4 (1)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet
of
BLOCK DIAGRAM
3C
Size Document Number Rev
Date: Sheet
of
BLOCK DIAGRAM
3C
Size Document Number Rev
Date: Sheet
of
BLOCK DIAGRAM
3C
Turion Rev.G Dual-Core
Sempron
(638 S1g1 socket)
Dual-Core 35W
DDRII-SODIMM1
DDRII-SODIMM2
DDR II 667 MHZ
PG 8,9
LVDS
PG 20
CRT
SATA - HDD1
PCI-E, 1X (port2)
Mini Card (WLAN)
SATA0
SB600
3V/5V
Internal ODD
AMD S1g1
CLOCK GENERATOR
CD-ROM
Azalia
465 FCBGA
USB2.0 I/O Ports X1
PATA 133
549 BGA
PG 3
RS690M
WPCE775
A_LINK (X4)
HT_LINK
LPC
VR
PCI Bus 33MHz
EC
BD3A BLOCK DIAGRAM
USB2.0 (P9)
PG 4,5,6,7
PG 10,11,12,13
PG 14,15,16,17,18
+3VPCU
+3V_S5
+3V
+5VPCU
+1.8VSUS
SMDDR
VTERM
+1.8VSUS
+1.8V
+SMDDR_VTERM
+1.2V
+1.2V
+1.2V_S5
CPU CORE
VCC_CORE
HOST 200MHz
PCIE 100MHz
USB 48MHz
REF 14MHz
PG 8,9
MINI CARD (HD Video Decoder)
PCI-E, 1X (port1)
Fingerprint
Keyboard
8040T(10/100)/8055(Giga)
PCI-E, 1X (port0)
Speaker Amplifier
G1441R51U
IEEE1394 CN.
O2Micro OZ129T
Card Reader
CX20561
MDC CONN
PCI-E X16
HDMI
S-VIDEO
SATA - HDD2
SATA1
USB2.0 (P7)
USB2.0 I/O Ports X1
NEW CARD
PCI-E, 1X (port3)
Azalia Audio Codec
INT.
S.P.
+3VSUS
PG 19
PG 18
PG 18
PG 27
PG 27
PG 27
PG 26
PG 26 PG 26
PG 23
PG 6
FAN
PG 30
PG 22
PG 22
PG 22
PG 23
RJ45
PG 29
PG 19
PG 28
PG 28
PG 25
PG 25
PG 25
PG 24PG 24
USB2.0 (P6)
USB2.0 (P4)
PG 28
USB2.0 (P2)
CCD
USB2.0 (P3)
+5V
+2.5V
+1.5V
NB CORE
+1.5V
+2.5V
(1.0~1.2V)
Device IDSEL# REQ#/GNT# Interrupt
OZ129 AD17 REQ0# / GNT0# INTE#
PCI ROUTING TABLE
PG 21
MXM Module
HDMI
LVDS(2ch)
PG 28
USB2.0 (P5)
Felica
PG 28
USB2.0 (P8)
Bluetooth
PG 23
FM Radio
PG 34
PG 35
PG 33
PG 36
PG 37
PG 37
PG 37
LAYER 1 : TOP
LAYER 3 : IN1
LAYER 4 : IN2
LAYER 2 : GND
LAYER 6 : BOT
PCB STACK UP
LAYER 5 : VCC
Daughter Board
USB Board
(With FM)
Touch Pad board Touch Pad board
(with Fingerprinter)
CRT TV HDMI
PG 29 PG 28
Touch
Pad
PG 28
Flash
ROM
CIR
SPI
PG 30
Kill SW
PG 23
PORT-B
MIC
JACK
PORT-A
H.P/
SPDIF
PG 23
MDC
Board
RJ11
PG 23
INT.
MIC
PG 28
PG 28
USB2.0 I/O Ports X1
USB2.0 (P1)
USB2.0 (P0)
USB2.0 I/O Ports X1
(MB)
(MB)
(DB)
(DB)
LVDS
A:(09/19) Gerber Out for A-test (DABD3AMB6A0)
A:(09/19) Re-name
A:(09/21) Import BOM E200709-3025
+NB_CORE
B:(10/30) Gerber Out for B-test (DABD3AMB6B0)
B:(10/31) Change BOM E200710-4324
B:(10/31) Import BOM E200710-4325
C:(12/08) Gerber Out for C-test (DABD3AMB6C0)
B:(11/27) Change BOM E200711-3973
C:(12/11) Change BOM E200712-1530
C:(12/14) Change BOM E200712-2298
C:(12/11) Import BOM E200712-1413
MDC board
Power board
USB Board
(With RJ11)
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet
of
SYSTEM INFORMATION
3C
243Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
SYSTEM INFORMATION
3C
243Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
SYSTEM INFORMATION
3C
243Tuesday, January 22, 2008
*Note: EC will sampling SUSB# &
SUSC# every 5ms.
HWPG_1.8V (SUS)
MAINON
HWPG_CPUIO
+VCC_CORE
SUSON
SUSB#,SUSC#
SB_PWRGD
CPU_PWRGD
ECPWROK
NB_PWRGD
CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_STOP#
+5V +3V +2.5V +1.8V +1.5V SMDDR_VTERM
+3VSUS +1.8VSUS SMDDR_VREF
PCIE_WAKE#
+1.2V_S5
From Power Button
From SB to EC
From PWM
HWPG
PLTRST# PCIRST#
47ms~66ms
71ms~73ms
1.9ms~2.1ms
RSMRST#
DNBSWON#
+5VPCU +3VPCU
S5_ON
BD3A Power On Sequence
SYS_HWPG(PCU)
+3V_S5
NBSWON#
From AC,Battery VIN
>10ms
>100ms
-22ms~500ms
SUSON
MAINON
HWPG_1.5V,HWPG_2.5V,GFXPG(MAIN)
VRON
+1.2V_ON
MAINON
MAINON+RC
From EC
From PWM
From PWM
From PWM
From EC
From EC
From SB
From EC
From PWM
From EC
From EC
From EC
From EC
From SB
From SB
From SB
From SB
+5V_S5
+1.2V
From EC
+NB_CORE
From EC
HWPG_1.2_NB
+1.2V_ON+RC
From PWM
From EC
+1.2V_ON+RC
Items Function BTO Name Description
Option for RJ45-10/100 and RJ45-1000
Silicon image SiI 1392/1932
1
2
3
4
5
6
BOM naming rule
PX@EV@
CIR
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
HDMI port
HDMI transmitter
HDMI-CEC
Discrete VGA
UMA
New Card
RJ11
RJ45-10/100
RJ45-1000
TV
Cardbus
FM transmitter
Mainstream ID LED
Low cost ID LED
CCD
INT MIC
AMD Hyper Flash
North bridge(690MC/RS780MC)
North bridge(RX780)
PowerXpress
PowerXpress with UMA SKU
PowerXpress with Discrete VGA SKU
Power player/Power Shift
CIR@
HDM@
SI@
CEC@
EV@
IV@
NEW@
MD@
40@
55@
40@55@
TV@
CB@
FM@
MID@
LID@
CCD@
I_MIC@
HF@
MC@
RX@
PX@
PX@IV@
PP@
Renesas R8C/1B
External VGA stuff
Internal VGA stuff
Modem
Marvell 8040T(10/100)
Marvell 8055(Giga)
Option for 8040/8055
Only for AMD platform
Only for AMD platform
Only for AMD platform
Only for AMD platform
Only for AMD platform
Only for AMD platform
Only for AMD platform
v
v
v
v
v
v
v
v
v
EC775 SDATA1/SCLK1(+3VPCU)
EC775 SDATA2/SCLK2(+3VPCU)
EC775 SDATA3/SCLK3(+3VPCU)
EC775 SDATA4/SCLK4(+3VPCU)
Power
Reserve MOS ckt
Battery CPU thermal Sensor EC EEPROM VGA thermal Sensor Touch Sensor HDMI CEC
+3VPCU +3V +3VPCU +3V +3VPCU +5VPCU
XX XVVV
V
VV
VVV
SB600 SDATA0/SCLK0(+3V)
Power
Reserve MOS ckt
CLK GEN RAM Mini Card (HD-Decoder) Mini-card(WL) New Card HDMI
V
V
SB600 SDATA0/SCLK0(+3V_S5)
+3V +3V +3V (Atheros) +3V +3V_S5
VVVV
+3V
VVVVV V
AMD SB600 SMBUS Table
EC SMBUS Table
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_VDD_USB
CLK_XIN
CLK_XOUT
SBLINK_CLKP_R
CLK_48M_2_R
NB_OSCIN_R
CLK_VDDA
CPUCLK_EXT_R
CPUCLK#_EXT_R
NBSRC_CLKP_R
GPP_CLK1P_R
GPP_CLK1N_R
SBSRC_CLKN_R
NBSRC_CLKN_R
CLK_VDD_USB
SBLINK_CLKN_R
CGCLK_SMB
CGDAT_SMB
SB_OSCIN_R
CLK_VDD_REF
CLK_VDDA
SBSRC_CLKP_R
GPP_CLK2P_R
GPP_CLK2N_R
GPP_CLK3P_R
GPP_CLK3N_R
MXM_REFCLKP_R
MXM_REFCLKN_R
CLK_VDD_REF
CGCLK_SMB
CGDAT_SMB
HTREFCLK_R
NEW_CLKREQ#
CLKREQA#
NEW_CLKREQ#
CLKREQA#
CLKREQB#
CLKREQB#
GPP_CLK0P_R
GPP_CLK0N_R
CLK_PCIE_NEW 25
CLK_PCIE_NEW# 25
SB_OSCIN 15
NB_OSC 12
HTREFCLK 12
USBCLK 15
SBLINK_CLKP 12
SBLINK_CLKN 12
NBSRC_CLKP 12
NBSRC_CLKN 12
SBSRCCLKP 14
SBSRCCLKN 14
CPUCLKP 6
CPUCLKN 6
MXM_REFCLKP 21
MXM_REFCLKN 21
SDATA08,15,25
SCLK08,15,25
CLK_PCIE_WLAN 25
CLK_PCIE_WLAN# 25
CLK_PCIE_MINICARD 25
CLK_PCIE_MINICARD# 25
NEW_CLKREQ# 25
CLKREQ_WLAN# 25
CLKREQ_LAN# 24
CLK_PCIE_LAN 24
CLK_PCIE_LAN# 24
+3V
+3V
+3V
CLK_VDD
CLK_VDD
CLK_VDD
+3V
CLK_VDD
+3V
+3V
+3V
+3V
+3V
Size Document Number Rev
Date: Sheet
of
CLOCK GENERATOR
3C
343Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet of
CLOCK GENERATOR
3C
343Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet of
CLOCK GENERATOR
3C
343Tuesday, January 22, 2008
Ioh = 5 * Iref
(2.32mA)
Voh = 0.71V @ 60 ohm
Parallel Resonance Crystal
CLKREQA# CONTROL SRC5,6,7
CLKREQB# CONTROL SRC2,3,4 ATIG3
CLKREQC# CONTROL SRC0,1 ATIG0,1,2
100.00
USB
100.00
48.00
100.00
48.00
EXT CLK FREQUENCY SELECT TABLE(MHZ)
0 0 1
CPU
33.33
48.00
48.00
1 0 0
0 1 1
48.00
Reserved
200.00
30.00
0 1 0
100.00
66.66
Reserved
1 1 1
FS1
0 0 0
33.33 48.00
220.00
PCI
100.00
Reserved
66.66
Hi-Z
100.00
180.00
X/3 X/6
SRCCLK
73.12
1 0 1
66.66
36.56
Hi-Z
33.33
Reserved
COMMENT
48.00
Reserved
FS2
100.00
Normal Turion/Sempron operation
Hi-Z
60.00
100.00
133.33
Reserved
FS0
HTT
X
[2:1]
Put Decoupling Caps close to Clock Fen. power pin
3
A:(8/20) Add ATIGCLK to MXM
Clock Gen I2C
A:(8/27)Add MOS for I2C
14.318MHz
14.318MHz
66MHz
A:(8/31) SWAP net for layout routing
A:(8/31) SWAP net for layout routing
A:(9/3) Change from 1.0nF to 2.2nF to meet AMD check list.
A:(9/7) Add 10p for EMI issue (Suggestion by Seligo)
(0917) dont add them when use RTM870T-690
(0917) dont add them
when use RTM870T-690
B:(9/27) Add 10k(R665) PU to +3V for NEW Card ckt
B:(10/24) change C322,C323 from 33p to 27p (base on TXC report)
B:(10/25) change LAN CLK from SRCCLK4 to SRCCLK7, control by CLKREQA#
B:(10/25) Add WLAN & LAN CLKREQ circuit (BOI request)
RAMP:(1/15) Add C572(18pF) for SB_OSCIN (EMI issue)
RAMP:(1/15) Add C186(10pF) for NB_OSC (EMI issue)
L61 BK1608HS600_6L61 BK1608HS600_6
C302
2.2u/6.3V_6
C302
2.2u/6.3V_6
R678
10K_4
R678
10K_4
R241 *0_4R241 *0_4
R230 EV@49.9/F_4R230 EV@49.9/F_4
R271 33_4R271 33_4
R234
49.9/F_4
R234
49.9/F_4
L33 BK1608HS600_6L33 BK1608HS600_6
C323 33p/50V_4C323 33p/50V_4
L30 BK1608HS600_6L30 BK1608HS600_6
C270
10u/10V_8
C270
10u/10V_8
R289 49.9/F_4R289 49.9/F_4
R279 49.9/F_4R279 49.9/F_4
R287 49.9/F_4R287 49.9/F_4
R273
10K_4
R273
10K_4
2
4
1
3
RP25
NEW@33X2
RP25
NEW@33X2
L28 BK1608HS600_6L28 BK1608HS600_6
R267 0_4R267 0_4
R226 NEW@49.9/F_4R226 NEW@49.9/F_4
2
4
1
3
RP28 33X2RP28 33X2
C588
0.1u/10V_4
C588
0.1u/10V_4
C587
0.1u/10V_4
C587
0.1u/10V_4
2
4
1
3
RP27 EV@33X2RP27 EV@33X2
C612
*0.1u/10V_4
C612
*0.1u/10V_4
T149T149
C586
0.1u/10V_4
C586
0.1u/10V_4
C613
0.1u/10V_4
C613
0.1u/10V_4
T63T63
R227 49.9/F_4R227 49.9/F_4
R555
10K_4
R555
10K_4
R249 47.5/F_4R249 47.5/F_4
R288 49.9/F_4R288 49.9/F_4
R282 49.9/F_4R282 49.9/F_4
2
4
1
3
RP32
33X2
RP32
33X2
C271
*10p_4
C271
*10p_4
3
2
1
Q71
*RHU002N06
Q71
*RHU002N06
3
2
1
Q39
*RHU002N06
Q39
*RHU002N06
2
4
1
3
RP30 33X2RP30 33X2
C322 33p/50V_4C322 33p/50V_4
T60T60
T83T83
R665
NEW@10K_4
R665
NEW@10K_4
R243 33_4R243 33_4
R237
10K_4
R237
10K_4
T61T61
R563 0_4R563 0_4
R254
10K_4
R254
10K_4
R286 49.9/F_4R286 49.9/F_4
C614
0.1u/10V_4
C614
0.1u/10V_4
R228 49.9/F_4R228 49.9/F_4
T66T66
R229 EV@49.9/F_4R229 EV@49.9/F_4
C288
10u/10V_8
C288
10u/10V_8
21
Y5
14.318MHZ
Y5
14.318MHZ
C611
1u/6.3V_4
C611
1u/6.3V_4
2
4
1
3
RP31
33X2
RP31
33X2
R550
475/F_4
R550
475/F_4
C597
0.1u/10V_4
C597
0.1u/10V_4
R285 49.9/F_4R285 49.9/F_4
R283 49.9/F_4R283 49.9/F_4
R236 *0_4R236 *0_4
2
4
1
3
RP26 33X2RP26 33X2
R238 33_4R238 33_4
R284 49.9/F_4R284 49.9/F_4
R280 49.9/F_4R280 49.9/F_4
2
4
1
3
RP29
33X2
RP29
33X2
3
2
1
Q58
RHU002N06
Q58
RHU002N06
R556 *0_4R556 *0_4
R233 33_4R233 33_4
C599
*0.1u/10V_4
C599
*0.1u/10V_4
T65T65
3
2
1
Q60
RHU002N06
Q60
RHU002N06
T81T81
C598
0.1u/10V_4
C598
0.1u/10V_4
C572
18p/50V_4
C572
18p/50V_4
R231 NEW@49.9/F_4R231 NEW@49.9/F_4
C303
*0.1u/10V_4
C303
*0.1u/10V_4
XIN
3
XOUT
4
VDDCPU
54
GND_CPU
53
RESET_IN#
11
VDD_SRC1
14
GND_48
8
VDD_ATIG
39
NC
61
CPUCLK8T1
52
CPUCLK8C1
51
CPUCLK8C0
55
CPUCLK8T0
56
IREF
48
GNDA
49
VDDA
50
ATIGCLKT3
30
VDD_48
5
ATIGCLKC3
31
VDD_SRC2
23
GND_ATIG
38
GND_REF
1
SRCCLKT6
16
SRCCLKC6
17
ATIGCLKT0
41
ATIGCLKC0
40
ATIGCLKT2
35
ATIGCLKC2
34
SRCCLKT5
18
SRCCLKC5
19
SRCCLKT4
20
SRCCLKC4
21
SRCCLKT3
24
SRCCLKC3
25
SRCCLKT2
26
SRCCLKC2
27
CLKREQA#
57
CLKREQB#
32
48MHz_0
6
FS1/REF1
63
FS0/REF0
64
SMBDAT
10
SMBCLK
9
VDD_REF
2
SRCCLKT0
47
SRCCLKC0
46
FS2/REF2
62
GND_SRC1
15
GND_SRC3
29
VDD_SRC3
28
ATIGCLKT1
37
ATIGCLKC1
36
GND_SRC2
22
SRCCLKT1
43
SRCCLKC1
42
SRCCLKT7
12
SRCCLKC7
13
48MHz_1
7
CLKREQC#
33
HTTCLK0
59
VDD_SRC4
44
GND_SRC4
45
VDDHTT
60
GNDHTT
58
U17
ICS951462
U17
ICS951462
T64T64
R272
*10K_4
R272
*10K_4
R248 47.5/F_4R248 47.5/F_4
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
R235 261/F_4R235 261/F_4
T150T150
T62T62
C615
0.1u/10V_4
C615
0.1u/10V_4
R564
*10K_4
R564
*10K_4
C186
10p/50V_4
C186
10p/50V_4
R632
10K_4
R632
10K_4
R277
*1M_4
R277
*1M_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HT_CPU_CTLOUT1_PHT_CTLIN1_P
HT_CPU_CTLOUT1_NHT_CTLIN1_N
HT_CADIN15_P10
HT_CADIN15_N10
HT_CADIN14_P10
HT_CADIN14_N10
HT_CADIN13_P10
HT_CADIN13_N10
HT_CADIN12_P10
HT_CADIN12_N10
HT_CADIN11_P10
HT_CADIN11_N10
HT_CADIN10_P10
HT_CADIN10_N10
HT_CADIN9_P10
HT_CADIN9_N10
HT_CADIN8_P10
HT_CADIN8_N10
HT_CADIN7_P10
HT_CADIN7_N10
HT_CADIN6_P10
HT_CADIN6_N10
HT_CADIN5_P10
HT_CADIN5_N10
HT_CADIN4_P10
HT_CADIN4_N10
HT_CADIN3_P10
HT_CADIN3_N10
HT_CADIN2_P10
HT_CADIN2_N10
HT_CADIN1_P10
HT_CADIN1_N10
HT_CADIN0_P10
HT_CADIN0_N10
HT_CLKIN1_P10
HT_CLKIN1_N10
HT_CLKIN0_P10
HT_CLKIN0_N10
HT_CADOUT15_P 10
HT_CADOUT15_N 10
HT_CADOUT14_P 10
HT_CADOUT14_N 10
HT_CTLIN0_P10
HT_CTLIN0_N10
HT_CADOUT13_P 10
HT_CADOUT13_N 10
HT_CADOUT12_P 10
HT_CADOUT12_N 10
HT_CADOUT9_P 10
HT_CADOUT9_N 10
HT_CADOUT8_P 10
HT_CADOUT8_N 10
HT_CADOUT11_P 10
HT_CADOUT11_N 10
HT_CADOUT10_P 10
HT_CADOUT10_N 10
HT_CADOUT5_P 10
HT_CADOUT5_N 10
HT_CADOUT4_P 10
HT_CADOUT4_N 10
HT_CADOUT1_P 10
HT_CADOUT1_N 10
HT_CADOUT0_P 10
HT_CADOUT0_N 10
HT_CADOUT3_P 10
HT_CADOUT3_N 10
HT_CADOUT2_P 10
HT_CADOUT2_N 10
HT_CADOUT7_P 10
HT_CADOUT7_N 10
HT_CADOUT6_P 10
HT_CADOUT6_N 10
HT_CLKOUT1_P 10
HT_CLKOUT1_N 10
HT_CLKOUT0_P 10
HT_CLKOUT0_N 10
HT_CTLOUT0_P 10
HT_CTLOUT0_N 10
VLDT_RUN
VLDT_RUN
VLDT_RUN
+1.2V
Size Document Number Rev
Date: Sheet
of
TURION 64 HT I/F
3C
443Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
TURION 64 HT I/F
3C
443Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
TURION 64 HT I/F
3C
443Tuesday, January 22, 2008
Athlon 64 S1
Processor Socket
4
A:(8/22) Remove one L (1206) via +1.2V to VLDT_RUN
T32T32
R99 51/F_4R99 51/F_4
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
C206
4.7u/6.3V_6
C206
4.7u/6.3V_6
C219
0.22u/10V_4
C219
0.22u/10V_4
R100 51/F_4R100 51/F_4
L22
FBJ3216HS800_1206
L22
FBJ3216HS800_1206
C204
4.7u/6.3V_6
C204
4.7u/6.3V_6
C221
0.22u/10V_4
C221
0.22u/10V_4
C447
4.7u/6.3V_6
C447
4.7u/6.3V_6
T30T30
12
C218
180p/50V_4
C218
180p/50V_4
12
C220
180p/50V_4
C220
180p/50V_4
VLDT_A3
D4
VLDT_A2
D3
VLDT_A1
D2
VLDT_A0
D1
VLDT_B3
AE5
VLDT_B2
AE4
VLDT_B1
AE3
VLDT_B0
AE2
L0_CADIN_H15
N5
L0_CADIN_L15
P5
L0_CADIN_H14
M3
L0_CADIN_L14
M4
L0_CADIN_H13
L5
L0_CADIN_L13
M5
L0_CADIN_H12
K3
L0_CADIN_L12
K4
L0_CADIN_H11
H3
L0_CADIN_L11
H4
L0_CADIN_H10
G5
L0_CADIN_L10
H5
L0_CADIN_H9
F3
L0_CADIN_L9
F4
L0_CADIN_H8
E5
L0_CADIN_L8
F5
L0_CADIN_H7
N3
L0_CADIN_L7
N2
L0_CADIN_H6
L1
L0_CADIN_L6
M1
L0_CADIN_H5
L3
L0_CADIN_L5
L2
L0_CADIN_H4
J1
L0_CADIN_L4
K1
L0_CADIN_H3
G1
L0_CADIN_L3
H1
L0_CADIN_H2
G3
L0_CADIN_L2
G2
L0_CADIN_H1
E1
L0_CADIN_L1
F1
L0_CADIN_H0
E3
L0_CADIN_L0
E2
L0_CADOUT_H15
T4
L0_CADOUT_L15
T3
L0_CADOUT_H14
V5
L0_CADOUT_L14
U5
L0_CADOUT_H13
V4
L0_CADOUT_L13
V3
L0_CADOUT_H12
Y5
L0_CADOUT_L12
W5
L0_CADOUT_H11
AB5
L0_CADOUT_L11
AA5
L0_CADOUT_H10
AB4
L0_CADOUT_L10
AB3
L0_CADOUT_H9
AD5
L0_CADOUT_L9
AC5
L0_CADOUT_H8
AD4
L0_CADOUT_L8
AD3
L0_CADOUT_H7
T1
L0_CADOUT_L7
R1
L0_CADOUT_H6
U2
L0_CADOUT_L6
U3
L0_CADOUT_H5
V1
L0_CADOUT_L5
U1
L0_CADOUT_H4
W2
L0_CADOUT_L4
W3
L0_CADOUT_H3
AA2
L0_CADOUT_L3
AA3
L0_CADOUT_H2
AB1
L0_CADOUT_L2
AA1
L0_CADOUT_H1
AC2
L0_CADOUT_L1
AC3
L0_CADOUT_H0
AD1
L0_CADOUT_L0
AC1
L0_CLKIN_H1
J5
L0_CLKIN_L1
K5
L0_CLKIN_H0
J3
L0_CLKIN_L0
J2
L0_CTLIN_H0
N1
L0_CTLIN_L0
P1
L0_CTLOUT_H0
R2
L0_CTLOUT_L0
R3
L0_CLKOUT_H0
Y1
L0_CLKOUT_L0
W1
L0_CLKOUT_H1
Y4
L0_CLKOUT_L1
Y3
L0_CTLIN_H1
P3
L0_CTLIN_L1
P4
L0_CTLOUT_H1
T5
L0_CTLOUT_L1
R5
U25AU25A
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ48
M_A_DQ13
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ8
M_A_DQ14
M_A_DQ15
M_B_DQ16
M_B_DQ21
M_B_DQ23
M_B_DQ20
M_B_DQ22
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ3
M_B_DQ1
M_B_DQ2
M_B_DQ0
M_B_DQ6
M_B_DQ5
M_B_DQ7
M_B_DQ4
M_B_DQ9
M_B_DQ11
M_B_DQ12
M_B_DQ8
M_B_DQ10
M_B_DQ14
M_B_DQ13
M_B_DQ15
M_A_DQS#0
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#1
M_A_DQS#2
M_A_DQS#7
M_A_DQS#6
M_A_DQS0
M_A_DQS4
M_A_DQS1
M_A_DQS3
M_A_DQS2
M_A_DQS6
M_A_DQS7
M_A_DQS5
M_A_DQ29
M_A_DQ28
M_A_DQ31
M_A_DQ27
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ30
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ57
M_A_DQ60
M_A_DQ58
M_A_DQ59
M_A_DQ56
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQS#0
M_B_DQS#6
M_B_DQS#3
M_B_DQS#1
M_B_DQS#4
M_B_DQS#5
M_B_DQS#2
M_B_DQS#7
M_B_DQS5
M_B_DQS3
M_B_DQS4
M_B_DQS7
M_B_DQS2
M_B_DQS6
M_B_DQS0
M_B_DM5
M_B_DM0
M_B_DM4
M_B_DM3
M_B_DQ25
M_B_DQ24
M_B_DQ27
M_B_DQ31
M_B_DQ30
M_B_DQ28
M_B_DQ26
M_B_DQ32
M_B_DQ29
M_A_DM0
M_A_DM3
M_A_DM1
M_A_DM4
M_A_DM2
M_A_DM7
M_A_DM6
M_A_DM5
M_A_DQ49
M_A_DQ55
M_A_DQ50
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ51
M_B_DQS1
M_A_DQ1
M_A_DQ0
M_A_DQ2
M_A_DQ7
M_A_DQ5
M_A_DQ4
M_A_DQ3
M_A_DQ6
M_B_DM6
M_B_DM7
M_B_DM2
M_B_DM1
M_A_DQ17
M_A_DQ21
M_A_DQ22
M_A_DQ19
M_A_DQ20
M_A_DQ16
M_A_DQ18
M_A_DQ23
M_B_DQ37
M_B_DQ36
M_B_DQ35
M_B_DQ33
M_B_DQ34
M_B_DQ41
M_B_DQ38
M_B_DQ40
M_B_DQ39
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_B_DQ44
M_B_DQ46
M_B_DQS#0
M_B_DQS#6
M_B_DQS#3
M_B_DQS#1
M_B_DQ47
M_B_DQ45
M_B_DQ42
M_B_DQ49
M_B_DQ43
M_B_DQS#4
M_B_DQS#5
M_B_DQS#2
M_B_DQS#7
M_B_DQS5
M_B_DQS3
M_B_DQ52
M_B_DQ56
M_B_DQ48
M_B_DQ53
M_B_DQ51
M_B_DQ63
M_B_DQS4
M_B_DQS7
M_B_DQS2
M_B_DQS6
M_B_DQS0
M_B_DQ58
M_B_DQ54
M_B_DQ50
M_B_DQ61
M_B_DQ55
M_B_DQS1
M_B_DQ59
M_B_DQ62
M_B_DQ60
M_B_DQ57
M_A_DQS#0
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#1
M_A_DQS#2
M_A_DQS#7
M_A_DQS#6
M_A_DQS0
M_A_DQS4
M_A_DQS1
M_A_DQS3
M_A_DQS2
M_A_DQS6
M_A_DQS7
M_A_DQS5
M_A_A14
M_A_A15
M_A_A12
M_A_A13
CPU_M_VREF
VTT_SENSE
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_B_A1
M_B_A10
M_B_A4
M_B_A7
M_B_A3
M_B_A2
M_B_A6
M_B_A13
M_B_A0
M_B_A8
M_B_A9
M_B_A11
M_B_A5
M_B_A12
M_B_A14
M_B_A15
M_ZP
M_ZN
M_A_CS#38,9
M_A_CS#28,9
M_A_CS#08,9
M_A_CS#18,9
M_B_CS#28,9
M_B_CS#08,9
M_B_CS#18,9
M_B_CS#38,9
M_CKE28,9
M_CKE08,9
M_CKE18,9
M_CKE38,9
M_A_A[0..15]8,9
M_A_BS#28,9
M_A_BS#18,9
M_A_BS#08,9
M_A_RAS#8,9
M_A_CAS#8,9
M_A_WE#8,9
M_CLKOUT1 8
M_CLKOUT1# 8
M_CLKOUT0 8
M_CLKOUT0# 8
M_CLKOUT3 8
M_CLKOUT3# 8
M_CLKOUT4 8
M_CLKOUT4# 8
M_ODT1 8,9
M_ODT0 8,9
M_ODT3 8,9
M_ODT2 8,9
M_B_A[0..15] 8,9
M_B_BS#2 8,9
M_B_BS#1 8,9
M_B_BS#0 8,9
M_B_RAS# 8,9
M_B_CAS# 8,9
M_B_WE# 8,9
M_A_DQ[0..63] 8
M_A_DM[0..7] 8
M_A_DQS[0..7] 8
M_A_DQS#[0..7] 8
M_B_DQ[0..63]8
M_B_DM[0..7]8
M_B_DQS[0..7]8
M_B_DQS#[0..7]8
+SMDDR_VTERM
+1.8VSUS
+SMDDR_VTERM
+1.8VSUS
Size Document Number Rev
Date: Sheet
of
TURION 64 DDRII I/F
3C
543Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
TURION 64 DDRII I/F
3C
543Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
TURION 64 DDRII I/F
3C
543Tuesday, January 22, 2008
Processor DDR2 Memory Interface
Athlon 64 S1
Processor Socket
To SODIMM socket A (near)To SODIMM socket B (Far)
PLACE THEM CLOSE TO
CPU WITHIN 1"
Athlon 64 S1
Processor Socket
5
C505
1000p/50V_4
C505
1000p/50V_4
C441
180p/50V_4
C441
180p/50V_4
C498
180p/50V_4
C498
180p/50V_4
MB_DM7
AD12
MB_DM6
AC16
MB_DM5
AE22
MB_DM4
AB26
MB_DM3
E25
MB_DM2
A22
MB_DM1
B16
MB_DM0
A12
MA_DM7
Y13
MA_DM6
AB16
MA_DM5
Y19
MA_DM4
AC24
MA_DM3
F24
MA_DM2
E19
MA_DM1
C15
MA_DM0
E12
MA_DATA0
G12
MA_DATA1
F12
MA_DATA2
H14
MA_DATA3
G14
MA_DATA4
H11
MA_DATA5
H12
MA_DATA6
C13
MA_DATA7
E13
MA_DATA8
H15
MA_DATA9
E15
MA_DATA10
E17
MA_DATA11
H17
MA_DATA12
E14
MA_DATA13
F14
MA_DATA14
C17
MA_DATA15
G17
MA_DATA16
G18
MA_DATA17
C19
MA_DATA18
D22
MA_DATA19
E20
MA_DATA20
E18
MA_DATA21
F18
MA_DATA22
B22
MA_DATA23
C23
MA_DATA24
F20
MA_DATA25
F22
MA_DATA26
H24
MA_DATA27
J19
MA_DATA28
E21
MA_DATA29
E22
MA_DATA30
H20
MA_DATA31
H22
MA_DATA32
Y24
MA_DATA33
AB24
MA_DATA34
AB22
MA_DATA35
AA21
MA_DATA36
W22
MA_DATA37
W21
MA_DATA38
Y22
MA_DATA39
AA22
MA_DATA40
Y20
MA_DATA41
AA20
MA_DATA42
AA18
MA_DATA43
AB18
MA_DATA44
AB21
MA_DATA45
AD21
MA_DATA46
AD19
MA_DATA47
Y18
MA_DATA48
AD17
MA_DATA49
W16
MA_DATA50
W14
MA_DATA51
Y14
MA_DATA52
Y17
MA_DATA53
AB17
MA_DATA54
AB15
MA_DATA55
AD15
MA_DATA56
AB13
MA_DATA57
AD13
MA_DATA58
Y12
MA_DATA59
W11
MA_DATA60
AB14
MA_DATA61
AA14
MA_DATA62
AB12
MA_DATA63
AA12
MA_DQS_L0
H13
MA_DQS_L1
G15
MA_DQS_L2
C21
MA_DQS_L3
G21
MA_DQS_L4
AC23
MA_DQS_L5
AB20
MA_DQS_L6
W15
MA_DQS_L7
W13
MA_DQS_H0
G13
MA_DQS_H1
G16
MA_DQS_H2
C22
MA_DQS_H3
G22
MA_DQS_H4
AD23
MA_DQS_H5
AB19
MA_DQS_H6
Y15
MA_DQS_H7
W12
MB_DATA0
C11
MB_DATA1
A11
MB_DATA2
A14
MB_DATA3
B14
MB_DATA4
G11
MB_DATA5
E11
MB_DATA6
D12
MB_DATA7
A13
MB_DATA8
A15
MB_DATA9
A16
MB_DATA10
A19
MB_DATA11
A20
MB_DATA12
C14
MB_DATA13
D14
MB_DATA14
C18
MB_DATA15
D18
MB_DATA16
D20
MB_DATA17
A21
MB_DATA18
D24
MB_DATA19
C25
MB_DATA20
B20
MB_DATA21
C20
MB_DATA22
B24
MB_DATA23
C24
MB_DATA24
E23
MB_DATA25
E24
MB_DATA26
G25
MB_DATA27
G26
MB_DATA28
C26
MB_DATA29
D26
MB_DATA30
G23
MB_DATA31
G24
MB_DATA32
AA24
MB_DATA33
AA23
MB_DATA34
AD24
MB_DATA35
AE24
MB_DATA36
AA26
MB_DATA37
AA25
MB_DATA38
AD26
MB_DATA39
AE25
MB_DATA40
AC22
MB_DATA41
AD22
MB_DATA42
AE20
MB_DATA43
AF20
MB_DATA44
AF24
MB_DATA45
AF23
MB_DATA46
AC20
MB_DATA47
AD20
MB_DATA48
AD18
MB_DATA49
AE18
MB_DATA50
AC14
MB_DATA51
AD14
MB_DATA52
AF19
MB_DATA53
AC18
MB_DATA54
AF16
MB_DATA55
AF15
MB_DATA56
AF13
MB_DATA57
AC12
MB_DATA58
AB11
MB_DATA59
Y11
MB_DATA60
AE14
MB_DATA61
AF14
MB_DATA62
AF11
MB_DATA63
AD11
MB_DQS_L0
B12
MB_DQS_L1
C16
MB_DQS_L2
A23
MB_DQS_L3
E26
MB_DQS_L4
AC26
MB_DQS_L5
AF22
MB_DQS_L6
AD16
MB_DQS_L7
AE12
MB_DQS_H0
C12
MB_DQS_H1
D16
MB_DQS_H2
A24
MB_DQS_H3
F26
MB_DQS_H4
AC25
MB_DQS_H5
AF21
MB_DQS_H6
AE16
MB_DQS_H7
AF12
DDR: DATA
U25C
DDR: DATA
U25C
C443
1000p/50V_4
C443
1000p/50V_4
C525
0.22u/10V_4
C525
0.22u/10V_4
T25T25
C116
0.1u/10V_4
C116
0.1u/10V_4
C446
4.7u/6.3V_6
C446
4.7u/6.3V_6
C440
0.22u/10V_4
C440
0.22u/10V_4
1 2
R444
39.2/F_4
R444
39.2/F_4
C508
1000p/50V_4
C508
1000p/50V_4
C497
0.22u/10V_4
C497
0.22u/10V_4
VTT1
D10
VTT2
C10
VTT3
B10
VTT4
AD10
VTT6
AC10
VTT7
AB10
VTT8
AA10
VTT9
A10
MEMVREF
W17
VTT_SENSE
Y10
MEMZN
AE10
MEMZP
AF10
MA0_CS_L3
V19
MA0_CS_L2
J22
MA0_CS_L1
V22
MA0_CS_L0
T19
MB_CKE1
H26
MB_CKE0
J23
MA_CKE1
J20
MA_CKE0
J21
MA_ADD13
V24
MA_ADD12
K24
MA_ADD11
L20
MA_ADD10
R19
MA_ADD9
L19
MA_ADD8
L22
MA_ADD7
L21
MA_ADD6
M19
MA_ADD5
M20
MA_ADD4
M24
MA_ADD3
M22
MA_ADD2
N22
MA_ADD1
N21
MA_ADD0
R21
MA_BANK1
R20
MA_BANK0
T22
MA_RAS_L
T20
MA_CAS_L
U20
MA_WE_L
U21
MB_RAS_L
U24
MB_CAS_L
V26
MB_WE_L
U22
MB_BANK1
T26
MB_BANK0
U26
MB_ADD13
W25
MB_ADD12
L23
MB_ADD11
L25
MB_ADD10
U25
MB_ADD9
L24
MB_ADD8
M26
MB_ADD7
L26
MB_ADD6
N23
MB_ADD5
N24
MB_ADD4
N25
MB_ADD3
N26
MB_ADD2
P24
MB_ADD1
P26
MB_ADD0
T24
MA0_CLK_H2
Y16
MA0_CLK_L2
AA16
MA0_CLK_H1
E16
MA0_CLK_L1
F16
MB0_CLK_H2
AF18
MB0_CLK_L2
AF17
MB0_CLK_H1
A17
MB0_CLK_L1
A18
MB0_CS_L3
Y26
MB0_CS_L2
J24
MB0_CS_L1
W24
MB0_CS_L0
U23
MA0_ODT0
U19
MA0_ODT1
V20
MA_BANK2
K22
MA_ADD15
K19
MA_ADD14
K20
MB0_ODT0
W26
MB0_ODT1
W23
MB_BANK2
K26
MB_ADD14
J26
MB_ADD15
J25
VTT5
W10
U25B
DDR II: CMD/CTRL/CLK
U25B
DDR II: CMD/CTRL/CLK
C444
4.7u/6.3V_6
C444
4.7u/6.3V_6
1 2
R443
39.2/F_4
R443
39.2/F_4
C439
180p/50V_4
C439
180p/50V_4
R94
2K/F_4
R94
2K/F_4
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
C112
1000p/50V_4
C112
1000p/50V_4
C496
1000p/50V_4
C496
1000p/50V_4
C516
0.22u/10V_4
C516
0.22u/10V_4
R96
2K/F_4
R96
2K/F_4
C445
4.7u/6.3V_6
C445
4.7u/6.3V_6
C500
4.7u/6.3V_6
C500
4.7u/6.3V_6
C442
180p/50V_4
C442
180p/50V_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_VDDIO_SUS_FB_H
CPU_HTREF1
CPU_HTREF0
CPU_RSVD_VIDSTRB0
CPU_SID_R
CPU_SIC_R
CPU_TEST14_BP0
CPU_TEST18_PLLTEST1
CPU_MA_RESET#
CPU_CLKIN_SC_N
CPU_TEST29_L_FBCLKOUT_N
CPU_TEST27_SINGLECHAIN
CPU_TEST21_SCANEN
CPU_TRST#
CPU_CLKIN_SC_P
CPU_ALL_PWROK
H_THERMDA
CPU_LDTSTOP#
CPU_HT_RESET#
CPU_VDDIO_SUS_FB_L
CPU_TEST12_SCANSHIFTENB
CPU_TEST17_BP3CPU_TEST19_PLLTEST0
CPU_TEST26_BURNIN#
CPU_TEST26_BURNIN#
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST20_SCANCLK2
CPU_TDI
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST3_GATE0
CPU_TEST24_SCANCLK1
CPU_DBRDY
CPU_TEST07_ANALOG_T
CPU_MB_RESET#
CPU_TEST16_BP2
CPU_TEST27_SINGLECHAIN
CPU_TEST10_ANALOGOUT
H_PROCHOT#
CPU_PRESENT#
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST28_H_PLLCHRZ_P
CPU_LDTSTOP#
CPU_TDO
CPU_TEST2_DRAIN0
CPU_TEST23_TSTUPD
CPU_TMS
CPU_TEST6_DIECRACKMON
CPU_RSVD_VIDSTRB1
CPU_TEST15_BP1
CPU_RSVD_VDDNB_FB_N
CPU_RSVD_CORE_TYPE
CPU_RSVD_VDDNB_FB_P
H_THERMTRIP#
CPU_TEST08_DIG_T
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_TEST19_PLLTEST0
CPU_TEST28_L_PLLCHRZ_N
CPU_RSVD_MA0_CLK0_P
CPU_RSVD_MB0_CLK3_N
CPU_RSVD_MA0_CLK3_N
CPU_RSVD_MA0_CLK0_N
CPU_RSVD_MB0_CLK3_P
CPU_RSVD_MB0_CLK0_P
CPU_RSVD_MB0_CLK0_N
CPU_RSVD_MA0_CLK3_P
CPU_DBREQ#
CPU_TEST18_PLLTEST1
CPU_TEST20_SCANCLK2
CPU_TEST15_BP1
CPU_TEST21_SCANEN
CPU_TEST24_SCANCLK1
CPU_PRESENT#
CPU_TEST14_BP0
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTENB
CPU_TEST22_SCANSHIFTEN
CPU_TCK
H_THERMDC
CPU_ALL_PWROK
CPU_SIC_R
CPU_SID_R
H_PROCHOT#
VDDA_RUN
CPU to HDT RESET#
CPU_DBREQ#
CPU_TCK
CPU_DBRDY
CPU_TDO
CPU_TRST#
CPU_TDI
CPU_TMS
THERM_ALERT#_R
CPUFAN#_ON_R
LM86VCC
H_THERMDA
THER_SHD#
H_THERMDC
TH_FAN_POWER
CPU to HDT RESET#CPU_HT_RESET#
THER_SHD#
THER_SHD#
H_THERMTRIP#
TH_FAN_POWER_R
CPU_HT_RESET#
CPU_SIC14
CPUCLKP3
CPUCLKN3
CPU_PWRGD14
LDT_STOP#12,14
LDT_RST#14
CPU_SID14
COREFB+V34
COREFB-34 PWR_PSI# 34
H_VID0 34
H_VID1 34
H_VID2 34
H_VID3 34
H_VID4 34
H_VID5 34
THERM_ALERT#15
2ND_MBCLK29
FANSIG29
VFAN29
2ND_MBDATA29
SYSFANON#21
AMD_PROCHOT 14,29
SYS_SHDN# 33
TALERT# 16
SYS_SHDN# 33
SB_THERMTRIP# 15
CPU_COREPG29,34,35,37
VLDT_RUN
+1.8VSUS
+2.5V
+1.8VSUS
+1.8VSUS+1.8VSUS
+1.8VSUS+1.8VSUS
+3V
+1.8VSUS
+3V +5V
+3V
+3V
+3V
+3V
+3V
+5V
+3V
+3V
+1.8VSUS
+3V
+3V
+1.8VSUS
Size Document Number Rev
Date: Sheet
of
TURION 64 CTRL & DEBUG
3C
643Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
TURION 64 CTRL & DEBUG
3C
643Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
TURION 64 CTRL & DEBUG
3C
643Tuesday, January 22, 2008
PSI_L is a Power Status Indicator signal. This signal is asserted
when the processor is in a low powerstate. PSI_L should be
connected to the power supply controller, if the controller
supports “skipmode, or diode emulation mode”. PSI_L is asserted by
the processor during the C3 and S1 states.
place them to CPU within 1"
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
PLACE IT CLOSE TO CPU WITHIN 1"
AMD NPT S1 SOCKET
Processor Socket
ATHLON Control and Debug
If AMD SI is not used, the SID pin can be left unconnected and SIC
should have a 300- (±5%) pulldown to VSS.
6
A:(8/14) change net name from VID* to H_VID*
(Follow power net name)
IF no use which Net
need pull-up or down
HDT CONNECTOR
NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY.
A:(8/16) Add HDT CONN for CPU debug
FANPWR = 1.6*VSET
G995/Pin1- internal pull high (+5V)
<check list>
Layout Note:Routing 10:10 mils and away
from noise source with ground gard
ADDRESS: 98H
CPU FAN
CPU Thermal monitor
A:(8/18) Add 2.2uF for G995 failure rate issue
A:(8/20) Add SYSFANON# (come from MXM)
A:(8/20) Follow ZC3:
Add THERM_ALERT# to SB600 NC6 pin(ball T4)
A:(8/21) change CPU Thermal Sensor SM Bus from 1st to 2nd
A:(8/22) change net name from PSI_L to PWR_PSI#
A:(8/24) change from 10k to 680ohm
Follow AMD check list Rev1.09
A:(8/24) change from +1.8VSUS to CPU_ALL_PWROK
Follow AMD check list Rev1.09
A:(8/29) follow EMI suggestion, reserve 0603 footprint
(0903) add level shift to control SYS_SHDN#
(0903) change net name CPUFAN#_
ON to THER_SHD#
(0903) add res8.2K and PH 3V
A:(9/7) Reserve 100uF/6.3V in VDDA supply.Default don't stuff.
A:(9/11) Remove HDT CONN and add test point for CPU debug
A:(9/12) don't use NXP MMBT3904(BA039040039) in BL5A prject.It will cause leakage issue.
change to BA039040055
B:(10/26) For floating issue,DEL C437, Add 100ohm (R687) to GND
B:(10/30) change Thermal sensor from MAX6657 to GMT G781 for Cost down
RAMP:(1/15) ADD D29,D35 (Varistor) for CN19 Pin1/3 (ESD issue)
RAMP:(1/15) ESD issue:
Change Location name from R468 to L75
Change PN from CS00002JB38 to CX8LM25003
Change footprint from RC0402 to RC0603
RAMP:(1/15) Add C573,C574 for LDT_RST#, CPU_HT_RESET# (ESD issue)
RAMP:(1/21) Change back L75 from baed to 0 ohm, no stuff C573,C574
R437 *0_4R437 *0_4
R408
10K_4
R408
10K_4
T47T47
C190
0.22u/10V_4
C190
0.22u/10V_4
2
13
Q55 MMBT3904Q55 MMBT3904
T138T138
21
D35
VPORT
D35
VPORT
1
2
3
4
5
CN19
PTI_CWY030-B0G1Z
CN19
PTI_CWY030-B0G1Z
T7T7
R439 300_4R439 300_4
T4T4
R422 *0_6R422 *0_6
R424
4.7K_4
R424
4.7K_4
T131T131
R441 *300_4R441 *300_4
C494
*100u/6.3V_3528
C494
*100u/6.3V_3528
T38T38
R58 10K_4R58 10K_4
D31
*BAS316
D31
*BAS316
3
2
1
Q13
RHU002N06
Q13
RHU002N06
R48
300_4
R48
300_4
R469
680_4
R469
680_4
R49 300_4R49 300_4
T128T128
C50
.1U_4
C50
.1U_4
T50T50
L55 30ohm_4AL55 30ohm_4A
T9T9
T14T14
R50 *300_4R50 *300_4
R484
300_4
R484
300_4
R490
680_4
R490
680_4
R434 *300_4R434 *300_4
R482 300_4R482 300_4
T26T26
R432 *300_4R432 *300_4
2
1 3
Q54
MMBT3904
Q54
MMBT3904
T5T5
T40T40
R95 44.2F_4R95 44.2F_4
R467
*HDT@F2.2K_4
R467
*HDT@F2.2K_4
T34T34
3
2
1
Q68
*HDT@FDV301N
Q68
*HDT@FDV301N
R433 *300_4R433 *300_4
R466 0_4R466 0_4
3
2
1
Q18
RHU002N06
Q18
RHU002N06
R500
*HDT@2K_4
R500
*HDT@2K_4
R54 *HDT@220_4R54 *HDT@220_4
T139T139
C34
2.2u/6.3V_6
C34
2.2u/6.3V_6
R687 100K_6R687 100K_6
R27
*10K_4
R27
*10K_4
C492
4.7u/6.3V_6
C492
4.7u/6.3V_6
T48T48
3
2
1
Q19*2N7002E-LF Q19*2N7002E-LF
R471 300_4R471 300_4
T6T6
C503 3900P/50V_4C503 3900P/50V_4
T53T53
C573
*100p/50V_4
C573
*100p/50V_4
C33
10U_8
C33
10U_8
R462 80.6F_4R462 80.6F_4
R470 *300_4R470 *300_4
T52T52
R25 0_6R25 0_6
R47 1K/F_4R47 1K/F_4
R446 *0_4R446 *0_4
T51T51
R442 *300_4R442 *300_4
R57
*10K_4
R57
*10K_4
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
R480
680_4
R480
680_4
T55T55
C502 3900P/50V_4C502 3900P/50V_4
R481 *300_4R481 *300_4
R53 *HDT@220_4R53 *HDT@220_4
T135T135
R464
169/F_6
R464
169/F_6
T8T8
3
2
1
Q52
FDV301N
Q52
FDV301N
R436
*10K_4
R436
*10K_4
T33T33
R46
200_6
R46
200_6
R431 *300_4R431 *300_4
R479 510/F_4R479 510/F_4
/FON
1
VIN
2
VO
3
VSET
4
GND
5
GND
6
GND
7
GND
8
U5
G995
U5
G995
12
C191
3300p/50V_4
C191
3300p/50V_4
T31T31
T133T133
R51
10K_4
R51
10K_4
T28T28
R440 *HDT@220_4R440 *HDT@220_4
T136T136
3
2
1
Q11
ME2N7002D
Q11
ME2N7002D
T49T49
T36T36
C574
*100p/50V_4
C574
*100p/50V_4
R430
10K_4
R430
10K_4
R55 *HDT@220_4R55 *HDT@220_4
C434
*.01U_4
C434
*.01U_4
R429
10K_4
R429
10K_4
R489 0_4R489 0_4
T10T10
VDDA2
F8
VDDA1
F9
RESET_L
B7
PWROK
A7
LDTSTOP_L
F10
HT_REF1
P6
HT_REF0
R6
VDDIO_FB_H
W9
VDDIO_FB_L
Y9
CLKIN_H
A9
CLKIN_L
A8
DBRDY
G10
TMS
AA9
TCK
AC9
TRST_L
AD9
TDI
AF9
TDO
AE9
DBREQ_L
E10
VID4
C6
VID3
A6
VID2
A4
VID1
C5
VID0
B5
THERMTRIP_L
AF6
SIC
AF4
SID
AF5
VDD_FB_H
F6
VDD_FB_L
E6
VID5
A5
PROCHOT_L
AC7
PSI_L
A3
TEST2
AB6
TEST3
Y6
TEST4
W8
TEST5
W7
TEST6
AA6
TEST7
C3
TEST8
C4
TEST10
K8
TEST26
AE6
TEST27
AF8
TEST28_L
H8
TEST28_H
J7
TEST20
AF7
TEST21
AB8
TEST22
AE8
TEST23
AD7
TEST24
AE7
TEST12
AC8
TEST14
C7
TEST15
F7
TEST16
E7
TEST17
D7
TEST9
C2
TEST13
AA7
TEST18
H10
TEST19
G9
TEST25_L
E8
TEST25_H
E9
TEST29_H
C9
TEST29_L
C8
RSVD0
P20
RSVD1
P19
RSVD2
N20
RSVD3
N19
RSVD4
R26
RSVD5
R25
RSVD6
P22
RSVD7
R22
RSVD8
H16
RSVD9
B18
RSVD10
B3
RSVD11
C1
RSVD12
H6
RSVD13
G6
RSVD14
D5
RSVD15
R24
RSVD16
W18
RSVD17
R23
RSVD18
AA8
RSVD19
H18
RSVD20
H19
CPU_PRESENT_L
AC6
MISC
U25D
MISC
U25D
T134T134
R435
330_4
R435
330_4
R426 *0_4R426 *0_4
R491 510/F_4R491 510/F_4
T13T13
C51
2200P/50V_4
C51
2200P/50V_4
T140T140
R485 *HDT@220_4R485 *HDT@220_4
C32
.01U_4
C32
.01U_4
T141T141
R26
*0_4
R26
*0_4
T54T54
R98 44.2F_4R98 44.2F_4
T46T46
R445
300_4
R445
300_4
2
1 3
Q53
MMBT3904
Q53
MMBT3904
FD4
*HDT@BAS316
FD4
*HDT@BAS316
T56T56
21
D29
VPORT
D29
VPORT
R438300_4 R438300_4
R56
10K_4
R56
10K_4
R65
*8.2K_4
R65
*8.2K_4
T132T132
VCC
1
DXP
2
DXN
3
GND
5
SCLK
8
SDA
7
ALERT#
6
OVERT#
4
U6
GMT G781
U6
GMT G781
L75 0_6L75 0_6
T129T129
T45T45
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC_CORE
VCC_CORE
VCC_CORE VCC_CORE
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
Size Document Number Rev
Date: Sheet
of
TURION 64 PWR & GND
3C
743Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
TURION 64 PWR & GND
3C
743Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
TURION 64 PWR & GND
3C
743Tuesday, January 22, 2008
uPGA638
Top View
BOTTOMSIDE DECOUPLING
A1
AF1
A26
Athlon 64 S1g1
PROCESSOR POWER AND GROUND
Athlon 64 S1
Processor Socket
Athlon 64 S1
Processor Socket
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
7
PP 0103
C133
10u/6.3V_6
C133
10u/6.3V_6
C119
180p/50V_4
C119
180p/50V_4
C124
10u/6.3V_6
C124
10u/6.3V_6
C154
10u/6.3V_6
C154
10u/6.3V_6
C140
10u/6.3V_6
C140
10u/6.3V_6
C146
0.22u/10V_4
C146
0.22u/10V_4
C108
4.7u/6.3V_6
C108
4.7u/6.3V_6
C166
10u/10V_8
C166
10u/10V_8
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
C130
10u/10V_8
C130
10u/10V_8
C120
0.01u/25V_4
C120
0.01u/25V_4
VSS1
AA4
VSS2
AA11
VSS3
AA13
VSS4
AA15
VSS5
AA17
VSS6
AA19
VSS7
AB2
VSS8
AB7
VSS9
AB9
VSS10
AB23
VSS11
AB25
VSS12
AC11
VSS13
AC13
VSS14
AC15
VSS15
AC17
VSS16
AC19
VSS17
AC21
VSS18
AD6
VSS19
AD8
VSS20
AD25
VSS21
AE11
VSS22
AE13
VSS23
AE15
VSS24
AE17
VSS25
AE19
VSS26
AE21
VSS27
AE23
VSS28
B4
VSS29
B6
VSS30
B8
VSS31
B9
VSS32
B11
VSS33
B13
VSS34
B15
VSS35
B17
VSS36
B19
VSS37
B21
VSS38
B23
VSS39
B25
VSS40
D6
VSS41
D8
VSS42
D9
VSS43
D11
VSS44
D13
VSS45
D15
VSS46
D17
VSS47
D19
VSS48
D21
VSS49
D23
VSS50
D25
VSS51
E4
VSS52
F2
VSS53
F11
VSS54
F13
VSS55
F15
VSS56
F17
VSS57
F19
VSS58
F21
VSS59
F23
VSS60
F25
VSS61
H7
VSS62
H9
VSS63
H21
VSS64
H23
VSS65
J4
VSS66
J6
VSS67
J8
VSS68
J10
VSS69
J12
VSS70
J14
VSS71
J16
VSS72
J18
VSS73
K2
VSS74
K7
VSS75
K9
VSS76
K11
VSS77
K13
VSS78
K15
VSS79
K17
VSS80
L6
VSS81
L8
VSS82
L10
VSS83
L12
VSS84
L14
VSS85
L16
VSS86
L18
VSS87
M7
VSS88
M9
VSS89
M11
VSS90
M17
VSS91
N4
VSS92
N8
VSS93
N10
VSS94
N16
VSS95
N18
VSS96
P2
VSS97
P7
VSS98
P9
VSS99
P11
VSS101
R8
VSS102
R10
VSS103
R16
VSS104
R18
VSS105
T7
VSS106
T9
VSS107
T11
VSS108
T13
VSS123
V13
VSS124
V15
VSS125
V17
VSS126
W6
VSS127
Y21
VSS128
Y23
VSS129
N6
VSS109
T15
VSS110
T17
VSS111
U4
VSS112
U6
VSS113
U8
VSS114
U10
VSS115
U12
VSS116
U14
VSS117
U16
VSS118
U18
VSS119
V2
VSS120
V7
VSS121
V9
VSS122
V11
VSS100
P17
U25F
GROUND
U25F
GROUND
C106
4.7u/6.3V_6
C106
4.7u/6.3V_6
C122
0.22u/10V_4
C122
0.22u/10V_4
C129
10u/6.3V_6
C129
10u/6.3V_6
C147
10u/6.3V_6
C147
10u/6.3V_6
C163
10u/6.3V_6
C163
10u/6.3V_6
C121
0.22u/10V_4
C121
0.22u/10V_4
C193
180p/50V_4
C193
180p/50V_4
C491
0.22u/10V_4
C491
0.22u/10V_4
C168
10u/6.3V_6
C168
10u/6.3V_6
C136
0.22u/10V_4
C136
0.22u/10V_4
C110
4.7u/6.3V_6
C110
4.7u/6.3V_6
C109
0.01u/25V_4
C109
0.01u/25V_4
C176
0.22u/10V_4
C176
0.22u/10V_4
C160
0.22u/10V_4
C160
0.22u/10V_4
C150
0.22u/10V_4
C150
0.22u/10V_4
VDD1
AC4
VDD2
AD2
VDD3
G4
VDD4
H2
VDD5
J9
VDD6
J11
VDD7
J13
VDD8
K6
VDD9
K10
VDD10
K12
VDD11
K14
VDD12
L4
VDD13
L7
VDD14
L9
VDD15
L11
VDD16
L13
VDD17
M2
VDD18
M6
VDD19
M8
VDD20
M10
VDD21
N7
VDD22
N9
VDD23
N11
VDD24
P8
VDD25
P10
VDD26
R4
VDD27
R7
VDD28
R9
VDD29
R11
VDD30
T2
VDD31
T6
VDD32
T8
VDD33
T10
VDD34
T12
VDD35
T14
VDD36
U7
VDD37
U9
VDD38
U11
VDD39
U13
VDD40
V6
VDD41
V8
VDD42
V10
VDD43
V12
VDD44
V14
VDD45
W4
VDD46
Y2
VDD47
J15
VDD48
K16
VDD49
L15
VDD50
M16
VDD51
P16
VDD52
T16
VDD53
U15
VDD54
V16
VDDIO1
H25
VDDIO2
J17
VDDIO3
K18
VDDIO4
K21
VDDIO5
K23
VDDIO6
K25
VDDIO7
L17
VDDIO8
M18
VDDIO9
M21
VDDIO10
M23
VDDIO11
M25
VDDIO12
N17
VDDIO13
P18
VDDIO14
P21
VDDIO15
P23
VDDIO16
P25
VDDIO17
R17
VDDIO18
T18
VDDIO19
T21
VDDIO20
T23
VDDIO21
T25
VDDIO22
U17
VDDIO23
V18
VDDIO24
V21
VDDIO25
V23
VDDIO26
V25
VDDIO27
Y25
U25E
POWER
U25E
POWER
C107
0.22u/10V_4
C107
0.22u/10V_4
C182
0.01u/25V_4
C182
0.01u/25V_4
C105
4.7u/6.3V_6
C105
4.7u/6.3V_6
C114
10u/6.3V_6
C114
10u/6.3V_6
C104
180p/50V_4
C104
180p/50V_4
C473
0.22u/10V_4
C473
0.22u/10V_4
C143
180p/50V_4
C143
180p/50V_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ40
M_A_DQ12
M_B_A1
M_B_A10
M_B_A4
M_B_A7
M_A_DQ41
M_B_A3
M_B_A2
M_B_A6
M_A_DQ8
M_B_A13
M_CLKOUT3
M_B_A0
M_B_A8
M_CLKOUT3#
M_CLKOUT4
M_B_A9
M_B_A11
M_CLKOUT4#
M_B_A5
M_B_A12
M_A_DQ42
MVREF_DIM
M_A_DQ10
M_A_A14
MVREF_DIM
M_A_DQ46
M_A_DQ14
M_A_DQS#0
M_A_DQS#3
M_A_DQS#2
M_A_DQS#1
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQ44
M_A_DQ13
M_A_DQ45
M_A_DQ9
M_CLKOUT0#
M_CLKOUT1
M_CLKOUT0
M_CLKOUT1#
M_A_DQ43
M_A_DQ15
M_A_DQ47
M_A_DQ11
M_A_DQ55
M_A_DQ17
M_A_DQ54
M_B_A14
M_A_DM0
M_A_DQ21
MVREF_DIM
M_A_DM4
M_A_DM1
M_A_DM3
M_A_DM2
M_A_DM7
M_A_DQS0
M_A_DM5
M_A_DM6
M_A_DQS3
M_A_DQS4
M_A_DQS2
M_A_DQS1
M_A_DQS5
M_A_DQS7
M_A_DQS6
M_A_DQ50
M_A_DQ22
M_A_DQ51
M_A_DQ19
M_A_DQ53
M_A_DQ20
M_A_DQ48
M_A_A15
M_B_DQ3
M_B_DQ1
M_B_DQ2
M_B_DQ4
M_B_DQ9
M_B_DQ6
M_B_DQ15
M_B_DQ0
M_B_DQ12
M_B_DQ7
M_B_DQ8
M_B_DQ5
M_B_DQ10
M_B_DQ20
M_B_DQ28
M_B_DQ11
M_B_DQ13
M_B_DQ14
M_B_DQ23
M_B_DQ19
M_B_DQ16
M_B_DQ17
M_A_DQ16
M_B_DQ22
M_B_DQ18
M_B_DQ24
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQ29
M_B_DQ21
M_B_DQ37
M_B_DQ33
M_B_DQ35
M_B_DQ31
M_B_DQ32
M_B_DQ36
M_B_DQ30
M_B_DQ39
M_B_DQ41
M_B_DQ44
M_B_DQ34
M_B_DQ47
M_B_DQ42
M_B_DQ40
M_B_DQ45
M_B_DQ46
M_B_DQ49
M_B_DQ43
M_B_DQ38
M_B_DQ52
M_B_DQ60
M_B_DQ48
M_B_DQ53
M_B_DQ54
M_B_DQ57
M_B_DQ63
M_B_DQ50
M_B_DQ55
M_B_DQ56
M_B_DQ51
M_B_DQ59
M_B_DQ58
M_B_DQ61
M_B_DQ62
M_A_DQ49
M_A_DQ18
M_A_DQ1
M_A_DQ52
M_A_DQ23
M_A_DQ56
M_A_DQ29
M_A_DQ60
M_A_DQ28
M_A_A0
M_A_DQ59
M_A_DQ31
M_A_A1
M_A_DQ58
M_A_A2
M_A_DQ26
M_B_A15
M_A_A3
M_A_DQ57
M_A_DQ25
M_A_A4
M_A_A5
M_A_DQ61
M_A_DQ24
M_B_DQS#0
M_B_DQS#6
M_B_DQS#3
M_B_DQS#1
M_B_DQS#4
M_B_DQS#5
M_B_DQS#2
M_B_DM5
M_B_DM6
M_B_DM0
M_B_DM7
M_B_DM4
M_B_DM3
M_B_DM2
M_B_DQS#7
M_A_A6
M_B_DQS5
M_B_DQS3
M_B_DQS4
M_B_DQS7
M_B_DQS2
M_B_DQS6
M_B_DQS0
M_B_DQS1
M_B_DM1
M_A_DQ63
M_A_DQ27
M_A_A7
M_A_A8
M_A_DQ62
M_A_DQ30
M_CLKOUT1#
M_A_A9
M_A_A10
M_A_DQ32
M_A_A11
M_A_DQ36
M_CLKOUT0
M_A_A12
M_A_DQ5
M_CLKOUT3#
M_CLKOUT4
M_CLKOUT3
M_CLKOUT4#
M_A_DQ37
M_A_DQ2
M_A_DQ35
M_A_DQ3
M_A_A13
M_A_DQ33
M_CLKOUT0#
M_A_DQ0
M_A_DQ38
M_A_DQ4
M_CLKOUT1
M_A_DQ34
M_A_DQ7
M_A_DQ39
M_A_DQ6
SA1_B
SA0_B
SA0_B
SA1_B
SA1_A
SA0_A
SA0_A
SA1_A
DDRCLK_SMB
DDRDAT_SMB
DDRCLK_SMB
DDRDAT_SMB DDRCLK_SMB
DDRDAT_SMB
M_A_A[0..15]5,9
M_A_BS#05,9
M_A_BS#15,9
M_A_BS#25,9
M_A_DM[0..7]5
M_A_DQS[0..7]5
M_A_DQS#[0..7]5
M_CLKOUT05
M_CLKOUT0#5
M_CLKOUT15
M_CLKOUT1#5
M_CKE05,9
M_CKE15,9
M_A_RAS#5,9
M_A_CAS#5,9
M_A_WE#5,9
M_A_CS#05,9
M_A_CS#15,9
M_ODT05,9
M_ODT15,9
M_B_A[0..15]5,9
M_B_BS#25,9
M_B_BS#05,9
M_B_BS#15,9
M_B_DM[0..7]5
M_B_DQS[0..7]5
M_B_DQS#[0..7]5
M_CLKOUT3#5
M_CLKOUT45
M_CLKOUT4#5
M_CLKOUT35
M_CKE25,9
M_CKE35,9
M_B_RAS#5,9
M_B_CAS#5,9
M_B_WE#5,9
M_B_CS#05,9
M_B_CS#15,9
M_ODT25,9
M_ODT35,9
M_A_DQ[0..63] 5
M_A_CS#2 5,9
M_A_CS#3 5,9
M_B_CS#2 5,9
M_B_CS#3 5,9
M_B_DQ[0..63] 5
SDATA03,15,25
SCLK03,15,25
+3V
+SMDDR_VREF
+1.8VSUS
+1.8VSUS
+1.8VSUS
+3V
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+3V
+3V
+3V
+3V
Size Document Number Rev
Date: Sheet
of
DDRII SODIMM X 2
3C
843Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet of
DDRII SODIMM X 2
3C
843Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet of
DDRII SODIMM X 2
3C
843Tuesday, January 22, 2008
REVERSE
1.This part should not contain any substances which are specified in SS-00259-1
2.Purchase ink, paint, wire rods and molding resins only from the business partners that Sony approves as Green Partners.
(H=10.1)
REVERSE
(H=5.6)
8
For EMI
SA_A : '0' ,'0'
SA_B : '0','1'
SPD Address:0xA0
SPD Address:0xA2
A:(8/20) Follow AMD schematic, change DIMM2 SPD Address from 0xA4 to 0xA2
Stuff No Stuff
No Stuff
A:(8/27)Add MOS for I2C
A:(8/29) follow EMI suggestion, reserve RC termination
RAMP:(1/15) Remove R84,R75,C78,C89 footprint
RAMP:(1/15) Change CN23 footprint from DDR-C-292564-200P to DDR-C-292564-200P-BD3A (SMT open issue)
RAMP:(1/15) Change CN24 footprint from DDR-C-1734071-200P to DDR-C-1734071-200P-BD3A (SMT open issue)
C259
0.1u/10V_4
C259
0.1u/10V_4
DQ0
5
DQ1
7
DQ2
17
DQ3
19
DQ4
4
DQ5
6
DQ6
14
DQ7
16
DQ8
23
DQ9
25
DQ10
35
DQ11
37
DQ12
20
DQ13
22
DQ14
36
DQ15
38
DQ16
43
DQ17
45
DQ18
55
DQ19
57
DQ20
44
DQ21
46
DQ22
56
DQ23
58
DQ24
61
DQ25
63
DQ26
73
DQ27
75
DQ28
62
DQ29
64
DQ30
74
DQ31
76
DQ32
123
DQ33
125
DQ34
135
DQ35
137
DQ36
124
DQ37
126
DQ38
134
DQ39
136
DQ40
141
DQ41
143
DQ42
151
DQ43
153
DQ44
140
DQ45
142
DQ46
152
DQ47
154
DQ48
157
DQ49
159
DQ50
173
DQ51
175
DQ52
158
DQ53
160
DQ54
174
DQ55
176
DQ56
179
DQ57
181
DQ58
189
DQ59
191
DQ60
180
DQ61
182
DQ62
192
DQ63
194
NC1
50
NC2
69
NC3
83
NC4
120
NC/TEST
163
A0
102
A1
101
A2
100
A3
99
A4
98
A5
97
A6
94
A7
92
A8
93
A9
91
A10
105
A11
90
A12
89
BA0
107
BA1
106
DM0
10
DM1
26
DM2
52
DM3
67
DM4
130
DM5
147
DM6
170
DM7
185
DQS0
13
DQS1
31
DQS2
51
DQS3
70
DQS4
131
DQS5
148
DQS6
169
DQS7
188
CK0
30
CK0
32
CK1
164
CK1
166
CKE0
79
CKE1
80
VREF
1
RAS
108
CAS
113
WE
109
S0
110
S1
115
SA0
198
SA1
200
SDA
195
SCL
197
VDDspd
199
A13
116
BA2
85
VDD0
81
VDD1
82
VDD2
87
VDD3
88
VDD4
95
VDD5
96
VDD6
103
VDD8
111
VDD7
104
VDD9
112
VDD10
117
VDD11
118
VSS0
2
VSS1
3
VSS2
8
VSS3
9
VSS4
12
VSS5
15
VSS6
18
VSS7
21
VSS8
24
VSS9
27
VSS10
28
VSS11
33
VSS12
34
VSS13
39
VSS14
40
VSS15
41
VSS16
42
VSS34
133
VSS35
138
VSS36
139
VSS37
144
VSS38
145
VSS18
48
VSS19
53
VSS20
54
VSS48
172
VSS47
171
VSS46
168
VSS45
165
VSS44
162
VSS43
161
VSS42
156
VSS41
155
VSS40
150
VSS39
149
VSS33
132
VSS32
128
VSS31
127
VSS30
122
VSS29
121
VSS28
78
VSS27
77
VSS26
72
VSS25
71
VSS24
66
VSS23
65
VSS22
60
VSS21
59
A14
86
A15
84
DQS0
11
DQS1
29
DQS2
49
DQS3
68
DQS4
129
DQS5
146
DQS6
167
DQS7
186
ODT0
114
ODT1
119
VSS17
47
VSS56
196
VSS55
193
VSS54
190
VSS53
187
VSS52
184
VSS51
183
VSS49
177
VSS50
178
GND PAD0
201
GND PAD1
202
SO-DIMM
CN24
DDRII_SODIMM_R
SO-DIMM
CN24
DDRII_SODIMM_R
0.1u/10V_4C161 0.1u/10V_4C161
T137T137
0.1u/10V_4C199 0.1u/10V_4C199
0.1u/10V_4C181 0.1u/10V_4C181
R206
*1K/F_4
R206
*1K/F_4
10u/10V_8C102 10u/10V_8C102
R73 *4.7K_4R73 *4.7K_4
0.1u/10V_4C162 0.1u/10V_4C162
*0.1u/10V_4C248 *0.1u/10V_4C248
C231
1.5p/50V_4
C231
1.5p/50V_4
T57T57
R70 *0_4R70 *0_4
0.1u/10V_4C472 0.1u/10V_4C472
R80 *4.7K_4R80 *4.7K_4
0.1u/10V_4C466 0.1u/10V_4C466
R44 *0_4R44 *0_4
C449
1.5p/50V_4
C449
1.5p/50V_4
12
R71 0_4R71 0_4
R215
0_6
R215
0_6
1 2
C251
2.2u/10V_8
C251
2.2u/10V_8
1u/6.3V_4
C257
1u/6.3V_4
C257
0.1u/10V_4C223 0.1u/10V_4C223
12
R72 0_4R72 0_4
0.1u/10V_4C486 0.1u/10V_4C486
*10u_8C167 *10u_8C167
C72 0.1u/10V_4C72 0.1u/10V_4
0.1u/10V_4C180 0.1u/10V_4C180
*0.1u/10V_4C489 *0.1u/10V_4C489
T58T58
R74 *4.7K_4R74 *4.7K_4
C230
1.5p/50V_4
C230
1.5p/50V_4
0.1u/10V_4C465 0.1u/10V_4C465
C247
0.1u/10V_4
C247
0.1u/10V_4
T130T130
*10u/10V_8C216 *10u/10V_8C216
*0.1u/10V_4C261 *0.1u/10V_4C261
3
2
1
Q21
RHU002N06
Q21
RHU002N06
1 2
C246
2.2u/10V_8
C246
2.2u/10V_8
C83 0.1u/10V_4C83 0.1u/10V_4
0.1u/10V_4C198 0.1u/10V_4C198
0.1u/10V_4C212 0.1u/10V_4C212
*0.1u/10V_4C462 *0.1u/10V_4C462
3
2
1
Q20
RHU002N06
Q20
RHU002N06
12
R85
0_4
R85
0_4
T29T29
0.1u/10V_4C468 0.1u/10V_4C468
T59T59
0.1u/10V_4C213 0.1u/10V_4C213
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
C250 0.1u/10V_4C250 0.1u/10V_4
12
R83 *0_4R83 *0_4
R67
10K_4
R67
10K_4
R79 4.7K_4R79 4.7K_4
0.1u/10V_4C463 0.1u/10V_4C463
0.1u/10V_4C460 0.1u/10V_4C460
0.1u/10V_4C485 0.1u/10V_4C485
R66
10K_4
R66
10K_4
DQ0
5
DQ1
7
DQ2
17
DQ3
19
DQ4
4
DQ5
6
DQ6
14
DQ7
16
DQ8
23
DQ9
25
DQ10
35
DQ11
37
DQ12
20
DQ13
22
DQ14
36
DQ15
38
DQ16
43
DQ17
45
DQ18
55
DQ19
57
DQ20
44
DQ21
46
DQ22
56
DQ23
58
DQ24
61
DQ25
63
DQ26
73
DQ27
75
DQ28
62
DQ29
64
DQ30
74
DQ31
76
DQ32
123
DQ33
125
DQ34
135
DQ35
137
DQ36
124
DQ37
126
DQ38
134
DQ39
136
DQ40
141
DQ41
143
DQ42
151
DQ43
153
DQ44
140
DQ45
142
DQ46
152
DQ47
154
DQ48
157
DQ49
159
DQ50
173
DQ51
175
DQ52
158
DQ53
160
DQ54
174
DQ55
176
DQ56
179
DQ57
181
DQ58
189
DQ59
191
DQ60
180
DQ61
182
DQ62
192
DQ63
194
NC1
50
NC2
69
NC3
83
NC4
120
NC/TEST
163
A0
102
A1
101
A2
100
A3
99
A4
98
A5
97
A6
94
A7
92
A8
93
A9
91
A10
105
A11
90
A12
89
BA0
107
BA1
106
DM0
10
DM1
26
DM2
52
DM3
67
DM4
130
DM5
147
DM6
170
DM7
185
DQS0
13
DQS1
31
DQS2
51
DQS3
70
DQS4
131
DQS5
148
DQS6
169
DQS7
188
CK0
30
CK0
32
CK1
164
CK1
166
CKE0
79
CKE1
80
VREF
1
RAS
108
CAS
113
WE
109
S0
110
S1
115
SA0
198
SA1
200
SDA
195
SCL
197
VDDspd
199
A13
116
BA2
85
VDD0
81
VDD1
82
VDD2
87
VDD3
88
VDD4
95
VDD5
96
VDD6
103
VDD8
111
VDD7
104
VDD9
112
VDD10
117
VDD11
118
VSS0
2
VSS1
3
VSS2
8
VSS3
9
VSS4
12
VSS5
15
VSS6
18
VSS7
21
VSS8
24
VSS9
27
VSS10
28
VSS11
33
VSS12
34
VSS13
39
VSS14
40
VSS15
41
VSS16
42
VSS34
133
VSS35
138
VSS36
139
VSS37
144
VSS38
145
VSS18
48
VSS19
53
VSS20
54
VSS48
172
VSS47
171
VSS46
168
VSS45
165
VSS44
162
VSS43
161
VSS42
156
VSS41
155
VSS40
150
VSS39
149
VSS33
132
VSS32
128
VSS31
127
VSS30
122
VSS29
121
VSS28
78
VSS27
77
VSS26
72
VSS25
71
VSS24
66
VSS23
65
VSS22
60
VSS21
59
A14
86
A15
84
DQS0
11
DQS1
29
DQS2
49
DQS3
68
DQS4
129
DQS5
146
DQS6
167
DQS7
186
ODT0
114
ODT1
119
VSS17
47
VSS56
196
VSS55
193
VSS54
190
VSS53
187
VSS52
184
VSS51
183
VSS49
177
VSS50
178
GND PAD0
201
GND PAD1
202
SO-DIMM
CN23
DDRII_SODIMM_R
SO-DIMM
CN23
DDRII_SODIMM_R
0.1u/10V_4C224 0.1u/10V_4C224
C260 0.1u/10V_4C260 0.1u/10V_4
R207
*1K/F_4
R207
*1K/F_4
0.1u/10V_4C464 0.1u/10V_4C464
C448
1.5p/50V_4
C448
1.5p/50V_4
0.1u/10V_4C461 0.1u/10V_4C461
10u/10V_8C222 10u/10V_8C222
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_A14
M_A_A15
M_B_A14
M_B_A15
M_A_A10
M_A_A2
M_A_A0
M_A_A5
M_A_A3
M_A_A7
M_A_A12
M_A_A13
M_A_A9
M_A_A8
M_A_A4
M_A_A1
M_A_A6
M_A_A11
M_B_A7
M_B_A2
M_B_A11
M_B_A6
M_B_A8
M_B_A4
M_B_A10
M_B_A1
M_B_A3
M_B_A9
M_B_A5
M_B_A12
M_B_A13
M_B_A0
M_CKE05,8
M_CKE15,8
M_CKE25,8
M_CKE35,8
M_ODT05,8
M_ODT15,8
M_ODT25,8
M_ODT35,8
M_A_BS#05,8
M_A_BS#15,8
M_A_BS#25,8
M_A_WE#5,8
M_A_CAS#5,8
M_A_RAS#5,8
M_B_BS#05,8
M_B_BS#15,8
M_B_BS#25,8
M_B_WE#5,8
M_B_CAS#5,8
M_B_RAS#5,8
M_A_CS#05,8
M_A_CS#15,8
M_A_CS#25,8
M_A_CS#35,8
M_B_CS#05,8
M_B_CS#15,8
M_B_CS#25,8
M_B_CS#35,8
M_A_A[0..15]5,8
M_B_A[0..15]5,8
+SMDDR_VTERM
+SMDDR_VTERM
+1.8VSUS
+SMDDR_VTERM
Size Document Number Rev
Date: Sheet
of
DDRII TERMINATION
3C
943Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
DDRII TERMINATION
3C
943Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
DDRII TERMINATION
3C
943Tuesday, January 22, 2008
9
A:(8/27) Please put the CAP between +1.8VSUS & +SMDDR_VTERM
0.1u/10V_4C165 0.1u/10V_4C165
0.1u/10V_4C237 0.1u/10V_4C237
0.1u/10V_4C132 0.1u/10V_4C132
0.1u/10V_4C495 0.1u/10V_4C495
1 2
3 4
RP14 0404-47X2RP14 0404-47X2
1 2
3 4
RP22 0404-47X2RP22 0404-47X2
R133 47_4R133 47_4
0.1u/10V_4C515 0.1u/10V_4C515
R118 47_4R118 47_4
0.1u/10V_4C115 0.1u/10V_4C115
0.1u/10V_4C499 0.1u/10V_4C499
R106 47_4R106 47_4
R128 47_4R128 47_4
R159 47_4R159 47_4
1 2
3 4
RP11 0404-47X2RP11 0404-47X2
0.1u/10V_4C139 0.1u/10V_4C139
1 2
3 4
RP19 0404-47X2RP19 0404-47X2
0.1u/10V_4C169 0.1u/10V_4C169
R130 47_4R130 47_4
0.1u/10V_4C138 0.1u/10V_4C138
0.1u/10V_4C126 0.1u/10V_4C126
0.1u/10V_4C201 0.1u/10V_4C201
R127 47_4R127 47_4
R125 47_4R125 47_4
R114 47_4R114 47_4
R139 47_4R139 47_4
0.1u/10V_4C225 0.1u/10V_4C225
0.1u/10V_4C196 0.1u/10V_4C196
0.1u/10V_4C243 0.1u/10V_4C243
R166 47_4R166 47_4
R161 47_4R161 47_4
*0.1u/10V_4C229 *0.1u/10V_4C229
R115 47_4R115 47_4
0.1u/10V_4C195 0.1u/10V_4C195
*0.1u/10V_4C117 *0.1u/10V_4C117
0.1u/10V_4C490 0.1u/10V_4C490
0.1u/10V_4C137 0.1u/10V_4C137
1 2
3 4
RP21 0404-47X2RP21 0404-47X2
R101 47_4R101 47_4
1 2
3 4
RP17 0404-47X2RP17 0404-47X2
0.1u/10V_4C183 0.1u/10V_4C183
1 2
3 4
RP24 0404-47X2RP24 0404-47X2
R137 47_4R137 47_4
0.1u/10V_4C527 0.1u/10V_4C527
0.1u/10V_4C100 0.1u/10V_4C100
0.1u/10V_4C159 0.1u/10V_4C159
1 2
3 4
RP12 0404-47X2RP12 0404-47X2
1 2
3 4
RP18 0404-47X2RP18 0404-47X2
R167 47_4R167 47_4
1 2
3 4
RP20 0404-47X2RP20 0404-47X2
0.1u/10V_4C118 0.1u/10V_4C118
R163 47_4R163 47_4
R155 47_4R155 47_4
*0.1u/10V_4C103 *0.1u/10V_4C103
R126 47_4R126 47_4
R140 47_4R140 47_4
R129 47_4R129 47_4
R124 47_4R124 47_4
R112 47_4R112 47_4
*10u/10V_8C63 *10u/10V_8C63
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
R120 47_4R120 47_4
*0.1u/10V_4C236 *0.1u/10V_4C236
1 2
3 4
RP13 0404-47X2RP13 0404-47X2
1 2
3 4
RP15 0404-47X2RP15 0404-47X2
0.1u/10V_4C97 0.1u/10V_4C97
0.1u/10V_4C92 0.1u/10V_4C92
0.1u/10V_4C200 0.1u/10V_4C200
0.1u/10V_4C96 0.1u/10V_4C96
0.1u/10V_4C197 0.1u/10V_4C197
0.1u/10V_4C164 0.1u/10V_4C164
1 2
3 4
RP16 0404-47X2RP16 0404-47X2
R119 47_4R119 47_4
R134 47_4R134 47_4
0.1u/10V_4C99 0.1u/10V_4C99
R164 47_4R164 47_4
R113 47_4R113 47_4
R132 47_4R132 47_4
*10u/10V_8C59 *10u/10V_8C59
0.1u/10V_4C493 0.1u/10V_4C493
0.1u/10V_4C184 0.1u/10V_4C184
0.1u/10V_4C174 0.1u/10V_4C174
*0.1u/10V_4C507 *0.1u/10V_4C507
R121 47_4R121 47_4
R123 47_4R123 47_4
1 2
3 4
RP23 0404-47X2RP23 0404-47X2
0.1u/10V_4C194 0.1u/10V_4C194
0.1u/10V_4C170 0.1u/10V_4C170
0.1u/10V_4C158 0.1u/10V_4C158
R170 47_4R170 47_4
0.1u/10V_4C175 0.1u/10V_4C175
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HT_TXCALPHT_RXCALP
HT_RXCALN HT_TXCALN
HT_CADIN15_P 4
HT_CADIN15_N 4
HT_CADIN14_P 4
HT_CADIN14_N 4
HT_CADIN13_P 4
HT_CADIN13_N 4
HT_CADIN12_P 4
HT_CADIN12_N 4
HT_CADIN11_P 4
HT_CADIN11_N 4
HT_CADIN10_P 4
HT_CADIN10_N 4
HT_CADIN9_P 4
HT_CADIN9_N 4
HT_CADIN8_P 4
HT_CADIN8_N 4
HT_CADIN7_P 4
HT_CADIN7_N 4
HT_CADIN6_P 4
HT_CADIN6_N 4
HT_CADIN5_P 4
HT_CADIN5_N 4
HT_CADIN4_P 4
HT_CADIN4_N 4
HT_CADIN3_P 4
HT_CADIN3_N 4
HT_CADIN2_P 4
HT_CADIN2_N 4
HT_CADIN1_P 4
HT_CADIN1_N 4
HT_CADIN0_P 4
HT_CADIN0_N 4
HT_CLKIN1_P 4
HT_CLKIN1_N 4
HT_CLKIN0_P 4
HT_CLKIN0_N 4
HT_CTLIN0_P 4
HT_CTLIN0_N 4
HT_CADOUT15_P4
HT_CADOUT15_N4
HT_CADOUT14_P4
HT_CADOUT14_N4
HT_CADOUT13_P4
HT_CADOUT13_N4
HT_CADOUT12_P4
HT_CADOUT12_N4
HT_CADOUT11_P4
HT_CADOUT11_N4
HT_CADOUT10_P4
HT_CADOUT10_N4
HT_CADOUT9_P4
HT_CADOUT9_N4
HT_CADOUT8_P4
HT_CADOUT8_N4
HT_CADOUT7_P4
HT_CADOUT7_N4
HT_CADOUT6_P4
HT_CADOUT6_N4
HT_CADOUT5_P4
HT_CADOUT5_N4
HT_CADOUT4_P4
HT_CADOUT4_N4
HT_CADOUT3_P4
HT_CADOUT3_N4
HT_CADOUT2_P4
HT_CADOUT2_N4
HT_CADOUT1_P4
HT_CADOUT1_N4
HT_CADOUT0_P4
HT_CADOUT0_N4
HT_CLKOUT1_P4
HT_CLKOUT1_N4
HT_CLKOUT0_P4
HT_CLKOUT0_N4
HT_CTLOUT0_P4
HT_CTLOUT0_N4
VDDHT_PKG
Size Document Number Rev
Date: Sheet
of
RS690M HT LINK I/F
3C
10 43Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
RS690M HT LINK I/F
3C
10 43Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
RS690M HT LINK I/F
3C
10 43Tuesday, January 22, 2008
10
HT_TXCAD15P
P21
HT_TXCAD15N
P22
HT_TXCAD14P
P18
HT_TXCAD14N
P19
HT_TXCAD13P
M22
HT_TXCAD13N
M21
HT_TXCAD12P
M18
HT_TXCAD12N
M19
HT_TXCAD11P
L18
HT_TXCAD11N
L19
HT_TXCAD10P
G22
HT_TXCAD10N
G21
HT_TXCAD9P
J20
HT_TXCAD9N
J21
HT_TXCAD8P
F21
HT_TXCAD8N
F22
HT_TXCAD7P
N24
HT_TXCAD7N
N25
HT_TXCAD6P
L25
HT_TXCAD6N
M24
HT_TXCAD5P
K25
HT_TXCAD5N
K24
HT_TXCAD4P
J23
HT_TXCAD4N
K23
HT_TXCAD3P
G25
HT_TXCAD3N
H24
HT_TXCAD2P
F25
HT_TXCAD2N
F24
HT_TXCAD1P
E23
HT_TXCAD1N
F23
HT_TXCAD0P
E24
HT_TXCAD0N
E25
HT_TXCLK1P
L21
HT_TXCLK1N
L22
HT_TXCLK0P
J24
HT_TXCLK0N
J25
HT_TXCTLP
N23
HT_TXCTLN
P23
HT_TXCALP
C25
HT_TXCALN
D24
HT_RXCAD15P
R19
HT_RXCAD15N
R18
HT_RXCAD14P
R21
HT_RXCAD14N
R22
HT_RXCAD13P
U22
HT_RXCAD13N
U21
HT_RXCAD12P
U18
HT_RXCAD12N
U19
HT_RXCAD11P
W19
HT_RXCAD11N
W20
HT_RXCAD10P
AC21
HT_RXCAD10N
AB22
HT_RXCAD9P
AB20
HT_RXCAD9N
AA20
HT_RXCAD8P
AA19
HT_RXCAD8N
Y19
HT_RXCAD7P
T24
HT_RXCAD7N
R25
HT_RXCAD6P
U25
HT_RXCAD6N
U24
HT_RXCAD5P
V23
HT_RXCAD5N
U23
HT_RXCAD4P
V24
HT_RXCAD4N
V25
HT_RXCAD3P
AA25
HT_RXCAD3N
AA24
HT_RXCAD2P
AB23
HT_RXCAD2N
AA23
HT_RXCAD1P
AB24
HT_RXCAD1N
AB25
HT_RXCAD0P
AC24
HT_RXCAD0N
AC25
HT_RXCLK1P
W21
HT_RXCLK1N
W22
HT_RXCLK0P
Y24
HT_RXCLK0N
W25
HT_RXCTLP
P24
HT_RXCTLN
P25
HT_RXCALN
C24
HT_RXCALP
A24
PART 1 OF 5
HYPER TRANSPORT CPU I/F
U24A
RS690M
PART 1 OF 5
HYPER TRANSPORT CPU I/F
U24A
RS690M
R452 49.9_4R452 49.9_4
R451 100_4R451 100_4R454 49.9_4R454 49.9_4
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
A_TX3N_C
A_TX3P_C
A_TX2P_C
A_TX2N_C
A_CALRN
A_CALRP
GPP_TX2N_C
GPP_TX2P_C
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
GPP_TX0P_C
GPP_TX0N_C
GPP_TX1P_C
GPP_TX1N_C
GPP_TX3N_C
GPP_TX3P_C
PEG_RXN[15:0] PEG_TXN[15:0]
PEG_TXP[15:0]PEG_RXP[15:0]
C_PEG_TXP0
C_PEG_TXP2
C_PEG_TXP1
C_PEG_TXN0
C_PEG_TXN2
C_PEG_TXN1
C_PEG_TXP8
C_PEG_TXP10
C_PEG_TXP11
C_PEG_TXP9
C_PEG_TXP3
C_PEG_TXP4
C_PEG_TXP6
C_PEG_TXP7
C_PEG_TXP5
C_PEG_TXN3
C_PEG_TXN4
C_PEG_TXN6
C_PEG_TXN7
C_PEG_TXN5
C_PEG_TXN8
C_PEG_TXN10
C_PEG_TXN11
C_PEG_TXN9
C_PEG_TXP12
C_PEG_TXP14
C_PEG_TXP15
C_PEG_TXP13
C_PEG_TXN12
C_PEG_TXN14
C_PEG_TXN15
C_PEG_TXN13
C_PEG_TXN15
C_PEG_TXP14
C_PEG_TXP13
C_PEG_TXN13
C_PEG_TXP12
C_PEG_TXN12
C_PEG_TXP15
C_PEG_TXN14
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXN10
PEG_RXN11
PEG_RXN9
PEG_RXN2
PEG_RXN5
PEG_RXN6
PEG_RXN4
PEG_RXN1
PEG_RXN8
PEG_RXN12
PEG_RXN0
PEG_RXN7
PEG_RXN3
PEG_RXP7
PEG_RXP13
PEG_RXP10
PEG_RXP1
PEG_RXP4
PEG_RXP9
PEG_RXP12
PEG_RXP14
PEG_RXP0
PEG_RXP3
PEG_RXP6
PEG_RXP2
PEG_RXP11
PEG_RXP15
PEG_RXP5
PEG_RXP8
PEG_TXN13
PEG_TXN15
PEG_TXP2
PEG_TXN0
PEG_TXN4
PEG_TXP6
PEG_TXN6
PEG_TXP11
PEG_TXP13
PEG_TXP8
PEG_TXP0
PEG_TXN10
PEG_TXP15
PEG_TXP7
PEG_TXN3
PEG_TXN12
PEG_TXP14
PEG_TXN11
PEG_TXP12
PEG_TXN2
PEG_TXP3
PEG_TXP9
PEG_TXN9
PEG_TXN14
PEG_TXP4
PEG_TXP1
PEG_TXN1
PEG_TXN8
PEG_TXN5
PEG_TXP5
PEG_TXN7
PEG_TXP10
PEG_RXN[15:0]21
PEG_RXP[15:0]21
PEG_TXN[15:0] 21
PEG_TXP[15:0] 21
IV_HDMITX2P 19
IV_HDMITX2N 19
IV_HDMITX1N 19
IV_HDMITX1P 19
IV_HDMITX0P 19
IV_HDMITX0N 19
IV_HDMICLK+ 19
IV_HDMICLK- 19
GPP_RX3P_NEWCARD25
GPP_RX3N_NEWCARD25
A_RX0P14
A_RX0N14
A_RX1P14
A_RX1N14
A_RX2P14
A_RX2N14
A_RX3P14
A_RX3N14
GPP_TX3P_NEWCARD 25
GPP_TX3N_NEWCARD 25
A_TX0P 14
A_TX0N 14
A_TX1P 14
A_TX1N 14
A_TX2P 14
A_TX2N 14
A_TX3N 14
A_TX3P 14
GPP_TX1P_WLAN 25
GPP_TX1N_WLAN 25
GPP_TX2P_MINICARD 25
GPP_TX2N_MINICARD 25
GPP_TX0P_LAN 24
GPP_TX0N_LAN 24
GPP_RX1P_WLAN25
GPP_RX1N_WLAN25
GPP_RX2P_MINICARD25
GPP_RX2N_MINICARD25
GPP_RX0P_LAN24
GPP_RX0N_LAN24
VDDA12_PKG2
Size Document Number Rev
Date: Sheet
of
RS690M PCIE LINK I/F
3C
11 43Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
RS690M PCIE LINK I/F
3C
11 43Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
RS690M PCIE LINK I/F
3C
11 43Tuesday, January 22, 2008
Place these caps close to connector
11
Swap net (0604)
To HDMI CONN
Swap net (0604)
Close to North Bridge
A:(8/24) Swap net for layout routing
A:(8/28) change all caps from X5R to X7R in this page
Follow AMD check list
BTO
RAMP:(1/15) Add "IV@" for C454,C459
C547 EV@0.1u/10V_4C547 EV@0.1u/10V_4
C538 EV@0.1u/10V_4C538 EV@0.1u/10V_4
C549 EV@0.1u/10V_4C549 EV@0.1u/10V_4
C663 NEW@0.1u/10V_4C663 NEW@0.1u/10V_4
C242 IV@0.1u/10V_4C242 IV@0.1u/10V_4
C530 EV@0.1u/10V_4C530 EV@0.1u/10V_4
C450 0.1u/10V_4C450 0.1u/10V_4
C662 0.1u/10V_4C662 0.1u/10V_4
C518 EV@0.1u/10V_4C518 EV@0.1u/10V_4
C522 EV@0.1u/10V_4C522 EV@0.1u/10V_4
C536 EV@0.1u/10V_4C536 EV@0.1u/10V_4
C535 EV@0.1u/10V_4C535 EV@0.1u/10V_4
C234 IV@0.1u/10V_4C234 IV@0.1u/10V_4
C537 EV@0.1u/10V_4C537 EV@0.1u/10V_4
C455 0.1u/10V_4C455 0.1u/10V_4
C45 0.1u/10V_4C45 0.1u/10V_4
C528 EV@0.1u/10V_4C528 EV@0.1u/10V_4
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
C520 EV@0.1u/10V_4C520 EV@0.1u/10V_4
C48 0.1u/10V_4C48 0.1u/10V_4
C546 EV@0.1u/10V_4C546 EV@0.1u/10V_4
C519 EV@0.1u/10V_4C519 EV@0.1u/10V_4
C235 IV@0.1u/10V_4C235 IV@0.1u/10V_4
C544 EV@0.1u/10V_4C544 EV@0.1u/10V_4
C533 EV@0.1u/10V_4C533 EV@0.1u/10V_4
GFX_TX0P
J1
GFX_TX0N
H2
GFX_TX1P
K2
GFX_TX1N
K1
GFX_TX2P
K3
GFX_TX2N
L3
GFX_TX3P
L1
GFX_TX3N
L2
GFX_TX4P
N2
GFX_TX4N
N1
GFX_TX5P
P2
GFX_TX5N
P1
GFX_TX6P
P3
GFX_TX6N
R3
GFX_TX7P
R1
GFX_TX7N
R2
GFX_TX8P
T2
GFX_TX8N
U1
GFX_TX9P
V2
GFX_TX9N
V1
GFX_TX10P
V3
GFX_TX10N
W3
GFX_TX11P
W1
GFX_TX11N
W2
GFX_TX12P
Y2
GFX_TX12N
AA1
GFX_TX13P
AA2
GFX_TX13N
AB2
GFX_TX14P
AB1
GFX_TX14N
AC1
GFX_TX15P
AE3
GFX_TX15N
AE4
GFX_RX0P
G5
GFX_RX0N
G4
GFX_RX1P
J8
GFX_RX1N
J7
GFX_RX2P
J4
GFX_RX2N
J5
GFX_RX3P
L8
GFX_RX3N
L7
GFX_RX4P
L4
GFX_RX4N
L5
GFX_RX5P
M8
GFX_RX5N
M7
GFX_RX6P
M4
GFX_RX6N
M5
GFX_RX7P
P8
GFX_RX7N
P7
GFX_RX8P
P4
GFX_RX8N
P5
GFX_RX9P
R4
GFX_RX9N
R5
GFX_RX10P
R7
GFX_RX10N
R8
GFX_RX11P
U4
GFX_RX11N
U5
GFX_RX12P
W4
GFX_RX12N
W5
GFX_RX13P
Y4
GFX_RX13N
Y5
GFX_RX14P
V9
GFX_RX14N
W9
GFX_RX15P
AB7
GFX_RX15N
AB6
SB_TX2P
AD8
SB_TX2N
AE8
SB_TX3P
AD7
SB_TX3N
AE7
GPP_TX2P
AD4
GPP_TX2N
AE5
GPP_TX3P
AD5
GPP_TX3N
AD6
SB_RX2P
W11
SB_RX2N
W12
SB_RX3P
AA11
SB_RX3N
AB11
GPP_RX2P
Y7
GPP_RX2N
AA7
GPP_RX3P
AB9
GPP_RX3N
AA9
SB_TX0P
AE9
SB_TX0N
AD10
SB_TX1P
AC8
SB_TX1N
AD9
SB_RX0P
W14
SB_RX0N
W15
SB_RX1P
AB12
SB_RX1N
AA12
PCE_PCAL(PCE_CALRP)
AD11
PCE_NCAL(PCE_CALRN)
AE11
PCE_ISET(PCE_CALI)
AA14
PCE_TXISET(NC)
AB14
GPP_RX0P
AD16
GPP_RX0N
AE16
GPP_RX1P
AD20
GPP_RX1N
AE20
GPP_TX0P
AD14
GPP_TX0N
AD15
GPP_TX1P
AD19
GPP_TX1N
AE19
PART 2 OF 5
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F SB
U24B
RS690M
PART 2 OF 5
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F SB
U24B
RS690M
C660 NEW@0.1u/10V_4C660 NEW@0.1u/10V_4
C526 EV@0.1u/10V_4C526 EV@0.1u/10V_4
R88 *10K/F_4R88 *10K/F_4
C239 IV@0.1u/10V_4C239 IV@0.1u/10V_4
C453 0.1u/10V_4C453 0.1u/10V_4
C451 0.1u/10V_4C451 0.1u/10V_4
C513 EV@0.1u/10V_4C513 EV@0.1u/10V_4
R448 2K_4R448 2K_4
C454 IV@0.1u/10V_4C454 IV@0.1u/10V_4
R447 562_4R447 562_4
C240 IV@0.1u/10V_4C240 IV@0.1u/10V_4
C509 EV@0.1u/10V_4C509 EV@0.1u/10V_4
C458 0.1u/10V_4C458 0.1u/10V_4
C534 EV@0.1u/10V_4C534 EV@0.1u/10V_4
C456 0.1u/10V_4C456 0.1u/10V_4
C241 IV@0.1u/10V_4C241 IV@0.1u/10V_4
C532 EV@0.1u/10V_4C532 EV@0.1u/10V_4
C232 IV@0.1u/10V_4C232 IV@0.1u/10V_4
C545 EV@0.1u/10V_4C545 EV@0.1u/10V_4
C531 EV@0.1u/10V_4C531 EV@0.1u/10V_4
C452 0.1u/10V_4C452 0.1u/10V_4
C529 EV@0.1u/10V_4C529 EV@0.1u/10V_4
C512 EV@0.1u/10V_4C512 EV@0.1u/10V_4
C665 0.1u/10V_4C665 0.1u/10V_4
C233 IV@0.1u/10V_4C233 IV@0.1u/10V_4
C542 EV@0.1u/10V_4C542 EV@0.1u/10V_4
C457 0.1u/10V_4C457 0.1u/10V_4
C539 EV@0.1u/10V_4C539 EV@0.1u/10V_4
R89 *8.25K/F_4R89 *8.25K/F_4
C517 EV@0.1u/10V_4C517 EV@0.1u/10V_4
C521 EV@0.1u/10V_4C521 EV@0.1u/10V_4
C459 IV@0.1u/10V_4C459 IV@0.1u/10V_4
C543 EV@0.1u/10V_4C543 EV@0.1u/10V_4
C540 EV@0.1u/10V_4C540 EV@0.1u/10V_4
C510 EV@0.1u/10V_4C510 EV@0.1u/10V_4
C541 EV@0.1u/10V_4C541 EV@0.1u/10V_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NB_THERMDC
NB_THERMDA
LDT_STOP#_NB
INT_TV_Y/G
STRP_DATA
LOAD_ROM#
DFT_GPIO2
INT_LVDS_BLON_L
INT_LVDS_DIGON_L
DFT_GPIO4
DFT_GPIO5
DFT_GPIO3
DFT_GPIO0
DAC_RSET
INT_TV_COMP
LDT_STOP#_NB
TV_SWITCH
TV_SWITCH
INT_TV_C/R
INT_LVDS_PWM_L
PLLVDD12
INT_TV_C/R
INT_TV_Y/G
INT_VSYNC_R
INT_HSYNC_R
LOAD_ROM#
STRP_DATA
PLLVDD12
NB_PWRGD NB_PWRGD_+5V
INT_LVDS_DIGON_L
INT_LVDS_PWM_L
INT_LVDS_BLON_L
NB_OSC
STRP_DATA
INT_CRT_RED18
INT_CRT_GRN18
INT_CRT_BLU18
INT_VSYNC18
INT_HSYNC18
INT_CRT_DDCCLK18
INT_CRT_DDCDAT18
INT_TXLOUT0+ 20
INT_TXLOUT0- 20
INT_TXLOUT1+ 20
INT_TXLOUT1- 20
INT_TXLOUT2+ 20
INT_TXLOUT2- 20
INT_TXUOUT1+ 20
INT_TXUOUT1- 20
INT_TXUOUT2+ 20
INT_TXUOUT2- 20
INT_TXUOUT0+ 20
INT_TXUOUT0- 20
INT_TXUCLKOUT+ 20
INT_TXUCLKOUT- 20
INT_TXLCLKOUT+ 20
INT_TXLCLKOUT- 20
INT_LVDS_EDIDCLK20
INT_LVDS_EDIDDATA20
INT_TV_C/R18
INT_TV_Y/G18
ALLOW_LDTSTOP14
NB_RST#14
NB_PWRGD29
HTREFCLK3
NB_OSC3
NBSRC_CLKP3
NBSRC_CLKN3
SBLINK_CLKP3
SBLINK_CLKN3
IV_HDMI_DDCDATA19
IV_HDMI_HPD19
IV_HDMI_DDCCLK 19
INT_LVDS_EDIDCLK20
PX_HDMI_DDC_EN16
INT_LVDS_DIGON 20
INT_LVDS_PWM 20
INT_LVDS_BLON 20
+NB_CORE_ON35
LVDDR33
LVDDR18D
+1.8V AVDDI
+1.8V
+1.8V
+1.8V
+3V
+1.8V
+3V AVDD_NB
HTPVDD
PLLVDD
GND_LVSSR
GND_LPVSS
GND_LPVSS
AVDD_NB
AVDDI
AVDDQ
HTPVDD
PLLVDD
LPVDD
+1.8V
+1.8V AVDDQ
+3V
VDDA12
+3V
+3V
+3V
+5V
LDT_STOP#6,14
Size Document Number Rev
Date: Sheet of
RS690M PLL & VEDIO I/F
3C
12 43Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
RS690M PLL & VEDIO I/F
3C
12 43Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
RS690M PLL & VEDIO I/F
3C
12 43Tuesday, January 22, 2008
High, LOAD ROM STRAP DISABLE
LOAD_ROM# : LOAD ROM STRAP ENABLE
Low, LOAD ROM STRAP ENABLE
A:(8/16):EVA release footprint: SOT23-2_8-95-5P
A:(8/27) Add serial 0ohm for HSYNC/VSYNC
A:(8/20) Add resister (Follow RGB Impendance control)
A:(8/21) change net name from
HDMI_DDCCLK to IV_HDMI_DDCCLK
A:(8/28) PLLVDD12 add 0.1u to GND
Base on AMD check list
A:(8/28) AMD check list Rev3.01 Item6-5:
Please let BMREQ# leave and not connect
Reserve a testpoint
0.65v<Vt<1.5v
0.65v<Vt<1.5v
0.65v<Vt<1.5v
A:(8/28)Based on AMD PA_RS4X0C2.pdf for avoiding unwanted LCD behavior during power-on
A:(8/29) follow EMI suggestion, reserve RC termination
BTO
BTO
A:(9/7)Change LDTSTOP# level shift PU resister(R5322) from 10K to 2.2K
High, MEMORY SIDE PORT DISABLE
DFT_GPIO0
Low, MEMORY SIDE PORT ENABLE
B:(10/16) Add IV@ value for Q26 (Remove Q26 in EV sku BOM)
RAMP:(1/15) Stuff R122 to 68 ohm, C171 to 22pF
RAMP:(1/15) Reserve R84 (0 ohm) for HDMI buffer circuit
BTO
BTO
C478
4.7u/6.3V_6
C478
4.7u/6.3V_6
R103
IV@39K_4
R103
IV@39K_4
R116 *2.7K_4R116 *2.7K_4
L17
BK1608HS600_6
L17
BK1608HS600_6
L23 BK1608HS600_6L23 BK1608HS600_6
R149IV@150_4 R149IV@150_4
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
T22T22
T12T12
L52
BK1608HS600_6
L52
BK1608HS600_6
R143
IV@2.2K_4
R143
IV@2.2K_4
3
2
1
Q28
IV@FDV301N
Q28
IV@FDV301N
R152IV@150_4 R152IV@150_4
R136 *10K_4R136 *10K_4
T19T19
1 2
C482
2.2u/10V_8
C482
2.2u/10V_8
T24T24
C203
0.1u/10V_4
C203
0.1u/10V_4
HTPVDD
B24
HTPVSS
B25
SYSRESET#
C10
POWERGOOD
C11
LDTSTOP#
C5
ALLOW_LDTSTOP
B5
OSCIN
B11
OSCOUT(PLLVDD12)
A11
DFT_GPIO3
C7
DFT_GPIO1
D7
DFT_GPIO2
C8
BMREQ#
B2
I2C_CLK
A2
I2C_DATA
B4
THERMALDIODE_P
AA15
THERMALDIODE_N
AB15
DFT_GPIO4
B8
DFT_GPIO5
A8
DFT_GPIO0
D6
STRP_DATA
A3
GFX_CLKP
F2
GFX_CLKN
E1
SB_CLKP
G1
SB_CLKN
G2
DEBUG_6
AE15
DEBUG_9
AC17
DEBUG_10
AD18
DEBUG_15
AE21
DEBUG_0
AD13
DEBUG_2
AC13
DEBUG_1
AE13
DEBUG_14
AE17
DEBUG_13
AD17
PLLVDD18
A10
PLLVSS
B10
TXOUT_L0P
B14
TXOUT_L0N
B15
TXOUT_L1P
B13
TXOUT_L1N
A13
TXOUT_L2P
H14
TXOUT_L2N
G14
TXOUT_L3P
D17
TXOUT_U0P
A15
TXOUT_L3N
E17
TXOUT_U0N
B16
TXOUT_U1P
C17
TXOUT_U1N
C18
TXOUT_U2P
B17
TXOUT_U2N
A17
TXOUT_U3P
A18
TXOUT_U3N
B18
TXCLK_LP
E15
TXCLK_LN
D15
TXCLK_UP
H15
TXCLK_UN
G15
LPVDD
D14
LPVSS
E14
C
C21
Y
C20
COMP
D19
RED
E19
TMDS_HPD
C14
DDC_DATA
B3
TESTMODE
C3
HTREFCLK
B23
HTTSTCLK
C23
TVCLKIN
C2
GREEN
F19
BLUE
G19
DACVSYNC
C6
DACHSYNC
A5
RSET
B21
DACSCL
B6
DACSDA
A6
AVDD1
B22
AVDD2
C22
AVSSN1
G17
AVSSN2
H17
AVDDDI
A20
AVSSDI
B20
AVDDQ
A21
AVSSQ
A22
LVDDR18D_1
A12
LVDDR33_1
C12
LVDDR33_2
C13
LVSSR1
A16
LVSSR3
A14
LVDDR18D_2
B12
LVSSR5
D12
LVSSR6
C19
LVSSR7
C15
LVSSR8
C16
LVDS_DIGON
E12
LVDS_BLON
G12
LVDS_BLEN
F12
LVSSR12
F14
LVSSR13
F15
PART 3 OF 5
PM
CLOCKs
PLL PWR
MIS.
CRT/TVOUT
DEBUG
LVDS
U24C
RS690M
PART 3 OF 5
PM
CLOCKs
PLL PWR
MIS.
CRT/TVOUT
DEBUG
LVDS
U24C
RS690M
2 4
3
1
5
U12
IV@NC7SZ126M5
U12
IV@NC7SZ126M5
T39T39
R141 10K_4R141 10K_4
L51 BK1608HS600_6L51 BK1608HS600_6
2
1 3
Q27
MMBT3904
Q27
MMBT3904
R144
IV@2.2K_4
R144
IV@2.2K_4
R102
2.2K_4
R102
2.2K_4
T35T35
L19
BK1608HS600_6
L19
BK1608HS600_6
R145 IV@0_4R145 IV@0_4
R151IV@150_4 R151IV@150_4
C474
0.1u/10V_4
C474
0.1u/10V_4
R77 IV@0_4R77 IV@0_4
T23T23
C211
4.7u/6.3V_6
C211
4.7u/6.3V_6
R97
IV@15K_4
R97
IV@15K_4
R150IV@150_4 R150IV@150_4
R156
4.7K_4
R156
4.7K_4
T17T17
C207
2.2u/6.3V_6
C207
2.2u/6.3V_6
T16T16
R76 IV@100K_4R76 IV@100K_4
T18T18
*10u/10V_8
C481
*10u/10V_8
C481
T20T20
R153IV@150_4 R153IV@150_4
R111
10K_4
R111
10K_4
C171 22P_4C171 22P_4
R455 *2.7K_4R455 *2.7K_4
T42T42
R117 *3K_4R117 *3K_4
R104 0_6R104 0_6
R154 715_6R154 715_6
3
2
1
Q29
IV@FDV301N
Q29
IV@FDV301N
R146 IV@0_4R146 IV@0_4
L21
BK1608HS600_6
L21
BK1608HS600_6
R122 68_4R122 68_4
R456 0_6R456 0_6
C187
2.2u/6.3V_6
C187
2.2u/6.3V_6
T37T37
*10u/10V_8
C173
*10u/10V_8
C173
C205
*0.1u/10V_4
C205
*0.1u/10V_4
R84 *IV@0_4R84 *IV@0_4
R142
IV@2.2K_4
R142
IV@2.2K_4
L54
BK1608HS600_6
L54
BK1608HS600_6
R147 *2.7K_4R147 *2.7K_4
R160 0_6R160 0_6
C475
*0.1u/10V_4
C475
*0.1u/10V_4
C202
0.1u/10V_4
C202
0.1u/10V_4
R135 0_4R135 0_4
L53
BK1608HS600_6
L53
BK1608HS600_6
C477
2.2u/6.3V_6
C477
2.2u/6.3V_6
T21T21
C127
*IV@.1U_4
C127
*IV@.1U_4
T41T41
C210
4.7u/6.3V_6
C210
4.7u/6.3V_6
R107 *2.7K_4R107 *2.7K_4
R110 *2.7K_4R110 *2.7K_4
1 2
C480
2.2u/10V_8
C480
2.2u/10V_8
3
2
1
Q30
IV@FDV301N
Q30
IV@FDV301N
R138 10K_4R138 10K_4
3
2
1
Q26 IV@FDV301NQ26 IV@FDV301N
C470
2.2u/6.3V_6
C470
2.2u/6.3V_6
*10u/10V_8
C483
*10u/10V_8
C483
T44T44
T27T27
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8V
+1.2V
VDDA12
VDDA12_PKG1
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2
VDDA12
VDD18
VDDR3
VDDDVO
VDDPLL
VLDT_RUN_NB
VDDA12
+1.8V
+3V
VDDC +NB_CORE
+3V +1.8V
+1.2V
Size Document Number Rev
Date: Sheet
of
RS690M POWER
3C
13 43Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
RS690M POWER
3C
13 43Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet
of
RS690M POWER
3C
13 43Tuesday, January 22, 2008
80 ohm(4A)
RS690: 220 Ohm / 500mA
13
IRT 0209
A:(8/22) change power name from VLDT_RNU to VLDT_RUN_NB
A:(8/22) change power from +1.2V(fixed) to +NB_VCC (Switch power)
A:(8/22) Remove one L (Through +1.2V to VDDA12)
A:(8/22) no struff 100uf, only reserve it.
A:(8/22) no struff 100uf, only reserve it.
0.8A
3A
A:(9/3) no stuff 10uF
A:(9/3) no stuff 10uF
A:(9/3) Mount C5455 and C5460 to meet AMD check list.
A:(9/3) Change from 2.2uF to 4.7uF to meet AMD check list.
L15 FCM2012C-121_8L15 FCM2012C-121_8
C77
1u/10V_6
C77
1u/10V_6
L10
FBMJ3216HS800_1206
L10
FBMJ3216HS800_1206
10u/10V_8
C177
10u/10V_8
C177
C125
1u/10V_6
C125
1u/10V_6
C153
1u/10V_6
C153
1u/10V_6
C91
1u/10V_6
C91
1u/10V_6
C111
1u/10V_6
C111
1u/10V_6
C88
1u/10V_6
C88
1u/10V_6
L13 FCM2012C-121_8L13 FCM2012C-121_8
10u/10V_8
C178
10u/10V_8
C178
1 2
C135
1u/10V_6
C135
1u/10V_6
0.1u/16V_6
C128
0.1u/16V_6
C128
C79
1u/10V_6
C79
1u/10V_6
C134
1u/10V_6
C134
1u/10V_6
C101
1u/10V_6
C101
1u/10V_6
C145
1u/10V_6
C145
1u/10V_6
L12 0_8L12 0_8
C62
*100u/6.3V_3528
C62
*100u/6.3V_3528
C76
1u/10V_6
C76
1u/10V_6
*10u/10V_8
C85
*10u/10V_8
C85
C179
1u/10V_6
C179
1u/10V_6
C95
1u/10V_6
C95
1u/10V_6
C87
1u/10V_6
C87
1u/10V_6
VDD_HT1
AE24
VDD_HT2
AD24
VDD_HT3
AD22
VDD_HT4
AB17
VDD_HT5
AE23
VDD_HT6
Y17
VDD_HT7
W17
VDD_HT8
AC18
VDD_HT9
AD21
VDD_HT10
AC19
VDD_HT11
AC20
VDD_HT12
AB19
VDD_HT13
AD23
VDD_HT14
AA17
VDD_HT15
AE25
VDD18_1
J14
VDD18_2
J15
VDDPLL_1
E7
VDDA12_1
D1
VDDA12_2
G7
VDDA12_3
E2
VDDA12_4
C1
VDDA12_5
E3
VDDA12_6
D2
VDDA12_7
M9
VDDA12_8
F4
VDDA12_11
L9
VDDA12_20
AE1
VDDA12_19
AD2
VDDA12_18
AC3
VDDA12_17
AB4
VDDA12_16
W7
VDDC_1
L11
VDDC_2
L13
VDDC_3
L15
VDDC_4
M12
VDDC_5
R15
VDDC_6
M14
VDDC_7
N11
VDDC_8
N13
VDDC_9
N15
VDDC_10
J11
VDDC_11
H11
VDDC_12
P12
VDDC_13
P14
VDDC_14
R11
VDDA12_13
AE2
VDDA12_14
AB3
VDDA12_15
U7
VDDPLL_2
F7
VDDC_15
R13
VDDR3_2
D11
VDDR3_1
E11
VSSPLL_1
F9
VSSPLL_2
G9
VDDR_1
AC12
VDDR_2
AD12
VDDR_3
AE12
VDDC_16
A19
VDDC_17
B19
VDDC_18
U11
VDDC_19
U14
VDDC_20
P17
VDDC_21
L17
VDDC_22
J19
VDDC_23
D20
VDDC_24
G20
VDDC_25
A9
VDDC_26
B9
VDDC_27
C9
VDDC_28
D9
VDDC_29
A7
VDDC_30
A4
VDDA12_10
D3
VDDA12_9
B1
VDDHT_PKG
D22
VDDA12_PKG1
M1
VDDA12_PKG2
AC11
VDDA12_12
E6
VDDC_31
U12
VDDC_32
U15
POWER
PART 4 OF 5
U24D
RS690M
POWER
PART 4 OF 5
U24D
RS690M
C73
*100u/6.3V_3528
C73
*100u/6.3V_3528
C188
1u/10V_6
C188
1u/10V_6
L24 FCM2012C-121_8L24 FCM2012C-121_8
2 1
D32
1SS355_80V
D32
1SS355_80V
C75
1u/10V_6
C75
1u/10V_6*10u/10V_8
C82
*10u/10V_8
C82
C113
1u/10V_6
C113
1u/10V_6
C144
2.2u/6.3V_6
C144
2.2u/6.3V_6
1 2
C208
1u/10V_6
C208
1u/10V_6
10u/10V_8
C86
10u/10V_8
C86
L11
FBMJ3216HS800_1206
L11
FBMJ3216HS800_1206
C93
1u/10V_6
C93
1u/10V_6
C131
1u/10V_6
C131
1u/10V_6
C141
1u/10V_6
C141
1u/10V_6
VSS1
A25
VSS2
F11
VSS3
D23
VSS4
E9
VSS5
G11
VSS6
Y23
VSS7
P11
VSS8
R24
VSS9
AE18
VSS10
M15
VSS11
J22
VSS12
G23
VSS13
J12
VSS14
L12
VSS15
L14
VSS16
L20
VSS17
L23
VSS18
M11
VSS19
M20
VSS20
M23
VSS21
M25
VSS22
N12
VSS23
N14
VSS25
L24
VSS26
P13
VSS27
P20
VSS28
P15
VSS29
R12
VSS30
R14
VSS31
R20
VSS32
W23
VSS33
Y25
VSS34
AD25
VSS35
U20
VSS36
H25
VSS37
W24
VSS38
Y22
VSS39
AC23
VSS40
D25
VSS41
G24
VSS42
AC14
VSS44
AC22
VSSA2
V12
VSSA3
V11
VSSA4
V14
VSSA5
F3
VSSA6
V15
VSSA7
A1
VSSA8
H1
VSSA9
G3
VSSA10
J2
VSSA11
H3
VSSA13
J6
VSSA15
F1
VSSA16
L6
VSSA17
M2
VSSA18
M6
VSSA19
J3
VSSA20
P6
VSSA21
T1
VSSA22
N3
VSSA24
R6
VSSA25
U2
VSSA26
T3
VSSA27
U3
VSSA28
U6
VSSA30
Y1
VSSA32
W6
VSSA33
AC2
VSSA34
Y3
VSSA35
Y9
VSSA36
Y11
VSSA37
R9
VSSA38
AD1
VSSA39
AC5
VSSA40
AC6
VSSA41
AC7
VSSA42
AD3
VSSA43
AC9
VSSA44
AC10
VSSA45
G6
VSSA31
Y15
VSSA29
AC4
VSSA23
P9
VSSA14
AE6
VSSA12
AE10
VSSA1
M3
VSSA46
Y12
VSSA47
Y14
VSSA48
AA3
VSS45
R23
VSS46
C4
VSS47
AE22
VSS48
T23
VSS49
T25
VSS50
AE14
VSS52
H23
VSS54
A23
VSS56
F17
VSS57
D4
VSS59
M13
VSS58
AC16
VSS43
H12
VSS55
AC15
VSS53
M17
VSS51
R17
VSS24
B7
GROUND
PAR 5 OF 5
U24E
RS690M
GROUND
PAR 5 OF 5
U24E
RS690M
C142
1u/10V_6
C142
1u/10V_6
2 1
D34
1SS355_80V
D34
1SS355_80V
C172
1u/10V_6
C172
1u/10V_6
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
C152
4.7u/6.3V_6
C152
4.7u/6.3V_6
10u/10V_8
C90
10u/10V_8
C90
C94
1u/10V_6
C94
1u/10V_6
C123
1u/10V_6
C123
1u/10V_6
C98
1u/10V_6
C98
1u/10V_6
10u/10V_8
C65
10u/10V_8
C65
L9 GMLB-201209_8L9 GMLB-201209_8
10u/10V_8
C189
10u/10V_8
C189
2 1
D33
1SS355_80V
D33
1SS355_80V
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
32K_X1
AD11
AD28
AD18
AD9
32K_X2
A_RX2N_C
RTC_CLK
LPC_DRQ1#
AD6
A_RX2P_C
AD20
AD15
AD14
AD2
PCIE_CALRN
A_RX1N_C
32K_X232K_X232K_X232K_X2
PCI_LOCK#
AMD_PROCHOT_L
A_RX3N_C
GNT4#
REQ4#
AD31
AD17
PCIRST#_C
AD22
AD16
ALLOW_LDTSTOP
AD29
AD27
A_RX3P_C
BMREQ#
AD21
PCIE_CALRP
AD30
AD23
32K_X1
AD26
AD25
A_RX1P_C
AD10
AD7
AD4
AD1
PCIE_CALI
AD24
AD13
AD0
AD19
AD5
AD3
A_RX0N_C
AD12
AD8
A_RX0P_C
PCICLK2_R
PCICLK3_R
BMREQ#
PCLK_DBC
PCLK_OZ129
PCICLK4_R
PCICLK5_R
PCICLK0_R
LPC_DRQ0#
PCLK_DBC
PCLK_OZ129
PCLK_591PCICLK6_R
PCICLK1_R
PCICLK3
PCICLK4
PCIRST#_C
PCICLK3SB_SPDIF_R
PCICLK4
ALLOW_LDTSTOP
PCLK_591
ALINK_RST#_1
ECPWROK
ALINK_RST#_1
PORT_C#
ALINK_RST#
VCCRTC_3
PLTRST#
LDT_RST#6
ALLOW_LDTSTOP12
CBE0# 26
REQ0# 26
GNT0# 26
CBE1# 26
CBE2# 26
CBE3# 26
FRAME# 26
DEVSEL# 26
IRDY# 26
TRDY# 26
PAR 26
STOP# 26
CLKRUN# 26,29
INTE# 26
LAD0 25,29
LAD1 25,29
LAD2 25,29
LAD3 25,29
LFRAME# 25,29
SERIRQ 29
AD[0..31] 18,26
PCLK_OZ129 18,26
PCLK_DBC 18,25
PCICLK4 18
PCICLK6 18
PCIRST# 25,26
LDT_STOP#6,12
CPU_SIC6
CPU_SID6
CPU_PWRGD6
A_TX0P11
A_TX0N11
A_TX1P11
A_TX1N11
A_TX2P11
A_TX2N11
A_TX3P11
A_TX3N11
A_RX2N11
A_RX2P11
A_RX3P11
A_RX3N11
A_RX1P11
A_RX1N11
A_RX0N11
A_RX0P11
SBSRCCLKN3
SBSRCCLKP3
FM_INTX 28
FM_CLOCK 28
FM_DATA 28
PCLK_591 29
NB_RST#12
PLTRST#19,21,24,25,27,29
IDERST1#27
ECPWROK 29
PORT_C# 22
AMD_PROCHOT 6,29
VCC_SB
+3V
VCC_SB
PCIE_PVDD
VCCRTC
PCIE_VDDR
PCIE_VDDR
CPU_PWR_SB
+3V_S5
VCCRTC
+5VPCU
+3VPCU
Size Document Number Rev
Date: Sheet
of
SB600 PCIE/PCI/CPU/LPC
3C
14 43Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet of
SB600 PCIE/PCI/CPU/LPC
3C
14 43Tuesday, January 22, 2008
Size Document Number Rev
Date: Sheet of
SB600 PCIE/PCI/CPU/LPC
3C
14 43Tuesday, January 22, 2008
PCIE Power
Reserved For EMI
14
IRT 0206
2A
A:(8/6) Check List Rev3.01 Rcommended:
Connected PCICLK5 or 6 to LPC device 33MHz CLK input
A:(8/6) Check List Rev3.01 Rcommended:
One series termination resistor near Southbridge for each load
unless other provision is made to ensure clean edges at all devices
A:(8/16) OZ129 PCI IF can't find SERR#,PERR#
Reserve test point
A:(8/18) Checklist Rev3.01
(a).0.1-μF and 1-μF capacitors to RTC_GND.
(b)510-ohm 5% series resistor to battery.
(c)No diode connected between VBAT ball and battery.
(d)Jumper to short VBAT to RTC_GND through the series resistor.
A:(8/18) AA1 use 1k ohm
MS2 stuff 510 ohm
A:(8/18) AA1 & MS2 no stuff 1u+0.1uF
A:(8/23) arrange GPIO pin34/35/36 for FM tuner I2C interface
A:(8/27) Add buffer for Alink_RST
A:(8/27) default no stuff
A:(8/27) reserve GPIO70 for PORT_C# (FM radio detect)
A:(8/27) AMD check list Rev3.01 Item 26-36:
Stuff 10k
A:(8/28) change all caps from X5R to X7R
Follow AMD check list
A:(9/5)Change C5540 from 10uF to 22uF to meet power sequence
B:(9/21) change C285 to CH6221M9A07
(CH6222M9A01 EOL issue)
A:(9/21) change from 510 to 1k
A:(9/21) change R571 from 1k to 2.2K~4.7k
A:(9/26) change R571 to 14k
B:(9/27) Safety request design with two resistor
(two 8.66K),Add R667
RTC
B:(9/28) change R582 from 0603 to 0402
C:(12/5) Remove Delay PCIE Power for A-Link IF
C:(12/14) Stuff EMI CAP
RAMP:(1/8)Change R581 from 4.7k to 6.8k.
Change R571,R667 from 8.66k to 2k.
Correct R571,R667 footprint from 0603 to 0402
Ic = 220uA + ( 5.1-2.2 ) / ( 2K + 2K )= 945uA
RAMP:(1/8) Change RTC Battery from VARTA (AHL03001441) to MATSUSHITA (AHL03002005)
RAMP:(1/17)Reserve C828 (0.1uF) for PLTRST# (R348)
R341 20M_4R341 20M_4
T126T126
R568
1K_4
R568
1K_4
L26
FCM2012C-121_8
L26
FCM2012C-121_8
C367
1u/6.3V_4
C367
1u/6.3V_4
T120T120
R350 0_4R350 0_4
T107T107
41
2 3
Y10 32.768KHZY10 32.768KHZ
R667
2K/F_4
R667
2K/F_4
T82T82
T123T123
R541 0_6R541 0_6
R590 22_4R590 22_4
C593 0.1u/10V_4C593 0.1u/10V_4
R348 0_4R348 0_4
C589 0.1u/10V_4C589 0.1u/10V_4
C594 0.1u/10V_4C594 0.1u/10V_4
R427 *0_4R427 *0_4
C653 *10p/50V_4C653 *10p/50V_4
1
1
2
2
CN37
ACS_85204-0200L
CN37
ACS_85204-0200L
R571
2K/F_4
R571
2K/F_4
T109T109
T98T98
C384 *10p/50V_4C384 *10p/50V_4
C592 0.1u/10V_4C592 0.1u/10V_4
R588 22_4R588 22_4
C292
1u/10V_6
C292
1u/10V_6
T90T90
R363 0_4R363 0_4
C293
1u/10V_6
C293
1u/10V_6
C297
0.1u/10V_4
C297
0.1u/10V_4
T158T158
C595 0.1u/10V_4C595 0.1u/10V_4
C828
*.1U_4
C828
*.1U_4
C591 0.1u/10V_4C591 0.1u/10V_4
T147T147
C283
*18p/50V_4
C283
*18p/50V_4
T73T73
C279
1u/10V_6
C279
1u/10V_6
R543 2.05K_6R543 2.05K_6
T142T142
R542 562_6R542 562_6
C654 *10p/50V_4C654 *10p/50V_4
C278
10u/10V_8
C278
10u/10V_8
R256 0_4R256 0_4
D16 CH500H-40D16 CH500H-40
T69T69
L32 BLM18PG181SN1D_6L32 BLM18PG181SN1D_6
C287
1u/10V_6
C287
1u/10V_6
R300 *8.2K_4R300 *8.2K_4
R584 22_4R584 22_4
12
G4
*SHORT_PAD
G4
*SHORT_PAD
R586 22_4R586 22_4
T87T87
T72T72
T70T70
C596 0.1u/10V_4C596 0.1u/10V_4
R582 15K_4R582 15K_4
C590 0.1u/10V_4C590 0.1u/10V_4
C277
10u/10V_8
C277
10u/10V_8
C284
0.1u/10V_4
C284
0.1u/10V_4
C285
22U/10V_8
C285
22U/10V_8
T99T99
T106T106
R367
8.2K_4
R367
8.2K_4
R581
6.8K_4
R581
6.8K_4
R579
1K_6
R579
1K_6
C280
1u/10V_6
C280
1u/10V_6
T119T119
R345 22_4R345 22_4
A_RST#
AG10
PCIE_TX0P
P29
PCIE_TX0N
P28
PCIE_RX0P
T25
PCIE_TX1P
M29
PCIE_TX1N
M28
PCIE_RX1P
T22
PCIE_RX1N
T23
PCIE_TX2P
K29
PCIE_TX2N
K28
PCIE_RX2P
M25
PCIE_RX2N
M26
PCIE_TX3P
H29
PCIE_TX3N
H28
PCIE_RX3P
M22
PCIE_RX3N
M23
PCIE_RCLKP
J24
PCIE_RCLKN
J25
PCIE_CALRP
E29
PCIE_CALRN
E28
PCIE_CALI
E27
PCIE_PVDD
U29
PCIE_VDDR_2
F28
PCIE_VDDR_3
F29
PCIE_VDDR_4
G26
PCIE_VDDR_1
F27
PCIE_VDDR_5
G27
PCIE_VDDR_6
G28
PCIE_VDDR_7
G29
DPSLP_OD#/GPIO37
B24
CPU_STP#/DPSLP_3V#
AH9
X1
D2
X2
C1
VBAT
E1
INTR/LINT0
W26
SMI#
AA24
STPCLK#/ALLOW_LDTSTP
AA25
NMI/LINT1
W24
FERR#
Y27
IGNNE#/SIC
AA22
A20M#/SID
AA26
SLP#/LDT_STP#
AA23
INIT#
W25
LDT_RST#/DPRSTP#/PROCHOT#
AC25
PCICLK0
U2
PCICLK1
T2
PCICLK2
U1
PCICLK3
V2
PCIRST#
AJ9
CBE0#/ROMA10
AB9
CBE1#/ROMA1
AF9
CBE2#/ROMWE#
AJ5
CBE3#
AG3
FRAME#
AA2
DEVSEL#/ROMA0
AH6
IRDY#
AG5
TRDY#/ROMOE#
AA1
PAR/ROMA19
AF7
STOP#
Y2
PERR#
AG8
REQ0#
AJ8
REQ1#
AE2
REQ2#
AG9
REQ3#/GPIO70
AH8
GNT0#
AD11
GNT1#
AF2
GNT2#
AH7
GNT3#/GPIO72
AB12
SERR#
AC11
CLKRUN#
AG7
LAD0
AG24
LAD1
AG25
LAD2
AH24
LAD3
AH25
LFRAME#
AF24
LDRQ0#
AJ24
SERIRQ
AF23
RTC_GND
D1
PCICLK4
W3
PCICLK5
U3
PCICLK6
V1
AD0/ROMA18
W7
AD1/ROMA17
Y1
AD2/ROMA16
W8
AD3/ROMA15
W5
AD4/ROMA14
AA5
AD5/ROMA13
Y3
AD6/ROMA12
AA6
AD7/ROMA11
AC5
AD8/ROMA9
AA7
AD9/ROMA8
AC3
AD10/ROMA7
AC7
AD12/ROMA5
AD4
AD13/ROMA4
AB11
AD14/ROMA3
AE6
AD15/ROMA2
AC9
AD16/ROMD0
AA3
AD17/ROMD1
AJ4
AD18/ROMD2
AB1
AD19/ROMD3
AH4
AD20/ROMD4
AB2
AD21/ROMD5
AJ3
AD22/ROMD6
AB3
AD23/ROMD7
AH3
AD24
AC1
AD25
AH2
AD26
AC2
AD27
AH1
AD28
AD2
AD29
AG2
AD30
AD1
AD31
AG1
AD11/ROMA6
AJ7
REQ4#/GPIO71
AH5
GNT4#/GPIO73
AG4
LDRQ1#/GNT5#/GPIO68
AH26
DPRSLPVR
W23
CPU_PG/LDT_PG
AC26
PCIE_VDDR_8
J27
PCIE_VDDR_9
J29
RTCCLK
D3
RTC_IRQ#/GPIO69
F5
PCIE_RX0N
T26
INTE#/GPIO33
AD3
INTF#/GPIO34
AF1
INTG#/GPIO35
AF4
INTH#/GPIO36
AF3
LOCK#
AF6
PCIE_VDDR_10
L25
PCIE_VDDR_11
L26
PCIE_PVSS
U28
SPDIF_OUT/PCICLK7/GPIO41
T1
BMREQ#/REQ5#/GPIO65
W22
PCIE_VDDR_12
L29
PCIE_VDDR_13
N29
PCI EXPRESS INTERFACE
Part 1 of 4
SB600 SB 23x23mm
PCI INTERFACE
LPC
RTC
CPU
XTAL
PCI CLKS
U32A
SB600
PCI EXPRESS INTERFACE
Part 1 of 4
SB600 SB 23x23mm
PCI INTERFACE
LPC
RTC
CPU
XTAL
PCI CLKS
U32A
SB600
T75T75
C359
18p/50V_4
C359
18p/50V_4
R290 33_4R290 33_4
C366
1U/10V_4
C366
1U/10V_4
D14
CH500H-40
D14
CH500H-40
1
2
4
53
U19
NC7SZ08P5X_NL
U19
NC7SZ08P5X_NL
C656 *10p/50V_4C656 *10p/50V_4
C296
0.1u/10V_4
C296
0.1u/10V_4
R296
8.2K_4
R296
8.2K_4
C291
0.1u/10V_4
C291
0.1u/10V_4
C383 .1U_4C383 .1U_4
R258
10K_4
R258
10K_4
R583 22_4R583 22_4
T74T74
T71T71
R253 10K_4R253 10K_4
C365
.1U_4
C365
.1U_4
Quanta Computer Inc.
PROJECT : BD3A
Quanta Computer Inc.
PROJECT : BD3A
C655 *10p/50V_4C655 *10p/50V_4
C360
18p/50V_4
C360
18p/50V_4
T143T143
R351
20M_4
R351
20M_4
R346 *0_4R346 *0_4
C267
1u/10V_6
C267
1u/10V_6
T117T117
2
1 3
Q74
MMBT3904
Q74
MMBT3904
C274
0.1u/10V_4
C274
0.1u/10V_4
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