Quanta Computer LA-3401P, Satellite A135 Schematic

A
1 1
B
C
D
E
Compal Confidential
2 2
IAKAA LA-3401P Schematics Document
Intel Yonah/Merom with 945PM/GM + DDRII + ICH7M
(+VGA/B NVidia NB7P-GS&NB7M-SE)
3 3
2006-10-03
REV: 0.3
4 4
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Deciphered Date
2009/10/032006/10/03
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Cover Sheet IAKAA M/B LA-3401P
E
of
138Thursday, October 05, 2006
0.3
A
B
C
D
E
Compal confidential
Model : IAKAA
Fan Control
page 4
File Name : LA-3401P
NAPA Platform
1 1
LCD Conn.
page 16
NVIDIA NB7P-GS NB7M-SE
VGA/B Conn.
with 64/128/256/512 MB VRAM
PCI-E BUS
(port 3)
2 2
10/100/1000 LAN
RTL8111B/RTL8101E
page 22
RJ45/11 CONN
page 22
Mini Express Card
page 25
(port 2)
CardBus Controller
CRT & TV-out
page 16
2.5GHz
USB port 7
PCI BUS
TI PCI7412
page 15
PCI-Express x16
USB
3.3V 48MHz
3.3V 33 MHz
page 20,21
Yonah/Merom
uFCPGA-479 CPU
FSB
533/667MHz
Intel Calistoga GMCH
945PM/GM
PCBGA 1466
Intel ICH7-M
mBGA-652
H_A#(3..31) H_D#(0..63)
page 7,8,9,10,11
DMI x 4
USB
Azalia
SATA PATA
page 17,18,19
Thermal Sensor ADM1032ARM
DDR2-533/667
Dual Channel
USB1.1 Finger Printer
3.3V 480MHz
USB port 6
3.3V 24.576MHz/48Mhz
1.5GHz
3.3V ATA-100
Clock Generator
ICS9LPRS325AKLFT
page 4page 4,5,6 page 14
DDR2-SO-DIMM X2
BANK 0, 1, 2, 3
page 12, 13
USB x 1 conn
page 29
page 28
USB port 1, 4
Audio Codec
ALC861 VD
page 23
USB/B conn
page 25
USB port 0, 2
USB2.0 Bluetooth Conn
USB port 5
MDC1.5
AMP & Audio Jack & Int-MIC
SPK/JP-AMP: APA2056
page 31
page 25
page 24
SATA 0
LED
3 3
page 28
page 21
page 20 page 20
5in1 Slot Slot 0 1394 port
LPC BUS
3.3V 33 MHz
SATA 1
SATA HDD Connector
page 17
SATA HDD Connector
page 17
RTC CKT.
page 17
Power On/Off CKT.
page 29
DC/DC Int erface CKT.
page 30
ENE KB910QF
page 26
Power Circuit DC/DC
Page 30~36
4 4
Touch Pad Int.KBD
page 28page 23
BIOS
page 27
CIR
page 25
PATA Master
PATA ODD Connector
page 17
IAKAA Sub-board
Finger Print /B LS-3401P Rev0
SW/B LS-3392P Rev0
VGA/B LS-3403P Rev0
USB/B LS-3391P Rev0
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Deciphered Date
2009/10/032006/10/03
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Block Diagram IAKAA M/B LA-3401P
E
of
238Thursday, October 05, 2006
0.3
A
B
C
D
E
Voltage Rails
Power Plane Description
VIN
1 1
2 2
B+ +CPU_CORE +0.9VS 0.9V switched power rail for DDR terminator +VCCP +1.5VS +1.8V +1.8VS 1.8V switched power rail +2.5VS +3VALW +3VS +5VALW +5VS +VSB +VSB always on power rail ON ON * +RT C V C C RTC power
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU
1.05V switched power rail
1.5V switched power rail
1.8V power rail for DDR
2.5V switched power rail
3.3V always on power rail
3.3V switched power rail 5V always on power rail 5V switched power rail
S1 S3 S5
N/A N/A N/A
ON OFF ON OFF ON OFF OFF ON OFF OFF ON ON ON ON ON ON
ON ON
N/AN/AN/A OFF OFF
ON
OFF OFF
OFF
OFF
OFF ON ON*
OFF
OFF
ON*
ON
OFFON
OFF
ONON
External PCI Devices
DEVICE
1394 CARD BUS
PCI Device ID REQ/GNT #
D0 D4
IDSEL #
AD20 AD20 AD20D45IN1 2
PIRQ
2 2
A,B,C,D A,B,C,D A,B,C,D
KB910 I2C / SMBUS ADDRESSING
3 3
DEVICE
SM1 24C16 SM1 SMART BATTERY SM2 ADM0132
CPU THERMA L MONITOR
HEX
A0H
98H
ADDRESS
1 0 1 0 0 0 0 X b 0 0 0 1 0 1 1 X b16H 1 0 0 1 1 0 0 X b
Board ID / SK U I D T ab l e for AD channel
Vcc 3.3V +/- 5%
Board ID
0 1 2 3 4 5 6 7 NC
100K +/- 5%Ra
Rb V min
AD_BID
0
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
0 V
BOARD ID Table
Board ID
0 1 2 3 4 5 6 7
PCB Revision
0.1
0.2
0.3
SKU ID Table
SKU ID
0 1 2 3 4 5 6 7
SKU
10 (10E) 10C 10G 10GC 10J (10EJ) 10CJ 10GJ 10GCJ
Vtyp
AD_BID
V
AD_BID
0 V 0 V
0.503 V
0.819 V
0.538 V
0.875 V
1.185 V 1.264 V
2.200 V
3.300 V
2.341 V
3.300 V
BTO Option Table
BTO Item BOM Structure
2ND HDD LAN
WLAN NB
BT MIC CIR
FINGER PRINT
5IN1
max
2HDD@
100M@
1000M@ KS@
GM@
PM@ BT@ MIC@ CIR@
7412@
ICH7-M SM Bus address
DEVICE
DDR SO-DIMM 0 DDR SO-DIMM 1 CLOCK GENERATOR (EXT.)
4 4
A
HEX
A0
D2
ADDRESS
1 0 1 0 0 0 0 0 1 0 1 0 0 1 0 0A4 1 1 0 1 0 0 1 0
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Deciphered Date
2009/10/032006/10/03
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Notes IAKAA M/B LA-3401P
E
of
338Thursday, October 05, 2006
0.3
5
4
3
2
1
H_A#[3..31]7
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8
CLK_CPU_BCLK CLK_CPU_BCLK#
DBRESET#
H_THERMDA H_THERMDC H_THERMTRIP#
OCP# 18
H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_ADSTB#0 H_ADSTB#1
H_ADS# H_BNR# H_BPRI# H_BR0# H_DEFER# H_DRDY# H_HIT# H_HITM# H_IERR# H_LOCK# H_RESET#
H_RS#0 H_RS#1 H_RS#2 H_TRDY#
H_DBSY# H_DPSLP# H_DPRSTP# H_DPWR#
XDP_BPM#5 H_PROCHOT#
H_PWRGOOD H_CPUSLP# XDP_TCK XDP_TDI XDP_TDO TEST1 TEST2 XDP_TMS XDP_TRST#
D D
H_REQ#[0..4]7
H_ADSTB#07
C C
R94
56_0402_5%
1 2
+VCCP
B B
+VCCP
H_THERMDA, H_THERMDC routing together. Trace width / Spacing = 10 / 10 mil
A A
H_PROCHOT# OCP#
H_ADSTB#17
CLK_CPU_BCLK14
CLK_CPU_BCLK#14
H_ADS#7 H_BNR#7
H_BPRI#7
H_DEFER#7
H_DRDY#7
H_HITM#7
H_LOCK#7
H_RESET#7
H_RS#[0..2]7
H_TRDY#7
DBRESET#18
H_DBSY#7
H_DPSLP#17
H_DPRSTP#17,36
H_DPWR#7
R95
1 2
56_0402_5%
H_PWRGOOD17
H_CPUSLP#7
R85 1K_0402_5%@
1 2
R84 51_0402_5%
1 2
H_THERMTRIP#7,17
+VCCP
12
R89
56_0402_5%@
B
2
E
3 1
C
Q12
MMBT3904_SOT23@
5
H_BR0#7
H_HIT#7
JP18A
J4
A3#
L4
A4#
M3
A5#
K5
A6#
M1
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L1
A13#
P4
A14#
P1
A15#
R1
A16#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
U4
A21#
Y5
A22#
U2
A23#
R4
A24#
T5
ADDR GROUP
A25#
T3
A26#
W3
A27#
W5
A28#
Y4
A29#
W2
A30#
Y1
A31#
K3
REQ0#
H2
REQ1#
K2
REQ2#
J3
REQ3#
L5
REQ4#
L2
ADSTB0#
V4
ADSTB1#
A22
BCLK0
A21
H1
E2
G5
F1
H5
F21
G6
E4
D20
H4
B1
F3
F4 G3 G2
AD4 AD3 AD1 AC4
C20
E1
B5
E5
D24 AC2 AC1 D21
D6 D7
AC5 AA6 AB3 C26 D25 AB5 AB6
A24 A25
C7
HOST CLK
BCLK1
ADS# BNR# BPRI# BR0# DEFER# DRDY# HIT#
CONTROL
HITM# IERR# LOCK# RESET#
RS0# RS1# RS2# TRDY#
BPM0# BPM1# BPM2# BPM3#
DBR# DBSY# DPSLP# DPRSTP# DPWR# PRDY# PREQ# PROCHOT#
PWRGOOD SLP# TCK TDI TDO TEST1 TEST2 TMS TRST#
THERMAL
THERMDA
DIODE
THERMDC THERMTRIP#
FOX_PZ47903-2741-42_YONAH
H_DPSLP#
1 2
56_0402_5%@
H_DPRSTP#
1 2
56_0402_5%@
YONAH
DATA GROUP
MISC
LEGACY CPU
+VCCP
R98
R97
4
D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DINV0# DINV1# DINV2# DINV3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
A20M# FERR#
IGNNE#
INIT# LINT0 LINT1
STPCLK#
SMI#
H_D#0
E22
D0#
H_D#1
F24
D1#
H_D#2
E26
D2#
H_D#3
H22
D3#
H_D#4
F23
D4#
H_D#5
G25
D5#
H_D#6
E25
D6#
H_D#7
E23
D7#
H_D#8
K24
D8#
H_D#9
G24
D9#
H_D#10
J24
H_D#11
J23
H_D#12
H26
H_D#13
F26
H_D#14
K22
H_D#15
H25
H_D#16
N22
H_D#17
K25
H_D#18
P26
H_D#19
R23
H_D#20
L25
H_D#21
L22
H_D#22
L23
H_D#23
M23
H_D#24
P25
H_D#25
P22
H_D#26
P23
H_D#27
T24
H_D#28
R24
H_D#29
L26
H_D#30
T25
H_D#31
N24
H_D#32
AA23
H_D#33
AB24
H_D#34
V24
H_D#35
V26
H_D#36
W25
H_D#37
U23
H_D#38
U25
H_D#39
U22
H_D#40
AB25
H_D#41
W22
H_D#42
Y23
H_D#43
AA26
H_D#44
Y26
H_D#45
Y22
H_D#46
AC26
H_D#47
AA24
H_D#48
AC22
H_D#49
AC23
H_D#50
AB22
H_D#51
AA21
H_D#52
AB21
H_D#53
AC25
H_D#54
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AD24
H_D#58
AE21
H_D#59
AD21
H_D#60
AE25
H_D#61
AF25
H_D#62
AF22
H_D#63
AF26
H_DINV#0
J26
H_DINV#1
M26
H_DINV#2
V23
H_DINV#3
AC20
H_DSTBN#0
H23
H_DSTBN#1
M24
H_DSTBN#2
W24
H_DSTBN#3
AD23
H_DSTBP#0
G22
H_DSTBP#1
N25
H_DSTBP#2
Y25
H_DSTBP#3
AE24
H_A20M#
A6
H_FERR#
A5
H_IGNNE#
C4
H_INIT#
B3
H_INTR
C6
H_NMI
B4
H_STPCLK#
D5
H_SMI#
A3
H_D#[0..63] 7
Thermal Sensor ADM1032ARM
+3VS
1
C209
0.1U_0402_16V4Z
1
C212
2200P_0402_50V7K
EC_SMB_CK216,26
EC_SMB_DA216,26
EN_DFAN126
H_DINV#0 7 H_DINV#1 7 H_DINV#2 7 H_DINV#3 7
H_DSTBN#[0..3] 7
H_DSTBP#[0..3] 7
H_A20M# 17 H_FERR# 17 H_IGNNE# 17 H_INIT# 17 H_INTR 17 H_NMI 17
H_STPCLK# 17 H_SMI# 17
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1 2
R594 10K_0402_5%
2006/10/03 2009/10/03
H_THERMDA
2
H_THERMDC
PU5B LM358DT_SO8
5 6
1 2
R431 8.2K_0402_5%
Compal Secret Data
8
P@
P
+
0
-
G
4
Deciphered Date
2 3 8 7
7
U8
D+
ALERT#
D-
THERM#
SCLK SDATA
ADM1032ARM_RM8
R674
1 2
100_0402_5%
2
1
VDD1
6 4 5
GND
1 2
C820 0.1U_0402_16V4Z
FAN_SPEED126
2
FAN1_ON
+3VS
H_PWRGOOD
12
R113
2
H_FERR#
H_SMI# H_INIT# H_NMI H_A20M# H_INTR H_IGNNE# H_STPCLK#
H_CPUSLP#
10K_0402_5%@
B
D37
XDP_TDI XDP_TMS XDP_TDO XDP_BPM#5 XDP_TRST# XDP_TCK
+5VS
1
C
Q40
E
FMMT619_SOT23
3
+FAN1_VOUT
12
1N4148_SOT23
1 2
R432 10K_0402_5%
1
C598 1000P_0402_50V7K
@
2
Placement near to ICH7
12
C211 180P_0402_50V8J@
12
C202 180P_0402_50V8J@
12
C162 180P_0402_50V8J@
12
C203 180P_0402_50V8J@
12
C210 180P_0402_50V8J@
12
C173 180P_0402_50V8J@
12
C161 180P_0402_50V8J@
12
C172 180P_0402_50V8J@
12
C171 180P_0402_50V8J@
12
C169 180P_0402_50V8J@
R56 56_0402_5% R55 56_0402_5% R54 56_0402_5%@ R53 56_0402_5% R57 56_0402_5% R47 56_0402_5%
12
D36
1SS355_SOD323
1
2
Placement near to CPU side
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Yonah CPU in mFCPGA479
1 2 1 2 1 2 1 2 1 2 1 2
JP4
1 2 3
ACES_85205-0300
C597 1000P_0402_50V7K
@
IAKAA M/B LA-3401P
Place close to CPU within 500mil
+VCCP
0.3
of
438Thursda y, October 05, 2006
1
5
4
3
2
1
D D
+V_CPU_GTLREF
Close to CPU pin AD26 within 500mils.
C C
B B
+VCCP
12
R67 1K_0402_1%
12
R58 2K_0402_1%
+CPU_CORE
R52 100_0402_1%
1 2
R51 100_0402_1%
1 2
VCCSENSE
VSSSENSE
Close to CPU pin within 500mils.
CPU_BSEL CPU_BSEL2 CPU_BSEL1
133
166
00
0
12
12
R325
54.9_0402_1%
R68
R324
27.4_0402_1%
Length match within 25 mils The trace width 18 mils space 7 mils
+1.5VS
1
C164
2
10U_0805_10V4Z
CPU_BSEL0
1
1
Resistor placed within
0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal.
12
27.4_0402_1%
1
R65
54.9_0402_1%
12
VCCSENSE36 VSSSENSE36
1
C163
2
0.01U_0402_16V7K
H_PSI#36
CPU_VID036 CPU_VID136 CPU_VID236 CPU_VID336 CPU_VID436 CPU_VID536 CPU_VID636
+V_CPU_GTLREF
CPU_BSEL014 CPU_BSEL114 CPU_BSEL214
+CPU_CORE
+VCCP
VCCSENSE VSSSENSE
H_PSI# CPU_VID0
CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
COMP0 COMP1 COMP2 COMP3
JP18B
AF7
VCCSENSE
AE7
VSSSENSE
B26
VCCA
K6
VCCP
J6
VCCP
M6
VCCP
N6
VCCP
YONAH
VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP
PSI# VID0
VID1 VID2 VID3 VID4 VID5 VID6
GTLREF BSEL0
BSEL1 BSEL2
COMP0 COMP1 COMP2 COMP3
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
FOX_PZ47903-2741-42_YONAH
W21
AD26
AB20 AA20 AF20 AE20 AB18 AB17 AA18 AA17 AD18 AD17 AC18 AC17 AF18 AF17
T6
R6
K21
J21 M21 N21 T21 R21 V21
V6
G21
AE6 AD6
AF5 AE5 AF4 AE3 AF2 AE2
B22 B23 C21
R26 U26
U1
V1
E7
D2
F6 D3 C1
AF1 D22 C23 C24 AA1 AA4 AB2 AA3
M4 N5
T2
V3
B2 C3
T22 B25
AB26
VSS
AA25
VSS
AD25
VSS
AE26
VSS
AB23
VSS
AC24
VSS
AF24
VSS
AE23
VSS
AA22
VSS
AD22
VSS
AC21
VSS
AF21
VSS
AB19
VSS
AA19
VSS
AD19
VSS
AC19
VSS
AF19
VSS
AE19
VSS
AB16
VSS
AA16
VSS
AD16
VSS
AC16
VSS
AF16
VSS
AE16
VSS
AB13
VSS
AA14
VSS
AD13
VSS
AC14
VSS
AF13
VSS
AE14
VSS
AB11
VSS
AA11
VSS
AD11
VSS
AC11
VSS
AF11
VSS
AE11
VSS
AB8
VSS
AA8
VSS
AD8
VSS
AC8
VSS
AF8
VSS
AE8
VSS
AA5
VSS
AD5
VSS
AC6
VSS
AF6
VSS
AB4
VSS
AC3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AF3 AE4 AB1 AA2 AD2 AE1 B6 C5 F5 E6 H6 J5 M5 L6 P6 R5 V5 U6 Y6 A4 D4 E3 H3 G4 K4 L3 P3 N4 T4 U3 Y3 W4 D1 C2 F2 G1
POWER, GROUNG, RESERVED SIGNALS AND NC
+CPU_CORE
JP18C
AE18
VCC
AE17
VCC
AB15
VCC
AA15
VCC
AD15
VCC
AC15
VCC
AF15
VCC
AE15
VCC
AB14
VCC
AA13
VCC
AD14
VCC
AC13
VCC
AF14
VCC
AE13
VCC
AB12
VCC
AA12
VCC
AD12
VCC
AC12
VCC
AF12
VCC
AE12
VCC
AB10
VCC
AB9
VCC
AA10
VCC
AA9
VCC
AD10
VCC
AD9
VCC
AC10
VCC
AC9
VCC
AF10
VCC
AF9
VCC
AE10
POWER, GROUND
VCC
AE9
VCC
AB7
VCC
AA7
VCC
AD7
VCC
AC7
VCC
B20
VCC
A20
VCC
F20
VCC
E20
VCC
B18
VCC
B17
VCC
A18
VCC
A17
VCC
D18
VCC
D17
VCC
C18
VCC
C17
VCC
F18
VCC
F17
VCC
E18
VCC
E17
VCC
B15
VCC
A15
VCC
D15
VCC
C15
VCC
F15
VCC
E15
VCC
B14
VCC
A13
VCC
D14
VCC
C13
VCC
F14
VCC
E13
VCC
B12
VCC
A12
VCC
D12
VCC
C12
VCC
F12
VCC
E12
VCC
B10
VCC
B9
VCC
A10
VCC
A9
VCC
D10
VCC
D9
VCC
C10
VCC
C9
VCC
F10
VCC
F9
VCC
E10
VCC
E9
VCC
B7
VCC
A7
VCC
F7
VCC
FOX_PZ47903-2741-42_YONAH
YONAH
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
K1 J2 M2 N1 T1 R2 V2 W1 A26 D26 C25 F25 B24 A23 D23 E24 B21 C22 F22 E21 B19 A19 D19 C19 F19 E19 B16 A16 D16 C16 F16 E16 B13 A14 D13 C14 F13 E14 B11 A11 D11 C11 F11 E11 B8 A8 D8 C8 F8 E8 G26 K26 J25 M25 N26 T26 R25 V25 W26 H24 G23 K23 L24 P24 N23 T23 U24 Y24 W23 H21 J22 M22 L21 P21 R22 V22 U21 Y21
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/10/03 2009/10/03
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Yonah CPU in mFCPGA479
IAKAA M/B LA-3401P
1
of
538Thursda y, October 05, 2006
0.3
5
4
3
2
1
+CPU_CORE
C550
330U_D_2VM
+CPU_CORE
1
2
+CPU_CORE
1
2
+CPU_CORE
1
2
+CPU_CORE
1
2
1
+
2
C533 10U_0805_6.3V6M
C146 10U_0805_6.3V6M
C207 10U_0805_6.3V6M
C127 10U_0805_6.3V6M
1
C135 10U_0805_6.3V6M
2
1
C147 10U_0805_6.3V6M
2
1
C205 10U_0805_6.3V6M
2
1
C529 10U_0805_6.3V6M
2
330U_D_2VM@
1
C121
2
1
C140 10U_0805_6.3V6M
2
1
C151 10U_0805_6.3V6M
2
1
C125 10U_0805_6.3V6M
2
1
C531 10U_0805_6.3V6M
2
1
C152 10U_0805_6.3V6M
2
1
C206 10U_0805_6.3V6M
2
1
C124 10U_0805_6.3V6M
2
1
C530 10U_0805_6.3V6M
2
Mid Frequence Decoupling 10uF X32 PCS
ESR <= 1.5m ohm Capacitor > 1980uF
330uF ESR 7m ohm X 6 PCS
C536
330U_D_2VM
1
C137 10U_0805_6.3V6M
2
1
C148 10U_0805_6.3V6M
2
1
C543 10U_0805_6.3V6M
2
1
C548 10U_0805_6.3V6M
2
330U_D_2VM@
1
+
C208
2
1
C138 10U_0805_6.3V6M
2
1
C149 10U_0805_6.3V6M
2
1
C546 10U_0805_6.3V6M
2
1
C547 10U_0805_6.3V6M
2
1
+
2
North Side Secondary
1
C139 10U_0805_6.3V6M
2
1
C150 10U_0805_6.3V6M
2
1
C545 10U_0805_6.3V6M
2
1
C532 10U_0805_6.3V6M
2
1
C136 10U_0805_6.3V6M
2
1
C544 10U_0805_6.3V6M
2
1
C204 10U_0805_6.3V6M
2
1
C528 10U_0805_6.3V6M
2
330U_D_2VM
1
+
C122
2
330U_D_2VM
1
C537
+
2
+
D D
C C
South Side Secondary
B B
+VCCP
1
+
C134
2
A A
1
C539
0.1U_0402_16V4Z
2
330U_D2E_2.5VM_R9
1
C534
0.1U_0402_16V4Z
2
1
C540
0.1U_0402_16V4Z
2
1
C535
0.1U_0402_16V4Z
2
1
C541
0.1U_0402_16V4Z
2
1
C538
0.1U_0402_16V4Z
2
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Place these inside socket cavity on Bottom layer (North side Secondary)
2006/10/03 2009/10/03
Compal Secret Data
Deciphered Date
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CPU Bypass capacitors
IAKAA M/B LA-3401P
638Thursda y, October 05, 2006
1
of
0.3
5
H_D#[0..63]4
H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10
D D
C C
H_XSCOMP/H_YSCOMP trace
L
width and sp acing is 5/20.
+VCCP
12
12
R63
R59
54.9_0402_1%
54.9_0402_1%
B B
A A
R64
+VCCP
R313
R314
12
24.9_0402_1%
12
100_0402_1%
12
200_0402_1%
H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_VREF H_XRCOMP H_XSCOMP H_YRCOMP H_YSCOMP H_SWNG0 H_SWNG1
12
R60
24.9_0402_1%
Layout Note: H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 / H_SWNG1 trace width and spacing is 18/20.
H_VREF
1
C503
2
0.1U_0402_16V4Z
5
U6A
F1
HD0#
J1
HD1#
H1
HD2#
J6
HD3#
H3
HD4#
K2
HD5#
G1
HD6#
G2
HD7#
K9
HD8#
K1
HD9#
K7
HD10#
J8
HD11#
H4
HD12#
J3
HD13#
K11
HD14#
G4
HD15#
T10
HD16#
W11
HD17#
T3
HD18#
U7
HD19#
U9
HD20#
U11
HD21#
T11
HD22#
W9
HD23#
T1
HD24#
T8
HD25#
T4
HD26#
W7
HD27#
U5
HD28#
T9
HD29#
W6
HD30#
T5
HD31#
AB7
HD32#
AA9
HD33#
W4
HD34#
W3
HD35#
Y3
HD36#
Y7
HD37#
W5
HD38#
Y10
HD39#
AB8
HD40#
W2
HD41#
AA4
HD42#
AA7
HD43#
AA2
HD44#
AA6
HD45#
AA10
HD46#
Y8
HD47#
AA1
HD48#
AB4
HD49#
AC9
HD50#
AB11
HD51#
AC11
HD52#
AB3
HD53#
AC2
HD54#
AD1
HD55#
AD9
HD56#
AC1
HD57#
AD7
HD58#
AC6
HD59#
AB5
HD60#
AD10
HD61#
AD4
HD62#
AC8
HD63#
J13
HVREF0
K13
HVREF1
E1
HXRCOMP
E2
HXSCOMP
Y1
HYRCOMP
U1
HYSCOMP
E4
HXSWING
W1
HYSWING
CALISTOGA_FCBGA1466~D
PMR3@
HADSTB#0 HADSTB#1
HOST
HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3
HCPURST#
HCPUSLP#
HA3# HA4# HA5# HA6# HA7# HA8#
HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HCLKN HCLKP
HDINV#0 HDINV#1 HDINV#2 HDINV#3
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HRS0# HRS1# HRS2#
12
R321
12
R320
4
H9 C9 E11 G11 F11 G12 F9 H11 J12 G14 D9 J14 H13 J15 F14 D12 A11 C11 A12 A13 E13 G13 F12 B12 B14 C12 A14 C14 D14
D8 G8 B8 F8 A8
B9 C13
AG1 AG2
K4 T7 Y5 AC4 K3 T6 AA5 AC5
J7 W8 U3 AB10
B7 E8 E7 J9 H8 C3 D4 D3 B3 C7 C6 F6 A7 E3
B4 E6 D6
221_0603_1%
1
2
100_0402_1%
4
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_ADSTB#0 H_ADSTB#1
CLK_MCH_BCLK# CLK_MCH_BCLK
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
H_RESET# H_ADS# H_TRDY# H_DPWR# H_DRDY# H_DEFER# H_HITM# H_HIT# H_LOCK# H_BR0# H_BNR# H_BPRI# H_DBSY# H_CPUSLP#
H_RS#0 H_RS#1 H_RS#2
H_SWNG0
C514
0.1U_0402_16V4Z
+VCCP+VCCP
12
R69
12
R66
H_A#[3..31] 4
H_REQ#[0..4] 4
H_ADSTB#0 4 H_ADSTB#1 4
CLK_MCH_BCLK# 14 CLK_MCH_BCLK 14 H_DSTBN#[0..3] 4
H_DSTBP#[0..3] 4
H_DINV#0 4 H_DINV#1 4 H_DINV#2 4 H_DINV#3 4
H_RESET# 4 H_ADS# 4 H_TRDY# 4 H_DPWR# 4 H_DRDY# 4 H_DEFER# 4 H_HITM# 4 H_HIT# 4 H_LOCK# 4 H_BR0# 4 H_BNR# 4 H_BPRI# 4 H_DBSY# 4 H_CPUSLP# 4
H_RS#[0..2] 4
221_0603_1%
H_SWNG1
1
2
100_0402_1%
0.1U_0402_16V4Z
3
DMI_TXP318 DMI_TXP218 DMI_TXP118 DMI_TXP018
DMI_TXN318 DMI_TXN218 DMI_TXN118
Lane Reversal Polarity Reversal
+1.8V
R319 80.6_0402_1% R318 80.6_0402_1%
PM_BMBUSY#18
DDR_TS12,13 DPRSLPVR18,36
H_THERMTRIP#4,17
PWROK18,26
PLT_RST#16,18,22,25
MCH_ICH_SYNC#18
Layout Note: +SM_VREF0 & +SM_VREF1 trace width and spacing is 20/20.
+SM_VREF1
1K_0402_1%
15mils
1
1K_0402_1%
C595
2
0.1U_0402_16V4Z
+SM_VREF0
1K_0402_1%
15mils
1
C128
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C129
0.1U_0402_16V4Z
2
3
1K_0402_1%
DMI_TXN018
DMI_RXP318 DMI_RXP218 DMI_RXP118 DMI_RXP018
DMI_RXN318 DMI_RXN218 DMI_RXN118 DMI_RXN018
M_CLK_DDR012 M_CLK_DDR112 M_CLK_DDR213 M_CLK_DDR313
M_CLK_DDR#012 M_CLK_DDR#112 M_CLK_DDR#213 M_CLK_DDR#313
DDR_CKE0_DIMMA12 DDR_CKE1_DIMMA12 DDR_CKE2_DIMMB13 DDR_CKE3_DIMMB13
DDR_CS0_DIMMA#12 DDR_CS1_DIMMA#12 DDR_CS2_DIMMB#13 DDR_CS3_DIMMB#13
M_ODT012 M_ODT112 M_ODT213 M_ODT313
1 2 1 2
R28 0_0402_5%
1 2
R287 0_0402_5%
1 2
R9 100_0402_1%
+1.8V
12
R425
12
R426
+1.8V
+3VS
12
R62
12
R61
2006/10/03 2009/10/03
DMI_TXP3 DMI_TXP2 DMI_TXP1 DMI_TXP0
DMI_TXN3 DMI_TXN2 DMI_TXN1 DMI_TXN0
DMI_RXP3 DMI_RXP2 DMI_RXP1 DMI_RXP0
DMI_RXN3 DMI_RXN2 DMI_RXN1 DMI_RXN0
M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR2 M_CLK_DDR3
M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3
DDR_CKE0_DIMMA DDR_CKE1_DIMMA DDR_CKE2_DIMMB DDR_CKE3_DIMMB
DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS2_DIMMB# DDR_CS3_DIMMB#
M_ODT0 M_ODT1 M_ODT2 M_ODT3
SMRCOMPN SMRCOMPP
+SM_VREF0 +SM_VREF1
12
+SM_VREF0
PM_BMBUSY# PM_EXTTS#0 PM_EXTTS#1 H_THERMTRIP# PWROK PLTRST_R#
AE35 AF39 AG35 AH39
AC35 AE39 AF35 AG39
AE37 AF41 AG37 AH41
AC37 AE41 AF37 AG41
AY35
AW7
AW40 AW35
AY40 AU20
AT20 BA29 AY29
AW13 AW12
AY21
AW21
AL20
AF10 BA13
BA12 AY20 AU21
AK41
AH33 AH34
Modified
Deciphered Date
2
U6B
DMIRXN0 DMIRXN1 DMIRXN2 DMIRXN3
DMIRXP0 DMIRXP1
DMI
DMIRXP2 DMIRXP3
DMITXN0 DMITXN1 DMITXN2 DMITXN3
DMITXP0 DMITXP1 DMITXP2 DMITXP3
SM_CK0
AR1
SM_CK1 SM_CK2 SM_CK3
SM_CK0#
AT1
SM_CK1#
AY7
SM_CK2# SM_CK3#
SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3
SM_CS0# SM_CS1# SM_CS2# SM_CS3#
SM_OCDCOMP0 SM_OCDCOMP1
SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3
AV9
SM_RCOMPN
AT9
SM_RCOMPP
AK1
SM_VREF0 SM_VREF1
G28
PM_BMBUSY#
F25
PM_EXTTS0#
H26
PM_EXTTS1#
G6
PM_THERMTRIP# PWROK RSTIN#
K28
ICH_SYNC#
CALISTOGA_FCBGA1466~D PMR3@
DDR MUXING
PM
CFG
D_REF_CLKN D_REF_CLKP
CLKNC
D_REF_SSCLKN D_REF_SSCLKP
RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5 RESERVED6 RESERVED7 RESERVED8
RESERVED9 RESERVED10 RESERVED11 RESERVED12 RESERVED13
RESERVED
Strap Pin Table
CFG[2:0]
CFG5
R3112.2K_0402_5% @
12
CFG7
R3062.2K_0402_5% @
12
CFG9
R3092.2K_0402_5% @
12
CFG11
R3122.2K_0402_5% @
12
CFG12
R3162.2K_0402_5% @
12
CFG13
R3152.2K_0402_5% @
12
CFG16
R3102.2K_0402_5% @
12
CFG18
R2941K_0402_5%@
12
CFG19
R2911K_0402_5%
12
CFG20
R2901K_0402_5%@
12
2
CFG5
CFG7
CFG9
CFG11 1 = Ca listoga
CFG[13:12]
CFG16
CFG18
CFG19
SDVO_CTRLDATA
CFG20
(PCIE/SDVO select)
Title
Size Document Number Rev
Date: Sheet
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8
CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
G_CLKP
G_CLKN
CLK_REQ#
NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8
NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18
1
MCH_CLKSEL0
K16
MCH_CLKSEL1H_D#0
K18
MCH_CLKSEL2
J18 F18 E15
CFG5
F15 E18
CFG7
D19 D16
CFG9
G16 E16
CFG11
D15
CFG12
G15
CFG13
K15 C15 H16
CFG16
G18 H15
CFG18
J25
CFG19
K27
CFG20
J26
CLK_MCH_3GPLL
AG33
CLK_MCH_3GPLL#
AF33 A27
A26 C40
D41
MCH_CLKREQ#
H32
A3 A39 A4 A40 AW1 AW41 AY1 BA1 BA2 BA3 BA39 BA40 BA41 C1 AY41 B2 B41 C41 D1
T32 R32 F3 F7 AG11 AF11 H7 J19 A41 A34 D28 D27 A35
CFG[3:17] have internal pull up CFG[19:18] have internal pull down
011 = 667MT/s FSB 001 = 533MT/s FSB
0 = DMI x 2 1 = DMI x 4
*
0 = Reserved
*
0 = Lane Reversal Enable 1 = Normal Operation
*
0 = Reserved
*
00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation
*
0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled (Default)
*
0 = 1.05V
*
1 = 1.5V 0 = Normal Operation
1 = DMI Lane Reversal Enable
*
0 = No SDVO Device Present
*
(Default)
MCH_CLKSEL0 14 MCH_CLKSEL1 14 MCH_CLKSEL2 14
Refer Strap Pin Table
CLK_MCH_3GPLL 14 CLK_MCH_3GPLL# 14
CLK_MCH_DREFCLK# 14 CLK_MCH_DREFCLK 14
CLK_PCIE_GMCH# 14 CLK_PCIE_GMCH 14
MCH_CLKREQ# 14
+3VS
R292
1 2
10K_0402_5%
R288
1 2
10K_0402_5%@
(Default)
(Default)
(Default)
PM_EXTTS#0
PM_EXTTS#1
(Default)1 = Mobile Yonah CPU
(Default)
(Default)
(Default)
1 = SDVO Device Present 0 = Only PCIE or SDVO is
*
operational. 1 = PCIE/SDVO are operating simu.
(Default)
Compal Electronics, Inc.
Calistoga (1/5)
IAKAA M/B LA-3401P
1
of
738Thursday, October 05, 2006
0.3
5
D D
4
3
2
1
DDR_A_BS#012 DDR_A_BS#112 DDR_A_BS#212
DDR_A_DM[0..7]12
DDR_A_DQS[0..7]12
C C
DDR_A_DQS#[0..7]12
DDR_A_MA[0..13]12
B B
DDR_A_CAS#12 DDR_A_RAS#12
DDR_A_WE#12
DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5
DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_B_MA11 DDR_A_MA12 DDR_A_MA13
DDR_A_CAS# DDR_A_RAS# DDR_A_WE#
U6D
AU12
SA_BS0
AV14
SA_BS1
BA20
SA_BS2
AJ33
SA_DM0
AM35
SA_DM1
AL26
SA_DM2
AN22
SA_DM3
AM14
SA_DM4
AL9
SA_DM5
AR3
SA_DM6
AH4
SA_DM7
AK33
SA_DQS0
AT33
SA_DQS1
AN28
SA_DQS2
AM22
SA_DQS3
AN12
SA_DQS4
AN8
SA_DQS5
AP3
SA_DQS6
AG5
SA_DQS7
AK32
SA_DQS0#
AU33
SA_DQS1#
AN27
SA_DQS2#
AM21
SA_DQS3#
AM12
SA_DQS4#
AL8
SA_DQS5#
AN3
SA_DQS6#
AH5
SA_DQS7#
AY16
SA_MA0
AU14
SA_MA1
AW16
SA_MA2
BA16
SA_MA3
BA17
SA_MA4
AU16
SA_MA5
AV17
SA_MA6
AU17
SA_MA7
AW17
SA_MA8
AT16
SA_MA9
AU13
SA_MA10
AT17
SA_MA11
AV20
SA_MA12
AV12
SA_MA13
AY13
SA_CAS#
AW14
SA_RAS#
AY14
SA_WE#
AK23
SA_RCVENIN#
AK24
SA_RCVENOUT#
CALISTOGA_FCBGA1466~D
PMR3@
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8
SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39
DDR SYS MEMORY A
SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
AJ35 AJ34 AM31 AM33 AJ36 AK35 AJ32 AH31 AN35 AP33 AR31 AP31 AN38 AM36 AM34 AN33 AK26 AL27 AM26 AN24 AK28 AL28 AM24 AP26 AP23 AL22 AP21 AN20 AL23 AP24 AP20 AT21 AR12 AR14 AP13 AP12 AT13 AT12 AL14 AL12 AK9 AN7 AK8 AK7 AP9 AN9 AT5 AL5 AY2 AW2 AP1 AN2 AV2 AT3 AN1 AL2 AG7 AF9 AG4 AF6 AG9 AH6 AF4 AF8
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_A_D[0..63] 12 DDR_B_D[0..63] 13
DDR_B_BS#013 DDR_B_BS#113 DDR_B_BS#213
DDR_B_DM[0..7]13
DDR_B_DQS[0..7]13
DDR_B_DQS#[0..7]13
DDR_B_MA[0..13]13
DDR_B_CAS#13 DDR_B_RAS#13
DDR_B_WE#13
DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6DDR_A_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10
DDR_B_MA12 DDR_B_MA13
DDR_B_CAS# DDR_B_RAS# DDR_B_WE#
U6E
AT24
SB_BS0
AV23
SB_BS1
AY28
SB_BS2
AK36
SB_DM0
AR38
SB_DM1
AT36
SB_DM2
BA31
SB_DM3
AL17
SB_DM4
AH8
SB_DM5
BA5
SB_DM6
AN4
SB_DM7
AM39
SB_DQS0
AT39
SB_DQS1
AU35
SB_DQS2
AR29
SB_DQS3
AR16
SB_DQS4
AR10
SB_DQS5
AR7
SB_DQS6
AN5
SB_DQS7
AM40
SB_DQS0#
AU39
SB_DQS1#
AT35
SB_DQS2#
AP29
SB_DQS3#
AP16
SB_DQS4#
AT10
SB_DQS5#
AT7
SB_DQS6#
AP5
SB_DQS7#
AY23
SB_MA0
AW24
SB_MA1
AY24
SB_MA2
AR28
SB_MA3
AT27
SB_MA4
AT28
SB_MA5
AU27
SB_MA6
AV28
SB_MA7
AV27
SB_MA8
AW27
SB_MA9
AV24
SB_MA10
BA27
SB_MA11
AY27
SB_MA12
AR23
SB_MA13
AR24
SB_CAS#
AU23
SB_RAS#
AR27
SB_WE#
AK16
SB_RCVENIN#
AK18
SB_RCVENOUT#
CALISTOGA_FCBGA1466~D
PMR3@
AK39
SB_DQ0
AJ37
SB_DQ1
AP39
SB_DQ2
AR41
SB_DQ3
AJ38
SB_DQ4
AK38
SB_DQ5
AN41
SB_DQ6
AP41
SB_DQ7
AT40
SB_DQ8
AV41
SB_DQ9
AU38
SB_DQ10
AV38
SB_DQ11
AP38
SB_DQ12
AR40
SB_DQ13
AW38
SB_DQ14
AY38
SB_DQ15
BA38
SB_DQ16
AV36
SB_DQ17
AR36
SB_DQ18
AP36
SB_DQ19
BA36
SB_DQ20
AU36
SB_DQ21
AP35
SB_DQ22
AP34
SB_DQ23
AY33
SB_DQ24
BA33
SB_DQ25
AT31
SB_DQ26
AU29
SB_DQ27
AU31
SB_DQ28
AW31
SB_DQ29
AV29
SB_DQ30
AW29
SB_DQ31
AM19
SB_DQ32
AL19
SB_DQ33
AP14
SB_DQ34
AN14
SB_DQ35
AN17
SB_DQ36
AM16
SB_DQ37
AP15
SB_DQ38
AL15
SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
AJ11 AH10 AJ9 AN10 AK13 AH11 AK10 AJ8 BA10 AW10 BA4 AW4 AY10 AY9 AW5 AY5 AV4 AR5 AK4 AK3 AT4 AK5 AJ5 AJ3
DDR SYS MEMORY B
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/10/03 2009/10/03
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Calistoga (2/5)
IAKAA M/B LA-3401P
838Thursda y, October 05, 2006
1
0.3
of
5
4
3
2
1
PCIE_MTX_C_GRX_N[0..15]16 PCIE_MTX_C_GRX_P[0..15]16 PCIE_GTX_C_MRX_N[0..15]16
D D
+3VS
R293 2.2K_0402_5% R295 2.2K_0402_5%
R296 2.2K_0402_5% R297 2.2K_0402_5% R283 10K_0402_5% R284 10K_0402_5%
C C
B B
R282 1.5K_0402_1% R44 75_0402_1% R41 150_0402_1% R37 150_0402_1%
GM@ GM@
1 2 1 2 1 2
@
1 2
@
1 2 1 2 1 2 1 2
12 12
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_CRT_CLK GMCH_CRT_DATA LCTLB_DATA LCTLA_CLK
LIBG GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA
U6C
H27
SDVOCTRL_DATA
H28
SDVOCTRL_CLK
GMCH_TXOUT0+16 GMCH_TXOUT1+16 GMCH_TXOUT2+16
GMCH_TXOUT0-16 GMCH_TXOUT1-16 GMCH_TXOUT2-16
GMCH_TXCLK+16 GMCH_TXCLK-16
GMCH_ENBKL26
GMCH_LCD_CLK16
GMCH_LCD_DATA16
GMCH_ENVDD16
GMCH_TV_COMPS
GMCH_TV_LUMA15 GMCH_TV_CRMA15
GMCH_CRT_CLK15 GMCH_CRT_DATA15
GMCH_CRT_VSYNC15 GMCH_CRT_B15 GMCH_CRT_G15 GMCH_CRT_R15
GMCH_CRT_HSYNC15
R299 150_0402_1% R302 150_0402_1% R36 150_0402_1%
GMCH_TV_LUMA GMCH_TV_CRMA
R308 4.99K_0402_1%
12 12 12
GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+
GMCH_TXOUT0­GMCH_TXOUT1­GMCH_TXOUT2-
GMCH_TXCLK+ GMCH_TXCLK-
GMCH_ENBKL LCTLA_CLK
LCTLB_DATA GMCH_LCD_CLK GMCH_LCD_DATA
GMCH_ENVDD
LIBG
12
GMCH_CRT_CLK GMCH_CRT_DATA
1 2
R298 255_0402_1%
TV_REFSET
B37
LA_DATA0
B34
LA_DATA1
A36
LA_DATA2
C37
LA_DATA#0
B35
LA_DATA#1
A37
LA_DATA#2
F30
LB_DATA0
D29
LB_DATA1
F28
LB_DATA2
G30
LB_DATA#0
D30
LB_DATA#1
F29
LB_DATA#2
A32
LA_CLK
A33
LA_CLK#
E26
LB_CLK
E27
LB_CLK#
D32
LBKLT_CTL
J30
LBKLT_EN
H30
LCTLA_CLK
H29
LCTLB_DATA
G26
LDDC_CLK
G25
LDDC_DATA
F32
LVDD_EN
B38
LIBG
C35
LVBG
C33
LVREFH
C32
LVREFL
A16
TVDAC_A
C18
TVDAC_B
A19
TVDAC_C
J20
TV_IREF
B16
TV_IRTNA
B18
TV_IRTNB
B19
TV_IRTNC
J29
TV_DCONSEL1
K30
TV_DCONSEL0
C26
DDCCLK
C25
DDCDATA
H23
VSYNC
G23
HSYNC
E23
BLUE
D23
BLUE#
C22
GREEN
B22
GREEN#
A21
RED
B21
RED#
J22
CRT_IREF
CALISTOGA_FCBGA1466~D
PMR3@
LVDS
TV CRT
PCI-EXPRESS GRAPHICS
PCIE_GTX_C_MRX_P[0..15]16
PEGCOMP tr ace width
L
and spacing is 18/25 mils.
D40
EXP_COMPI
EXP_RXN0 EXP_RXN1 EXP_RXN2 EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8
EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9 EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9 EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15
EXP_TXP0 EXP_TXP1 EXP_TXP2 EXP_TXP3 EXP_TXP4 EXP_TXP5 EXP_TXP6 EXP_TXP7 EXP_TXP8
EXP_TXP9 EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15
D38 F34
G38 H34 J38 L34 M38 N34 P38 R34 T38 V34 W38 Y34 AA38 AB34 AC38
D34 F38 G34 H38 J34 L38 M34 N38 P34 R38 T34 V38 W34 Y38 AA34 AB38
F36 G40 H36 J40 L36 M40 N36 P40 R36 T40 V36 W40 Y36 AA40 AB36 AC40
D36 F40 G36 H40 J36 L40 M36 N40 P36 R40 T36 V40 W36 Y40 AA36 AB40
EXP_COMPO
PEGCOMP
PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_P15
PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]
+1.5VS_PCIE
R280
24.9_0402_1%
1 2
C449 0.1U_0402_16V7KPM@ C433 0.1U_0402_16V7KPM@ C447 0.1U_0402_16V7KPM@ C431 0.1U_0402_16V7KPM@ C445 0.1U_0402_16V7KPM@ C429 0.1U_0402_16V7KPM@ C443 0.1U_0402_16V7KPM@ C427 0.1U_0402_16V7KPM@ C441 0.1U_0402_16V7KPM@ C425 0.1U_0402_16V7KPM@ C439 0.1U_0402_16V7KPM@ C423 0.1U_0402_16V7KPM@ C437 0.1U_0402_16V7KPM@ C421 0.1U_0402_16V7KPM@ C435 0.1U_0402_16V7KPM@ C419 0.1U_0402_16V7KPM@
C450 0.1U_0402_16V7KPM@ C434 0.1U_0402_16V7KPM@ C448 0.1U_0402_16V7KPM@ C432 0.1U_0402_16V7KPM@ C446 0.1U_0402_16V7KPM@ C430 0.1U_0402_16V7KPM@ C444 0.1U_0402_16V7KPM@ C428 0.1U_0402_16V7KPM@ C442 0.1U_0402_16V7KPM@ C426 0.1U_0402_16V7KPM@ C440 0.1U_0402_16V7KPM@ C424 0.1U_0402_16V7KPM@ C438 0.1U_0402_16V7KPM@ C422 0.1U_0402_16V7KPM@ C436 0.1U_0402_16V7KPM@ C420 0.1U_0402_16V7KPM@
PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/10/03 2009/10/03
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Calistoga (3/5)
IAKAA M/B LA-3401P
938Thursda y, October 05, 2006
1
0.3
of
5
+VCCP
D D
1
+
C523
2
330U_D2E_2.5VM_R9
1
C C
0.47U_0402_6.3V6K
B B
C505
A A
1
C507
C524
2
2
4.7U_0805_10V4Z
2.2U_0805_16V4Z
1
C513
2
1
2
1
0.22U_0603_10V7K C518
2
0.22U_0603_10V7K C519
0.47U_0402_6.3V6K
+1.5VS
MCH_A6
MCH_D2
MCH_AB1
1
2
U6H
AC14
VTT0
AB14
VTT1
W14
VTT2
V14
VTT3
T14
VTT4
R14
VTT5
P14
VTT6
N14
VTT7
M14
VTT8
L14
VTT9
AD13
VTT10
AC13
VTT11
AB13
VTT12
AA13
VTT13
Y13
VTT14
W13
VTT15
V13
VTT16
U13
VTT17
T13
VTT18
R13
VTT19
N13
VTT20
M13
VTT21
L13
VTT22
AB12
VTT23
AA12
VTT24
Y12
VTT25
W12
VTT26
V12
VTT27
U12
VTT28
T12
VTT29
R12
VTT30
P12
VTT31
N12
VTT32
M12
VTT33
L12
VTT34
R11
VTT35
P11
VTT36
N11
VTT37
M11
VTT38
R10
VTT39
P10
VTT40
N10
VTT41
M10
VTT42
P9
VTT43
N9
VTT44
M9
VTT45
R8
VTT46
P8
VTT47
N8
VTT48
M8
VTT49
P7
VTT50
N7
VTT51
M7
VTT52
R6
VTT53
P6
VTT54
M6
VTT55
A6
VTT56
R5
VTT57
P5
VTT58
N5
VTT59
M5
VTT60
P4
VTT61
N4
VTT62
M4
VTT63
R3
VTT64
P3
VTT65
N3
VTT66
M3
VTT67
R2
VTT68
P2
VTT69
M2
VTT70
D2
VTT71
AB1
VTT72
R1
VTT73
P1
VTT74
N1
VTT75
M1
VTT76
AG14
VCCAUX32
AF14
VCCAUX33
AE14
VCCAUX34
Y14
VCCAUX35
AF13
VCCAUX36
AE13
VCCAUX37
AF12
VCCAUX38
AE12
VCCAUX39
AD12
VCCAUX40
CALISTOGA_FCBGA1466~D
PMR3@
P O W E R
4
VCC_SYNC
VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2
VCCA_3GPLL
VCCA_3GBG VSSA_3GBG
VCCA_CRTDAC0 VCCA_CRTDAC1
VSSA_CRTDAC2
VCCA_DPLLA VCCA_DPLLB
VCCA_HPLL
VCCA_LVDS VSSA_LVDS
VCCA_MPLL
VCCA_TVBG
VSSA_TVBG
VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0
VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1
VCCD_HMPLL0 VCCD_HMPLL1
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
VCCD_TVDAC
VCCDQ_TVDAC
VCCAUX10 VCCAUX11 VCCAUX12 VCCAUX13 VCCAUX14 VCCAUX15 VCCAUX16 VCCAUX17 VCCAUX18 VCCAUX19 VCCAUX20 VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28 VCCAUX29 VCCAUX30 VCCAUX31
VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6
VCCHV0 VCCHV1 VCCHV2
VCCAUX0 VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCAUX5 VCCAUX6 VCCAUX7 VCCAUX8 VCCAUX9
H22
B30 C30 A30
AB41 AJ41 L41 N41 R41 V41 Y41
AC33 G41 H41
E21 F21 G21
B26 C39 AF1
A38 B39
AF2 H20
G20
E19 F19 C20 D20 E20 F20
AH1 AH2
A28 B28 C28
D21 H19
A23 B23 B25
AK31 AF31 AE31 AC31 AL30 AK30 AJ30 AH30 AG30 AF30 AE30 AD30 AC30 AG29 AF29 AE29 AD29 AC29 AG28 AF28 AE28 AH22 AJ21 AH21 AJ20 AH20 AH19 P19 P16 AH15 P15 AH14
+2.5VS
+2.5VS
W=40 mils
+1.5VS_3GPLL +2.5VS
+2.5VS_CRTDAC
C498
+1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_HPLL
+2.5VS
+1.5VS_MPLL +3VS_TVBG
+3VS_TVDACA +3VS_TVDACB +3VS_TVDACC
+1.5VS
+1.5VS_TVDAC
+3VS_VCCHV
1
2
C476
0.1U_0402_16V4Z
+1.5VS
1
C463
2
C453
0.1U_0402_16V4Z
+2.5VS
1
+
2
220U_D2_4VM
1
1
2
2
22U_0805_6.3V6M
1 2
L36 0_0603_5%
1
C477 22U_0805_6.3V6M
2
1
1
C454
2
2
0.1U_0402_16V4Z
+1.5VS_PCIE
10U_0805_6.3V6M
1
2
1 2
1
C485
C484
2
2200P_0402_50V7K
3
C461
C455
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
C457
1
10U_0805_6.3V6M
2
L29
2.2_0603_5%
+3VS
2
1
C462
C483
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R281
0_0805_5%
+2.5VS
1
12
+1.5VS
1
C488
C481
2
2
2200P_0402_50V7K
1
1
2
2
C599
22U_0805_6.3V6M
0.1U_0402_16V4Z
C495
R304
0_0805_5%
R307
0.5_0805_1%
1
C494
2
0.1U_0402_16V4Z
2200P_0402_50V7K
PCI-E/MEM/FSB PLL decoupling
KC FBM-L11-201209-221LMAT_0805
R18
1 2
0.5_0805_1%
1
1
C40
C458
2
2
0.1U_0402_16V4Z 10U_0805_6.3V6M
+1.5VS_MPLL
KC FBM-L11-201209-221LMAT_0805
45mA Max. 45mA Max.
1
1
C521
C515
10U_0805_6.3V6M
2
2
0.1U_0402_16V4Z
+1.5VS_DPLLB +1.5VS_DPLLA
KC FBM-L11-201209-221LMAT_0805
40mA Max. 4 0m A Max.
1
1
+
C456
2
2
0.1U_0402_16V4Z
C452
R322
GM@
330U_D2E_2.5VM_R9
R279
R19
12
C41
12
12
12
12
1
2
+1.5VS+1.5VS_3GPLL
+1.5VS_TVDAC +1.5VS
0.022U_0402_16V7K
1
2
0.1U_0402_16V4Z
@
+1.5VS_HPLL
+1.5VS
KC FBM-L11-201209-221LMAT_0805
1
1
C84
C492
2
2
10U_0805_6.3V6M@
KC FBM-L11-201209-221LMAT_0805
1
1
C522
C517
10U_0805_6.3V6M
2
2
0.1U_0402_16V4Z
1
C472
2
0.1U_0402_16V4Z
1
R35
0_0805_5%
1
1
C64
C493
2
2
2200P_0402_50V7K
0.1U_0402_16V4Z
0_0805_5%
1
1
C57
C491
2
22U_0805_6.3V6M
R323
2
2200P_0402_50V7K
0.1U_0402_16V4Z
12
1
C83
0.022U_0402_16V7K
2
12
+1.5VS+1.5VS
R303
12
GM@
C469
330U_D2E_2.5VM_R9
C600
R40
KC FBM-L11-201209-221LMAT_0805
1
+
2
+3VS+3VS_TVDACA+3VS+3VS_TVDACB
12
+3VS+3VS_TVDACC+3VS+3VS_TVBG
R34
12
+1.5VS
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/10/03 2009/10/03
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Calistoga (4/5)
IAKAA M/B LA-3401P
10 38Thursday, October 05, 2006
1
0.3
of
5
4
3
POWER GND
2
1
+VCCP
D D
1
C496
2
0.22U_0603_10V7K
1
C468
C487
2
10U_0805_6.3V6M
C C
1
+
C473
2
1
C467
+
B B
2
A A
C460
10U_0805_6.3V6M
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
1
1
C482
2
2
0.22U_0603_10V7K
0.22U_0603_10V7K
1
1
C459
2
2
1U_0603_10V4Z
U6F
AD27
VCC_NCTF0
AC27
VCC_NCTF1
AB27
VCC_NCTF2
AA27
VCC_NCTF3
Y27
VCC_NCTF4
W27
VCC_NCTF5
V27
VCC_NCTF6
U27
VCC_NCTF7
T27
VCC_NCTF8
R27
VCC_NCTF9
AD26
VCC_NCTF10
AC26
VCC_NCTF11
AB26
VCC_NCTF12
AA26
VCC_NCTF13
Y26
VCC_NCTF14
W26
VCC_NCTF15
V26
VCC_NCTF16
U26
VCC_NCTF17
T26
VCC_NCTF18
R26
VCC_NCTF19
AD25
VCC_NCTF20
AC25
VCC_NCTF21
AB25
VCC_NCTF22
AA25
VCC_NCTF23
Y25
VCC_NCTF24
W25
VCC_NCTF25
V25
VCC_NCTF26
U25
VCC_NCTF27
T25
VCC_NCTF28
R25
VCC_NCTF29
AD24
VCC_NCTF30
AC24
VCC_NCTF31
AB24
VCC_NCTF32
AA24
VCC_NCTF33
Y24
VCC_NCTF34
W24
VCC_NCTF35
V24
VCC_NCTF36
U24
VCC_NCTF37
T24
VCC_NCTF38
R24
VCC_NCTF39
AD23
VCC_NCTF40
V23
VCC_NCTF41
U23
VCC_NCTF42
T23
VCC_NCTF43
R23
VCC_NCTF44
AD22
VCC_NCTF45
V22
VCC_NCTF46
U22
VCC_NCTF47
T22
VCC_NCTF48
R22
VCC_NCTF49
AD21
VCC_NCTF50
V21
VCC_NCTF51
U21
VCC_NCTF52
T21
VCC_NCTF53
R21
VCC_NCTF54
AD20
VCC_NCTF55
V20
VCC_NCTF56
U20
VCC_NCTF57
T20
VCC_NCTF58
R20
VCC_NCTF59
AD19
VCC_NCTF60
V19
VCC_NCTF61
U19
VCC_NCTF62
T19
VCC_NCTF63
AD18
VCC_NCTF64
AC18
VCC_NCTF65
AB18
VCC_NCTF66
AA18
VCC_NCTF67
Y18
VCC_NCTF68
W18
VCC_NCTF69
V18
VCC_NCTF70
U18
VCC_NCTF71
T18
VCC_NCTF72
M19
VCC100
L19
VCC101
N18
VCC102
M18
VCC103
L18
VCC104
P17
VCC105
N17
VCC106
M17
VCC107
N16
VCC108
M16
VCC109
L16
VCC110
CALISTOGA_FCBGA1466~D
PMR3@
5
C516
0.47U_0402_6.3V6K
AG27 AF27 AG26 AF26 AG25 AF25 AG24 AF24 AG23 AF23 AG22 AF22 AG21 AF21 AG20 AF20 AG19 AF19 R19 AG18 AF18 R18 AG17 AF17 AE17 AD17 AB17 AA17 W17 V17 T17 R17 AG16 AF16 AE16 AD16 AC16 AB16 AA16 Y16 W16 V16 U16 T16 R16 AG15 AF15 AE15 AD15 AC15 AB15 AA15 Y15 W15 V15 U15 T15 R15
AE27 AE26 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AC17 Y17 U17
AR6 AP6 AN6 AL6 AK6 AJ6 AV1 AJ1
1
2
VCCSM_LF2 VCCSM_LF1
C520
0.47U_0402_6.3V6K
VCCAUX_NCTF0 VCCAUX_NCTF1 VCCAUX_NCTF2 VCCAUX_NCTF3 VCCAUX_NCTF4 VCCAUX_NCTF5 VCCAUX_NCTF6 VCCAUX_NCTF7 VCCAUX_NCTF8
VCCAUX_NCTF9 VCCAUX_NCTF10 VCCAUX_NCTF11 VCCAUX_NCTF12 VCCAUX_NCTF13 VCCAUX_NCTF14 VCCAUX_NCTF15 VCCAUX_NCTF16 VCCAUX_NCTF17 VCCAUX_NCTF18 VCCAUX_NCTF19 VCCAUX_NCTF20 VCCAUX_NCTF21 VCCAUX_NCTF22 VCCAUX_NCTF23 VCCAUX_NCTF24 VCCAUX_NCTF25 VCCAUX_NCTF26 VCCAUX_NCTF27 VCCAUX_NCTF28 VCCAUX_NCTF29 VCCAUX_NCTF30 VCCAUX_NCTF31 VCCAUX_NCTF32 VCCAUX_NCTF33 VCCAUX_NCTF34 VCCAUX_NCTF35 VCCAUX_NCTF36
P O W E R
VCCAUX_NCTF37 VCCAUX_NCTF38 VCCAUX_NCTF39 VCCAUX_NCTF40 VCCAUX_NCTF41 VCCAUX_NCTF42 VCCAUX_NCTF43 VCCAUX_NCTF44 VCCAUX_NCTF45 VCCAUX_NCTF46 VCCAUX_NCTF47 VCCAUX_NCTF48 VCCAUX_NCTF49 VCCAUX_NCTF50 VCCAUX_NCTF51 VCCAUX_NCTF52 VCCAUX_NCTF53 VCCAUX_NCTF54 VCCAUX_NCTF55 VCCAUX_NCTF56 VCCAUX_NCTF57
VSS_NCTF0 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8
VSS_NCTF9 VSS_NCTF10 VSS_NCTF11 VSS_NCTF12
VCC_SM100
VCC_SM101
VCC_SM102
VCC_SM103
VCC_SM104
VCC_SM105
VCC_SM106
VCC_SM107
VCCSM_LF2 VCCSM_LF1
Place near pin AV1 & AJ1
+1.5VS
+1.8V
1
2
AA33
W33
P33 N33
L33 J33
AA32
Y32
W32
V32 P32 N32
M32
L32 J32
AA31
W31
V31 T31 R31 P31 N31
M31
AA30
Y30
W30
V30 U30 T30 R30 P30 N30
M30
L30
AA29
Y29
W29
V29 U29 R29 P29
M29
L29 AB28 AA28
Y28 V28 U28 T28 R28 P28 N28
M28
L28
P27 N27
M27
L27
P26 N26
L26
N25
M25
L25
P24 N24
M24 AB23 AA23
Y23 P23 N23
M23
L23 AC22 AB22
Y22
W22
P22 N22
M22
L22 AC21 AA21
W21
N21
M21
L21 AC20 AB20
Y20
W20
P20 N20
M20
L20 AB19 AA19
Y19 N19
4
U6G
VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32
P O W E R
VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99
CALISTOGA_FCBGA1466~D
PMR3@
+1.8V+VCCP
AU41
VCC_SM0 VCC_SM1 VCC_SM2 VCC_SM3 VCC_SM4 VCC_SM5 VCC_SM6 VCC_SM7 VCC_SM8
VCC_SM9 VCC_SM10 VCC_SM11 VCC_SM12 VCC_SM13 VCC_SM14 VCC_SM15 VCC_SM16 VCC_SM17 VCC_SM18 VCC_SM19 VCC_SM20 VCC_SM21 VCC_SM22 VCC_SM23 VCC_SM24 VCC_SM25 VCC_SM26 VCC_SM27 VCC_SM28 VCC_SM29 VCC_SM30 VCC_SM31 VCC_SM32 VCC_SM33 VCC_SM34 VCC_SM35 VCC_SM36 VCC_SM37 VCC_SM38 VCC_SM39 VCC_SM40 VCC_SM41 VCC_SM42 VCC_SM43 VCC_SM44 VCC_SM45 VCC_SM46 VCC_SM47 VCC_SM48 VCC_SM49 VCC_SM50 VCC_SM51 VCC_SM52 VCC_SM53 VCC_SM54 VCC_SM55 VCC_SM56 VCC_SM57 VCC_SM58 VCC_SM59 VCC_SM60 VCC_SM61 VCC_SM62 VCC_SM63 VCC_SM64 VCC_SM65 VCC_SM66 VCC_SM67 VCC_SM68 VCC_SM69 VCC_SM70 VCC_SM71 VCC_SM72 VCC_SM73 VCC_SM74 VCC_SM75 VCC_SM76 VCC_SM77 VCC_SM78 VCC_SM79 VCC_SM80 VCC_SM81 VCC_SM82 VCC_SM83 VCC_SM84 VCC_SM85 VCC_SM86 VCC_SM87 VCC_SM88 VCC_SM89 VCC_SM90 VCC_SM91 VCC_SM92 VCC_SM93 VCC_SM94 VCC_SM95 VCC_SM96 VCC_SM97 VCC_SM98 VCC_SM99
VCCSM_LF4
AT41
VCCSM_LF5
AM41 AU40 BA34 AY34 AW34 AV34 AU34 AT34 AR34 BA30 AY30 AW30 AV30 AU30 AT30 AR30 AP30 AN30 AM30 AM29 AL29 AK29 AJ29 AH29 AJ28 AH28 AJ27 AH27 BA26 AY26 AW26 AV26 AU26 AT26 AR26 AJ26 AH26 AJ25 AH25 AJ24 AH24 BA23 AJ23 BA22 AY22 AW22 AV22 AU22 AT22 AR22 AP22 AK22 AJ22 AK21 AK20 BA19 AY19 AW19 AV19 AU19 AT19 AR19 AP19 AK19 AJ19 AJ18 AJ17 AH17 AJ16 AH16 BA15 AY15 AW15 AV15 AU15 AT15 AR15 AJ15 AJ14 AJ13 AH13 AK12 AJ12 AH12 AG12 AK11 BA8 AY8 AW8 AV8 AT8 AR8 AP8 BA6 AY6 AW6 AV6 AT6
Place near pin AT41 & AM41
1
C480
2
0.1U_0402_16V4Z
Place near pin BA23
C117
Place near pin BA15
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
1
C39
C38
2
2
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
+1.8V
1
1
C512
2
0.1U_0402_16V4Z
1
C478
0.47U_0402_6.3V6K
2
1
C42
2
10U_0805_6.3V6M
1
C501
2
0.47U_0402_6.3V6K
2006/10/03 2009/10/03
1
C471
C497
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
10U_0805_6.3V6M
Compal Secret Data
U6I
AC41
VSS0
AA41
VSS1
W41
VSS2
T41
VSS3
P41
VSS4
M41
VSS5
J41
VSS6
F41
VSS7
AV40
VSS8
AP40
VSS9
AN40
VSS10
AK40
VSS11
AJ40
VSS12
AH40
VSS13
AG40
VSS14
AF40
VSS15
AE40
VSS16
B40
VSS17
AY39
VSS18
AW39
VSS19
AV39
VSS20
AR39
VSS21
AN39
VSS22
AJ39
VSS23
AC39
VSS24
AB39
VSS25
AA39
VSS26
Y39
VSS27
W39
VSS28
V39
VSS29
T39
VSS30
R39
VSS31
P39
VSS32
N39
VSS33
M39
VSS34
L39
VSS35
J39
VSS36
H39
VSS37
G39
VSS38
F39
VSS39
D39
VSS40
AT38
VSS41
AM38
VSS42
AH38
VSS43
AG38
VSS44
AF38
VSS45
AE38
VSS46
C38
VSS47
AK37
VSS48
AH37
VSS49
AB37
VSS50
AA37
VSS51
Y37
VSS52
W37
VSS53
V37
VSS54
T37
VSS55
R37
VSS56
P37
VSS57
N37
VSS58
M37
VSS59
L37
VSS60
J37
VSS61
H37
VSS62
G37
VSS63
F37
VSS64
D37
VSS65
AY36
VSS66
AW36
VSS67
AN36
VSS68
AH36
VSS69
AG36
VSS70
AF36
VSS71
AE36
VSS72
AC36
VSS73
C36
VSS74
B36
VSS75
BA35
VSS76
AV35
VSS77
AR35
VSS78
AH35
VSS79
AB35
VSS80
AA35
VSS81
Y35
VSS82
W35
VSS83
V35
VSS84
T35
VSS85
R35
VSS86
P35
VSS87
N35
VSS88
M35
VSS89
L35
VSS90
J35
VSS91
H35
VSS92
G35
VSS93
F35
VSS94
D35
VSS95
AN34
VSS96
AK34
VSS97
AG34
VSS98
AF34
VSS99
CALISTOGA_FCBGA1466~D
PMR3@
Deciphered Date
P O W E R
2
VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199
AE34 AC34 C34 AW33 AV33 AR33 AE33 AB33 Y33 V33 T33 R33 M33 H33 G33 F33 D33 B33 AH32 AG32 AF32 AE32 AC32 AB32 G32 B32 AY31 AV31 AN31 AJ31 AG31 AB31 Y31 AB30 E30 AT29 AN29 AB29 T29 N29 K29 G29 E29 C29 B29 A29 BA28 AW28 AU28 AP28 AM28 AD28 AC28 W28 J28 E28 AP27 AM27 AK27 J27 G27 F27 C27 B27 AN26 M26 K26 F26 D26 AK25 P25 K25 H25 E25 D25 A25 BA24 AU24 AL24 AW23 AT23 AN23 AM23 AH23 AC23 W23 K23 J23 F23 C23 AA22 K22 G22 F22 E22 D22 A22 BA21 AV21 AR21
VSS200
AL21
VSS201
AB21
VSS202
Y21
VSS203
P21
VSS204
K21
VSS205
J21
VSS206
H21
VSS207
C21
VSS208
AW20
VSS209
AR20
VSS210
AM20
VSS211
AA20
VSS212
K20
VSS213
B20
VSS214
A20
VSS215
AN19
VSS216
AC19
VSS217
W19
VSS218
K19
VSS219
G19
VSS220
C19
VSS221
AH18
VSS222
P18
VSS223
H18
VSS224
D18
VSS225
A18
VSS226
AY17
VSS227
AR17
VSS228
AP17
VSS229
AM17 AK17 AV16 AN16
AL16
J16 F16
C16 AN15 AM15 AK15
N15
M15
L15
B15
A15 BA14 AT14 AK14 AD14 AA14
U14
K14
H14
E14 AV13 AR13 AN13 AM13
AL13
AG13
P13
F13
D13
B13 AY12 AC12
K12
H12
E12 AD11 AA11
Y11
J11
D11
B11 AV10 AP10
AL10 AJ10
Title
Size Document Number Rev
Date: Sheet
P O W E R
VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS265 VSS264 VSS263 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279
CALISTOGA_FCBGA1466~D
PMR3@
Compal Electronics, Inc.
Calistoga (5/5)
IAKAA M/B LA-3401P
VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS292 VSS291 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315 VSS316 VSS317 VSS318 VSS319 VSS320 VSS321 VSS322 VSS323 VSS324 VSS325 VSS326 VSS327 VSS328 VSS329 VSS330 VSS331 VSS332 VSS333 VSS334 VSS335 VSS336 VSS337 VSS338 VSS339 VSS340 VSS341 VSS342 VSS343 VSS344 VSS345 VSS346 VSS347 VSS348 VSS349 VSS350 VSS351 VSS352 VSS353 VSS354 VSS355 VSS356 VSS357 VSS358 VSS359 VSS360
11 38Thursday, October 05, 2006
1
U6J
AN21
AG10 AC10 W10 U10 BA9 AW9 AR9 AH9 AB9 Y9 R9 G9 E9 A9 AG8 AD8 AA8 U8 K8 C8 BA7 AV7 AP7 AL7 AJ7 AH7 AF7 AC7 R7 G7 D7 AG6 AD6 AB6 Y6 U6 N6 K6 H6 B6 AV5 AF5 AD5 AY4 AR4 AP4 AL4 AJ4 Y4 U4 R4 J4 F4 C4 AY3 AW3 AV3 AL3 AH3 AG3 AF3 AD3 AC3 AA3 G3 AT2 AR2 AP2 AK2 AJ2 AD2 AB2 Y2 U2 T2 N2 J2 H2 F2 C2 AL1
0.3
of
5
DDR_A_DQS#[0..7]8
DDR_A_D[0..63]8
DDR_A_DM[0..7]8 DDR_A_DQS[0..7]8 DDR_A_MA[0..13]8
D D
Layout Note: Place near JP27
+1.8V
2.2U_0805_16V4Z
2.2U_0805_16V4Z
C C
Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
+0.9VS
0.1U_0402_16V4Z
B B
DDR_A_MA8 DDR_A_MA5
DDR_A_MA1 DDR_A_MA3
DDR_CS0_DIMMA# DDR_A_RAS#
DDR_A_BS#0 DDR_A_MA10
DDR_A_CAS#
A A
DDR_A_WE#
DDR_CS1_DIMMA# M_ODT1
C110
C62
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C56
C55
RP10
1 4 2 3
RP12
1 4 2 3
RP22
1 4 2 3
RP17
1 4 2 3
RP21
1 4 2 3
RP25
2 3 1 4
5
2.2U_0805_16V4Z
2.2U_0805_16V4Z C58
1
2
0.1U_0402_16V4Z
1
1
2
2
C67
C68
+0.9VS
56_0404_4P2R_5%
56_0404_4P2R_5%
56_0404_4P2R_5%
56_0404_4P2R_5%
56_0404_4P2R_5%
56_0404_4P2R_5%
2.2U_0805_16V4Z
C107
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C81
C80
RP2 56_0404_4P2R_5%
14 23
RP9 56_0404_4P2R_5%
14 23
RP6 56_0404_4P2R_5%
14 23
RP11 56_0404_4P2R_5%
14 23
RP18 56_0404_4P2R_5%
14 23
RP26 56_0404_4P2R_5%
14 23
RP5 56_0404_4P2R_5%
14 23
0.1U_0402_16V4Z
C96
C79
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C92
DDR_A_BS#2 DDR_CKE0_DIMMA
DDR_A_MA7 DDR_A_MA6
DDR_A_MA9 DDR_A_MA12
DDR_A_MA2 DDR_A_MA4
DDR_A_MA0 DDR_A_BS#1
DDR_A_MA13 M_ODT0
DDR_CKE1_DIMMA DDR_A_MA11
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1
2
C95
4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C73
0.1U_0402_16V4Z
1
2
C104
C97
1
1
2
2
0.1U_0402_16V4Z
1
1
2
2
C114
C103
Layout Note: Place these resistor closely JP27,all trace length Max=1.5"
C88
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C119
C115
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+1.8V
JP15
1
VREF
3
DDR_A_D0 DDR_A_D4
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D14
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D21 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D22 DDR_A_D19 DDR_A_D23
DDR_A_D25 DDR_A_D24
DDR_A_DM3
DDR_A_D27 DDR_A_D30
DDR_CKE0_DIMMA7
DDR_A_BS#28
DDR_A_BS#08
DDR_A_WE#8
DDR_A_CAS#8
DDR_CS1_DIMMA#7
M_ODT17
CLK_SMBDATA13,14
CLK_SMBCLK13,14
3
DDR_CKE0_DIMMA
DDR_A_BS#2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA7 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#
DDR_A_CAS# DDR_CS1_DIMMA#
M_ODT1 DDR_A_D35
DDR_A_D32 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D39
DDR_A_D33 DDR_A_D45
DDR_A_D41 DDR_A_DM5 DDR_A_D42
DDR_A_D43 DDR_A_D52
DDR_A_D53
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D55 DDR_A_D56
DDR_A_D61 DDR_A_DM7 DDR_A_D58
DDR_A_D59 CLK_SMBDATA
CLK_SMBCLK
+3VS
1
C133
0.1U_0402_16V4Z
2006/10/03 2009/10/03
2
Compal Secret Data
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
PTI_A5652D-A0G16-P
Deciphered Date
DQ4 DQ5
DM0 DQ6
DQ7
DQ12 DQ13
DM1
CK0# DQ14
DQ15
DQ20 DQ21
DM2
DQ22 DQ23
DQ28 DQ29
DQS3#
DQS3 DQ30
DQ31
NC/CKE1
VDD NC/A15 NC/A14
VDD
VDD
VDD
RAS#
VDD
ODT0
NC/A13
VDD
DQ36 DQ37
DM4
DQ38 DQ39
DQ44 DQ45
DQS5#
DQS5 DQ46
DQ47 DQ52
DQ53
CK1#
DM6
DQ54 DQ55
DQ60 DQ61
DQS7#
DQS7 DQ62
DQ63
SAO
VSS
VSS VSS
VSS
VSS VSS
CK0 VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A11
BA1 S0#
VSS
VSS VSS
VSS
VSS
VSS
VSS
VSS CK1
VSS VSS
VSS
VSS
VSS
VSS SA1
2
+1.8V
2
DDR_A_D7
4
DDR_A_D1
6 8
DDR_A_DM0
10 12
DDR_A_D5
14
DDR_A_D6
16 18
DDR_A_D12
20
DDR_A_D13
22 24
DDR_A_DM1
26 28
M_CLK_DDR0
30
M_CLK_DDR#0
32 34
DDR_A_D9
36
DDR_A_D15
38 40
42
DDR_A_D20
44
DDR_A_D16
46 48
DDR_TS
50
NC
A7 A6
A4 A2 A0
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DDR_A_DM2 DDR_A_D18
DDR_A_D29 DDR_A_D28
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D26 DDR_A_D31
DDR_CKE1_DIMMA
DDR_A_MA11 DDR_A_MA6 DDR_A_MA4
DDR_A_MA2 DDR_A_MA0
DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#
M_ODT0 DDR_A_MA13
DDR_A_D36 DDR_A_D37
DDR_A_DM4 DDR_A_D34
DDR_A_D38 DDR_A_D40
DDR_A_D44 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D47
DDR_A_D46 DDR_A_D48
DDR_A_D49 M_CLK_DDR1
M_CLK_DDR#1 DDR_A_DM6 DDR_A_D50DDR_A_D51
DDR_A_D54 DDR_A_D60
DDR_A_D57 DDR_A_DQS#7
DDR_A_DQS7 DDR_A_D62
DDR_A_D63
+DDR_VREF
2.2U_0805_16V4Z C36
1
2
M_CLK_DDR0 7 M_CLK_DDR#0 7
DDR_TS 7,13
DDR_CKE1_DIMMA 7
DDR_A_BS#1 8 DDR_A_RAS# 8 DDR_CS0_DIMMA# 7
M_ODT0 7
M_CLK_DDR1 7 M_CLK_DDR#1 7
0.1U_0402_16V4Z C35
1
2
+DDR_VREF
15mils
1
R427
1K_0402_1%
R428
1K_0402_1%
+1.8V
12
12
DIMM0 RVS H:5.2mm (BOT)
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMM SLOT1
IAKAA M/B LA-3401P
12 38Thursday, October 05, 2006
1
0.3
of
5
DDR_B_DQS#[0..7]8
DDR_B_D[0..63]8
DDR_B_DM[0..7]8 DDR_B_DQS[0..7]8 DDR_B_MA[0..13]8
D D
C C
B B
A A
Layout Note: Place near JP26
+1.8V
2.2U_0805_16V4Z
2.2U_0805_16V4Z C59
1
2
Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
+0.9VS
0.1U_0402_16V4Z
1
2
C53
DDR_B_MA1 DDR_B_MA3
DDR_B_MA10 DDR_B_BS#0
DDR_B_MA0 DDR_B_BS#1
DDR_B_RAS# DDR_CS2_DIMMB#
DDR_B_WE# DDR_B_CAS#
M_ODT3 DDR_CS3_DIMMB#
0.1U_0402_16V4Z
C113
1
2
0.1U_0402_16V4Z
1
2
C65
RP13
RP16
RP15
RP19
RP20
RP24
5
2.2U_0805_16V4Z C60
1
2
0.1U_0402_16V4Z
1
2
C77
1 4 2 3
56_0404_4P2R_5%
1 4 2 3
56_0404_4P2R_5%
1 4 2 3
56_0404_4P2R_5%
1 4 2 3
56_0404_4P2R_5%
1 4 2 3
56_0404_4P2R_5%
2 3 1 4
56_0404_4P2R_5%
1
2
C91
2.2U_0805_16V4Z
1
2
0.1U_0402_16V4Z
1
2
+0.9VS
2.2U_0805_16V4Z
C90
0.1U_0402_16V4Z
C101
RP4 56_0404_4P2R_5%
RP3 56_0404_4P2R_5%
RP8 56_0404_4P2R_5%
RP7 56_0404_4P2R_5%
RP14 56_0404_4P2R_5%
RP23 56_0404_4P2R_5%
RP1
56_0404_4P2R_5%
0.1U_0402_16V4Z
C109
1
2
0.1U_0402_16V4Z
1
2
C111
DDR_B_MA9
14
DDR_B_MA12
23
DDR_CKE3_DIMMB
14
DDR_B_MA11
23
DDR_B_MA5
14
DDR_B_MA8
23
DDR_B_MA7
14
DDR_B_MA6
23
DDR_B_MA2
14
DDR_B_MA4
23
M_ODT2
14
DDR_B_MA13
23
DDR_B_BS#2
14
DDR_CKE2_DIMMB
23
0.1U_0402_16V4Z
C74
1
2
0.1U_0402_16V4Z
1
2
C54
0.1U_0402_16V4Z
C89
1
2
0.1U_0402_16V4Z
1
1
2
2
C66
C78
0.1U_0402_16V4Z
C99
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C105
C94
Layout Note: Place these resistor closely JP26,all trace length Max=1.5"
4
C70
1
+
2
220U_D2_4VM
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C112
C126
1
+
C43
2
220U_D2_4VM
1
2
C118
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+1.8V
JP16
1
VREF
3
DDR_B_D0 DDR_B_D5
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D7 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D22 DDR_B_D23
DDR_B_D24 DDR_B_D25
DDR_B_DM3
DDR_B_D30 DDR_B_D31
DDR_CKE2_DIMMB7
DDR_B_BS#28
DDR_B_BS#08
DDR_B_WE#8
DDR_B_CAS#8
DDR_CS3_DIMMB#7
M_ODT37
CLK_SMBDATA12,14
CLK_SMBCLK12,14
3
DDR_CKE2_DIMMB
DDR_B_BS#2 DDR_B_MA12
DDR_B_MA9 DDR_B_MA8
DDR_B_MA5 DDR_B_MA3 DDR_B_MA1
DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#
DDR_B_CAS# DDR_CS3_DIMMB#
M_ODT3 DDR_B_D37
DDR_B_D36 DDR_B_DQS#4
DDR_B_DQS4 DDR_B_D35
DDR_B_D34 DDR_B_D40
DDR_B_D41 DDR_B_DM5 DDR_B_D42
DDR_B_D47 DDR_B_D48
DDR_B_D53
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D51 DDR_B_D50
DDR_B_D60 DDR_B_D61
DDR_B_DM7 DDR_B_D58
DDR_B_D59 CLK_SMBDATA
CLK_SMBCLK
+3VS
1
C132
0.1U_0402_16V4Z
2006/10/03 2009/10/03
2
Compal Secret Data
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
P-TWO_A5692B-A0G16-P
Deciphered Date
DQ4 DQ5
DM0 DQ6
DQ7
DQ12 DQ13
DM1
CK0#
DQ14 DQ15
DQ20 DQ21
DM2
DQ22 DQ23
DQ28 DQ29
DQS3#
DQS3 DQ30
DQ31
NC/CKE1
VDD NC/A15 NC/A14
VDD
VDD
VDD
RAS#
VDD
ODT0
NC/A13
VDD
DQ36 DQ37
DM4
DQ38 DQ39
DQ44 DQ45
DQS5#
DQS5 DQ46
DQ47 DQ52
DQ53
CK1#
DM6
DQ54 DQ55
DQ60 DQ61
DQS7#
DQS7 DQ62
DQ63
SAO
VSS
VSS VSS
VSS
VSS VSS
CK0 VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A11
BA1 S0#
VSS
VSS VSS
VSS
VSS
VSS
VSS
VSS CK1
VSS VSS
VSS
VSS
VSS
VSS SA1
2
+1.8V
2
DDR_B_D4
4
DDR_B_D1
6 8
DDR_B_DM0
10 12
DDR_B_D6
14
DDR_B_D2
16 18
DDR_B_D12
20
DDR_B_D13
22 24
DDR_B_DM1
26 28
M_CLK_DDR3
30
M_CLK_DDR#3
32 34
DDR_B_D14
36
DDR_B_D15
38 40
42
DDR_B_D16DDR_B_D21
44
DDR_B_D20DDR_B_D17
46 48
DDR_TS
50
NC
A7 A6
A4 A2 A0
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DDR_B_DM2 DDR_B_D18
DDR_B_D19 DDR_B_D26
DDR_B_D28 DDR_B_DQS#3
DDR_B_DQS3 DDR_B_D29
DDR_B_D27 DDR_CKE3_DIMMB
DDR_B_MA11 DDR_B_MA7 DDR_B_MA6
DDR_B_MA4 DDR_B_MA2 DDR_B_MA0
DDR_B_BS#1 DDR_B_RAS# DDR_CS2_DIMMB#
M_ODT2 DDR_B_MA13
DDR_B_D33 DDR_B_D32
DDR_B_DM4 DDR_B_D38
DDR_B_D39 DDR_B_D44
DDR_B_D45 DDR_B_DQS#5
DDR_B_DQS5 DDR_B_D43
DDR_B_D46 DDR_B_D49
DDR_B_D52 M_CLK_DDR2
M_CLK_DDR#2 DDR_B_DM6 DDR_B_D54
DDR_B_D55 DDR_B_D56
DDR_B_D57 DDR_B_DQS#7
DDR_B_DQS7 DDR_B_D62
DDR_B_D63
+DDR_VREF
0.1U_0402_16V4Z
2.2U_0805_16V4Z
1
1
C37
2
2
M_CLK_DDR3 7 M_CLK_DDR#3 7
DDR_TS 7,12
DDR_CKE3_DIMMB 7
DDR_B_BS#1 8 DDR_B_RAS# 8 DDR_CS2_DIMMB# 7
M_ODT2 7
M_CLK_DDR2 7 M_CLK_DDR#2 7
+3VS
1
C34
DIMM1 RVS H:9.2mm (BOT)
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMM SLOT2
IAKAA M/B LA-3401P
13 38Thursday, October 05, 2006
1
0.3
of
5
4
3
2
1
CLK_MCH_DREFCLK7
CLK_MCH_DREFCLK#7
+CK_VDD_MAIN1
+CK_VDD_MAIN2
CLK_48M_ICH18
CLK_48M_CB20
CLK_14M_ICH18
CLK_PCI_PCM20
CLK_PCI_EC26 CLK_PCI_SIO229
CLK_PCI_ICH18
CLK_ENABLE#36
CLK_SMBCLK12,13
CLK_SMBDATA12,13
ICH_SMBCLK18,25
ICH_SMBDATA18,25
R127
1 2
1
C227 10U_0805_10V4Z
2
1
C157 10U_0805_10V4Z
2
1 2
C197
22P_0402_50V8J
22P_0402_50V8J
C168
1 2
+3VS
+3VS
1
C166
0.1U_0402_16V4Z
2
1
C234
0.1U_0402_16V4Z
2
12
Y2
14.31818MHZ_20P_6X1430004201
CLK_48M_ICH CLK_48M_CB
CLK_14M_ICH
CLK_MCH_DREFCLK CLK_MCH_DREFCLK#
CLK_PCI_ICH PCI_ICH
CLK_ENABLE#
R81
2.2K_0402_5%
2
G
Q10
1 3
2N7002_SOT23
D
S
R80
2.2K_0402_5%
2
G
Q9
1 3
2N7002_SOT23
D
S
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C219
0.1U_0402_16V4Z
2
1
C160
0.1U_0402_16V4Z
2
+CK_VDD_DP
+CK_VDD_MAIN1
0.1U_0402_16V4Z
C167
1 2 1 2
C229
0.1U_0402_16V4Z
39_0402_5%
33_0402_5% 39_0402_5% 39_0402_5%
R125 33_0402_5%GM@ R126 33_0402_5%GM@
R336 33_0402_5%
12_0402_5% 12_0402_5%
1 2 1 2
CLK_XTAL_IN
CLK_XTAL_OUT
R132
12
R124
12
R99
12
R119
12
R121
12
R506
12
MCH_DREFCLK MCH_DREFCLK#
12
CLK_SMBCLK
CLK_SMBDATA
2006/10/03 2009/10/03
1
2
+CK_VDD_REF +CK_VDD_48
FSA FSB FSC
PCI_PCM PCI_EC PCI_DEBUG
REF1
C226
0.1U_0402_16V4Z
R86
1 2
1_0805_1%
1 2
R128
2.2_0805_1%
U9
1
VDDSRC
49
VDDSRC
54
VDDSRC
65
VDDSRC
30
VDDPCI
36
VDDPCI
12
VDDCPU
18
VDDREF
40
VDD48
20
X1
19
X2
41
USB_48MHz/FSLA
45
FSLB/TEST_MODE/24Mhz
23
REF0/FSLC/TEST_SEL
34
PCICLK4/FCTSEL1
33
SEL_48M/PCICLK3
32
SEL_24M/PCICLK2
27
SEL_PCI6/PCICLK1
22
SEL_PCI5/REF1
43
DOTT_96MHz/27MHz_Nonspread
44
DOTC_96MHz/27MHz_spread
37
ITP_EN/PCICLK_F0
39
VTT_PWRGD#/PD
9
GND
16
SMBCLK
17
SMBDAT
4
GNDSRC
15
GNDCPU
21
GNDREF
31
GNDPCI
35
GNDPCI
42
GND48
68
GNDSRC
73
THRM_PAD
74
THRM_PAD
75
THRM_PAD
76
THRM_PAD
ICS9LPRS325CKLFT_MLF72
Deciphered Date
+3VS
KC FBM-L11-201209-221LMAT_0805
+CK_VDD_REF
+CK_VDD_48
CPUCLKT2_ITP/SRCCLKT10LP
CPUCLKC2_ITP/SRCCLKC10LP
CLKREQ7#/48Mhz_1
CLKREQ5#/PCICLK6
CLKREQ3#/PCICLK5
LCD100/96/SRC0_TLP LCD100/96/SRC0_CLP
2
PCI_SRC_STOP#
+3VS
PCIEC_CLKREQ#
12
R9210K_0402_5%
SATA_CLKREQ#
12
R33310K_0402_5%
MCH_CLKREQ#
12
R10610K_0402_5%
MINI_CLKREQ#
D D
FSLC1FSLB
CLKSEL1
CLKSEL2
0
0
1
12
R11810K_0402_5%
FSLA
CLKSEL0
CPU MHz
133
166
SRC MHz
1000
100
PCI MHz
33.31
33.3
R129
1 2
+3VS
KC FBM-L11-201209-221LMAT_0805
R79
1 2
+3VS
KC FBM-L11-201209-221LMAT_0805
FSA
FSA
R133 8.2K_0402_5%
CPU_BSEL05
C C
FSB
CPU_BSEL15
FSC (Fixed at low)
FSC
CPU_BSEL25
B B
VGATE18,26,36
1:CPU ITP *0:SRC 10 for Pin 6,5
1:24M *0:test Mode for Pin 45
1:27M/SRC0 *0:DOT 96M/LCD100 for Pin 43,44/47,48
A A
1:48M *0:CLKREQ7# for Pin 38
*1:PCICLK3 0:CLKREQ5# for Pin28
R136
1K_0402_5%@
FSB
R103
8.2K_0402_5%
2N7002_SOT23@
12
1 2
R137
1K_0402_5%
12
+VCCP
R331
@
1K_0402_5%
1 2
1 2
R328
1K_0402_5%
+VCCP
R108 1K_0402_5%@
1 2
12
1 2
R102
1K_0402_5%
+3VS
12
10K_0402_5% R332
CLK_ENABLE#
13
D
2
G
Q16
S
PCI_ICH
PCI_DEBUG
PCI_PCM
PCI_EC
REF1
5
MCH_CLKSEL0 7
MCH_CLKSEL1 7
MCH_CLKSEL2 7
R337
1 2
10K_0402_5%
R116
1 2
10K_0402_5%
R327
1 2
10K_0402_5%
R123
1 2
10K_0402_5%
R100
1 2
10K_0402_5%
+3VS
4
VDDA
GNDA
CPU_STOP#
CPUCLKT1LP CPUCLKC1LP
CPUCLKT0LP CPUCLKC0LP
SRCCLKT9LP SRCCLKC9LP
CLKREQ9# SRCCLKT8LP SRCCLKC8LP
CLKREQ8# SRCCLKT7LP SRCCLKC7LP
SRCCLKT6LP SRCCLKC6LP
CLKREQ6# SRCCLKT5LP SRCCLKC5LP
SRCCLKT4LP SRCCLKC4LP
CLKREQ4# SRCCLKT3LP SRCCLKC3LP
SRCCLKT2LP SRCCLKC2LP
CLKREQ2# SRCCLKT1LP SRCCLKC1LP
CLKREQ1#
+CK_VDD_DP
1
C165 10U_0805_10V4Z
2
+VDDAD
7
KC FBM-L11-201209-221LMAT_0805
8
25 24
11 10
14 13
6 5
3 2
PCIEC_CLKREQ#
72 70 69 71 66 67
SATA_CLKREQ#
38 63 64 62 60 61
MCH_CLKREQ#
29 58 59
MINI_CLKREQ#
57 55 56 28 52 53 26 50 51 46
Need BIOS to di sable when GM SKU
47 48
1
C213
0.1U_0402_16V4Z
2
C170 0.1U_0402_16V4Z
1 2
R82
12
+3VS
H_STP_PCI# 18 H_STP_CPU# 18
CLK_MCH_BCLK 7 CLK_MCH_BCLK# 7
CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4
CLK_PCIE_SATA 17 CLK_PCIE_SATA# 17
SATA_CLKREQ# 18
CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7 MCH_CLKREQ# 7 CLK_PCIE_MCARD 25 CLK_PCIE_MCARD# 25 MINI_CLKREQ# 25 CLK_PCIE_ICH 18 CLK_PCIE_ICH# 18
CLK_PCIE_LAN 22 CLK_PCIE_LAN# 22
CLK_PCIE_VGA 16 CLK_PCIE_VGA# 16
CLK_PCIE_GMCH 7 CLK_PCIE_GMCH# 7
1
C231
0.1U_0402_16V4Z
2
Need BIOS to di sable when PM SKU
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Clock generator
IAKAA M/B LA-3401P
1
1
2
14 38Thursday, October 05, 2006
C230
0.1U_0402_16V4Z
0.3
of
A
CRT CONNECTOR
1 1
2 2
VGA_CRT_R16 GMCH_CRT_R9
VGA_CRT_G16 GMCH_CRT_G9
VGA_CRT_B16 GMCH_CRT_B9
VGA_CRT_HSYNC16 GMCH_CRT_HSYNC9
VGA_CRT_VSYNC16 GMCH_CRT_VSYNC9
1 2
R277 0_0402_5%PM@
1 2
R278 0_0402_5%GM@
1 2
R275 0_0402_5%PM@
1 2
R276 0_0402_5%GM@
1 2
R273 0_0402_5%PM@
1 2
R274 0_0402_5%GM@
1 2
R30 0_0402_5%PM@
1 2
R32 39_0402_5%GM@
1 2
R29 0_0402_5%PM@
1 2
R31 39_0402_5%GM@
1 2
C18 0.1U_0402_16V4Z
CRT_HSYNC
CRT_VSYNC
B
CRT_R
CRT_G
CRT_B
12
12
R5
R6
150_0402_1%
150_0402_1%
+CRT_VCC
1
5
P
4
OE#
A2Y
G
U2
SN74AHCT1G125GW_SOT353-5
3
1 2
C15 0.1U_0402_16V4Z
12
R3
+CRT_VCC
1
C16
2
150_0402_1%
GM@
R4 10K_0402_5%
1
5
P
4
OE#
A2Y
G
U1 SN74AHCT1G125GW_SOT353-5
3
C19
6P_0402_50V8K
1
2
6P_0402_50V8K
GM@
12
D_CRT_HSYNC
D_CRT_VSYNC
1
C21
2
GM@
L3
1 2
BK1608LL121-T_0603
L2
1 2
BK1608LL121-T_0603
L1
1 2
BK1608LL121-T_0603
C22
GM@
6P_0402_50V8K
1 2
L26 10_0402_5%
1 2
L25 10_0402_5%
C
D25
DAN217_SC59
@
1
2
6P_0402_50V8K
Near to JP13
1
2
3
1
C20
GM@
2
C413
1
D24
DAN217_SC59
2
@
6P_0402_50V8K
HSYNC
1
2
GMCH_CRT_DATA9
VGA_DDC_DATA16
VGA_DDC_CLK16
GMCH_CRT_CLK9
3
C17
GM@
VSYNC
10P_0402_50V8J
C411
D23
DAN217_SC59
@
1
2
6P_0402_50V8K
1
2
D
+5VS +R_CRT_VCC +CRT_VCC
+3VS
D3
2 1
CH491D_SC59
1A_6VDC_MINISMDC110
220P_0402_50V7K
1
2
3
10P_0402_50V8J
0.1U_0402_16V4Z
CRT_R_L
CRT_G_L
CRT_B_L
1
C12
2
C14
GM@
1 2
PM@
1 2
PM@
1 2
GM@
1 2
F1
21
1
C13
2
1
C8
2
68P_0402_50V8K
R2660_0402_5%
R2650_0402_5%
R2670_0402_5%
R2680_0402_5%
CRT Conn.
11
12
13
14 10
15
SUYIN _070546FR015S233CR
DSUB_12_DATA DSUB_15_CLK
1
2
68P_0402_50V8K
S
G
2
13
D
S
Q27 2N7002_SOT23
JP13
6 1
7 2
8 3
9 4
5
+3VS
G
2
4.7K_0402_5%
13
D
Q26 2N7002_SOT23
16 17
+CRT_VCC
12
R1
12
R2
4.7K_0402_5%
DSUB_12_DATA
DSUB_15_CLK
E
3 3
D10
DAN217_SC59@
+3VS
C145
1 2
22P_0402_50V8J
VGA_TV_LUMA16 GMCH_TV_LUMA9
VGA_TV_CRMA16 GMCH_TV_CRMA9
4 4
1 2
R42 0_0402_5%PM@
1 2
R43 0_0402_5%GM@
1 2
R38 0_0402_5%PM@
1 2
R39 0_0402_5%GM@
R71
150_0402_1%
TV_LUMA
TV_CRMA
12
12
R77 150_0402_1%
1
C131
100P_0402_50V8J
2
1
C143
100P_0402_50V8J
2
@
L15
1 2
FBM-11-160808-121T_0603
L14
1 2
FBM-11-160808-121T_0603
1 2
C142 22P_0402_50V8J
@
100P_0402_50V8J
2
1
C141
2
Security Classification
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
3
1
2
100P_0402_50V8J
Issued Date
C153
D9
DAN217_SC59@
2
TV_LUMA_L
C
1
3
TV_CRMA_L
JP17
4
4
3
6
3
2
5
2
1
ALLTO_C10877-104A1-L_4P
1
2006/10/03 2009/10/03
Deciphered Date
TV-OUT Conn.
1. Y ground
2. C ground
3. Y (luminance+sync)
4. C (crominance)
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CRT & TVout Connector IAKAA M/B LA-3401P
E
of
15 38Thursday, October 05, 2006
0.3
5
LCD POWER CIRCUIT
D D
GMCH_ENVDD9
BKOFF#26
C C
R264
1 2
0_0402_5% GM@
D26 RB751V_SOD323
21
12
0.1U_0402_16V4Z
12
0.1U_0402_16V4Z
2.2K_0402_5%
+3VS
C417
C415
R263
470_0805_5%
Q29
2N7002_SOT23
VGA_ENVDD
R289
12
R262
4.7K_0402_5%
DISPOFF#
+LCDVDD_LCD
+3VS_LCD
+LCDVDD
12
13
D
S
1 2
+5VALW
R272 1M_0402_5%
1 2
R269
1 2
2
G
100K_0402_5%
13
D
2
G
Q30
S
C418
BSS138_SOT23
LCD/PANEL BD. Conn.
JP1
1
2 4
+LCDVDD_LCD
R270
+LCDVDD
+3VS
B B
A A
12
FBMA-L11-321611-121LMA30T_1206
R271
1 2
FBMA-L11-201209-121LMT 0805
DAC_BRIG26 INVT_PWM26
INVPWR_B+
LCD_CLK LCD_DATA
TXOUT0­TXOUT0+
TXOUT1­TXOUT1+
TXOUT2­TXOUT2+
TXCLK­TXCLK+
5
LCD_CLK LCD_DATA DAC_BRIG INVT_PWM DISPOFF#
PLT_RST#7,18,22,25
R608 0_0402_5%PM@ R609 0_0402_5%PM@ R7 0_0402_5%GM@ R8 0_0402_5%GM@
R12 0_0402_5%GM@ R13 0_0402_5%GM@
R23 0_0402_5%GM@ R22 0_0402_5%GM@
R25 0_0402_5%GM@ R24 0_0402_5%GM@
R21 0_0402_5%GM@ R20 0_0402_5%GM@
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
6 8 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
ACES_88242-3000
+3VALW
14
12
P
A
13
B
G
7
SN74LVC32APWLE_TSSOP14
12 12 12 12
3 5 7 9
U24D
TXCLK­TXCLK+
TXOUT0-
TXOUT0++3VS_LCD
TXOUT2-
TXOUT2+
TXOUT1-
TXOUT1+
INVPWR_B+
PLTRSTR#
11
O
4
2
G
2
1
C414
1000P_0402_50V7K
1
C667
2
VGA_LCD_CLK VGA_LCD_DATA
GMCH_LCD_CLK 9 GMCH_LCD_DATA 9
GMCH_TXOUT0- 9 GMCH_TXOUT0+ 9
GMCH_TXOUT1- 9 GMCH_TXOUT1+ 9
GMCH_TXOUT2- 9 GMCH_TXOUT2+ 9
GMCH_TXCLK- 9 GMCH_TXCLK+ 9
4
+3VS
W=60mils
1 3
1
2
0.1U_0603_25V7K
6P_0402_50V8K
S
Q28
AOS 3401_SOT23
D
W=60mils
0.1U_0402_16V4Z
4.7U_0805_10V4Z
INVPWR_B+
1
C23
2
1
C668
2
6P_0402_50V8K
+LCDVDD
1
C416
2
1 2
L4
1
KC FBM-L11-201209-221LMAT_0805 C24 68P_0402_50V8K
2
For EMI Request
LCD_CLK LCD_DATA DAC_BRIG INVT_PWM DISPOFF#
3
PCIE_MTX_C_GRX_N[0..15]9 PCIE_MTX_C_GRX_P[0..15]9 PCIE_GTX_C_MRX_N[0..15]9 PCIE_GTX_C_MRX_P[0..15]9
TXCLK+ TXCLK-
TXOUT1+
PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P1
B+
1 2
C805 47P_0402_50V8J@
1 2
C806 47P_0402_50V8J@
1 2
C807 220P_0402_50V7K@
1 2
C808 220P_0402_50V7K@
1 2
C809 220P_0402_50V7K@
VGA_CRT_VSYNC15
VGA_CRT_HSYNC15
VGA_CRT_B15 VGA_CRT_G15 VGA_CRT_R15
B+
I = 1.5 A (Max)
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/10/03 2009/10/03
PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6 PCIE_MTX_C_GRX_N6 PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
VGA_CRT_ VSYNC VGA_CRT_HSYNC
VGA_CRT_B VGA_CRT_G VGA_CRT_R
+1.8VS +5VALW
1 2
L28
PM@
FBM-L11-201209-121LMT_0805
1 2
L27
PM@
FBM-L11-201209-121LMT_0805
+B_L
Deciphered Date
2
VGA BOARD Conn.
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]
JP14
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160
2
ACES_88081-1600PM@
R542 0_0402_5%PM@ R543 0_0402_5%PM@
Size Document Number Rev
Date: Sheet
TXOUT2+ TXOUT2-
TXOUT0+
TXOUT0-TXOUT1­VGA_TV_LUMAVGA_TV_CRMA PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15
CLK_PCIE_VGA CLK_PCIE_VGA#
VGA_LCD_DATA VGA_LCD_CLK VGA_ENVDD VGA_DDC_CLK VGA_DDC_DATA VGA_ENBKL SUSP#
PLTRSTR#
1 2 1 2
+1.8VS
+1.5VS
+2.5VS
+3VS
Title
Compal Electronics, Inc.
1
VGA_TV_LUMA 15VGA_TV_CRMA15
CLK_PCIE_VGA 14
CLK_PCIE_VGA# 14
VGA_DDC_CLK 15 VGA_DDC_DATA 15
VGA_ENBKL 26
SUSP# 23,26,27,29,34,35
EC_SMB_CK2 4,26 EC_SMB_DA2 4,26
I = 600mA I = 460mA
VGA / LCD CONN. IAKAA M/B LA-3401P
1
0.3
of
16 38Thursday, October 05, 2006
5
C298 15P_0402_50V8J
32.768KHZ_12.5P_1TJS125BJ2A251
L41
L42
R20233_0402_5%
R20133_0402_5%
12
R21133_0402_5%
R21033_0402_5%
12
+3VS
C287 15P_0402_50V8J
+RTCVCC
BITCLK_MDC
BITCLK_AUDIO
D D
+RTCVCC
C C
+RTCVCC
B B
ACZ_BITCLK_MDC25
ICH_BITCLK_AUDIO23
ACZ_SYNC_MDC25
ICH_SYNC_AUDIO23
ACZ_RST#_MDC25
ICH_RST_AUDIO#23
12
R152 332K_0402_1%
ICH_INTVRMEN
12
R150
0_0402_5%@
R149
1 2
20K_0402_5%
J1
112
@
JUMP_43X79 C246
1U_0402_6.3V4Z
1 2
2
1 2
0_0402_5%
12
C58922P_0402_50V8J
12
C59022P_0402_50V8J
1 2
0_0402_5%
1 2
1 2
ICH_AC_SDIN023 ACZ_SDIN125
ICH_SDOUT_AUDIO23
ACZ_SDOUT_MDC25
PHDD_LED#26
Y4
2
NC
3
NC
R168
1 2
1M_0402_5%
1 2
1 2
+3VS
CLK_PCIE_SATA#14 CLK_PCIE_SATA14
12
IN
OUT
12
47_0402_5%
47_0402_5%
1 4
R189
R183
20K_0402_5%
R19733_0402_5%
12
R19833_0402_5%
12
R348
12
12 12
4
12
R180 10M_0402_5%
ICH_RTCRST#
ICH_INTVRMEN SM_INTRUDER#
PHDD_LED#
SATA_RXN0_C SATA_RXP0_C SATA_TXN0_C SATA_TXP0_C
SATA_RXN1_C SATA_RXP1_C SATA_TXN1_C SATA_TXP1_C
CLK_PCIE_SATA# CLK_PCIE_SATA
R148
1 2
24.9_0402_1%
PD_IORDY
R1664.7K_0402_5%
PD_IRQ
R1658.2K_0402_5%
PD_DACK# PD_IOW# PD_IOR#
ICH_RTCX1
ICH_RTCX2
ACZ_BITCLK ACZ_SYNC
ACZ_RST# ACZ_SDIN0
ACZ_SDIN1
ACZ_SDOUT
AF18
AG2 AH2
AG6 AH6
AH10 AG10
AG16 AH16 AF16 AH15 AF15
AB1 AB2
AA3
W4
Y5
W1
Y1 Y2
W3
V3 U3 U5
V4 T5
U7 V6 V7
U1 R6
R5 T2
T3 T1
T4
AF3 AE3
AF7 AE7
AF1 AE1
U16A
RTXC1 RTCX2
RTCRST# INTVRMEN
INTRUDER#
EE_CS EE_SHCLK EE_DOUT EE_DIN
LAN_CLK LAN_RSTSYNC LAN_RXD0
LAN_RXD1 LAN_RXD2
LAN_TXD0 LAN_TXD1 LAN_TXD2
ACZ_BCLK ACZ_SYNC
ACZ_RST# ACZ_SDIN0
ACZ_SDIN1 ACZ_SDIN2
ACZ_SDOUT
SATALED#
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA_CLKN SATA_CLKP
SATARBIASN SATARBIASP
IORDY IDEIRQ DDACK# DIOW# DIOR#
ICH7_BGA652~D
ICH7R3@
RTC
GPIO49 / CPUPWRGD
LAD0 LAD1 LAD2 LAD3
LDRQ0#
LPCCPU
LDRQ1# / GPIO23
LFRAME#
LAN
A20GATE
A20M#
CPUSLP#
TP1 / DPRSTP#
TP2 / DPSLP#
FERR#
IGNNE#
INIT3_3V#
INIT#
INTR
AC-97/AZALIA
RCIN#
SMI#
STPCLK#
THERMTRIP#
DCS1# DCS3#
SATA
DD10 DD11 DD12 DD13
IDE
DD14 DD15
DDREQ
NMI
DA0 DA1 DA2
DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9
3
LPC_AD0
AA6
LPC_AD1
AB5
LPC_AD2
AC4
LPC_AD3
Y6 AC3
LPC_DRQ#1
AA5
LPC_FRAME#
AB3
GATEA20
AE22
H_A20M#
AH28 AG27 AF24
H_DPSLP#
AH25
H_FERR#
AG26
H_PWRGOOD
AG24
H_IGNNE#
AG22 AG21
H_INIT#
AF22
H_INTR
AF25
EC_KBRST#
AG23
H_SMI#
AF23
H_NMI
AH24
H_STPCLK#
AH22
THRMTRIP_ICH#
AF26
***Must be placed close to AF26 pin within 2"
PD_A0
AH17
PD_A1
AE17
PD_A2
AF17
PD_CS#1
AE16
PD_CS#3
AD16
PD_D0
AB15
PD_D1
AE14
PD_D2
AG13
PD_D3
AF13
PD_D4
AD14
PD_D5
AC13
PD_D6
AD12
PD_D7
AC12
PD_D8
AE12
PD_D9
AF12
PD_D10
AB13
PD_D11
AC14
PD_D12
AF14
PD_D13
AH13
PD_D14
AH14
PD_D15
AC15
PD_DREQ
AE15
LPC_AD0 26,29 LPC_AD1 26,29 LPC_AD2 26,29 LPC_AD3 26,29
LPC_DRQ#1 29 LPC_FRAME# 26,29
R349 10K_0402_5%
12
GATEA20 26
H_A20M# 4
R158 56_0402_5%
R345 10K_0402_5%
12
H_FERR# 4 H_PWRGOOD 4 H_IGNNE# 4 H_INIT# 4
H_INTR 4
12
EC_KBRST# 26
H_SMI# 4 H_NMI 4
H_STPCLK# 4
R159
1 2
24.9_0402_1%
+3VS
+3VS
H_DPRSTP# 4,36 H_DPSLP# 4
+VCCP
+VCCP
12
R160 56_0402_5%
H_THERMTRIP# 4,7
2
1st SATA HDD CONN
+3VS
1
C608 10U_0805_10V4Z
2
+5VS
Place components close to SATA CONN.
1
C274 10U_0805_10V4Z
2
SATA_TXP0_C SATA_TXN0_C
SATA_RXN0_C SATA_RXN0 SATA_RXP0_C
1
2
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
C609
C266
1
C610
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C267
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2nd SATA HDD CONN
SATA_TXP1_C SATA_TXN1_C
SATA_RXN1_C SATA_RXN1 SATA_RXP1_C
+3VS
1
C716
2HDD@
10U_0805_10V4Z
2
+5VS
Place components close to SATA CONN.
1
C720 10U_0805_10V4Z
2
2HDD@
1
2HDD@ 2
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
C717
C721
2HDD@
12
C7123900P_0402_50V7K 2HDD@
12
C7133900P_0402_50V7K 2HDD@
12
C7143900P_0402_50V7K 2HDD@
12
C7153900P_0402_50V7K 2HDD@
1
C718
2HDD@
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C722
2HDD@
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
12
C2643900P_0402_50V7K
12
C2723900P_0402_50V7K
12
C2423900P_0402_50V7K
12
C2443900P_0402_50V7K
1
C611
2
1
C268
2
1
C719
2HDD@ 2
1
C723
2HDD@
2
1
SATA_TXP0 SATA_TXN0
SATA_RXP0
+3VS
+5VS
SATA_TXP1 SATA_TXN1
SATA_RXP1
+3VS
+5VS
SUYIN_127043FB022G208ZR_22P_RV
1 2 3 4 5 6 7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22
SUYIN_127072FR022G210ZR_RV
JP31
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22
JP9
GND A+ A­GND B­B+ GND
V33 V33 V33 GND GND GND V5 V5 V5 GND Reserved GND V12 V12 V12
GND A+ A­GND B­B+ GND
VCC3.3 VCC3.3 VCC3.3 GND GND GND VCC5 VCC5 VCC5 GND RESERVED GND VCC12 VCC12 VCC12
2HDD@
ODD CONN
JP19
Layout Note:
1. Under BATT1 battery Body, no Trace no Via
RTC Battery
+5VS
2. BATT1 + - PIN keep out 80mil from other component ,trace and via
1
C549 10U_0805_10V4Z
2
Place components close to ODD CONN.
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
BATT1
-+
45@
RTCBATT
A A
5
+RTCVCC
+RTCBATT
12
1
C223
0.1U_0402_16V4Z
2
+RTCBATT
1
3
D11 BAS40-04_SOT23
2
+CHGRTC
4
1
C159
2
0.1U_0402_16V4Z
3
1
C155
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2006/10/03 2009/10/03
ODD_RST#18
1
C158
2
+5VS
R78 470_0402_5%
Deciphered Date
R87
100K_0402_5%
12
SEC_CSEL
12
2
PD_D7 PD_D6 PD_D5 PD_D4 PD_D3 PD_D2 PD_D1 PD_D0
PD_IOW# PD_IORDY PD_IRQ PD_A1 PD_A0 PD_CS#1
+5VS +5VS
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 53 54
OCTEK_CDR-50JD1
Title
Size Document Number Rev
Date: Sheet
2 4 6 8
PD_D10
10
PD_D11
12
PD_D12
14
PD_D13
16
PD_D14
18
PD_D15
20 22
PD_IOR#
24 26
PD_DACK#
28 30
PDIAG#
32 34 36 38 40 42 44 46 48 50
1 2
PD_D8
R110 0_0603_5%@
PD_D9
PD_DREQ
R83
PD_A2
PD_CS#3
W=80mils
12
C156 0.1U_0402_16V4Z
1 2
100K_0402_5%
Compal Electronics, Inc.
ICH7-M(1/3)
IAKAA M/B LA-3401P
17 38Thursday, October 05, 2006
1
+5VS +5VS +5VS
of
+5VS
0.3
5
2.2K_0402_5%
ICH_SMBCLK14,25
ICH_SMBDATA14,25
+3VALW
D D
ICH_SMBCLK ICH_SMBDATA
R226 10K_0402_5% R227 10K_0402_5%
Remove SUS_STAT#
SB_INT_FLASH_SEL#27
SIRQ20,26,29
EC_THERM#26
VGATE14,26,36
C C
PCIE_PTX_C_IRX_N225 PCIE_PTX_C_IRX_P225 PCIE_ITX_C_PRX_N225
PCIE_ITX_C_PRX_P225
PCIE_PTX_C_IRX_N322
B B
PCIE_PTX_C_IRX_P322 PCIE_ITX_C_PRX_N322
PCIE_ITX_C_PRX_P322
+3VALW
A A
5
12 12
DBRESET#4 PM_BMBUSY#7
H_STP_CPU#14
MDC_RST#25
ODD_RST#17
R395
SB_SPKR23
H_STP_PCI#14
EC_SWI#26
+3VALW
12
12
OCP#4
EC_SMI#26
KS@
KS@
10K_0402_5%
R394
2.2K_0402_5%
LINKALERT# ICH_SMLINK0 ICH_SMLINK1
SB_SPKR DBRESET#
OCP# H_STP_PCI#
H_STP_CPU#
PM_CLKRUN#
SIRQ
EC_THERM#
VGATE
PCIE_PTX_C_IRX_N2 PCIE_PTX_C_IRX_P2
C3340.1U_0402_16V7K
12
C3440.1U_0402_16V7K
12
PCIE_PTX_C_IRX_N3 PCIE_PTX_C_IRX_P3
C3210.1U_0402_16V7K
12
C3290.1U_0402_16V7K
12
SPI_CS#
SPI_MOSI SPI_MISO
R610
12
RI#
EC_SMI#
PCIE_ITX_PRX_N2 PCIE_ITX_PRX_P2
PCIE_ITX_PRX_N3 PCIE_ITX_PRX_P3
USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7
U16C
C22
SMBCLK
B22
SMBDATA
A26
LINKALERT#
B25
SMLINK0
A25
SMLINK1
A28
RI#
A19
SPKR
A27
SUS_STAT#
A22
SYS_RST#
AB18
GPIO0 / BM_BUSY#
B23
GPIO11 / SMBALERT#
AC20
GPIO18 / STPPCI#
AF21
GPIO20 / STPCPU#
A21
GPIO26
B21
GPIO27
E23
GPIO28
AG18
GPIO32 / CLKRUN#
AC19
GPIO33 / AZ_DOCK_EN#
U2
GPIO34 / AZ_DOCK_RST#
F20
WAKE#
AH21
SERIRQ
AF20
THRM#
AD22
VRMPWRGD
AC21
GPIO6
AC18
GPIO7
E21
GPIO8
ICH7_BGA652~D
ICH7R3@
U16D
F26
PERn1
F25
PERp1
E28
PETn1
E27
PETp1
H26
PERn2
H25
PERp2
G28
PETn2
G27
PETp2
K26
PERn3
K25
PERp3
J28
PETn3
J27
PETp3
M26
PERn4
M25
PERp4
L28
PETn4
L27
PETp4
P26
PERn5
P25
PERp5
N28
PETn5
N27
PETp5
T25
PERn6
T24
PERp6
R28
PETn6
R27
PETp6
R2
SPI_CLK
P6
SPI_CS#
P1
SPI_ARB
P5
SPI_MOSI
P2
SPI_MISO
D3
OC0#
C4
OC1#
D5
OC2#
D4
OC3#
E5
OC4#
C3
OC5# / GPIO29
A2
OC6# / GPIO30
B3
OC7# / GPIO31
ICH7_BGA652~D ICH7R3@
4
SMB
SYS
GPIO
GPIO
PCI-EXPRESS
SPI
USB
4
GPIO21 / SATA0GP GPIO19 / SATA1GP GPIO36 / SATA2GP GPIO37 / SATA3GP
SATA
GPIO
Clocks
GPIO16 / DPRSLPVR
TP0 / BATLOW#
POWER MGT
GPIO35 / SATAREQ#
DMI0RXN DMI0RXP DMI0TXN DMI0TXP
DMI1RXN DMI1RXP DMI1TXN DMI1TXP
DMI2RXN DMI2RXP DMI2TXN DMI2TXP
DMI3RXN DMI3RXP DMI3TXN DMI3TXP
DMI_CLKN
DMI_CLKP
DIRECT MEDIA INTERFACE
DMI_ZCOMP
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBRBIAS#
USBRBIAS
AF19 AH18 AH19 AE19
AC1
CLK14
B2
CLK48
C20
SUSCLK
B24
SLP_S3#
D23
SLP_S4#
F22
SLP_S5#
AA4
PWROK
AC22 C21 C23
PWRBTN#
C19
LAN_RST#
Y4
RSMRST#
E20
GPIO9
A20
GPIO10
F19
GPIO12
E19
GPIO13
R4
GPIO14
E22
GPIO15
R3
GPIO24
D20
GPIO25
AD21 AD20
GPIO38
AE20
GPIO39
0.1U_0402_16V4Z
SLP_S4# SLP_S5#
SN74LVC08APW_TSSOP14
DMI_RXN0
V26
DMI_RXP0
V25
DMI_TXN0
U28
DMI_TXP0
U27
DMI_RXN1
Y26
DMI_RXP1
Y25
DMI_TXN1
W28
DMI_TXP1
W27
DMI_RXN2
AB26
DMI_RXP2
AB25
DMI_TXN2
AA28
DMI_TXP2
AA27
DMI_RXN3
AD25
DMI_RXP3
AD24
DMI_TXN3
AC28
DMI_TXP3
AC27
CLK_PCIE_ICH#
AE28
CLK_PCIE_ICH
AE27 C25
DMI_IRCOMP
D25
USB20_N0
F1
USB20_P0
F2
USB20_N1
G4
USB20_P1
G3
USB20_N2
H1
USB20_P2
H2
USB20_N3
J4
USB20_P3
J3
USB20_N4
K1
USB20_P4
K2
USB20_N5
L4
USB20_P5
L5
USB20_N6
M1
USB20_P6
M2 N4 N3
USBRBIAS
D2 D1
R145 100_0402_5%
1 2
R163 100_0402_5%
1 2
R162 100_0402_5%
1 2
R144 100_0402_5%
1 2
CLK_14M_ICH CLK_48M_ICH
PM_SLP_S3# SLP_S4# SLP_S5#
PWROK DPRSLPVR
ICH_LOW_BAT#
PLT_RST#
EC_SCI# BT_DET#
EC_LID_OUT#
2HDD_DET# EC_FLASH# SATA_CLKREQ#
C354
1 2
CLK_14M_ICH 14 CLK_48M_ICH 14
1 2
R182 10K_0402_5%
R351 100K_0402_5%@
+3VALW
12
14
U20A
P
A
3
O
B
G
7
DMI_RXN0 7 DMI_RXP0 7 DMI_TXN0 7 DMI_TXP0 7
DMI_RXN1 7 DMI_RXP1 7 DMI_TXN1 7 DMI_TXP1 7
DMI_RXN2 7 DMI_RXP2 7 DMI_TXN2 7 DMI_TXP2 7
DMI_RXN3 7 DMI_RXP3 7 DMI_TXN3 7 DMI_TXP3 7
CLK_PCIE_ICH# 14 CLK_PCIE_ICH 14
R387 24.9_0402_1%
1 2
USB20_N0 25 USB20_P0 25 USB20_N1 28 USB20_P1 28 USB20_N2 25 USB20_P2 25 USB20_N3 27 USB20_P3 27 USB20_N4 28 USB20_P4 28 USB20_N5 25 USB20_P5 25 USB20_N6 25 USB20_P6 25
R217 22.6_0402_1%
1 2
Within 500 mils
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PM_SLP_S3# 26
PWROK 7,26
DPRSLPVR 7,36
12
PBTN_OUT# 26
EC_RSMRST# 26
EC_SCI# 26 ACIN 26,28,30
BT_DET# 27
EC_LID_OUT# 26 SPK_SEL_SB 26
EC_FLASH# 27 SATA_CLKREQ# 14 PCM_DISABLE# 21
PM_SLP_S5# 26
Within 500 mils
+1.5VS
3
2
10K_0402_5%
SIRQ
8.2K_0402_5%
PM_CLKRUN#
100K_0402_5%
BT_DET#
1 2
10K_0402_5%
LINKALERT#
10K_0402_5%
DBRESET#
10K_0402_5%
OCP#
8.2K_0402_5%
RI#
ICH_LOW_BAT#
1K_0402_5%
2HDD@
FOR 2ND HDD DETECTION 1: SINGLE HDD 0: DUAL HDD
R606
12
2006/10/03 2009/10/03
8.2K_0402_5%
1 2
10K_0402_5%@
SPI_CS#
10K_0402_5%@
SPI_MOSI
10K_0402_5%@
SPI_MISO
1K_0402_5%
EC_SWI#
100K_0402_5%
2HDD_DET#
1 2
PCI_AD[0..31]20
PCI_PIRQA#20 PCI_PIRQB#20 PCI_PIRQC#20 PCI_PIRQD#20
Compal Secret Data
Deciphered Date
+3VS
R161
12
R164
12
R146
+3VALW
R225
12
R229
12
R228
12
R220
12
R230
R200
12
R199
12
R203
12
R231
12
R607
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8
PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
2
1
Place closely pin B2 Plac e closely pin AC1
CLK_48M_ICH
12
R224
10_0402_5%@
1
C364
15P_0402_50V8J@
2
+3VS
RP32
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5% RP37
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5% RP34
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5% RP33
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5% RP38
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
U16B
E18
AD0
C18
AD1
A16 E16
A18 E17 A17 A15 C14 E14 D14 B12 C13 G15 G13 E12 C11 D11 A11 A10
AE5 AD5 AG4 AH4 AD9
F18
F11 F10
E9
D9
B9 A8 A6
C7
B6 E6
D6
A3 B4
C5
B5
PCI
AD2 AD3 AD4 AD5 AD6 AD7
REQ4# / GPIO22
AD8
GNT4# / GPIO48
AD9 AD10
GPIO17 / GNT5#
AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
Interrupt I/F
PIRQA# PIRQB#
GPIO4 / PIRQG#
PIRQC#
GPIO5 / PIRQH#
PIRQD#
MISC
RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5]
ICH7_BGA652~D IC H7R3@
PCI_DEVSEL# PCI_STOP# PCI_SERR# PCI_TRDY#
PCI_PIRQB# PCI_PIRQA# PCI_PIRQC# PCI_PIRQD#
PCI_PIRQE# PCI_PIRQF# PCI_IRDY# PCI_PERR#
PCI_REQ3# PCI_PIRQH# PCI_REQ2# PCI_FRAME#
PCI_PIRQG# PCI_PLOCK# PCI_REQ0# PCI_REQ5#
PCI_REQ0#
D7
REQ0#
E7
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
GPIO1 / REQ5#
C/BE0# C/BE1# C/BE2# C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR# STOP# TRDY#
FRAME#
PLTRST#
PCICLK
PME#
GPIO2 / PIRQE# GPIO3 / PIRQF#
RSVD[6] RSVD[7] RSVD[8] RSVD[9]
MCH_SYNC#
Title
Size Document Number Rev
Date: Sheet
PCI_REQ1#
C16 D16
PCI_REQ2#
C17
PCI_GNT2#
D17
PCI_REQ3#
E13 F13
PCI_REQ4#
A13
ICH_GPIO48
A14
PCI_REQ5#
C8 D8
PCI_CBE#0
B15
PCI_CBE#1
C12
PCI_CBE#2
D12
PCI_CBE#3
C15
PCI_IRDY#
A7
PCI_PAR
E10 B18
PCI_DEVSEL#
A12
PCI_PERR#
C9
PCI_PLOCK#
E11
PCI_SERR#
B10
PCI_STOP#
F15
PCI_TRDY#
F14
PCI_FRAME#
F16
PLT_RST#
C26
CLK_PCI_ICH
A9 B19
PCI_PIRQE#
G8
PCI_PIRQF#
F7
PCI_PIRQG#
F8
PCI_PIRQH#
G7
AE9 AG8 AH8 F21 AH20
Compal Electronics, Inc.
IAKAA M/B LA-3401P
CLK_14M_ICH
12
R176
10_0402_5%@
1
C281
15P_0402_50V8J@
2
Place closely pin A9
CLK_PCI_ICH
10_0402_5%@
15P_0402_50V8J@
+3VS
R496
1 2
8.2K_0402_5%
R497
1 2
8.2K_0402_5%
R493
1 2
8.2K_0402_5%
ICH7-M(2/3)
1
R223
1 2 1
C365
2
ICH_GPIO48 PCI_REQ4# PCI_REQ1#
PCI_REQ2# 20 PCI_GNT2# 20
PCI_CBE#0 20 PCI_CBE#1 20 PCI_CBE#2 20 PCI_CBE#3 20
PCI_IRDY# 20 PCI_PAR 20 PCI_RST# 20,26,29 PCI_DEVSEL# 20 PCI_PERR# 20
PCI_SERR# 20 PCI_STOP# 20 PCI_TRDY# 20 PCI_FRAME# 20
PLT_RST# 7,16,22,25 CLK_PCI_ICH 14
PCI_PIRQE# 20 PCI_PIRQF# 20 PCI_PIRQG# 20 PCI_PIRQH# 20
MCH_ICH_SYNC# 7
of
18 38Thursday, October 05, 2006
0.3
5
4
3
2
1
+ICH_V5REF_RUN
+3VS
+1.5VS
C304
C279
10U_0805_10V4Z
+1.5VS
1
+
C579
2
0.1U_0402_16V4Z
220U_D2_4VM
+1.5VS_DMIPLL+1.5VS_DMIPLLR
1
1
C280
2
2
0.01U_0402_16V7K
1
C259
2
0.1U_0402_16V4Z
1 2
L30 CHB1608U301_0603
1
2
Place closely pin D28,T28,AD28.
Place closely pin AG5.
Place closely pin AG9.
0.1U_0402_16V4Z
D D
100_0402_5%
10_0402_5%
C C
B B
A A
R147
R232
12
12
+3VS+5VS
21
D12 RB751V_SOD323
+ICH_V5REF_RUN
1
C576
0.1U_0402_16V4Z
2
+3VALW+5VALW
21
D14 RB751V_SOD323
+ICH_V5REF_SUS
1
C361
0.1U_0402_16V4Z
2
+1.5VS
1
C561
0.1U_0402_16V4Z
2
Place closely pin AG28 within 100mlis.
C347
1 2
0_0805_5%
1
C258
2
1
2
R170
+SATAPLL
0.1U_0402_16V4Z
+1.5VS
R169
1 2
0.5_0805_1%
1 2
L17 CHB1608U301_0603
+3VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C559
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS
C261
0.1U_0402_16V4Z
+1.5VS
C255
1U_0603_10V4Z
+USBPLL
C356
+ICH_V5REF_SUS
1
C574
2
+3VS
1
C580
2
+1.5VS_DMIPLL
1
2
1
2
1
2
+3VALW
G10
AD17
F6
AA22 AA23 AB22 AB23 AC23 AC24 AC25 AC26 AD26 AD27 AD28
D26 D27 D28 E24 E25 E26 F23 F24 G22 G23 H22 H23 J22 J23 K22 K23 L22
L23 M22 M23 N22 N23
P22
P23 R22 R23 R24 R25 R26
T22
T23
T26
T27
T28 U22 U23
V22
V23 W22 W23
Y22
Y23
B27
AG28
AB7 AC6 AC7 AD6 AE6 AF5 AF6 AG5 AH5
AD2
AH11 AB10
AB9
AC10 AD10 AE10 AF10
AF9 AG9 AH9
E3
C1
AA2
Y7 V5
V1 W2 W7
1
C306
0.1U_0402_16V4Z
2
U16F
V5REF[1] V5REF[2] V5REF_Sus Vcc1_5_B[1]
Vcc1_5_B[2] Vcc1_5_B[3] Vcc1_5_B[4] Vcc1_5_B[5] Vcc1_5_B[6] Vcc1_5_B[7] Vcc1_5_B[8] Vcc1_5_B[9] Vcc1_5_B[10] Vcc1_5_B[11] Vcc1_5_B[12] Vcc1_5_B[13] Vcc1_5_B[14] Vcc1_5_B[15] Vcc1_5_B[16] Vcc1_5_B[17] Vcc1_5_B[18] Vcc1_5_B[19] Vcc1_5_B[20] Vcc1_5_B[21] Vcc1_5_B[22] Vcc1_5_B[23] Vcc1_5_B[24] Vcc1_5_B[25] Vcc1_5_B[26] Vcc1_5_B[27] Vcc1_5_B[28] Vcc1_5_B[29] Vcc1_5_B[30] Vcc1_5_B[31] Vcc1_5_B[32] Vcc1_5_B[33] Vcc1_5_B[34] Vcc1_5_B[35] Vcc1_5_B[36] Vcc1_5_B[37] Vcc1_5_B[38] Vcc1_5_B[39] Vcc1_5_B[40] Vcc1_5_B[41] Vcc1_5_B[42] Vcc1_5_B[43] Vcc1_5_B[44] Vcc1_5_B[45] Vcc1_5_B[46] Vcc1_5_B[47] Vcc1_5_B[48] Vcc1_5_B[49] Vcc1_5_B[50] Vcc1_5_B[51] Vcc1_5_B[52] Vcc1_5_B[53]
Vcc3_3[1] VccDMIPLL Vcc1_5_A[1]
Vcc1_5_A[2] Vcc1_5_A[3] Vcc1_5_A[4] Vcc1_5_A[5] Vcc1_5_A[6] Vcc1_5_A[7] Vcc1_5_A[8] Vcc1_5_A[9]
VccSATAPLL Vcc3_3[2] Vcc1_5_A[10]
Vcc1_5_A[11] Vcc1_5_A[12] Vcc1_5_A[13] Vcc1_5_A[14] Vcc1_5_A[15] Vcc1_5_A[16] Vcc1_5_A[17] Vcc1_5_A[18]
VccSus3_3[19] VccUSBPLL VccSus1_05/VccLAN1_05[1]
VccSus1_05/VccLAN1_05[2] VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2] VccSus3_3/VccLAN3_3[3] VccSus3_3/VccLAN3_3[4]
ICH7_BGA652~D
ICH7R3@
Vcc1_05[1] Vcc1_05[2] Vcc1_05[3] Vcc1_05[4] Vcc1_05[5] Vcc1_05[6] Vcc1_05[7] Vcc1_05[8]
Vcc1_05[9] Vcc1_05[10] Vcc1_05[11] Vcc1_05[12] Vcc1_05[13] Vcc1_05[14] Vcc1_05[15] Vcc1_05[16] Vcc1_05[17] Vcc1_05[18] Vcc1_05[19] Vcc1_05[20]
Vcc3_3 / VccHDA
VccSus3_3/VccSusHDA
V_CPU_IO[1] V_CPU_IO[2] V_CPU_IO[3]
Vcc3_3[3] Vcc3_3[4] Vcc3_3[5] Vcc3_3[6] Vcc3_3[7] Vcc3_3[8]
Vcc3_3[9] Vcc3_3[10] Vcc3_3[11]
Vcc3_3[12] Vcc3_3[13] Vcc3_3[14] Vcc3_3[15] Vcc3_3[16] Vcc3_3[17] Vcc3_3[18] Vcc3_3[19] Vcc3_3[20] Vcc3_3[21]
VccRTC VccSus3_3[1] VccSus3_3[2]
VccSus3_3[3] VccSus3_3[4] VccSus3_3[5] VccSus3_3[6]
VccSus3_3[7] VccSus3_3[8] VccSus3_3[9]
VccSus3_3[10] VccSus3_3[11] VccSus3_3[12] VccSus3_3[13] VccSus3_3[14] VccSus3_3[15] VccSus3_3[16] VccSus3_3[17] VccSus3_3[18]
Vcc1_5_A[19] Vcc1_5_A[20]
Vcc1_5_A[21] Vcc1_5_A[22] Vcc1_5_A[23]
Vcc1_5_A[24] Vcc1_5_A[25]
VccSus1_05[1] VccSus1_05[2]
VccSus1_05[3]
Vcc1_5_A[26] Vcc1_5_A[27] Vcc1_5_A[28] Vcc1_5_A[29] Vcc1_5_A[30]
L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18
U6 R7 AE23
AE26 AH26
AA7 AB12 AB20 AC16 AD13 AD18 AG12 AG15 AG19
A5 B13 B16 B7 C10 D15 F9 G11 G12 G16
W5 P7 A24
C24 D19 D22 G19
K3 K4 K5 K6 L1 L2 L3 L6 L7 M6 M7 N7
AB17 AC17
T7 F17 G17
AB8 AC8
K7 C28
G20 A1
H6 H7 J6 J7
+VCCP
0.1U_0402_16V4Z
1
1
C256
C257
2
2
1U_0603_10V4Z
1
2
1
1
C581
2
2
0.1U_0402_16V4Z
1
C577
0.1U_0402_16V4Z
2
1
C333
0.1U_0402_16V4Z
2
+1.5VS
1 2
C567 0.1U_0402_16V4Z
+1.5VS
1
C363
0.1U_0402_16V4Z
2
1
+
2
+3VALW
+3VS
C565
0.1U_0402_16V4Z
1
C362
C578
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C582
0.1U_0402_16V4Z
2
1
C340
0.1U_0402_16V4Z
2
C243
330U_D2E_2.5VM_R9
+VCCP
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
+3VS
+3VALW
+3VALW
C556
1 2
1 2
C562
1 2
C286
U16E
A4
VSS[0]
A23
VSS[1]
B1
VSS[2]
B8
VSS[3]
B11
VSS[4]
B14
VSS[5]
B17
VSS[6]
B20
VSS[7]
B26
VSS[8]
B28
VSS[9]
C2
VSS[10]
C6
VSS[11]
C27
VSS[12]
D10
VSS[13]
D13
VSS[14]
D18
VSS[15]
D21
VSS[16]
D24
VSS[17]
E1
VSS[18]
E2
VSS[19]
E4
VSS[21]
E8
VSS[22]
+3VS
1
C310
0.1U_0402_16V4Z
2
+RTCVCC
1
1
C260
C251
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
E15
VSS[23]
F3
VSS[24]
F4
VSS[25]
F5
VSS[26]
F12
VSS[27]
F27
VSS[28]
F28
VSS[29]
G1
VSS[30]
G2
VSS[31]
G5
VSS[32]
G6
VSS[33]
G9
VSS[34]
G14
VSS[35]
G18
VSS[36]
G21
VSS[37]
G24
VSS[38]
G25
VSS[39]
G26
VSS[40]
H3
VSS[41]
H4
VSS[42]
H5
VSS[43]
H24
VSS[44]
H27
VSS[45]
H28
VSS[46]
J1
VSS[47]
J2
VSS[48]
J5
VSS[49]
J24
VSS[50]
J25
VSS[51]
J26
VSS[52]
K24
VSS[53]
K27
VSS[54]
K28
VSS[55]
L13
VSS[56]
L15
VSS[57]
L24
VSS[58]
L25
VSS[59]
L26
VSS[60]
M3
VSS[61]
M4
VSS[62]
M5
VSS[63]
M12
VSS[64]
M13
VSS[65]
M14
VSS[66]
M15
VSS[67]
M16
VSS[68]
M17
VSS[69]
M24
VSS[70]
M27
VSS[71]
M28
VSS[72]
N1
VSS[73]
N2
VSS[74]
N5
VSS[75]
N6
VSS[76]
N11
VSS[77]
N12
VSS[78]
N13
VSS[79]
N14
VSS[80]
N15
VSS[81]
N16
VSS[82]
N17
VSS[83]
N18
VSS[84]
N24
VSS[85]
N25
VSS[86]
N26
VSS[87]
P3
VSS[88]
P4
VSS[89]
P12
VSS[90]
P13
VSS[91]
P14
VSS[92]
P15
VSS[93]
P16
VSS[94]
P17
VSS[95]
P24
VSS[96]
P27
VSS[97]
ICH7_BGA652~D
VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194]
P28 R1 R11 R12 R13 R14 R15 R16 R17 R18 T6 T12 T13 T14 T15 T16 T17 U4 U12 U13 U14 U15 U16 U17 U24 U25 U26 V2 V13 V15 V24 V27 V28 W6 W24 W25 W26 Y3 Y24 Y27 Y28 AA1 AA24 AA25 AA26 AB4 AB6 AB11 AB14 AB16 AB19 AB21 AB24 AB27 AB28 AC2 AC5 AC9 AC11 AD1 AD3 AD4 AD7 AD8 AD11 AD15 AD19 AD23 AE2 AE4 AE8 AE11 AE13 AE18 AE21 AE24 AE25 AF2 AF4 AF8 AF11 AF27 AF28 AG1 AG3 AG7 AG11 AG14 AG17 AG20 AG25 AH1 AH3 AH7 AH12 AH23 AH27
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/10/03 2009/10/03
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
ICH7-M(3/3)
IAKAA M/B LA-3401P
19 38Thursday, October 05, 2006
1
0.3
of
5
+3VS
CHB1608U301_0603
L44
D D
PCI_AD[0..31]18
PCI_CBE#[0..3]18
MSCLK_SDCLK
SMELWP#
C C
B B
place near Chip 8412
CLK_48M_CB
12
R555
10_0402_5%@
1
C755
10P_0402_50V8K@
2
JP20
4
5
3
6
2
7
1
8
AMP_440168-2
PCI_AD[0..31] PCI_CBE#[0..3]
R55133_0402_5%
12
7412@
R553
7412@
12
33_0402_5%
CLK_48M_CB14
2
12
C759
1
1U_0603_10V4Z
12
R563
56.2_0603_1%
1
C761
2
220P_0402_50V7K
R557 1K_0402_5% R558 4.7K_0402_5%
+3VS
12
R561
R560
56.2_0603_1%
56.2_0603_1%
12
R564
R566 R567
56.2_0603_1%
12
R572
5.1K_0603_1%
+AVDD_7412
0.1U_0402_16V4Z
12
1
C743
0.1U_0402_16V4Z
C760 1U_0603_10V4Z
+3VS
2
MC_PWRON# SM_RB
SD_CD# MS_CD#
MSCLK_SDCLK_SMELWP# MSBS_SDCMD_SMWE# MSD3_SDD3_SMD3 MSD2_SDD2_SMD2 MSD1_SDD1_SMD1 MSD0_SDD0_SMD0
SMRE SDCMD_SMALE SDD0_SMD4 SDD1_SMD5 SDD2_SMD6 SDD3_SMD7 SDWP#_SMCE#
SMCLE XD_CD#
1 2 1 2
R562 6.34K_0402_1%
1 2
XTPBIAS0 XTPA0+ XTPA0­XTPB0+ XTPB0-
1 2
1K_0402_5%
1 2 1 2
1K_0402_5%
R575
1 2
4.7K_0402_5%
C744
CPS X_OUT
X_IN
CPS
0.01U_0402_16V7K
1
1
C745
2
2
0.01U_0402_16V7K
U31B
C8
MC_PWR_CTRL_0
F8
MC_PWR_CTRL_1/SM_R/B#
E9
SD_CD#
A8
MS_CD#
B8
SM_CD#
A7
MS_CLK/SD_CLK/SM_EL_WP#
E8
MS_BS/SD_CMD/SM_WE#
B6
MS_DATA3/SD_DAT3/SM_D3
A6
MS_DATA2/SD_DAT2/SM_D2
C7
MS_DATA1/SD_DAT1/SM_D1
B7
MS_SDIO(DATA0)/SD_DAT0/SM_D0
A4
SD_CLK/SM_RE#
C5
SD_CMD/SM_ALE
C6
SD_DAT0/SM_D4
A5
SD_DAT1/SM_D5
B5
SD_DAT2/SM_D6
E6
SD_DAT3/SM_D7
E7
SD_WP/SM_CE#
G5
SC_PWR_CTRL
B4
SM_CLE
A3
XD_CD#/SM_PHYS_WP#
P12
TEST0
F1
CLK_48
P17
PHY_TEST_MA
T18
R0
T19
R1
R13
TPBIAS0
V14
TPA0P
W14
TPA0N
V13
TPB0P
W13
TPB0N
W17
TPBIAS1
V16
TPA1P
W16
TPA1N
V15
TPB1P
W15
TPB1N
R12
CPS
R18
XO
R19
XI
CLOSE TO CHIP
C76218P_0402_50V8J
24.576MHz_16P_3XG-24576-43E1
C76418P_0402_50V8J
A A
+3VS
0.1U_0402_16V4Z
C765
4.7U_0805_10V4Z
X_OUT
X3
1 2
X_IN
1
C766
2
5
1
2
C746
4
1
C747
10U_0805_10V4Z
2
P13
P14
AVDD_33
AVDD_33
4
P15
U19
U15
AVDD_33
VDDPLL_15
VDDPLL_33
PCI7412
AGND
AGND
AGND
R17
R14
U13
U14
C737
10U_0805_10V4Z
C742
1 2
K19
VR_PORTK1VR_PORT
VSSPLL
0.01U_0402_16V7K
VSSPLL
0.1U_0402_16V4Z
1 2
C748 1U_0603_10V4Z
W8
VCCPP1VCCP
RI_OUT#/PME#
PCI7412ZHK_PBGA257
VSSPLL
+VCC_5IN1
D
Q64
S
1
C738
2
C/BE3# C/BE2# C/BE1# C/BE0#
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL PERR# SERR#
REQ# GNT#
PRST#
GRST#
SUSPEND#
SPKROUT
MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6
VR_EN#
12
R579 470_0805_5%
7412@
13
2
G
2N7002_SOT23
7412@
3
0.01U_0402_16V7K
1
1
C739
2
2
M1
AD31
M2
AD30
M3
AD29
M6
AD28
M5
AD27
N1
AD26
N2
AD25
N3
AD24
P3
AD23
R1
AD22
R2
AD21
P5
AD20
R3
AD19
T1
AD18
T2
AD17
W4
AD16
W7
AD15
R8
AD14
U8
AD13
V8
AD12
W9
AD11
V9
AD10
U9
AD9
R9
AD8
V10
AD7
U10
AD6
R10
AD5
W11
AD4
V11
AD3
U11
AD2
P11
AD1
R11
AD0
P2 U5 V7 W10
U7
PAR
R6 W5 V5 V6 U6 N5 R7 W6 L3 L2
L1
PCLK
K3 K5 L5
J5 H3 G1
H5 H2 H1 J1 J2 J3
G2
SCL
G3
SDA
K2
MC_PWRON#
1
2
0.1U_0402_16V4Z
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCI_CBE#3 PCI_CBE#2 PCI_CBE#1 PCI_CBE#0
1 2
43K_0402_5%
PIRQA PIRQB PIRQC
PIRQD 5IN1_LED
1 2
R576 300_0402_5%
1 2
R577 300_0402_5%
R578 1K_0402_5%
1 2
CHB1608U301_0603
1 2
1
C741
C740
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
2
R559 100_0402_5%
R565
R568 43K_0402_5%
1 2
R569 0_0402_5% R570 0_0402_5% R571 0_0402_5%
R573 0_0402_5%
1
C749
2
0.1U_0402_16V4Z
CLK_PCI_PCM
PCI_AD20
12
CLK_PCI_PCM
PCI_RST#
+3VS
12 12 12
12
R574 10K_0402_5%
1
C763
0.1U_0402_16V4Z
2
PIRQA
R580 0_0402_5%@
PIRQB
R581 0_0402_5%@
PIRQC
R582 0_0402_5%@
PIRQD
R583 0_0402_5%@
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+3VS
L43
PCI7412:6IN1 + 1394 + CardBus PCI4512:1394 + CardBus
+3VS
0.01U_0402_16V7K
1
C750
2
MSBS_SDCMD_SMWE#
SMRE
SDWP#_SMCE#
SM_RB
12
R554
1
C754
2
PCI_PAR 18 PCI_FRAME# 18 PCI_TRDY# 18
PCI_IRDY# 18
PCI_STOP# 18
PCI_DEVSEL# 18 PCI_PERR# 18
PCI_SERR# 18 PCI_REQ2# 18
PCI_GNT2# 18
CLK_PCI_PCM 14
PCI_RST# 18,26,29
12
12 12 12 12
2006/10/03 2009/10/03
1
C751
2
0.01U_0402_16V7K
10_0402_5%@
15P_0402_50V8J@
PCM_SPK 23 PCI_PIRQA# 18
PCI_PIRQB# 18 PCI_PIRQC# 18
SIRQ 18,26,29
PCI_PIRQD# 18
+3VS
2
C752
C753
1U_0603_10V4Z
1
7412@
1 2
R548 100K_0402_5%
7412@
1 2
R549 100K_0402_5%
7412@
1 2
R550 100K_0402_5%
7412@
1 2
R552 22K_0402_5%
PCI_PIRQE# 18 PCI_PIRQF# 18 PCI_PIRQG# 18 PCI_PIRQH# 18
Deciphered Date
+VCC_5IN1
MSD0_SDD0_SMD0 MSD1_SDD1_SMD1 MSD2_SDD2_SMD2 MSD3_SDD3_SMD3 SDD0_SMD4 SDD1_SMD5 SDD2_SMD6 SDD3_SMD7
MSBS_SDCMD_SMWE# SMELWP# SDCMD_SMALE XD_CD# SM_RB SMRE SDWP#_SMCE# SMCLE
2
10K_0402_5%
MC_PWRON#
2
6 IN 1 LED
2N7002_SOT23
1 2
OUT OUT OUT
FLG
Q63
2
G
7412@
+VCC_5IN1
8 7 6 5
0.1U_0402_16V4Z
R556
7412@
5IN1_LED
R547
10K_0402_5%
7412@
6 In 1 Card Power Switch
+3VS
U43
1
GND
2
IN
1 2
3
IN
4
EN#
G528_SO8
7412@
6 in 1 CardReader Conn.
JP10
41
XD-VCC
33
XD-D0
34 35 36 37 38 39 40
30 31 29 23 25 26 27 28
32 24
42 18 47 48
4 IN 1 CONN
XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7
XD-WE XD-WP XD-ALE XD-CD XD-R/B XD-RE XD-CE XD-CLE
XD-GND XD-GND
N.C. N.C. SHIELD SHIELD
TAITW_R007-530-L3
SD-CD-COM
SD-WP-COM
7412@
Bottom Side, Normal Insertion
Title
Size Document Number Rev Custom
Date: Sheet
Compal Electronics, Inc.
PCI7412/PCI/1394 CONN/CARD SLOT
LA-3171P
+5VS
12
R546 120_0402_5%
7412@
21
D20
7412@
HT-191NB_BLUE_0603
13
D
S
C756
SD-VCC
MS-VCC
SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3
SD-CMD
SD-CD-SW
SD-WP-SW
MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3
MS-INS
MS-BS SD-GND SD-GND MS-GND MS-GND
1
7412@
C757
1U_0603_10V4Z
15 9
16 19 20 11 12 13 21 22 43 44
8 4 3 5 7 6 2 14 17 1 10
1
4.7U_0805_10V4Z
1
1
C758
7412@
7412@
2
2
MSCLK_SDCLK MSD0_SDD0_SMD0 MSD1_SDD1_SMD1 MSD2_SDD2_SMD2 MSD3_SDD3_SMD3 MSBS_SDCMD_SMWE# SD_CD#
SDWP#_SMCE#
MSCLK_SDCLK MSD0_SDD0_SMD0 MSD1_SDD1_SMD1 MSD2_SDD2_SMD2 MSD3_SDD3_SMD3 MS_CD# MSBS_SDCMD_SMWE#
of
20 38Thursday, October 05, 2006
+VCC_5IN1+VCC_5IN1
0.3
5
4
3
2
1
CardBus Power Switch
U44
9
+5VS
+3VS
12V
5
5V
6
5V
3
3.3V
4
3.3V
1 2
D D
C7730.1U_0402_16V4Z
S1_D10 S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17 S1_IOWR# S1_A9
R588
1 2
33_0402_5%
S1_CD1#
S1_CD2#
S1_IORD# S1_A11 S1_OE# S1_CE2# S1_A10 S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3
S1_REG# S1_A12 S1_A8 S1_CE1#
S1_A13 S1_A23 S1_A22 S1_A15 S1_A20 S1_A21 S1_A19 S1_A14 S1_WAIT# S1_INPACK# S1_WE# S1_BVD1 S1_WP S1_A16 S1_RDY#
S1_RST S1_BVD2 S1_CD1#
S1_CD2# S1_VS1 S1_VS2
C C
B B
A A
S1_A16_C
12
C784 100P_0402_50V8J
12
C785 100P_0402_50V8J
U31A
C10
CAD31/D10
A10
CAD30/D9
F11
CAD29/D1
E11
CAD28/D8
C11
CAD27/D0
B13
CAD26/A0
C13
CAD25/A1
A14
CAD24/A2
B14
CAD23/A3
B15
CAD22/A4
E14
CAD21/A5
A16
CAD20/A6
D19
CAD19/A25
E17
CAD18/A7
F15
CAD17/A24
H19
CAD16/A17
J17
CAD15/IOWR#
J15
CAD14/A9
J18
CAD13/IORD#
K15
CAD12/A11
K17
CAD11/OE#
K18
CAD10/CE2#
L15
CAD9/A10
L18
CAD8/D15
L19
CAD7/D7
M17
CAD6/D13
M18
CAD5/D6
N19
CAD4/D12
M15
CAD3/D5
N17
CAD2/D11
N18
CAD1/D4
P19
CAD0/D3
E13
CC/BE3#/REG#
E18
CC/BE2#/A12
H18
CC/BE1#/A8
L17
CC/BE0#/CE1#
H14
CPAR/A13
E19
CFRAME#/A23
G15
CTRDY#/A22
F17
CIRDY#/A15
G18
CSTOP#/A20
F19
CDEVSEL#/A21
H15
CBLOCK#/A19
G19
CPERR#/A14
C12
CSERR#/WAIT#
C14
CREQ#/INPACK#
G17
CGNT#/WE#
A12
CSTSCHG/BVD1(STSCHG#/RI#)
A11
CCLKRUN#/WP(IOIS16#)
F18
CCLK/A16
E12
CINT#/READY(IREQ#)
C15
CRST#/RESET
B12
CAUDIO/BVD2(SPKR#)
N15
CCD1#/CD1#
B11
CCD2#/CD2#
A13
CVS1/VS1#
B16
CVS2/VS2#
E10
A_USB_EN#
A15
+3VS+S1_VCC
J19
F12
F14
VCCF6VCCF9VCC
VCC
VCCB
VCCJ6VCC
VCCB
PCI 7412
GNDF7GND
GND
GND
GNDH6GNDK6GND
F10
F13
K14
G14
J14
GND
M14
L14
VCCL6VCC
VCCP6VCCP8VCC
GNDN6GNDP7GND
P9
0.1U_0402_16V4Z
P10
PCI7412ZHK_PBGA257
0.1U_0402_16V4Z
C774
DATA/VD2/VPPD1
CLOCK/VD1/VCCD0#
LATCH/VD3/VPPD0
RSVD/D2
RSVD/VD0/VCCD1#
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
C775
0.1U_0402_16V4Z
B9 A9 C9
S1_D2
B10 C4 D1 E1 E2 E3 F2 F3 F5 G6
S1_A18
H17
S1_D14
M19
A2 A17 A18 B1 B2 B3 B17 B18 B19 C1 C2 C3 C16 C17 C18 C19 D2 D3 D17 D18 E5 N14 P18 T3 T17 U1 U2 U3 U4 U12 U16 U17 U18 V1 V2 V3 V4 V12 V17 V18 V19 W2 W3 W12 W18
C776
VPPD1 VCCD0# VPPD0
R587 0_0402_5%
12
+3VS
VCCD1#
R586 43K_0402_5%
1 2
Near to PCMCIA slot.
+S1_VCC
1
C780 10U_0805_10V4Z
2
+S1_VPP
1
C782 10U_0805_10V4Z
2
C7720.1U_0402_16V4Z C7774.7U_0805_10V4Z
C7780.1U_0402_16V4Z C7794.7U_0805_10V4Z
R584
10K_0402_5%
1
C781
0.1U_0402_16V4Z
2
1
C783
0.1U_0402_16V4Z
2
VCC VCC VCC
VPP
VCCD0 VCCD1 VPPD0 VPPD1
OC
GND
SHDN
TPS2211AIDBR_SSOP16
7
16
R585 0_0402_5%
JP8
69
GND
70
GND
SANTA_130606-1_LT
13 12 11
10
1 2 15 14
8
40mil
20mil
VCCD0# VCCD1# VPPD0 VPPD1
12
GND GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1# ADD11 IORD#
ADD9
IOWR#
ADD8 ADD17 ADD13 ADD18 ADD14 ADD19
WE#
ADD20
READY
ADD21
VCC VCC
VPP
VPP ADD16 ADD22 ADD15 ADD23 ADD12 ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2 REG# ADD1
BVD2
ADD0
BVD1 DATA0 DATA8 DATA1 DATA9 DATA2
DATA10
CD2#
GND GND
***
WP
+S1_VCC
+S1_VPP
1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68
1 2
C767 0.1U_0402_16V4Z C768 0.1U_0402_16V4Z
1 2
C769 10U_0805_10V4Z
1 2
C770 0.01U_0402_16V7K
1 2
C771 1U_0603_10V4Z
PCM_DISABLE# 18
S1_D3 S1_CD1# S1_D4 S1_D11 S1_D5 S1_D12 S1_D6 S1_D13 S1_D7 S1_D14 S1_CE1# S1_D15 S1_A10 S1_CE2# S1_OE# S1_VS1 S1_A11 S1_IORD# S1_A9 S1_IOWR# S1_A8 S1_A17 S1_A13 S1_A18 S1_A14 S1_A19 S1_WE# S1_A20 S1_RDY# S1_A21 +S1_VCC
+S1_VPP S1_A16_C S1_A22 S1_A15 S1_A23 S1_A12 S1_A24 S1_A7 S1_A25 S1_A6 S1_VS2 S1_A5 S1_RST S1_A4 S1_WAIT# S1_A3 S1_INPACK# S1_A2 S1_REG# S1_A1 S1_BVD2 S1_A0 S1_BVD1 S1_D0 S1_D8 S1_D1 S1_D9 S1_D2 S1_D10 S1_WP S1_CD2#
+S1_VCC
+S1_VPP
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/10/03 2009/10/03
Deciphered Date
Title
Size Document Number Rev
Custom
2
Date: Sheet
Compal Electronics, Inc.
PCI7412/CB/CB SLOT
LA-3171P
1
0.3
of
21 38Thursday, October 05, 2006
5
4
3
2
1
1 2
R33
C85 0.1U_0402_16V4Z
PCIE_PTX_C_IRX_P318
PCIE_PTX_C_IRX_N318
PCIE_ITX_C_PRX_P318
D D
C C
PCIE_ITX_C_PRX_N318
+3VS
R300 1K_0402_1%
LAN_X1 LAN_X2
25MHZ_20P_6X25000017
1
C45 27P_0402_50V8J
2
CLK_PCIE_LAN14 CLK_PCIE_LAN#14
1 2
1U_0603_10V4Z
Y1
1 2
C86 0.1U_0402_16V4Z
1 2
PLT_RST#7,16,18,25
EC_PME#25,26
R301 15K_0402_5%
1
C50
1
C47 27P_0402_50V8J
2
2
2
1
R285 2K_0402_1%100M@
C48
0.1U_0402_16V4Z
PCIE_PTX_IRX_P3 PCIE_PTX_IRX_N3
LAN_CTRL18 LAN_CTRL15
1 2
LAN_X1 LAN_X2
Mount for 8101E
Place Close to Chip
+LAN_VDD18
12
12
B B
LAN_MDI3­LAN_MDI3+
LAN_MDI2­LAN_MDI2+
LAN_MDI1­LAN_MDI1+
LAN_MDI0­LAN_MDI0+
1
C28
0.01U_0402_16V7K
A A
1
2
2
100M@
0_0402_5%
C26
0.01U_0402_16V7K
0.01U_0402_16V7K
100M@
C25
1
2
0_0402_5%
1
2
R10
C27
0.01U_0402_16V7K
R11
100M@
C30
0.01U_0402_16V7K
100M@
C31
0.01U_0402_16V7K
Place Close to Chip
U30
1
TCT1
MCT1
2
TD1+
MX1+
3
TD1-
MX1-
4
TCT2
MCT2
5
TD2+
MX2+
TD2-6MX2-
7
TCT3
MCT3
8
TD3+
MX3+
9
TD3-
MX3-
10
TCT4
MCT4
11
TD4+
MX4+
12
TD4-
MX4-
NS892402
1000M@
Place these components colsed to LAN chip
GST5009 for GIGA LAN TST1284 for 10/100 LAN
5
U5
29
HSOP
30
HSON
23
HSIP
24
HSIN
26
REFCLK_P
27
REFCLK_N
20
PERSTB
1
VCTRL18
63
VCTRL15
64
RSET
19
LANWAKEB
36
ISOLATEB
60
CKXTAL1
61
CKXTAL2
62
GVDD
65
EXPOSE_PAD
25
EGND
31
EGND
17
NC
18
NC
35
NC
34
NC
39
NC
40
NC
42
NC
50
NC
51
NC
RTL8111B_QFN64 1000M@
100M@
R15 49.9_0402_1% R14 49.9_0402_1%
12
100M@
100M@
R17 49.9_0402_1% R16 49.9_0402_1%
12
100M@
24 23 22
21 20 19
18 17 16
15 14 13
R261
75_0402_1%
4
12 12
12 12
12
12
EDDI/AUX
VDD15 VDD15 VDD15 VDD15 VDD15 VDD15 VDD15 VDD15 VDD15 VDD15
VDD33 VDD33 VDD33
VDD33 AVDD33 AVDD33
AVDD18 AVDD18 AVDD18 AVDD18
EVDD18 EVDD18
R260 75_0402_1%
R259
75_0402_1%
EEDO EESK
EECS
LED3 LED2 LED1 LED0
MDIP0 MDIN0 MDIP1 MDIN1
MDIP2 MDIN2 MDIP3 MDIN3
LAN_MDI0­LAN_MDI0+
LAN_MDI1­LAN_MDI1+
45 47 48 44
54 55 56 57
3 4 6 7
9 10 12 13
15 21 32 33 38 41 43 49 52 58
16 37 53 46
2 59
5 8 11 14
22 28
12
12
LAN_LINK# LAN_ACTIVITY#
LAN_MDI0+ LAN_MDI0­LAN_MDI1+ LAN_MDI1-
LAN_MDI2+ LAN_MDI2­LAN_MDI3+ LAN_MDI3-
+LAN_VDD15
+3VALW
+AVDD33
C49
10U_0805_10V4Z
+AVDD18
RJ45_MIDI3-
RJ45_MIDI3+
RJ45_MIDI2-
RJ45_MIDI2+
RJ45_MIDI1-
RJ45_MIDI1+
RJ45_MIDI0-
RJ45_MIDI0+
R258 75_0402_1%
RJ45_GND
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3.6K_0402_5%
U4
4
DO
3
DI
2
SK
1
CS
AT93C46-10SI-2.7_SO8
2
1
C46
0.1U_0402_16V4Z
1
2
+LAN_VDD18
3
+3VALW
GND
NC NC
VCC
L6
1 2
BLM18AG601SN1D_0603
5 6 7 8
2
C44
+3VALW
1
0.1U_0402_16V4Z
+AVDD18
2
C470
0.1U_0402_16V4Z
1
+3VALW
+3VALW +3VALW
LAN_CTRL18
40mil 40mil
L13
BLM18AG601SN1D_0603
1
C102
10U_0805_10V4Z
100M@
2
100M@
1 2
22U_0805_6.3V6M
1
C100
Mount for 8101E Mount for 8101E
R678
0_0402_5%
L45
4
RJ45_MIDI3-
RJ45_MIDI3+ RJ45_MIDI3+_L
RJ45_MIDI2-
RJ45_MIDI2+ RJ45_MIDI2+_L
RJ45_MIDI1­RJ45_MIDI1+ RJ45_MIDI1+_L
RJ45_MIDI0­RJ45_MIDI0+ RJ45_MIDI0+_L
4
1
1
WCM2012F2S-900T04_0805@ R679
R680 L46
4
4
1
1
WCM2012F2S-900T04_0805@ R681
R682 L47
4
4
1
1
WCM2012F2S-900T04_0805@ R683
R684 L48
4
4
1
1
WCM2012F2S-900T04_0805@ R685
2006/10/03
3
3
2
2
0_0402_5% 0_0402_5%
3
3
2
2
0_0402_5% 0_0402_5%
3
3
2
2
0_0402_5% 0_0402_5%
3
3
2
2
0_0402_5%
Deciphered Date
RJ45_MIDI3-_L
RJ45_MIDI2-_L
RJ45_MIDI1-_L
RJ45_MIDI0-_L
2
1
1 2
BLM18AG601SN1D_0603
2
C479
0.1U_0402_16V4Z
1
2
1
2
C82
0.1U_0402_16V4Z
1
2
C474
0.1U_0402_16V4Z
1
2
1
2
C69
0.1U_0402_16V4Z
1
C464
0.1U_0402_16V4Z
2
C76
0.1U_0402_16V4Z
1
2
C466
0.1U_0402_16V4Z
1
2
1
2
C475
0.1U_0402_16V4Z
1
2
1
C51
0.1U_0402_16V4Z
C52
0.1U_0402_16V4Z
Mount for 8111B & 8100E
C61
100M@
LAN_CTRL15
L11
100M@
1 2
BLM18AG601SN1D_0603
1
22U_0805_6.3V6M
2
1
C71
Q4 MMJT9435T1G_SOT223
1000M@
2 3
4
40mil 40mil
1
2
2
C106
0.1U_0402_16V4Z
1
+LAN_VDD18
10U_0805_10V4Z
LAN Conn.
JP11
LAN_ACTIVITY#
LAN_LINK#
2009/10/03
2
+3VALW
300_0402_5%
12
R256
1
C69668P_0402_50V8K
2
2
C69768P_0402_50V8K
1
RJ45_GND LANGND
RJ45_MIDI3-_L
RJ45_MIDI3+_L
RJ45_MIDI1-_L
RJ45_MIDI2-_L RJ45_MIDI2+_L RJ45_MIDI1+_L
RJ45_MIDI0-_L RJ45_MIDI0+_L
12
R257 300_0402_5%
+3VALW
1000P_1206_2KV7K
Title
Size Document Number Rev
Custom
Date: Sheet
12
Amber LED+
11
Amber LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
TYCO_3-440470-4
C3
1 2
1
C4
0.1U_0402_16V4Z
2
Compal Electronics, Inc.
RTL8111B/8101E 10/100/1000 LAN
IAKAA M/B LA-3401P 0.3
Thursday, October 05, 2006
C465
0.1U_0402_16V4Z
+LAN_VDD18
L12
+LAN_VDD15
C75
0.1U_0402_16V4Z
Q3 MMJT9435T1G_SOT223
1000M@
2 3
4
1
2
C72
0.1U_0402_16V4Z
2
1
SHLD2 SHLD1
SHLD2 SHLD1
1
C5
4.7U_0805_10V4Z
2
1
+3VALW
2
C63
0.1U_0402_16V4Z
1
2
C93
0.1U_0402_16V4Z
1
2
C486
0.1U_0402_16V4Z
1
16 15
14 13
22 38
+LAN_VDD15
of
A
C391
AMP_LHPIN AMP_RHPIN
C704 C379 C381 C705 C706
0.1U_0402_16V4Z
1
C386
2
INT_MIC
1 2 1 2 1 2 1 2 1 2
R498 20K_0402_1%
R620 39.2K_0402_1% R253 39.2K_0402_1%
R673 20K_0402_1%MIC@
L24
+VDDA
1 1
+MIC2_VREFO
WM-64PCY_2P
45MIC@
2 2
3 3
4 4
1 2
FBM-L11-160808-800LMT_0603
10U_0805_10V4Z
1 2
R545 4.7K_0402_5%
NBA_PLUG24,26
MIC@
12
C731
MIC@
220P_0402_50V7K
MIC1_L MIC1_R
MIC1
1 2
MIC1_L24 MIC1_R24 NSE_DPR26
SPK_SEL HIGH: HARMAN LOW: NO-BRAND
MIC_SENSE24
B
680P_0402_50V7K
1
1
C382
2
2
0.1U_0402_16V4Z
1 2
C811 2.2U_0603_6.3V6K
1 2
C812 2.2U_0603_6.3V6K
1 2
C735 100P_0402_50V8J
1 2
C729 1U_0402_6.3V4ZMIC@
1 2
C730 1U_0402_6.3V4ZMIC@
1 2
C736 100P_0402_50V8J
1 2
C702 1U_0402_6.3V4Z
1 2
C703 100P_0402_50V8J
100P_0402_50V8J 1U_0402_6.3V4Z 1U_0402_6.3V4Z 100P_0402_50V8J 100P_0402_50V8J
ICH_RST_AUDIO#17 ICH_SYNC_AUDIO17
ICH_SDOUT_AUDIO17
SPK_SEL_CODEC26
EAPD24,26
1 2
12 12
@
1 2
C669
100P_0402_50V8J
861_HP_L 861_HP_R
MIC1_C_L MIC1_C_R MONO_IN
SENSE_A SENSE_B
SENSE_A
SENSE_B SENSE_A
SENSE_B
HD Audio Codec
+AVDD_AC97
40mil
1
C700
2
U38
14
LINE2_L
15
LINE2_R
MIC2_L
16
MIC2_L
MIC2_R
17
MIC2_R
23
LINE1_L
24
LINE1_R
18
CD_L
20
CD_R
19
CD_GND
21
MIC1_L
22
MIC1_R
12
PCBEEP
11
RESET#
10
SYNC
5
SDATA_OUT
2
GPIO0
3
GPIO1
13
SENSE A
34
SENSE B
47
EAPD
48
SPDIFO
4
DVSS1
7
DVSS2
ALC861-GR REV D_LQFP48
DGND
C
+3VS_DVDD
0.1U_0402_16V4Z
1
1
C374
C373
2
2
0.1U_0402_16V4Z
10P_0402_50V8J
AMP_LEFT AMP_RIGHT 268_HP_L 268_HP_R
1 2
R544 22_0402_5%
R418
10_0402_5%@
1 2
R237 33_0402_5%
+MIC1_VREFO_L
10mil
+MIC1_VREFO_R
10mil
+MIC2_VREFO
10mil
AGND
10mil
ACZ_VREF
20K_0402_1%
ACZ_JDREF
Change R246 from 5.1Kto 20K_0402_1%
38
AVDD125AVDD2
20mil
DVDD11DVDD2 FRONT_OUT_L FRONT_OUT_R
SURR_OUT_L
SURR_OUT_R SIDESURR_OUT_L SIDESURR_OUT_R
CEN_OUT
LFE_OUT
BIT_CLK
SDATA_IN
LINE2_VREFO
MIC1_VREFO_L
MIC1_VREFO_R
MIC2_VREFO
VREF
JDREF
AVSS1 AVSS2
9
35 36 39 41 45 46 43 44
6
8 37
NC
29
NC
31 28 32 30 27 40 33
NC
26 42
Sense Pin Impedance Codec Signals
39.2K
SENSE A
SENSE B
20K 10K
5.1K
39.2K 20K 10K
5.1K
D
C606
100P_0402_50V8J 680P_0402_50V7K
1
C388
2
C793 2.2U_0603_6.3V6K@ C792 2.2U_0603_6.3V6K@
1 2
10P_0402_50V8J@
1
C708 100P_0402_50V8J
2
680P_0402_50V7K
C699
1 2 1 2
10U_0805_10V4Z
1
C370
2
C591
12
12
R246
PORT-A (PIN 39, 41) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) PORT-D (PIN 35, 36) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17) PORT-G (PIN 43, 44) PORT-H (PIN 45, 46)
1
C607
2
1
C389
10P_0402_50V8J
2
AMP_LHPIN AMP_RHPIN
ICH_BITCLK_AUDIO 17
ICH_AC_SDIN0 17
10U_0805_10V4Z
1
C390
2
E
L34
1 2
FBM-L11-160808-800LMT_0603
AMP_LEFT 24 AMP_RIGHT 24 AMP_LHPIN 24 AMP_RHPIN 24
1
100P_0402_50V8J C707
2
Regulator for CODEC
+3VS
F
EC Beep
BEEP#26
PCI Beep
SB_SPKR18
CardBus Beep
PCM_SPK20
+S1_VCC
L37
1 2
FBM-L11-160808-800LMT_0603
4.7U_0805_10V4Z
SYSON26,28,34 SUSP#16,26,27,29,34,35
R406 0_0402_5% R409 0_0402_5%@
C367
1 2
1U_0402_6.3V4Z
C375
1 2
1U_0402_6.3V4Z
C369
1 2
1U_0402_6.3V4Z
2
C368
0.01U_0402_16V7K
1
2N7002_SOT23
R528
2.2K_0402_5%
C585
C584
0.1U_0402_16V4Z
12 12
Moat Bridge
R236
1 2
560_0402_5%
R240
1 2
560_0402_5%
R235
1 2
560_0402_5%
10K_0402_5%
13
D
2
G
Q61
S
C
Q62
2
B
MMBT3904_SOT23
E
3 1
Adjustable Output
U29
4
VIN
2
SENSE or ADJ
DELAY ERROR7CNOISE
8
SD
SI9182DH-AD_MSOP8
1 2
R247 0_0805_5%
1 2
R243 0_0805_5%
1 2
R244 0_0805_5%
1 2
R242 0_0805_5%
R241
G
1 2
12
VOUT
GND
R618
0_0402_5%
5 6 1 3
2
B
D17
RB751V_SOD323
2 1
C586 0.1U_0402_16V4Z
+VDDA
12
R245 10K_0402_5%
C377 1U_0402_6.3V4Z
12
R239 10K_0402_5%
C
Q23 MMBT3904_SOT23
E
3 1
1 2
12
H
1 2
@
C371
1 2
1U_0402_6.3V4Z
1 2
+VDDA
R412
69.8K_0603_1%
R408 24K _0402_1%
MONO_IN
R238
2.4K_0402_5%
+VDDA+5VALW +5VALW_VDDA
C588 4.7U_0805_10V4Z
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2006/10/03 2009/10/03
E
Deciphered Date
Title
Size Document Number Rev
Custom
F
Date: Sheet
Compal Electronics, Inc.
HD Audio Codec ALC861VD IAKAA M/B LA-3401P
G
0.3
of
23 38Thursday, October 05, 2006
H
A
APA2056 SPK/HP Amplifier
C724
1 1
AMPR
AMP_RIGHT23 AMP_LEFT23
AMP_RHPIN23 AMP_LHPIN23
2 2
EC_EAPD26
3 3
0_0402_5%@
2N7002_SOT23
0_0402_5%@
1 2
C790 0.22U_0402_6.3V6K
1 2
C791 0.22U_0402_6.3V6K
+5VS
+5VS
R619
12
13
D
2
G
Q67
S
R592
12
1
2
AMPL
R589 100K_0402_5%
1 2
R590 100K_0402_5%
1 2
AMP_RHPIN AMP_LHPIN
1 2
24K_0402_5%
R591 100K_0402_5%
1 2
HP_EN
1
C818
0.1U_0402_16V4Z
2
@
Reserve for Test
AMP_SD#
C814
0.1U_0402_16V4Z
@
+5VS
W=40mil
1
C677
2
680P_0402_50V7K
R603
C797 2.2U_0603_6.3V6K C801 0.1U_0402_16V4Z
R602
1 2
24K_0402_5%
AMP_BEEP
1 2
C819 1U_0402_6.3V4Z
1 2
C8042.2U_0603_6.3V6K
12 12
C678
0.1U_0402_16V4Z
AMP_SD#
AMP_CP+ AMP_CP-
AMP_BIAS
2
1
AMP_EN# HP_EN INR_H
INL_H
B
1
C679
2
1U_0402_6.3V4Z
10U_0805_10V4Z
19
3
5 27 24
4
6 26 28 12
14 25
INR_A INL_A
/AMP EN HP EN INR_H
INL_H /SD BEEP CP+
CP­BIAS
11
APA2056_TSSOP28
CVDD
HVDD
20
PVDD
10
PVDD
1
VDD
ROUT+
ROUT-
LOUT+
LOUT-
HP_R
HP_L
CVSS
VSS
GND PGND PGND CGND
U47
22 21
8 9
17 18
15 16 2
23 7 13
IN_A Gain = 10dB (Internal Speaker) IN_H Gain = 0dB (Headphone)
INTSPK_R1 INTSPK_R2
INTSPK_L1 INTSPK_L2
HP_R HP_L
CVSS
1
C796
2.2U_0603_6.3V6K
2
C
MIC_SENSE23
MIC1_R23 MIC1_L23
HP_R HP_L HPL
R597
0_0402_5%
@
MIC1_R MIC1_R_1 MIC1_L
L22
KC FBM-L11-160808-121LMT 0603
L23
KC FBM-L11-160808-121LMT 0603
12
12
R598 0_0402_5%
@
Right Speaker Connector
INTSPK_R1 INTSPK_R2
Left Speaker Connector
INTSPK_L1 INTSPK_L2
D
12
10mil 10mil
R248
4.7K_0402_5%
1 2
KC FBM-L11-160808-121LMT 0603
1 2
KC FBM-L11-160808-121LMT 0603
1 2 1 2
L7 HLMA-160808-39NKT
1 2
L10 HLMA-160808-39NKT
1 2
L8 HLMA-160808-39NKT
1 2
L9 HLMA-160808-39NKT
1 2
L21 L20
1
C392
2
220P_0402_50V7K
R676 20_0402_5%
1 2
20_0402_5%
1 2
R677
C399
D5SM05_SOT23
1
@
1
@
D4SM05_SOT23
E
+MIC1_VREFO_R+MIC1_VREFO_L
12
R249
4.7K_0402_5%
MIC1_L_1
1
C393
2
220P_0402_50V7K
NBA_PLUG23,26
1
1
C395
2
2
10P_0402_50V8J
2 3
SPK_R1 SPK_R2
SPK_L1
SPK_L2
3 2
@
D38
HPR
10P_0402_50V8J
2
3
1
SM05_SOT23
2
3
D39
@
SM05_SOT23
1
JP2
1 2
ACES_85204-0200
JP34
1 2
ACES_85204-0200
MICROPHONE IN JACK
JP29
5 4 3
6 2 1
FOX_JA6033L-5S1-TR
1
PJ16
1
JUMP_43X39
@
2
2
HEADPHONE OUT JACK
JP28
5 4 3
6 2 1
FOX_JA6033L-5S1-TR
AGND
1
PJ17
1
JUMP_43X39
@
2
2
AGND
8
7
8
7
Volume Control
+3VS
12
12
R305
R255 10K_0402_5%
1 2
R251 10K_0402_5%
1 2
R250 10K_0402_5%
Deciphered Date
COM
5
10K_0402_5%
DIP
2
A
1
3
B
DIP
4
SW6
4 4
SW_XRE094_3P
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
+3VS
1
C788
2
0.01U_0402_16V7K
2009/10/032006/10/03
D
0.1U_0402_16V4Z
1 2
C787
5
1
P
NC
4
A2Y
G
74LVC1G14GW_SOT353-5
U46
3
1
C786
2
0.01U_0402_16V7K
Size Document Number Rev
Date: Sheet
Title
Custom
+3VS
12
R593 100K_0402_5%
1
0.1U_0402_16V4Z C798
2
U45
1
CD1#
2
D1
3
CP1
4
SD1#
5
Q1
6
Q1#
7
GND
74LCX74MTC_TSSOP14
ENCODER_DIR 26 ENCODER_PULSE 26
VCC
CD2#
CP2
SD2#
Q2#
Compal Electronics, Inc.
AMP/VR/Audio Jack/MIC IAKAA M/B LA-3401P
E
+3VS
14 13 12
D2
Q2
24 38Thursday, October 05, 2006
C789
11 10 09
1
08
2
0.1U_0402_16V4Z
0.3
of
Finger printer
C725
0.1U_0402_16V4Z
USB20_N618 USB20_P618
3
Mini-Express Card
+3VS
1
2
2
D40
SM05_SOT23@
1
JP32
1 2 3 4 5
ACES_85201-0505
FP@
CIR
+5VALW
CIR_IN26
4.7U_0805_10V4Z CIR@
C726
R540100_0805_5% CIR@
12
1
2
+5VALW_CIR
1
GND
2
GND
3
VCC
4
ROUT
TSOP6238TR_4P
CIR@
USB Board
ACES_85201-1205
JP33
12 11 10 9 8 7 6 5 4 3 2 1
U41
+5VALW +USB_VCCC
USB_EN#26,28
4.7U_0805_10V4Z
1.4A
U42
1
GND
2
IN
3
IN
4
EN#
1
C727
G528_SO8
2
Close to JP21
OUT OUT OUT FLG
8 7 6 5
1
C728
4.7U_0805_10V4Z
2
USB20_P218 USB20_N218
USB20_P018 USB20_N018
+USB_VCCC
C262
0.01U_0402_16V7K
1
0.1U_0402_16V4Z
2
KS@
WL_OFF#26 KILL_SW#26,28
C575
1
2
KS@
WL_OFF# KILL_SW#
4.7U_0805_10V4Z
12 13
MDC 1.5 Conn.
MDC_RST#18
ACZ_RST#_MDC17
+3VS +1.5VS
1
C327
0.01U_0402_16V7K
2
KS@
+3VALW
14
U20D
P
A
O
B
G
SN74LVC08APW_TSSOP14
7
11
ACZ_RST#_MDC
1
C326
2
KS@
RB751V_SOD323 KS@
C572
0.1U_0402_16V4Z
D33
+3VALW
14
4
A
5
B
7
1
4.7U_0805_10V4Z
2
KS@
XMIT_OFF#
21
U20B
P
6
O
G
SN74LVC08APW_TSSOP14
1
C275
2
KS@
MDC_RESET#
C570
0.1U_0402_16V4Z
KS@
+3VALW
1
2
ACZ_SDOUT_MDC17
ACZ_SYNC_MDC17
ACZ_SDIN117
R209
33_0402_5%
CLK_PCIE_MCARD#14
PCIE_PTX_C_IRX_N218 PCIE_PTX_C_IRX_P218
PCIE_ITX_C_PRX_P218
1 2
EC_PME#22,26 WLAN_BT_DATA27 WLAN_BT_CLK27
MINI_CLKREQ#14
CLK_PCIE_MCARD14
ACZ_SDOUT_MDC ACZ_SYNC_MDC
ACZ_SDIN1_MDC MDC_RESET#
KS@
R422 0_0402_5%
MINI_WAKE#
12
MINI_CLKREQ# CLK_PCIE_MCARD#
CLK_PCIE_MCARD
JP25
1
GND1
3
IAC_SDATA_OUT
5
GND2
7
IAC_SYNC
9
IAC_SDATA_IN
11
IAC_RESET#
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
53
FOX_AS0B226-S40N-7F~D
TYCO_1-1775149-2~D
IAC_BITCLK
GND13GND14GND15GND16GND17GND
***
JP24
1
1
3
3
5
5
7
7
9
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
GND1
18
RES0 RES1
3.3V GND3 GND4
KS@
GND2
2 4 6 8 10 12
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
2 4 6 8
+3VALW
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
54
+1.5VS+3VS
XMIT_OFF# PLT_RST#
+1.5VS
USB20_5N USB20_5P
+1.5VS +3VS
1000P_0402_50V7K
ACZ_BITCLK_MDC
R419
10_0402_5%
PLT_RST# 7,16,18,22
+3VALW
ICH_SMBCLK 14,18 ICH_SMBDATA 14,18PCIE_ITX_C_PRX_N218
R687
0_0402_5%
WCM2012F2S-900T04_0805@
1
1
4
4
L49 R686
2
3
0_0402_5%
2
3
Place close to pci-e connector
+3VALW
1
1
1
C314
2
1 2
12
C592 22P_0402_50V8J
0.1U_0402_16V4Z
C313
C315
4.7U_0805_10V4Z@
2
2
ACZ_BITCLK_MDC 17
USB20_N5 18
USB20_P5 18
Connector for MDC Rev1.5
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Deciphered Date
2009/10/032006/10/03
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
FP/CIR/USB-B/MDC/Mini_Card IAKAA M/B LA-3401P
25 38Thursday, October 05, 2006
of
0.3
5
KBA[0..19]
ADB[0..7]
L16
1 2
D D
C C
B B
A A
FBM-L11-160808-800LMT_0603
+3VALW
RP29
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
+3VALW
+3VALW
1 2
R172 10K_0402_5%
1 2
R140 10K_0402_5%
1 2
R420 10K_0402_5%
+5VS
RP27
1 8 2 7 3 6 4 5
4.7K_0804_8P4R_5%
+5VS
12
R360 4.7K_0402_5%
12
R362 4.7K_0402_5%
+5VALW
RP28
1 8 2 7 3 6 4 5
4.7K_0804_8P4R_5%
VGA_ENBKL16
GMCH_ENBKL9
1 2
R375 100K_0402_5%
1 2
R374 100K_0402_5%
SKU_ID 0:10(10E) 4:10J(10EJ) 1:10C 5:10CJ 2:10G 6:10GJ 3:10GC 7:10GCJ
BUTTON_ID ID0:0 BUTTON ID2:2 BUTTON ID4:6 BUTTON
AD_BID0: Board ID ID = 1 (PCB REV 0.2)
KBA[0..19] 27 ADB[0..7] 27
ECAGND
C291
22P_0402_50V8J@
CLK_PCI_EC14
MODE# FRD# SELIO# FSEL#
12
R18510K_0402_5%@
12
R18710K_0402_5%
12
R19410K_0402_5%
IE_BTN#
EC_SMI#
EC_PME#
KB_CLK KB_DATA PS_CLK PS_DATA
TP_CLK TP_DATA
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
R151 0_0402_5%
1 2
R167 0_0402_5%
1 2 1 2
R286 2.2K_0402_5%
SYSON SUSP#
5
KBA1 KBA4 KBA5
PM@
GM@
R179
12
+3VALW
33_0402_5%@
12
IE_BTN#28
+3VALW
ENBKL
C284 0.1U_0402_16V4Z
12
R177 47K_0402_5%
SKU_ID
R343 100K_0402_5%
1 2
R342 0_0402_5%GM@
BUTTON_ID
R340 100K_0402_5%
AD_BID0
R141 100K_0402_5%
1 2
R142 8.2K_0402_5%
*
Ra Rb
1
C320
2
0.1U_0402_16V4Z
R171 10K_0402_5%@
12
12
12
12
0.1U_0402_16V4Z C322
1
2
LPC_AD017,29 LPC_AD117,29 LPC_AD217,29 LPC_AD317,29
LPC_FRAME#17,29
PCI_RST#18,20,29
SIRQ1 8, 20,29
FREAD#27
FWR#27 FSEL#27
12
TP_CLK27 TP_DATA27
EC_SMB_CK127,31 EC_SMB_DA127,31 EC_SMB_CK24,16 EC_SMB_DA24,16
EC_SCI#18 BT_RST#27
BKOFF#16 FSTCHG32 EC_SMI#18
ENCODER_DIR24
WL_OFF#25 EC_SWI#18 NBA_PLUG23,24 EAPD23,24 LID_SW#28
MODE#28
SYSON2 3 ,28,34 SUSP#16,23,27,29,34,35 VR_ON36
BT_DETACH27 PBTN_OUT#18
PADS_LED#28 CAPS_LED#28 NUM_LED#28 PHDD_LED#17
GATEA2017 EC_KBRST#17
+3VALW
4
0.1U_0402_16V4Z
1
C303
2
0.1U_0402_16V4Z
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
FSTCHG
4
1
C241
2
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
FRD# FWR# FSEL# SELIO# ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19 IE_BTN# EC_TINIT#
KB_CLK KB_DATA PS_CLK PS_DATA TP_CLK TP_DATA
EC_SCI# BT_RST#
ENBKL BKOFF#
EC_SMI#
MODE# SYSON SUSP#
BT_DETACH
PADS_LED# CAPS_LED# NUM_LED#
2
C263
1000P_0402_50V7K
1
U13
15
LAD0
14
LAD1
13
LAD2
10
LAD3
9
LFRAME#
165
LRST#/GPIO2C
18
LCLK
7
SERIRQ
25
CLKRUN#/GPIO0C
24
LPCPD#/GPIO0B
150
RD#
151
WR#
173
MEMCS#
152
IOCS#
138
D0
139
D1
140
D2
141
D3
144
D4
145
D5
146
D6
147
D7
124
A0
125
A1/XIOP_TP
126
A2
127
A3
128
A4/DMRP_TP
131
A5/EMWB_TP
132
A6
133
A7
143
A8
142
A9
135
A10
134
A11
130
A12
129
A13
121
A14
120
A15
113
A16
112
A17
104
A18
103
A19
108
A20/GPIO23
105
E51CS#/GPIO20/ISPEN
110
PSCLK1
111
PSDAT1
114
PSCLK2
115
PSDAT2
116
PSCLK3
117
PSDAT3
163
SCL1
164
SDA1
169
SCL2
170
SDA2
8
GPIO04
20
GPIO07
21
GPIO08
22
GPIO09
27
GPIO0D
28
GPIO0E
48
GPIO10
62
GPIO13
63
GPIO14
69
GPIO15
70
GPIO16
75
GPIO17
109
GPIO24
118
GPIO25
119
GPIO26
148
GPIO27
149
GPIO28
155
GPIO29
156
GPIO2A
162
GPIO2B
168
GPIO2D
55
FnLock#/GPIO12
54
CapLock#/GPIO011
23
NumLock#/GPIO0A
41
ScrollLock#/GPIO0F
19
ECRST#
5
GA20/GPIO02
6
KBRST#/GPIO03
31
ECSCI#
3
+3VALW
R157
Change to 0 ohm
1 2
2
1
LPC Interface
PS2 Interface
0_0603_5%
C299 1000P_0402_50V7K
123
VCC16VCC34VCC45VCC
*
*
X-BUS Interface
SMBus
GPIO
*
* *
*
MISC
Security Classification
Issued Date
THIS SHEET OF E NGI NEER ING DR AWI NG I S T HE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND C ONTAINS CONFID ENTIAL AND TRADE S ECR ET INFORMATION. TH IS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
C254
2
0.1U_0402_16V4Z
ECAGND
95
96
161
VCCA
159
AGND
VCCBAT
BATGND
136
157
166
VCC
VCC
VCC
Internal Keyboard
FAN2PWM/GPOW2/PWM2
Pulse Width
FAN1PWM/GPOW7/PWM7
Wake Up Pin
TIN2/FANFB2/GPWU7
ENE-KB910-B4
Analog To Digital
Digital To Analog
Expanded I/O
GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
FAN
TEST_TP/GPIO05/FAN3PWM
Timer Pin
E51RXD/GPIO21/ISPCLK E51TXD/GPIO22/ISPDAT
GND17GND35GND46GND
GND
GND
122
137
167
2006/10/03 2009/10/03
3
GPOK0/KSO0 GPOK1/KSO1 GPOK2/KSO2 GPOK3/KSO3 GPOK4/KSO4 GPOK5/KSO5 GPOK6/KSO6 GPOK7/KSO7 GPOK8/KSO8
GPOK9/KSO9 GPOK10/KSO10 GPOK11/KSO11 GPOK12/KSO12 GPOK13/KSO13 GPOK14/KSO14 GPOK15/KSO15 GPOK16/KSO16 GPOK17/KSO17
GPIK0/KSI0 GPIK1/KSI1 GPIK2/KSI2 GPIK3/KSI3 GPIK4/KSI4 GPIK5/KSI5 GPIK6/KSI6 GPIK7/KSI7
GPOW0/PWM0 GPOW1/PWM1
GPOW3/PWM3 GPOW4/PWM4 GPOW5/PWM5 GPOW6/PWM6
TIN1/GPWU6
GPIAD0/AD0 GPIAD1/AD1 GPIAD2/AD2 GPIAD3/AD3 GPIAD4/AD4 GPIAD5/AD5 GPIAD6/AD6 GPIAD7/AD7
GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7
GPIO18/XIO8CS#
*
GPIO19/XIO9CS#
*
GPIO1A/XIOACS#
*
*
GPIO1B/XIOBCS# GPIO1C/XIOCCS#
*
GPIO1D/XIODCS#
*
GPIO1E/XIOECS#
*
GPIO1F/XIOFCS#
*
TOUT2/GPIO2F E51IT0/GPIO00
E51IT1/GPIO01
KB910Q B4_LQFP176
0.1U_0402_16V4Z
GPWU0 GPWU1 GPWU2 GPWU3 GPWU4 GPWU5
XCLKI
XCLKO
Compal Secret Data
+3VALW
1
C323
2
KSO0
49
KSO1
50
KSO2
51
KSO3
52
KSO4
53
KSO5
56
KSO6
57
KSO7
58
KSO8
59
KSO9
60
KSO10
61
KSO11
64
KSO12
65
KSO13
66
KSO14
67
KSO15
68 153
KSO17
154
KSI0
71
KSI1
72
KSI2
73
KSI3
74
KSI4
77
KSI5
78
KSI6
79
KSI7
80 32
33 36 37 38 39 40
EC_EAPD
43 2
26
KILL_SW#
29
PM_SLP_S3#
30
PM_SLP_S5#
44 76
EC_PME#
172 176
81
BUTTON_ID
82 83 84 87
SKU_ID
88
AD_BID0
89 90
DAC_BRIG
99
BT_PWR
100
IREF
101
EN_DFAN1
102 1 42 47 174
POWER_LED#
85
WL_BT_LED#
86
HDD_LED#
91
BATT_CHG_LOW_LED#
92
BATT_FULL_LED#
93 94 97
CB_PWR_OK
98 171
R365 4.7K_0402_5%
12
SPK_SEL
R368 4.7K_0402_5%
11
R604 0_0402_5% R605 0_0402_5%@
175 3
4
E51_RXD
106
E51_TXD
107
CRY2
158
CRY1
160
Deciphered Date
1
C343 1U_0603_10V4Z
2
1 2 1 2 1 2 1 2
2
KSI[0..7] KSO[0..15]
KSO17 28
INVT_PWM 16 BEEP# 23 PWR_SUSP_LED 28
ACOFF 32 USB_EN# 25,28 EC_ON 28 EC_LID_OUT# 18 EC_EAPD 24
ON/OFFBTN# 28
KILL_SW# 25,28
PM_SLP_S3# 18
PM_SLP_S5# 18
CIR_IN 25
EC_PME# 22,25
ENCODER_PULSE 24
BUTTON_ID 28
BATT_OVP 32
ALI/MH# 31,32
DAC_BRIG 16 BT_PWR 27 IREF 32 EN_DFAN1 4
PWROK 7,18
POWER_LED# 28 WL_BT_LED# 28 HDD_LED# 28 BATT_CHG_LOW_LED# 28 BATT_FULL_LED# 28
VGATE 14,18,36
NSE_DPR 23
RSMRST#
E51_RXD 29 E51_TXD 29
2
KSI[0..7] 28
KSO[0..15] 28
RSMRST circuit
RSMRST#
BAV99DW-7_SOT363
R671
2.2K_0402_5%@
+3VALW
C240 0.01U_0402_16V7K
R344
R527
10K_0402_5%
1 2
R181 100K_0402_5%
D47B
@
1 2
R672
1 2
2.2K_0402_5%@
R173 100K_0402_5%
1 2
D13
2 1
RB751V_SOD323
ECAGND
12
1 2
100K_0402_5%
1 2
C248 0.22U_0603_10V7K
EN_DFAN1
R512
1M_0402_5%
12
+S1_VCC
FAN_SPEED1 4
SPK_SEL_CODEC 23 SPK_SEL_SB 18
EC_THERM# 18
Title
Size Document Number R e v
Date: Sheet
1
For EC Tools
JP23
1
R670
0_0402_5%
1 2
Q46
C
E
B
1
2
4
5
6
3
ACIN 18,28,30
BATT_TEMPA 31
ADP_I 32
1 2
CRY1
C332
1
2
32.768KHZ_12.5P_1TJS125BJ2A251
123
10P_0402_50V8J
ACES_85205-0400@
MMBT3906_SOT23@
D47A BAV99DW-7_SOT363@
1 2 3 4
2 3 4
R204
1 2
20M_0603_5%@
1
4
IN
OUT
NC3NC
2
E51_RXD E51_TXD
EC_RSMRST# 18
CRY2
X2
Compal Electronics, Inc.
ENE-KB910
IAKAA M/B LA-3401P
1
+5VALW
C324
1
2
10P_0402_50V8J
0.3
of
26 38Thursday, October 05, 2006
5
4
3
2
1
TP CONN.
0.1U_0402_16V4Z
TP_DATA26 TP_CLK26
D D
C C
C526
2
1
C130
2
C527
1
68P_0402_50V8K
1
68P_0402_50V8K
2
3 4
SW4
5
6
SMT1-05_4P
Left Right
1 2
5
6
3 4
SW5 SMT1-05_4P
+5VS
ACES_85201-0605
1
SWR SWL
2
3
D41
@
SM05_SOT23
1
2 3 4 5 6
JP5
!!Confirm Pin Direction
BlueTooth Interface
R112
1M_0402_5%
BT@
R433
1 2
1 2
100K_0402_5%BT@
C218 1000P_0402_50V7K
13
D
BT_PWR26
2
G
2N7002_SOT23 Q14
S
BT@
Module ID
Indication for polarity of reset Reset input High Active --> Low , Reset input Low Active --> Open
+3VS+5VS
C225
0.1U_0402_16V4Z
BT@
S
G
2
Q15
D
2
BT@
1
WLAN_BT_CLK25
WLAN_BT_DATA25
AO3413_SOT23BT @
1 3
+BT_VCC
C670
22P_0402_50V8J
BT@
BT@
MARU_00-6210-320-340-800_20P
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
JP7
(Top Contact)
Bluetooth Connector
C216
BT@
BT_DET#
BT_RST#
(MAX=200mA)
1
0.1U_0402_16V4Z
2
C215
BT@
BT_DET#18
BT_RST#26
BT_DETACH26
USB20_P318
1
C671 22P_0402_50V8J
2
BT@
USB20_N318
+BT_VCC
10U_0805_10V4Z
1
2
KBA[0..19]26
ADB[0..7]26
1MB Flash ROM
C360
0.1U_0402_16V4Z
5
U22
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
40
A17
13
A18
37
A19
22
CE#
24
OE#
9
WE#
SST39VF080-70_TSOP40
KBA0 KBA1 KBA2 KBA3
B B
FREAD#26
A A
KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19
INT_FSEL#
FREAD#
FWE#
1 2
EC_SMB_CK126,31 EC_SMB_DA126,31
KBA[0..19] ADB[0..7]
31
VCC0
30
VCC1
25
D0
26
D1
27
D2
28
D3
32
D4
33
D5
34
D6
35
D7
10
RP#
11
NC
READY/BUSY#
8 7 6 5
AT24C16N-10SI-2.7_SO8
12 29
NC0
38
NC1
23
GND0
39
GND1
U23
A0
VCC
A1
WP SCL
A2
SDA
GND
RESET#
1 2 3 4
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
+3VALW+3VALW
12
100K_0402_5%
+3VALW
1
C358
0.1U_0402_16V4Z
2
1 2
R219 100K_0402_5%
R222 100K_0402_5%
R221
1 2
+3VALW
14
U24A
3
O
7
+3VALW
12
R233
14
P
A B
G
7
20K_0402_5%
4 5
Title
Size Document Number Rev
Date: Sheet
SN74LVC32APWLE_TSSOP14
FWE#
6
2009/10/032006/10/03
2
INT_FSEL#
+3VALW
U24B
O
1MB ROM Socket
3
JP30
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
SUYIN_80065AR-040G2T@
KBA19KBA13 KBA10 ADB7 ADB6 ADB5 ADB4
ADB3 ADB2 ADB1 ADB0 FREAD#
FSEL# KBA0
+3VALW
SN74LVC32APWLE_TSSOP14
Deciphered Date
KBA16 KBA17 KBA15 KBA14
+3VALW
SB_INT_FLASH_SEL#18
KBA12 KBA11 KBA9 KBA8 FWE# RESET# INT_FLASH_EN#
SB_INT_FLASH_SEL#
KBA18 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C376
1 2
0.1U_0402_16V4Z
1
P
A
INT_FLASH_EN#
2
B
G
R401
12
100K_0402_5%
Q22 2N7002_SOT23
SUSP# 16,23,26,29,34,35
EC_FLASH# 18
FWR# 26
2
1 3
D
G
S
Compal Electronics, Inc.
BIOS/TP-PAD/BT
IAKAA M/B LA-3401P
1
FSEL# 26
27 38Thursday, October 05, 2006
0.3
of
5
Lid SW
+3VALW
U27 A3212EEH_MLP6
VDD5OUTPUT
4
1
D D
C405
NC
2
0.1U_0402_16V4Z
+3VALW
12
R254 47K_0402_5%
LID_SW#
1
2
1
NC
GND
3
C406
2
10P_0402_50V8J
LID_SW# 26
4
ON/OFF BUTTON
for debug only
BTN TOP
5
6
3
4
SW2 SMT1-05_4P
1 2
3
ON/OFF
EC_ON26
10K_0402_5%
1
DAN202U_SC70
R49
SW1
5
6
SMT1-05_4P
3 4
1 2
+3VALW
R46
2
G
2 3
100K_0402_5%
1 2
51_ON#
Q5
13
D
2N7002_SOT23
S
1
C123
0.01U_0402_25V7K
2
ON/OFFBTN# 26 51_ON# 30
12
D8 RLZ20A_LL34
D6
1 2
2
1
Kill SWITCH
SW3
KS@
3
3
2
2
1
1
1BS003-1211L_3P
+3VALW
1
DAN217_SC59@
3 2
D34
R413
1 2
100K_0402_5%
+3VALW
KILL_SW# 25,26
WL&BT LED
+5VALW
1 2
R414 300_0402_5%KS@
POWER/SUSPEND LED
PWR_SUSPLED1#
C C
PWR_LED_0#
BATT CHARGE/FULL LED
+5VALW
1 2
R399 300_0402_5%
1 2
R398 120_0402_5%
HDD LED
1 2
+5VS
R397 120_0402_5%
AC IN LED
+5VALW
1 2
R400 120_0402_5%
USB CONN. 1 (In Back Side)
B B
USB20_N118
USB20_P118
Place close to US B co n nector
150U_D2_6.3VM
A A
+5VALW
USB_EN#25,26
4.7U_0805_10V4Z
C408
USB_EN#
D35
2 1
HT-191UD_AMBER_0603
D15
2 1
HT-191UD_AMBER_0603
D21
2 1
HT-191NB_BLUE_0603
D16
2 1
HT-191UD_AMBER_0603
D22
2 1
HT-191NB_BLUE_0603
D19
2 1
HT-191NB_BLUE_0603
D18
2 1
HT-191NB_BLUE_0603
R691
WCM2012F2S-900T04_0805@
1
1
4
4
L51 R689
+USB_VCCA
1
+
C410
0.1U_0402_16V4Z
2
1
C412
2
5
KS@
BATT_CHG_LOW_LED#
BATT_FULL_LED#
2N7002_SOT23
0_0402_5%
2
2
3
3
0_0402_5%
1
C409
2
U28
1
GND
2
IN
3
IN
4
EN#
G528_SOP8
1.4A
Close to JP12
1 3
Q37
USB20_1N USB20_1P
1
W=60mils
1000P_0402_50V7K
2
+USB_VCCA
8
OUT
7
OUT
6
OUT
5
FLG
D
S
G
2
+USB_VCCA
WL_BT_LED# 26
BATT_CHG_LOW_LED# 26
BATT_FULL_LED# 26
HDD_LED# 26
ACIN 18,26,30
JP12
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
8
GND4
SUYIN_020173MR004G565ZR
USB CONN. 2 (In Left Side)
USB20_N418
USB20_P418
4
+5VALW
47K
1 3
+5VALW
47K
1 3
2N7002_SOT23
10K
2
Q36
DTA114YKA_SOT23
R392 300_0402_5%
1 2
R393 300_0402_5%
1 2
2N7002_SOT23
10K
2
Q34 DTA114YKA_SOT23 R391
1 2
R390 120_0402_5%
1 2
R690
WCM2012F2S-900T04_0805@
1
1
4
4
L50 R688
Place close to US B co n nector
1
+
C551
+5VALW
1
2
+5VALW
C816
0.1U_0402_16V4Z
150U_D2_6.3VM
1
2
USB_EN#
C817
0.1U_0402_16V4Z
2
C245
1
2
4.7U_0805_10V4Z
SYSON
Q35
2
G
1 3
D
SYSON
2
G
Q33
1 3
D
120_0402_5%
0_0402_5%
2
2
3
3
0_0402_5%
+USB_VCCB
W=60mils
1
C232
0.1U_0402_16V4Z
2
U12
1
GND
2 3 4
OUT
IN
OUT OUT
IN
FLG
EN#
G528_SOP8
1.4A
Close to JP21
Security Classification
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
S
S
PWR_LED_0# PWR_LED_1#
USB20_4N USB20_4P
1
C233 1000P_0402_50V7K
2
+USB_VCCB
8 7 6 5
Issued Date
SYSON 23,26,34
PWR_SUSP_LED 26
PWR_SUSPLED# PWR_SUSPLED1#
POWER_LED# 26
+USB_VCCB
3
1 2 3 4 5 6 7 8
SW/LED Connector
JP21
VBUS D­D+ GND GND GND GND GND
SUYIN_020167MR004S511ZR
ACES_88170-3400
ACES_85201-1205
JP6
NUM_LED#
1
PADS_LED#
2
CAPS_LED#
3 4
KSO15
5
KSO14
6
KSO10
7
KSO11
8
KSO8
9
KSO9
10
KSO13
11
KSI7
12
KSO3
13
KSO7
14
KSO12
15
KSI4
16
KSI6
17
KSI5
18
KSO6
19
KSO5
20
KSI3
21
KSI0
22
KSO0
23
KSO1
24
KSI1
25
KSI2
26
KSO2
27
KSO4
28 29 30 31 32 33 34
Deciphered Date
MODEBTN#
JP3
1 2 3 4 5 6 7 8
9 10 11 12
R88 300_0402_5%
R91 300_0402_5%
1 2
R90 300_0402_5%
2
1
D30 DAN202U_SC70
PWR_SUSPLED#
3
PWR_LED_1#
ON/OFF
IEBTN#
KSO17
MODEBTN# EC_PLAYBTN# EC_STOPBTN#
EC_FRDBTN#
EC_REVBTN#
BUTTON_ID
51_ON#
KSO17 26 KSI0 26
KSI1 26 KSI3 26 KSI2 26 BUTTON_ID 26
KEYBOARD CONN.
NUM_LED# 26 PADS_LED# 26 CAPS_LED# 26
12
+3VS
12
+3VS
+3VS
For EMI Request
2009/10/032006/10/03
2
IEBTN#
KSO17 ON/OFF PWR_LED_1# PWR_SUSPLED# IEBTN# MODEBTN# EC_REVBTN# EC_FRDBTN# EC_PLAYBTN# EC_STOPBTN# BUTTON_ID
1
D31 DAN202U_SC70
C508 220P_0402_50V7K@
1 2
C506 220P_0402_50V7K@
1 2
C510 220P_0402_50V7K@
1 2
C509 220P_0402_50V7K@
1 2
C504 220P_0402_50V7K@
1 2
C502 220P_0402_50V7K@
1 2
C489 220P_0402_50V7K@
1 2
C490 220P_0402_50V7K@
1 2
C500 220P_0402_50V7K@
1 2
C499 220P_0402_50V7K@
1 2
C810 220P_0402_50V7K@
1 2
2 3
51_ON#
IE_BTN# 26MODE# 26
For EMI Request
KSI[0..7] KSO[0..15]
PADS_LED#
12
C193100P_0402_50V8J
KSO14
12
C191100P_0402_50V8J
KSO11
12
C189100P_0402_50V8J
KSO9
12
C187100P_0402_50V8J
KSI7
12
C185100P_0402_50V8J
KSO7
12
C183100P_0402_50V8J
KSI4
12
C181100P_0402_50V8J
KSI5
12
C179100P_0402_50V8J
KSO5
12
C196100P_0402_50V8J
KSI0
12
C201100P_0402_50V8J
KSO1
12
C199100P_0402_50V8J
KSI2
12
C176100P_0402_50V8J
KSO4
12
C174100P_0402_50V8J
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
USB/LID/KS/KB/LED/SW-B Conn
IAKAA M/B LA-3401P
KSI[0..7] 26 KSO[0..15] 26
NUM_LED#
1 2
C194 100P_0402_50V8J
CAPS_LED#
1 2
C195 100P_0402_50V8J
KSO15
1 2
C192 100P_0402_50V8J
KSO10
1 2
C190 100P_0402_50V8J
KSO8
1 2
C188 100P_0402_50V8J
KSO13
1 2
C186 100P_0402_50V8J
KSO3
1 2
C184 100P_0402_50V8J
KSO12
1 2
C182 100P_0402_50V8J
KSI6
1 2
C180 100P_0402_50V8J
KSO6
1 2
C178 100P_0402_50V8J
KSI3
1 2
C198 100P_0402_50V8J
KSO0
1 2
C200 100P_0402_50V8J
KSI1
1 2
C177 100P_0402_50V8J
KSO2
1 2
C175 100P_0402_50V8J
1
28 38Thursday, October 05, 2006
of
0.3
A
B
C
D
E
H10
H_S315D118
@
New LPC Debug Pad ---- MB side
7
8
9
10
H30
@
DEBUG_PAD
56
4
3
2
1
+3VALW
R503
0_0402_5%@
E51_RXD
SIRQ
LPC_AD3
LPC_AD1
LPC_FRAME#
1 2
1 2
R505 0_0402_5%
1 1
E51_RXD26
SIRQ18,20,26
LPC_AD317,26
LPC_AD117,26
Under DDR ME Assigment Area
R502
0_0402_5%@
1 2
1 2
R504 0_0402_5%
PCI_RST#
LPC_AD2
LPC_AD0
CLK_PCI_SIO2
1 2
E51_TXD
LPC_DRQ#1
R537
10_0402_5%
C711
1 2
10P_0402_50V8J
E51_TXD 26
LPC_DRQ#1 17
PCI_RST# 18,20,26
LPC_AD2 17,26
LPC_AD0 17,26
CLK_PCI_SIO2 14LPC_FRAME#17,26
Keep Resistor near Debug Pad and in the same side Reverse side DIMM ---- Pin 1 keep away DIMM
2 2
1
H27
H_S315D118
@
1
H11
H_C256D126
@
1
H8
H_C276BC157D157
@
1
FD4
@
1
CF4
1
@
H44
H_C236BC160D157
@
1
H33
H_C276BC157D157
@
1
H_S315D118
@
H_S315D118
@
H_C256D126
@
H_O150X126D150X126N
@
FD6
@
1
CF8
1
@
@
H_C197D91
@
H_R354x315D118
@
1
H1
H28
H2
M1
H34
1
1
1
1
FD5
@
CF2
H_C197D91
1
H40
1
H_S315D118
H_S315D118
H_S394BS315D118
1
CF7
1
@
H35
@
1
H_S315D118
@
H3
@
1
H26
@
1
H4
@
1
M3
H_C59D59N
@
1
FD2
@
1
CF1
1
@
H_C197D91
@
H41
1
H_S394BS315D118
@
H_R354BR354X315D118
@
H_S315D118
@
H_C122D122N
@
FD1
@
1
H36
H_C256D126
1
H42
H_C236BC256D118
@
1
H5
1
H13
1
H21
1
M7
1
FD3
@
CF5
1
@
H37
@
H_C157BC276D157
@
H_C295D165
@
H_C295D165
@
H_C295D165
@
1
H_C315D315N
@
1
H32
H_C256BC160D157
@
1
H24
1
H14
1
H15
1
H18
1
CF10
1
@
H38
1
H7
H_C276D197
@
1
H19
H_C295D165
@
1
H16
H_C276BC157D157
@
1
M4
H_O276X177D276X177N
@
1
CF3
1
1
@
@
H31
H_C256BC160D157
@
1
H_C157BC276D157
@
H_S315D118
@
H_C169D169N
@
CF9
H22
1
H25
1
H17
1
3 3
+VSB
12
R195
340K_0402_1%
1 2
0_0402_5%
13
D
2
G
Q20
S
2N7002_SOT23
SUSP
Discharge Circuit
4 4
2N7002_SOT23
12
R27 470_0805_5%
13
D
Q1
S
2
G
+5VALW +5VS
U19
D D D D
AO4422_SO8
2N7002_SOT23
S S S G
12
13
D
S
1 2 3 4
2
1
0.033U_0603_25V7K
R93 470_0805_5%
Q11
2
G
8
7
1
6
5
C317
2
10U_0805_10V4Z
RUNON
R196
12
R513
10M_0402_5%
+1.5VS +VCCP+2.5VS +5VALW
12
R72 470_0805_5%
13
D
Q8
2
G
S
2N7002_SOT23
A
0.1U_0402_16V4Z
1
C349 10U_0805_10V4Z
2
C316
SUSPSUSPSUSP SUSP
2N7002_SOT23
+0.9VS
12
R70 470_0805_5%
13
D
Q7
S
2N7002_SOT23
1
C345
2
Q32
2
G
12
R218 470_0805_5%
13
D
S
10U_0805_10V4Z
+VSB
12
R613 820K_0402_1%
2
G
SUSP
12
R184 10K_0402_5%
SUSP
13
D
Q18
2
G
S
2N7002_SOT23
B
PM@
13
D
2
G
S
2N7002_SOT23
SUSP 35
SUSP# 16,23,26,27,34,35
+1.8V
U3
8
S
D
7
C29
PM@
R614
1 2
0_0402_5%PM@
Q66
PM@
1
2
12
10M_0402_5%
D
6
D
5
D
AO4456_SO8
PM@
R615
PM@
S S
G
1.8VS_ON
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+1.8VS
1 2 3 4
2
C813
PM@
1
0.033U_0603_25V7K
C
0.1U_0402_16V4Z
1
C32 10U_0805_10V4Z
2
PM@
SUSP
2N7002_SOT23 PM@
2006/10/03 2009/10/03
12
1
R26
C33
PM@
470_0805_5%
2
PM@
13
D
Q2
2
G
S
Compal Secret Data
Deciphered Date
+3VALW to +3VS Transfer+5VALW to + 5VS Transfer +1.8V to +1.8VS Transfer (Place close to VGA-Connector)
10U_0805_10V4Z
D
C355
1
2
+3VALW
U21
8
S
D
7
S
D
6
S
D
5
G
D
AO4422_SO8
Title
Size Document Number Rev
Date: Sheet
+3VS
1
C346 10U_0805_10V4Z
2
0.1U_0402_16V4Z
SUSPRUNONSUSP
2N7002_SOT23
1 2 3 4
Compal Electronics, Inc.
DC/DC I/F_Debug I/F _Screw
IAKAA M/B LA-3401P
E
12
1
C335
R339 470_0805_5%
2
13
D
Q31
2
G
S
0.3
of
29 38Thursday, October 05, 2006
A
PL1
DC301001M80
PJP1
1
+
2
+
3
SINGA_2DW-0005-B03@
PR21
560_0603_5%
1 2
-
4
-
1 1
2 2
+CHGRTC
DC_IN_S1 DC_IN_S2
BATT+
CHGRTCP
51_ON#28
PR22
560_0603_5%
1 2
PF1
7A_24VDC_429007.WRML
PD3
12
RLS4148_LLDS2
PR12
200_0603_5%
1 2
PR14
100K_0402_1%
1 2
PR15
22K_0402_1%
RTCVREF
3.3V
12
PC9 10U_0805_10V4Z
21
12
12
G920AT24U_SOT89
3
OUT
12
PC1
1000P_0402_50V7K
N1
PC7
0.22U_1206_25V7K
PU2
IN
GND
1
FBMA-L18-453215-900LMA90T_1812
12
PC2
100P_0402_50V8J
68_1206_5%
PQ1
TP0610K-T1-E3_SOT23
2
12
PR17 200_0603_5%
N2
2
12
PC10 1U_0805_25V4Z
1 2
PR9
13
VIN
PD2 RLS4148_LLDS2
1 2
12
12
12
PC8
0.1U_0603_25V7K
PD5 RLZ16B_LL34
2 1
12
PC3 1000P_0402_50V7K
PR10 68_1206_5%
B
VIN
12
PC4 100P_0402_50V8J
0.068U_0402_10V6K
PC5
VIN
12
PR3
84.5K_0402_1% PR5
22K_0402_1%
1 2
12
12
PR6 20K_0402_1%
12
PC6
0.1U_0402_16V7K
PR1
1M_0402_1%
1 2
VS
8
3
+
2
-
4
PR8
10K_0402_1%
PU1A
P
1
O
G
LM393M_SO8
12
RTCVREF
3.3V
C
PD1
RLZ4.3B_LL34
VS
12
PR2
5.6K_0402_5%
12
D
PR4
10K_0402_1%
1 2
PACIN
12
PR7 10K_0402_1%
ACIN 18,26,28
PACIN 32,33
Vin Detector
High 18.384 17.901 17.430 Low 17.728 17.257 16.976
1 2
PR11 1K_1206_5%
VS
VIN
PD6
MAINPWON31,33
ACON32
2 3
RB715F_SOT323
PD4
RLS4148_LLDS2
PR18
100K_0402_1%
1 2
VL
1
1000P_0402_50V7K
N3
12
1 2
PR13 1K_1206_5%
1 2
PR16 1K_1206_5%
PC12
PU1B
LM393M_SO8
7
12
1000P_0402_50V7K
O
PR19
2.2M_0402_5%
8
5
P
+
6
-
G
4
12
PC13
12
12
PR23
34K_0402_1%
PR25
66.5K_0402_1%
12
VL
12
PR26 191K_0402_1%
12
PR20 499K_0402_1%
12
PR24 499K_0402_1%
B+
12
PC11 1000P_0402_50V7K
3 3
+3VALWP +3VALW
(5A,200mils ,Via NO.= 10)
+5VALWP +5VALW
(5A,200mils ,Via NO.= 10)
+VSBP +VSB
PJ1
2
112
JUMP_43X118@
PJ3
2
112
JUMP_43X118@
PJ5
2
112
JUMP_43X39@
+1.8VP +1.8V
+2.5VSP +2.5VS
(0.35A,40mils ,Via NO.=2)
(120mA,40mils ,Via NO.= 2)
PJ7
2
112
(5A,200mils ,Via NO.= 10)
JUMP_43X118@
+VCCP+1.05VSP
(2A,80mils ,Via NO.= 4)
(4.5A,180mils ,Via NO.= 9)
4 4
A
PJ2
2
112
JUMP_43X118@ PJ15
2
112
JUMP_43X118@
(8A,320mils ,Via NO.= 16)
PJ4
2
112
JUMP_43X39@
PJ6
2
112
JUMP_43X79@
PJ8
2
112
JUMP_43X118@
+0.9VS+0.9VSP
+1.5VS+1.5VSP
13
D
PQ2
2
RHU002N06_SOT323
G
S
Precharge detector
15.97V/14.84V FOR ADAPTOR
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Deciphered Date
C
2009/10/032006/10/03
PR27
47K_0402_1%
13
PQ3 DTC115EUA_SC70
2
Title
Size Document Number Rev
Date: Sheet
PACIN
12
+5VALWP
Compal Electronics, Inc.
DCIN & DETECTOR
D
0.3
of
30 38Thursday, October 05, 2006
A
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 87(86) degree C Recovery at 48(47) degree C
VL VS
VMB
FBMA-L18-453215-900LMA90T_1812
+3VALWP
12
PC15 1000P_0402_50V7K
+3VALWP
1 2
BATT_TEMPA 26
EC_SMB_DA1 26,27
PL2
ALI/MH# 26,32
BATT+
12
PC16
0.01U_0402_25V7K
100K_0603_1%_TH11-4H104FT
PH1
PC17
0.22U_0805_16V7K
12
12
12
PR36
0.1U_0603_25V7K
13.7K_0402_1%
1 2
20K_0402_1%
PR32
PC14
TM_REF1
12
PC18
12
1000P_0402_50V7K
3 2
100K_0402_1%
12
PR39 100K_0402_1%
PH2 near main Battery CONN :
BAT. thermal protection at 79 degree C Recovery at 45 degree C
+
-
PR37
1 2
8
P
G
4
1 1
2 2
PJP2
BATT+
ID B/I TS
SMD SMC
SUYIN_250005MR007G132ZR@
GND
BATT_S1
1
ALI/NIMH#
2
AB/I
3
TS_A
4
EC_SMDA
5
EC_SMCA
6 7
PR34
100_0402_5%
1 2
1 2
PR35 100_0402_5%
PR40
1K_0402_1%
PR29
1K_0402_1%
1 2
12
12A_65VDC_451012
12
PR33 1K_0402_1%
6.49K_0402_1%
PF2
PR38
21
1 2
PR30
47K_0402_1%
12
PR31
47K_0402_1%
PU3A
1
O
LM393M_SO8
12
VL
VL
PR28 47K_0402_1%
1 2
1SS355_SOD323
PD7
MAINPWON 30,33
13
2
12
PQ4
DTC115EUA_SC70
EC_SMB_CK1 26,27
VLVL
12
100K_0603_1%_TH11-4H104FT
PQ5 TP0610K-T1-E3_SOT23
13
2
VL
1 2
PR47
PR48
100K_0402_1%
0_0402_5%
1 2
B+
12
12
PC20
PR45
PR46 22K_0402_1%
1 2
13
D
2
G
PQ6
S
PC22
RHU002N06_SOT323
12
100K_0402_1%
@
0.22U_1206_25V7K
3 3
POK33
+VSBP
12
PC21
@
0.22U_0805_16V7K
0.1U_0603_25V7K
PH2
PR43
10.7K_0402_1%
1 2
TM_REF1
PR44 22K_0402_1%
12
12
PC19
47K_0402_1%
1 2
5
+
6
-
PR42
8
P
G
4
PU3B
7
O
LM393M_SO8
PR41 47K_0402_1%
1 2
1SS355_SOD323
PD8
12
0.1U_0402_16V7K
@
4 4
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Deciphered Date
C
2009/10/032006/10/03
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
BATTERY CONN / OTP
D
31 38Thursday, October 05, 2006
0.3
of
A
P2
1 2 3 6
12
PR50 200K_0402_1%
PC26
0.1U_0603_25V7K
12
0.1U_0402_16V7K
13
D
RHU002N06_SOT323
S
PQ9 AO4407_SO8
4
PC29
IREF26
12
8 7
5
12
PR56 10K_0402_1%
1 2
162K_0402_1%
100K_0402_1%
PQ8 AO4407_SO8
VIN
1 1
12
PR51 47K_0402_1%
2
13
D
PQ14
2
RHU002N06_SOT323
G
S
2 2
PACIN30,33
ACON30
8 7
5
47K
2
47K
13
PQ12 DTC115EUA_SC70
ACOFF#
PACIN
1 3
1SS355_SOD323
1 2
PR62
3K_0402_1%
ACON
4
PQ10 DTA144EUA_SC70
150K_0402_1%
1 2
PD9
1 2 36
PR58
PQ15
2
G
12
ADP_I26
12
PR55 30K_0402_1%
12
PC32
0.1U_0402_16V7K
PR61
PR66
P3
12
1 2
0.02_2512_1%
1 2
PC30
4700P_0402_25V7K
1 2
PC33
1000P_0402_50V7K
12
PC36
0.1U_0402_16V7K
IREF=1.31*Icharge IREF=0.6V ~ 3 .144V
+3VALWP
12
PR69 47K_0402_1%
2
13
FSTCHG26
3 3
OVP voltage : LI
4S2P : 18V--> BATT_OVP= 2V
2
PQ18
DTC115EUA_SC70
3S2P : 13.5V--> BATT_OVP= 1.5V
(BAT_OVP=0.1111 *VMB)
BATT_OVP26
4 4
CS
13
PQ16 DTC115EUA_SC70
12
PR74
2.2K_0402_5%
VMB
12
PR72 340K_0402_1%
PR75
12
PR73 499K_0402_1%
12
VS
8
PU5A
3
P
+
1
0
2
-
G
LM358DT_SO8
4
105K_0402_1%
B
Iadp=0~3.125A
4 3
PR49
12
PR54
100K_0402_1%
PR57
10K_0402_1%
1 2
PR59
1K_0402_1%
1 2
PR64
10K_0402_1%
12
VL
ALI/MH#26,31
12
PC40
0.01U_0402_25V7K
B+
12
PC137 330P_0402_50V7K
PU4
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
MB3887PFV-ERE1_SSOP24
12
PR67
150K_0603_0.1%
1 2
PR71
100K_0402_1%
PQ19
DTC115EUA_SC70
C
65W/75W Iadp = 0~ 3 . 1 25A PR49=0.02_2512_1% PR55=30K_0402_1% 90W Iadp=0~4.2A PR49=0.015_2512_1% PR55=29.4K_0402_1%
PL12
FBMA-L18-453215-900LMA90T_1812
1 2
2
+INC2
VCC(o)
-INE3
+INC1
330P_0402_50V7K
GND
CS
OUT
VH
VCC
RT
FB3
CTL
PQ17
S
G
PC138
24
23
22
21
20
19
1 2
PC31
0.1U_0603_25V7K
18
17
1 2
PR60 68K_0402_5%
16
47K_0402_1%
15
1 2
ACON
14
13
D
RHU002N06_SOT323
13
2
13
12
CS
0.1U_0603_25V7K
PR65
1500P_0402_50V7K
PR70
300K_0603_0.1%
12
PC23
4.7U_1206_25V6K
1 2
1 2
0.1U_0603_25V7K
1 2
PC34
1 2
PC35
4.2V
12
PC27
0.022U_0402_16V7K
PC28
12
PC24
4.7U_1206_25V6K
ISE_CHG+
12
PC25
4.7U_1206_25V6K
DH_CHG
PD14
EC31QS04
@
PR68
300K_0603_0.1%
578
16UH_D104C-919AS-160M_3.7A_20%
12
12
12
BATT Type Charge Current IREF
8 CEL L 3A 3.144V
6 CELL 3A 3.144V
36
241
LX_CHG
PL3
1 2
PD10 EC31QS04
ALI/MH#
B++
PQ11 AO4407_SO8
ACOFF#
0V
3.3V
PQ7
AO4407_SO8
1 2 3 6
4
PR52
47K_0402_1%
1 2
PR53
10K_0402_1%
1 2 13
2
PQ13
DTC115EUA_SC70
CC=0.6~3A CV=12.6V(6 CELLS LI-ION) CV=16.8V(8 CELLS LI-ION)
1 2
0.02_2512_1%
PR63
4 3
PC37
4.7U_1206_25V6K
12
8 7
5
VIN
ACOFF 26
12
12
PC38
4.7U_1206_25V6K
D
PC39
4.7U_1206_25V6K
BATT+
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Deciphered Date
C
2009/10/032006/10/03
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CHARGER
D
32 38Thursday, October 05, 2006
0.3
of
5
4
3
2
1
+3.3VALWP/+5VALWP
B+++
GND
23
12
20
PR78
12
V+
LDO3
25
12
PC57
BST_3V
VL
PR76
1 2
10_1206_5%
PC48
0.1U_0603_25V7K
17
13
VCC
TON
ILIM3
ILIM5 BST3
DH3 DL3 LX3
OUT3
FB3
PGOOD
PRO#
10
MAX8734AEEI+_QSOP28
PR93 0_0402_5%
1 2
4.7U_0805_6.3V6K
47_0402_5%
PC50
1 2
1U_0603_6.3V6M
5
11 28
26 24 27 22
7 2
12
PC46
0.1U_0402_16V7K
2VREF_8734
ILIM3
ILIM5
FB3
1 2
1 2
BST_3V-1 DH_3V-1
PR80
200K_0402_1%
PR83
340K_0402_1%
POK 31
PR81
1 2
PR84
1 2
PR86
0_0603_5%
200K_0402_1%
340K_0402_1%
LX_3V
12
B+++
PC41
4.7U_1206_25V6K
PC52
0.1U_0603_25V7K
12
12
0_0603_5%
12
PC42
SI4800BDY-T1-E3_SO8
4.7U_1206_25V6K
DH_3V
SI4810BDY-T1-E3_SO8
PR85
1 2
DL_3V
4.7U_LF919AS-4R7M-P3_5.2A_20%
PQ20
PQ22
1 2
1 2
PR91
6.81K_0402_1%
PR94
10K_0402_1%
5
D8D7D6D
S1S2S3G
4
5
D8D7D6D
S1S2S3G
4
12
PL5
+3VALWP
1
+
PC55
150U_V_6.3VM_R18
2
BST_5V
2
3
D D
PJ10
B+
112
JUMP_43X118@
C C
B B
B+++
2
12
12
PC44
PC43
4.7U_1206_25V6K
4.7U_LF919AS-4R7M-P3_5.2A_20%
+5VALWP
1
+
PC53
2
150U_V_6.3VM_R18
4.7U_1206_25V6K
PL4
PR88
10.5K_0402_1%
1 2
PR92
1 2
6.81K_0402_1%
PC45
VS
12
2200P_0402_50V7K
12
MAINPWON30,31
PD12
1 2
RLZ5.1B_LL34
D8D7D6D
S1S2S3G
D8D7D6D
S1S2S3G
1 2
47K_0402_1%
100K_0402_1%
5
PQ21 SI4800BDY-T1-E3_SO8
4
DH_5V
5
PQ23 SI4810BDY-T1-E3_SO8
4
DL_5V
PR87
PR90
0_0402_5%
0_0603_5%
1 2
12
PR96
PR79
12
0.047U_0603_16V7K
DH_5V-1
PC51
0.1U_0603_25V7K
12
PACIN30,32
PC54
2.2U_0805_25V6K
@
PR89
1 2
10K_0402_1%@
0_0603_5%
2VREF_8734
VL
12
PR95
806K_0603_1%
PC58
12
12
DAP202U_SOT323
VL
12
PC49
4.7U_0805_6.3V6K
BST_5V-1
PR82
12
LX_5V
FB5
1 2
PR188
0_0402_5%
PC56
PD11
PC134
12
1
12
PR77
10_1206_5%
12
12
PC47
2.2U_0805_25V6K
2.2U_0805_25V6K
18
PU6
14
BST5
LD05
16
DH5
15
LX5
19
DL5
21
OUT5
9
FB5
1
N.C.
6
SHDN#
4
ON5
3
ON3
12
SKIP#
8
REF
0.22U_0603_10V7K
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/10/03 2009/10/03
Deciphered Date
Compal Electronics, Inc.
Title
Size Document Number Rev
Custom
2
Date: Sheet
+5V/+3V
IAKAA M/B L A-3401P
Thursday, October 05, 2006
0.3
of
33 38
1
A
PC59
4.7U_1206_25V6K
1 1
PC63
4.7U_0805_6.3V6K
5
D8D7D6D
+1.8V
+1.8VP
1.8U_D104C-919AS-1R8N_9.5A_30%
12
12
12
PC71
0.01U_0402_25V7K
1
+
PC70 220U_6.3V_M_R13
2
PR104
2 2
10.2K_0402_1%
PR113
10K_0402_1%
PL6
1 2
680P_0603_50V8J@
PR108 0_0402_5%
1 2
PR116
0_0402_5%@
1 2
PQ24
SI4800BDY-T1-E3_SO8
LX_1.8V
PR101
4.7_1206_5%@
1 2
PC72
1 2
S1S2S3G
4
DH_1.8V-2
PC68
0.1U_0402_16V7K
5
D8D7D6D
PQ26 SI4810BDY-T1-E3_SO8
S1S2S3G
4
SYSON23,26,28 SUSP# 16,23,26,27,29,35
2K_0402_1%
1 2
PR111
0_0402_5%
0.1U_0402_16V7K@
12
12
BST_1.8V-1
12
1 2
PR102
0_0603_5% PR106
1 2
PC76
B
12
PC60
4.7U_1206_25V6K
PR97
0_1206_5%
12
+5VALWP
1
0.1U_0603_25V7K PD13
DAP202U_SOT323
2
3
PC66
0.01U_0402_25V7K
12
1 2
PR99
0_0603_5%
ISE_1.8V ISE_1.5V DL_1.8V
12
12
PR118 100K_0402_1%
PC64
BST_1.5V-1
PU7
12
SOFT1
6
BOOT1
5
UGATE1
4
PHASE1
7
ISEN1
2
LGATE1
3
PGND1
9
VOUT1
10
VSEN1
8
EN1
15
PG1
11
OCSET1
12
14
PR98
2.2_0603_5%
1 2
28
VCC
SOFT2
VIN
BOOT2
UGATE2 PHASE2
LGATE2
PGND2
VOUT2 VSEN2
PG2/REF
GND
1
OCSET2
DDR
ISL6227CAZ-T_SSOP28
13
ISEN2
EN2
12
PC65
2.2U_0805_10V6K
PC67
0.01U_0402_25V7K
17
12
BST_1.5V-2BST_1.8V-2
23
1 2
PR100 0_0603_5%
DH_1.5V-1 DH_1.5V-2DH_1.8V-1
24 25
22 27
26
20 19 21 16
18
12
PR117 100K_0402_1%
PC69
0.1U_0402_16V7K
1 2
PR103
0_0603_5% PR107
2K_0402_1%
1 2
SI4810BDY-T1-E3_SO8
DL_1.5V
1 2
PR112 24K_0402_1%
12
PC77
0.1U_0402_16V7K
C
12
LX_1.5V
PQ27
PC61
4.7U_1206_25V6K
5
D8D7D6D
PQ25
SI4800BDY-T1-E3_SO8
S1S2S3G
4
1.8U_D104C-919AS-1R8N_9.5A_30%
5
4
PR105
D8D7D6D
1 2
S1S2S3G
PC75
1 2
VSE_1.5VVSE_1.8V
12
PC62
4.7U_1206_25V6K
PL7
1 2
4.7_1206_5%@
680P_0603_50V8J@
PL13
FBMA-L18-453215-900LMA90T_1812
1 2
12
12
PC139 330P_0402_50V7K
PR109
1 2
12
PC74
0.01U_0402_25V7K
0_0402_5%
PR114
0_0402_5%@
1 2
D
B+
+1.5V
+1.5VSP
PR110
6.81K_0402_1%
PR115 10K_0402_1%
1
+
PC73 220U_6.3V_M_R13
2
12
12
3 3
4 4
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Deciphered Date
C
2009/10/032006/10/03
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
1.8V / 1.5V
D
34 38Thursday, October 05, 2006
0.3
of
5
PL14
1 2
B+
FBMA-L18-453215-900LMA90T_1812
D D
C C
B B
A A
SUSP29
SUSP#
680P_0402_50V7K
SUSP#16,23,26,27,29,34
PR135
0_0402_5%@
1 2
0.01U_0402_25V7K@
11K_0402_1%
1 2
0.1U_0402_16V7K
PC98
PR186
5
PC140
PC132
SUSP#
12
12
10U_1206_25VAK
1 2
24K_0402_1%
2
G
12
PR126
13
PC78
D
S
12
12
6269_VCC
12
PC82
2.2U_0603_6.3V6K
12
PC84
0.1U_0402_16V7K
+5VALW
6
PU10
7
POK
VOUT
VCNTL
VOUT
8
EN
GND
1
PQ37 RHU002N06_SOT323
PC79 10U_1206_25VAK
PR125
0_0402_5%
1 2
22P_0402_50V8J
12
PC90
1U_0603_6.3V6M
5
VIN
4 3 2
FB
9
VIN
APL5912-KAC-TRL_SO8
12
PGD_IN36
PR124 0_0402_5%@
PC86
+3VALW
4
1
2
3
4
12
1
PJ14
1
JUMP_43X79@
2
2
12
PC94 22U_1206_6.3V6M
PR136
2.15K_0402_1%
4
PR119
1K_0402_1%
17
PU8
GND
VIN
VCC
FCCM
EN
COMP5FB6FSET
12
PR128
49.9K_0402_1%
12
PC87 6800P_0402_25V7K
PR131
3K_0402_1%
12
12
PR137
1K_0402_1%
6269_VCC
12
15
16
PHASE
PGOOD
PR129
12
12
PC97
0.01U_0402_25V7K
7
12
14
UG
57.6K_0402_1%
12
PC95
3
6269_B+
PHASE_VCCPP
UG_VCCPP_1
PR120
1 2
0_0603_5%
BOOT_VCCPP
13
BOOT
12
PVCC
11
LG
10
PGND
9
ISEN
VO
8
12
PC85
0.01U_0402_25V7K
1
+
PC96
150U_D_6.3VM@
2
22U_1206_6.3V6M
Security Classification
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PC80
1 2
0.1U_0603_25V7K
12
PR122 0_0603_5%
PR123
1 2
4.7_0603_5%
1 2
PC81
2.2U_0603_6.3V6K
ISEN_VCCPP
ISL6269ACRZ-T_QFN16_4X4
+2.5VSP
LG_VCCPP
PR127
1 2
8.25K_0402_1%
PR130
2.26K_0402_1%
1 2
Issued Date
3
6269_VCC
+5VALW
SUSP
PR121 0_0603_5%
1 2
UG_VCCPP_2
PQ29
SI4810BDY-T1-E3_SO8
10U_1206_6.3V7K
PR134
0_0402_5%
1 2
PC93
0.1U_0402_16V7K@
5
4
5
4
PC88
2
12
Deciphered Date
PQ28
D8D7D6D
S1S2S3G
SI4800BDY-T1-E3_SO8
12
D8D7D6D
S1S2S3G
12
+1.8V
1
PJ13
1
JUMP_43X79@
2
2
12
1K_0402_1%
13
D
PQ30
1K_0402_1%
G
S
RHU002N06_SOT323
PR187
4.7_1206_5%
@
PC136 680P_0603_50V8J
@
PR132
PR133
2
PL8
1.8U_D104C-919AS-1R8N_9.5A_30%
1 2
12
12
12
PC91
0.1U_0402_16V7K
12
2009/10/032006/10/03
2
1
+1.05V
+1.05VSP
1
+
PC83 220U_D2_4VM_R15
2
PU9
VIN1VCNTL
2
GND
3
VREF
4
VOUT
APL5331KAC-TRL_SO8
+0.9VSP
PC92 10U_1206_6.3V7K
Title
Size Document Number Rev
Date: Sheet
6 5
NC
7
NC
8
NC
9
TP
+3VALW
12
PC89 1U_0603_6.3V6M
Compal Electronics, Inc.
2.5V / 0.9V / 1.05V
1
35 38Thursday, October 05, 2006
0.3
of
5
4
3
2
1
+5VS
5
36 35 34 33 32 31 30 29 28 27 26 25
PU11
ISEN1 ISEN2
5
0.022U_0402_16V7K
BOOT_CPU1
UGATE_CPU1-1 PHASE_CPU1
UGATE_CPU2-1
BOOT_CPU2
1 2
PR164
0_0603_5%
+5VS
+CPU_B+
PC103
0_0603_5%
PR151
1 2
LGATE_CPU1
LGATE_CPU2
PHASE_CPU2
PR162
1 2
1_0603_5%
0.22U_0603_10V7K
1 2
12
12
0.22U_0603_10V7K PC108
1 2
1 2
1_0603_5%
PR154
IRF8113PBF_SO8
1 2
PC115
PR138 1_0603_5%
PC104
2.2U_0603_6.3V6K
UGATE_CPU1-2
578
PQ32
UGATE_CPU2-2
PQ35
IRF8113PBF_SO8
3 6
241
578
3 6
241
3 5
241
578
3 6
578
IRF8113PBF_SO8
PQ31 SI7840DP-T1-E3_SO8
PR155
PQ33
PC109
241
IRF8113PBF_SO8
PQ34 SI7840DP-T1-E3_SO8
3 5
241
PQ36
3 6
241
PC100
10U_1206_25VAK
12
12
12
12
12
PC101
10U_1206_25VAK
6.8_1206_5%
680P_0603_50V8J
PC111
PR165
6.8_1206_5%
PC118 680P_0603_50V8J
+CPU_B+
12
12
PC102
220U_25V_M
10U_1206_25VAK
0.36UH_MPC1040LR36_24A_20%
12
12
PR157
PR156
VSUM
12
10U_1206_25VAK
3.65K_0805_1%
PR159 0_0603_5%@
10K_0402_1%
ISEN1
0.22U_0603_10V7K
12
PC112
10U_1206_25VAK
0.36UH_MPC1040LR36_24A_20%
12
12
PR167
PR168
10K_0402_1%
PR170 0_0603_5%@
3.65K_0805_1%
VSUM
0.22U_0603_10V7K
FBMA-L18-453215-900LMA90T_1812
1
+
PC99
2
12
12
PL10
1 2
PC110
1 2
1_0402_5%
VCC_PRM
+CPU_B+
12
PL11
12
1 2
PC120
1 2
ISEN2
VCC_PRM
PR158
PR169
1_0402_5%
PL9
1 2
680P_0603_50V8J
PC135
12
+CPU_CORE
12
PC141 3300P_0402_50V7K
B+
5
26
CPU_VID45CPU_VID3
CPU_VID55CPU_VID25CPU_VID15CPU_VID0
CPU_VID6
VR_ON
D D
DPRSLPVR7,18
H_DPRSTP#4,17
CLK_ENABLE#14
+3VS
+3VS
PR153
499_0402_1%
VGATE14,18,26
H_PSI#5
PGD_IN35
C C
1 2
1 2
1 2
100K_0603_1%_TH11-4H104FT@
PC1130.015U_0402_16V7K@
VR_TT#
PR161 4.22K_0402_1%@
PR163 13K_0402_1%
PR172 61.9K_0402_1%
1 2
PC122 390P_0402_50V7K
3.4K_0402_1%
B B
1 2
VCCSENSE5
+CPU_CORE
1 2
PR179 20_0402_5%@
VSSSENSE5
1 2
PR160 147K_0402_1%
1 2
PH3
PC1140.022U_0603_25V7K
1 2
1 2 1 2
PC1161000P_0402_50V7K
PR166 4.42K_0402_1%
1 2
1 2
PC117 47P_0402_50V8J
PC119 0.033U_0402_16V7K
1 2
PC123 470P_0402_50V7K
PR175
1 2
PR177 1.82K_0402_1%
1 2
PR178 0_0402_5%
12
1 2
PR182
12
20_0402_5%@
VCC_PRM
PR139 499_0402_1%
PR140 0_0402_5%
PR141 0_0402_5%
1 2
PR150 0_0402_5%
1 2
12
PC107
PR152
1U_0603_6.3V6M
1.91K_0402_1%
1 2 3 4 5 6 7 8
9 10 11 12
PR173
@
0_0402_5%
1 2
PC1250.018U_0603_50V7J
1 2
12
PC126
0.018U_0603_50V7J
1 2
PR181 0_0402_5%
PC128 180P_0402_50V8J
1 2
PR184 1K_0402_1%
PC130
0.22U_0603_10V7K
1 2
1 2
12
PGOOD PSI#
49
47
48
3V3
GND
CLK_EN#
46
DPRSTP#
PR149
12
44
45
DPRSLPVR
PR142
12
0_0402_5%
0_0402_5%
43
VR_ON
PGD_IN RBIAS VR_TT# NTC SOFT OCSET VW
ISL6262CRZ-T_QFN48
COMP FB FB2
VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1
12
PR174 0_0402_5%@
12
PC127
0.018U_0603_50V7J
1 2
1 2
PR185 4.42K_0402_1%
12
PC129 0.1U_0402_16V7K
1 2
PC1310.22U_0402_6.3V6K
12
PR143
PR144
12
0_0402_5%
PR183
PR145
PR146
12
12
0_0402_5%
0_0402_5%
1 2
12
PC124
0.1U_0603_25V7K
PR180
12
11K_0402_1%
PR147
PR148
12
12
12
0_0402_5%
0_0402_5%
0_0402_5%
VID037VID138VID239VID340VID441VID542VID6
BOOT1 UGATE1 PHASE1
PGND1
LGATE1
PVCC
LGATE2
PGND2 PHASE2 UGATE2
BOOT2
NC
24
1 2
12
PR171 1_0603_5% PC121
1U_0402_6.3V4Z
PR176
10_0603_5%
VSUM
12
2.61K_0402_1% 10KB_0603_5%_ERTJ1VR103J
PH4
1 2
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/10/03 2009/10/03
Deciphered Date
Title
Size Document Number Rev
Custom
2
Date: Sheet
Compal Electronics, Inc.
+CPU_CORE
36 38Thursday, October 05, 2006
1
0.2
of
5
4
3
2
1
FOR ISPDPIR (Product Improve Record)
IAKAA LA-3401P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2
LAN
NO DATE PAGE MODIFICATION LIST PURPOSE
--------------------------------------------------------------------------------------------------------------------­1 0803 23 CHANGE Q25,Q44,R252,R499 TO RESERVED TO COMPATIBLE WITH NORMAL OPEN AUDIO JACK
D D
CHANGE R611,R612 TO POP 2 0810 23 CHANGE C792,C793 TO RESERVE AND MOVE TO PAGE 23 TO RESERVE HP PATH FOR ALC268
TRANSFORMER
ADD C811 BETWEEB AMP_LHPIN AND 861_HP_L TO CHANGE HP PATH FOR ALC861 ADD C812 BETWEEB AMP_RHPIN AND 861_HP_R 3 0814 23 ADD R618_1K_0402 BETWEEN Q23.2 AND R240.2 TO BYPASS BEEP SOUND BEFORE CODEC INITIAL 24 ADD CONNECTION BEEP_MIX FROM Q23.2 TO Q67.2
PCB
ADD CONNECTION EAPD TO Q67.3 CONNECT Q67.1,R616.1,C815.1 TOGETHER PULL HIGH R616_20K_0402 TO +VDDA CONNECT C815.2, R599.2 TOGETHER REMOVE Q65
Card BUS
RESERVE C814 BETWEEN AMP_SD# & GND 4 0816 14 CHANGE R121,R506,R99 TO 39_0402 FOR EMI REQUEST 5 0816 15 CHANGE L1,L2,L3 TO 120OHM BEAD FOR EMI REQUEST 6 0816 28 CHANGE U12,U28 FROM G528 TO G548 FOR INCREASE USB PORT CURRENT RATING 25 CHANGE U42 FROM G528 TO G548
C C
IAKAA LA-3401P SCHEMATIC CHANGE LIST
SB
REVISION CHANGE: 0.2 TO 0.3 NO DATE PAGE MODIFICATION LIST PURPOSE
---------------------------------------------------------------------------------------------------------------------
NB
1 0919 16 CONNECT INVPWR_B+ TO JP1.26 INCREASE 1 MORE B+ PIN FOR SUPPORT 2 LAMP LCD 2 0919 23 CONNECT R673_20K_0402 PULL DOWN ON SENSE_B TO SENSE INTERNAL MIC EXIST OR NOT 3 0919 04 CHANGE U48 TO PU5 TO COST DOWN 1 OP AMP 4 0919 26 RESERVE Q46,D47,R671 FOR RSMRST# SIGNAL TO MEET INTEL REQUIREMENT 5 0919 23 CHANGE R253 TO RESERVE TO CHANGE HEADPHONE SENSE PIN FROM SENSE_A TO SENSE_B CONNECT R620 BETWEEN Q25.1,SENSE_B
SKU ID
6 0919 23 ADD R676,R677 TO 20OHM FIX MONO HEADPHONE NOISE ISSUE 7 0926 23 CHANGE C811,C812,C792,C793 TO 2.2uF IMPROVE HP FREQENCE RESPONSE 8 0926 24 DEL R520,R521,C681,C683 CHANGE C790,C791 TO 0.22uF CHNAGE SPEAKER HIGHPASS -3dB POINT TO 100HZ 9 0926 24 CHANGE C804 TO 2.2uF IMPROVE CHARGE PUMP QUALITY 10 0926 24 DEL R616,R617,R599,C815 ADD C819 NOT TO USE AMP BEEP FUNCTION
B B
11 0926 24 ADD Q67 IMPROVE BOOT BO SOUND
DC-JACK
12 0926 24 CHANGE C596 TO 22uF IMPROVE FAN NOISE 13 0926 24 ADD D48 IMPROVE ESD 14 1003 22 ADD R678,R679,RESERVE L45 ADD R680,R681,RESERVE L46 FOR EMI REQUIREMENT ADD R682,R683,RESERVE L47 ADD R684,R685,RESERVE L48 ADD NET RJ45_MIDI0+_L,RJ45_MIDI0-_L BETWEEN L45,JP11 RJ45_MIDI1+_L,RJ45_MIDI1-_L BETWEEN L46,JP11
CRT EMI SOLUTION
RJ45_MIDI2+_L,RJ45_MIDI2-_L BETWEEN L47,JP11 RJ45_MIDI3+_L,RJ45_MIDI3-_L BETWEEN L48,JP11 25 ADD R686,R687,RESERVE L49 FOR EMI REQUIREMENT ADD NET USB20_5P,USB20_5N BETWEEN L49,JP24 28 ADD R688,R690,RESERVE L50 ADD R689,R691,RESERVE L51 RESERVE FOR USB EMI SOLUTION ADD NET USB20_1N,USB20_1P BETWEEN L51,JP12 USB20_4N,USB20_4P BETWEEN L50,JP21
U5
RTL8101E
100M@
U30
NS892404
100M@
ZZZ1
PCB ZKU LA-3401P REV0
U31
4512
4512@
U16
ICH7
ICH7R1@
U6
945GM
GMR3@
R342
18K_0402_5%
PM@
PJP1
SINGA_2DW-0005-B03
45@
C22
10P_0402_50V8J
PM@
R285
2.49K_0402_1%
1000M@
U6
945GM
GMR1@
C20
10P_0402_50V8J
PM@
U6
945PM
PMR1@
C17
10P_0402_50V8J
PM@
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/10/03 2009/10/03
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
ISPD
IAKAA M/B LA-3401P
1
0.3
of
37 38Thursday, October 05, 2006
DVT
POWER PIR LIST
page Reason for change Modify list
35 Change +1.05V IC Change PU8 to ISL6269A(SA00000GU80), add PR122 (0ohm, SD013000080) 36 For EMI team request to add snubber and gate resistor Add snuber PR155,PR165(6.8ohm_SD011680B80), PC109,PC118(680p_SE024681J80) and gate resistor PR154,PR162(1ohm_SD013100B80)
Modify the CUP CORE load line and compensation
Change PC103 to 0.022u(SE076223K80), PC104 to 2.2u(SE107225K80), PR185 to 4.42K(SD000004J80), PC129 to 0.1u(SE076104K80, add PC126 (0.018U_SE025183J80), delete PC105 and PC106
PVT
31 Modify the CPU OTP point from 84 degC to 87 degC
for thermal team request
32,34,
For EMI team request to add bead to reduce board band Add PL12,PL13,PL14(SM010020720);PC137,PC138,PC139(330p_SE074331K80);PC140(680p_SE074681K80);PC141(3300p_SE074332K80)
35,36
33 Reduce the power consumption on S3/S4 Add PR188(0_0402_5%) and unpop PR89 36 Solve the high frequency noise. Change PC99 from 100U to 220U(SF22004M210)
Change PR36 from 22K to 20K(SD034200280)
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
2006/10/03 2009/10/03
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
Title
Size Document Number Rev
Custom
Date: Sheet
+CPU_CORE
HAWAA(LA3141)
Thursday, October 05, 2006
of
38 38
0.3
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