Quanta Computer LA-971 888J2, Satellite 30CDT Schematic

A

B

C

D

E

COMPAL CONFIDENTIAL

MODEL NAME : 888J2 LA-971

4 4

REVISION HISTORY

Date: 2000/07/11 REV.: 0.1 Description: A-TEST Release Date: 2000-7-14

3 3

2 2

1 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

A

B

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

1C

of

237Friday, December 01, 2000

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Model Name: 888J2

888J2 BLOCK DIAGRAM

PCB No: LA971

4 4

Mininote
uBGA2 CPU

LCD & CRT

PAGE 14,15

ATI MOBILITY M

VGA

440ZX-100M

BUS#0,DEV#0

HOST-TO-PCI BRIDGE

3 3

PIRQA#

PAGE 12,13

BUS#0,DEV#1

PCI-TO-PCI BRIDGE

PAGE 3,4

PSB

IDSEL: AD11

IDSEL: AD12

PAGE 6,7,8

PULL UP/FDOWN
GEYSERVILLE

MEMORY BUSAGP BUS

PAGE 5

SODIMM

-BANK 2,3
ON BOARD 64MB

-BANK 0

PAGE 9,10

PCI BUS

CPU DECOUPING

INTERNAL IDE

IDE

PRIMARY MASTER

PAGE 18

EXTERNAL MODULE

IDE / FDD

2 2

SECONDARY MASTER

PAGE 19

PIIX4M

BUS#0,DEV#7

FUNC 0: PCI-TO-ISA BRIDGE
FUNC 1: IDE INTERFACE
FUNC 2: USB INTERFACE
FUNC 3: POWER MANAGEMENT

IDSEL: AD18

IDSEL: AD18

PIRQD#

PAGE 16

IEEE 1394
PHY/CONN.

PAGE 23

CARDBUS/1394

PCI4450

PCMCIA
SOCKET

LPT PORT
TRACK PAT

USB CONN

PAGE 31

ISA

SIO

SMC37N869

PAGE 30

ISA

EC/KBC

PC87570

PAGE 27

FIR

PAGE 20

1 1

IDSEL: AD15
MASTER 3
PIRQA#
SIRQ

AUDIO

CS4281-CQ

PAGE 21 PAGE 24

AC
LINK

CS4297-CODEC

AUDIO AMP.

PAGE 22

CONNECTOR

IDSEL: AD19
MASTER 4
PIRQC#

PAGE 25,26

CLOCK

ICS9248-92

PAGE 11

PCI / ISA
PULL UP/DOWN
RESISTERS

PAGE 17

POWER
INTERFACE

PAGE 32

IDSEL: AD28
MASTER 0

IDSEL: AD27
MASTER 1
PIRQD#,
PIRQB#

MINI PCI

MODEM / LAN

PAGE 33

DC/DC POWER

+2.5V POWER
CPU_IO POWER
+3VALW POWER
+5VALW POWER
+12VALW POWER
CPU_CORE POWER

PAGE 34,35

KB
CONNECTOR

PAGE 27

A

BIOS

EC BUFFER

PAGE 28

B

PS2
INTERFACE

PAGE 29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

of

337Friday, December 01, 2000

E

1C

A

B

C

D

E

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

AD9

AA21

W21
W19

AD10
AC12
AC13

AB10
AC15

AD13
AD14
AA14
AA11
AB20

W20
AA12
AB15

AB18
AC19
AC11
AB12

AA15
AB16

AB2

AA1
AB1

V21

Y21

AA2

W3
W5
W2

W1

L3
K3

J2
L4
L1
K5
K1

J1

J3
K4
G1
H1
E4
F1
F4
F2
E1
C4
D3
D1
E2
D5
D4
C3
C1
B3
A3
B2
C2
A4
A5
B4
C5

T2
V4
V2

Y2
E6

C6
U4
T4
R1

V1
Y4
U3

U2
U1

Y1

V5

U2A

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
RP#

ADS#

AERR#
AP0#
AP1#
BERR#
BINIT#
IERR#

BREQ0#
BPRI#
BNR#
LOCK#

HIT#
HITM#
DEFER#

BP2#
BP3#
BPM0#
BPM1#
TRDY#
RS0#
RS1#
RS2#
RSP#

A20M#
FERR#
IGNNE#
PWRGOOD
SMI#

TDO
TDI
TMS
TRST#
TCK
PREQ#
PRDY#
SELPSB0
SELPSB1

INTR/LINT0
NMI/LINT1
STPCLK#
SLP#

THERMDA
THERMDC

BGA2_495

B

COPPERMINE

REQUEST
PHASE
SIGNALS

ERROR
SIGNALS

ARBITRATION
PHASE
SIGNALS

SNOOP PHASE
SIGNALS

RESPONSE
PHASE
SIGNALS

PC
COMPATIBILITY
SIGNALS

DIAGNOSTIC
& TEST
SIGNALS

EXECUTION
CONTROL
SIGNALS

THERMAL DIODE

DATA
PHASE
SIGNALS

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#

DBSY#

DRDY#

PICCLK

PICD1
PICD0

INIT#
FLUSH#
RESET#

BCLK

EDGCTRLN

D10

D0#

D11

D1#

C7

D2#

C8

D3#

B9

D4#

A9

D5#

C10

D6#

B11

D7#

C12

D8#

B13

D9#

A14
B12
E12
B16
A13
D13
D15
D12
B14
E14
C13
A19
B17
A18
C17
D17
C18
B19
D18
B20
A20
B21
D19
C21
E18
C20
F19
D20
D21
H18
F18
J18
F21
E20
H19
E21
J20
H21
L18
G20
P18
G21
K18
K21
M18
L21
R19
K19
T20
J21
L20
M19
U18
R18

V20
T21
U21
R21
V18
P21
P20
U19

AA3
T1

AA18
Y20
AB21

AA10
AC9
A6

M3
AA16

110_1%_0603

R49

C

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

R142 1K

1 2

R129 56.2_1%_0603

R132
10

1 2
12

C190
10PF

HD#[0..63]

DBSY# 7
DRDY# 7

+CPU_IO

FOR PIII A2 VERSION

GT_CPUINIT# 6
FLUSH# 6
CPURST# 7

HCLK_CPU 7,12

HD#[0..63] 7

C60
2200PF

+5VS

12

R30 1K

1 2

12

C57
.1UF

THERMDA
THERMDC

+CPU_CORE

+CPU_CORE

1617VCC

U3

1

NC

2

VCC

3

DXP

4

DXN

5

SMBDATA

NC

6

ADD1

7

GND

8 9

GND NC

MAX1617A

+CPU_CORE

+

C22

220U_E

2.5V

12

12

C49

C67

2.2U_0805

2.2U_0805

12

12

12

C186

C193

C201

C73

.1U

.1U

12

C210

.1U

12

C72

.1U

C184

.1U

12

C211

.1U

12

C19

.1U

.1U

12

.1U

12

D

+5VS

12

R29
200

16

NC

15

STBY

14

SMBCLK

13

NC

12
11

ALERT

10

ADD0

12

R31
1K

+5VS

+

C48

+

C23

220U_E

220U_E

2.5V

2.5V

12

12

C68

C14

2.2U_0805

2.2U_0805

12

12

12

C196

C197

C182

.1U

.1U

.1U

12

12

12

C214

C213

C212

.1U

.1U

.1U

12

12

12

C20

C42

C15

.1U

.1U

.1U

Title

SCHEMATICS, M/B LA-971

Size Document Number Rev

B

401166

Date: Sheet

from 87570

SMCLK 28,29,35
SMDATA 28,29,35

12

12

C185

.1U

12

C222

.1U

12

C11

.1U

R32
10K

+

12

.1U

12

.1U

12

C242
220U_E

2.5V

C194

C221

ATF#

12

C39

2.2U_0805

C71

.1U

12

.1U

12

.1U

12

C183

C220

C18

.1U

+

C217
220U_E

2.5V

12

C195
.1U

12

C219

.1U

12

C21

.1U

ATF# 29

12

C17

2.2U_0805

12

12

C204

C205

.1U

.1U

12

12

C218

C165

.1U

.1U

12

12

C74

C13

.1U

.1U

Compal Electronics, Inc.

E

12

C203

.1U

12

C168

.1U

12

C16

.1U

437Friday, December 01, 2000

12

C202

.1U

12

C172

.1U

12

C70

.1U

of

12

C32
.1U

1C

+3VS+CPU_IO+CPU_IO

R173
10K

1 2

12

C69
47PF

HREQ#07
HREQ#17
HREQ#27
HREQ#37
HREQ#47

ADS#7

IERR#6

BREQ0#7

BPRI#7

BNR#7

HLOCK#7

HIT#7

HITM#7

DEFER#7

HTRDY#7

RS#07
RS#17
RS#27

GT_A20M#6

GT_SMI#6

PREQ#6

GT_NMI6

SLP#6

66MHZ
100MHZ
RESERVED
133MHZ

HA#[3..31]

FERR# 17

FERR#1.5

RP1 8P4R-1K

1 8
2 7
3 6
4 5

R26 @56_0603
R146 10K
R41 @10K
R43 1K

THERMDA
THERMDC

12
12
12
12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HA#[3..31]7

4 4

R48

R47

1K

1.5K

1 2

1 2

2

FERR#1.5

3 3

2 2

1 1

SELPSB[1:0] STSEM BUS FREQUENCY

00
01
10
11

Q1

FDV301N

PVT change

+CPU_IO

A

13

GT_IGNNE#6

PWRGD_CPU6

GT_INTR6

GT_STPCLK#6

A

B

C

D

E

1 2

R6

12

C235
.1UF

1 2

L18 4.7Uh

VCCTREF

12

+2.5V_CLK+2.5V_CLK

A

R4
2K_1%_0603

R138
2K_1%_0603

1 2

1 2
R135

2K_1%_0603

CPU_LO/HI#6

+CPU_IO

56.2_1%_0603

+CPU_IO

+CPU_IO

R139

1.5K_1%_0603

1 2

1 2

R143
1K_1%_0603

1K_1%_0603

12

C75
.1UF

4 4

3 3

2 2

1 1

12

C171
.1UF

+

33U_E

12

+CPU_CORE

12

C207
.1UF

R46

VCCT_VCCA

C174

VCCT_VSSA
VCCTREF

12

C234
.1UF

R42 1.5K

1 2

C169
.1UF

4.7U_1206

CLKREF

CMOSREF

1 2

12

U2B

C192
.1UF

L2

VCCA

PLL ANALOG VOLTAGE

M2

VSSA

E5

VREF0

E16

12

C25

R35
1K

VREF1

E17

VREF2

F5

VREF3

F17

VREF4

U5

VREF5

Y17

VREF6
VREF7

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49

RSVD
CLKREF

CMOSREF1
CMOSREF2

GHI#
RTTIMPEDP

TESTHI

TESTLO1
TESTLO2

TESTP1
TESTP2
TESTP3
TESTP4

BGA2_495

COPPERMINE

POWER,
GROUND,
RESERVED
SIGNALS

B

Y18

H8
H10
H12
H14
H16

J7

J9
J11
J13
J15

K8

K10
K12
K14
K16

L7

L9

L11
L13
L15

M8
M10
M12
M14
M16

N7

N9
N11
N13
N15

P8
P10
P12
P14
P16

R7

R9
R11
R13
R15

T8
T10
T12
T14
T16

U7

U9
U11
U13
U15

AB19

P2

AA9

AD18

R2

AD19

AD17

12

Y5

N5

AD20

H4

AA17

G4

R14
1K

1 2

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

VSS100
VSS101

A2
A7
A8
A12
A21
B1
B5
B6
B7
B8
B10
B15
B18
C9
C11
C15
C16
C19
D2
D6
D7
D9
E3
E7
E8
E9
E10
E11
E13
E19
F3
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F20
G3
G19
H2
H7
H9
H11
H13
H15
H20
J4
J8
J10
J12
J14
J16
J19
K2
K7
K9
K11
K13
K15
K20
L5
L8
L10
L12
L14
L16
L19
M7
M9
M11
M13
M15
M20
N2
N3
N4
N8
N10
N12
N14
N16
N18
N19
N20
P5
P7
P9
P11
P13
P15
P19
R3
R4
R5
R8
R10

+CPU_IO

CPU_VID[0..4]

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

CPU_VID[0..4] 6

G10
G11
G12
G13
G14
G15
G16
G17

H17

K17

M17
N17

P17
R17

U17

V10
V11
V12
V13
V14
V15
V16
V17

W10
W11
W12
W13
W14
W15
W16
W17

AA6
AA7
AA8
AB6
AB7

AB8
AC6
AC7
AC8
AD6
AD7
AD8

G6
G7
G8
G9

H6

J6

J17

K6
L6

L17

M6
N6

P1
P6

R6

T6

T17

U6

V6
V7
V8
V9

W6
W7
W8
W9

Y6
Y7
Y8

U2C

VCCT0
VCCT1
VCCT2
VCCT3
VCCT4
VCCT5
VCCT6
VCCT7
VCCT8
VCCT9
VCCT10
VCCT11
VCCT12
VCCT13
VCCT14
VCCT15
VCCT16
VCCT17
VCCT18
VCCT19
VCCT20
VCCT21
VCCT22
VCCT23
VCCT24
VCCT25
VCCT26
VCCT27
VCCT28
VCCT29
VCCT30
VCCT31
VCCT32
VCCT33
VCCT34
VCCT35
VCCT36
VCCT37
VCCT38
VCCT39
VCCT40
VCCT41
VCCT42
VCCT43
VCCT44
VCCT45
VCCT46
VCCT47
VCCT48
VCCT49
VCCT50
VCCT51
VCCT52
VCCT53
VCCT54
VCCT55
VCCT56
VCCT57
VCCT58
VCCT59
VCCT60
VCCT61
VCCT62
VCCT63
VCCT64
VCCT65
VCCT66
VCCT67
VCCT68
VCCT69
VCCT70
VCCT71

BGA2_495

D

COPPERMINE

POWER, GROUND AND NC

Title

Size Document Number Rev

B

Date: Sheet

R12

VSS102

R14

VSS103

R16

VSS104

R20

VSS105

T3

VSS106

T5

VSS107

T7

VSS108

T9

VSS109

T11

VSS110

T13

VSS111

T15

VSS112

T18

VSS113

T19

VSS114

U8

VSS115

U10

VSS116

U12

VSS117

U14

VSS118

U16

VSS119

U20

VSS120

V3

VSS121

V19

VSS122

W4

VSS123

W18

VSS124

Y3

VSS125

Y9

VSS126

Y10

VSS127

Y11

VSS128

Y12

VSS129

Y13

VSS130

Y14

VSS131

Y15

VSS132

Y16

VSS133

Y19

VSS134

AA4

VSS135

AA13

VSS136

AA20

VSS137

AB3

VSS138

VID4
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147

VID3
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155

VID0

VID1

VID2
VSS159
VSS160
VSS161

NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

AB4
AB5
AB9
AB11
AB13
AB14
AB17
AC1
AC2
AC4
AC5
AC10
AC14
AC16
AC18
AC21
AD1
AD2
AD3
AD4
AD5
AD16
AD21

A15
A16
A17
C14
D8
D14
D16
E15
G2
G5
G18
H3
H5
J5
M4
M5
P3
P4
AA5
AA19
AC3
AC17
AC20
AD15

CPU_VID4

CPU_VID3

CPU_VID0
CPU_VID1
CPU_VID2

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

1C

of

537Friday, December 01, 2000

E

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4 4

+3V

3 3

VID[4:0] CPU VCC
00000

00001
00010
00011
00100
00101
00110
00111
01000
01001
01010

2 2

01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000

1 1

11001
11010
11011
11100
11101
11110
11111

A

U16

STPCLK#17

CPUINIT#17 GT_CPUINIT# 4

GT_LO/HI#17
CPU_STP#17

IGNNE#17

CRESET#7

R213 10K

VR_POK30,36

VR_ON29,33,36

14.3MGCL12

2.00

1.95

1.90

STPCLK#
CPUINIT#
INTR

INTR17

NMI

NMI17

SMI#

SMI#17 GT_SMI# 4

SUSTAT1#
GT_LO/HI#

CPU_STP#
A20M#

A20M#17

R212

12

R228
@33

C296
@27P

23

STPCLK#

22

INIT#

16

INTR

20

NMI

17

SMI#

19

SUS_ST1#

14

LO/HI#

13

CPU_STP#

24 48

A20M# GT_A20M#

28

DEEP_SLP

37 36

DIN DOUT

12

44

@0

12

12

IGN_PLLTMR#

43

IGN_VGATE#

40

RESERVED0

39

RESERVED1

35

RESERVED2

45

RESERVED3

29

VGATE

15

VR_ON

38

STB#

26

XIN

25

XOUT

@G_ASIC

1.85

1.80

1.75

1.70

1.65

1.60

1.55

1.50

1.45

1.40

1.35

1.30
NO CPU

1.275

1.250

1.225

1.200

1.175

+5V

1 2

R62 @1K

RP2

10P8R-1K
6
7
8
9

10

+5V

CPU_VID[0..4]

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4

1.150

1.125

1.100

1.075

1.050

1.025

1.000

0.975

0.950

R57
@0

1 2
R184
@0

1 2

R185
@0

R215
@0

1 2

1 2

1 2
R216
@0

0.925
NO CPU

A

B

GT_STPCLK#

GT_SUS_ST1#

A_GT_SUS_ST1#

GT_CPU_STP#

GT_IGNNE#IGNNE#

CPUPWRGDCRESET#

LP_TRANS#

VRCHGNG#

CPU_VID[0..4] 5

4 5

8 9
14 15
18 19
22 23

1

3
8

GT_INIT#

4

GT_INTR

1

GT_NMI

5

GT_SMI#

11
46
10

GT_LO/HI#

47
221
941

34

33

VR_HI/LO#

12
32

VRPWRGD

7

VCC1

30

VCC2

6

GND0

18

GND1

27

GND2

31

GND3

42

GND4

+5V

5
4
3
2
1

1 2

R179 1K

U15

B0 D0
B1 D1
B2 D2
B3 D3
B4 D4

BE#

@SN74CBT3383

VR_HI/LO#

B

VCC
GNDBX

GT_STPCLK#
GT_CPUINIT#
GT_INTR
GT_NMI
GT_SMI#
GT_SUSTAT1#

CPU_LO/HI#
GT_CPU_STP#
GT_A20M#
GT_IGNNE#IGNNE#

PWRGD_CPU

VR_HI/LO#
VRCHGNG#
V_GOOD

+GCL_VCC

12

C292
@.01UF

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3

CPU_VID4

23

C0A0

67

C1A1

1011

C2A2

1617

C3A3

2021

C4A4

24
1213

VID0
VID1
VID2
VID3
VID4

12

@.1UF

C265

GT_STPCLK# 4
GT_INTR 4

GT_NMI 4
GT_SUSTAT1# 7,13SUSTAT1#17
CPU_LO/HI# 5

GT_CPU_STP# 12
GT_A20M# 4
GT_IGNNE# 4

PWRGD_CPU 4

VR_HI/LO#
VRCHGNG# 17
V_GOOD 30

12

12

C293

C294

@.1UF

@.1UF

VID0 36
VID1 36
VID2 36
VID3 36
VID4 36

+5V

L25

1 2

@0_0805

C

With SpeedStep CPU Support:
Mount: U16: G_ASIC (SA658370000)

+3V

12

C283
@.1UF

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3

CPU_VID4 VID4

CPU_STP#
INTR
SMI#
CPUINIT#

A20M#
NMI
IGNNE#
SUSTAT1#

STPCLK# GT_STPCLK#

VR_POK

VR_HI/LO#

1 8
2 7
3 6
4 5

1 2

R54 0

1 8
2 7
3 6
4 5

8P4R-0

1 8
2 7
3 6
4 5

8P4R-0

1 2

R234 0

1 2

1 2

R214 10K

for without Geyserville

C

D

+CPU_IO

12

12

12

.1UF

12

.1UF

C173

C227

C175

.1UF

12

C230
.1UF

C176

.1UF

12

C228

.1UF

U15: 74CBT3383 (SA433830000)
R57, R184, R185, R216 R215: 0ohm

(1.6V for high performance)
RP56: 8P4R-4.7K

R214: 1Kohm
R242: 680ohm

R208: 1Kohm
R136: 1.5Kohm
R236: 100Kohm

R240: 4.7Kohm R239: 1.5Kohm

R207: 100KohmR209: 100Kohm

R236: 100Kohm R140: 1.5Kohm

RP4

8P4R-0

RP50

RP49

R223

0

VID0
VID1
VID2
VID3

GT_CPU_STP#
GT_INTR
GT_SMI#
GT_CPUINIT#

GT_A20M#
GT_NMI
GT_IGNNE#
GT_SUSTAT1#

V_GOOD

12

R232

31.6K_1%_0603

PWRGD_CPU

12

R231
100K_1%_0603

D

12

C177

.1UF

12

C226

.1UF

E

12

12

12

12

12

12

12

C178

.1UF

12

C231

.1UF

C179

.1UF

12

C225

.1UF

C187
.1UF

12

C216

.1UF

C198

.1UF

12

C208

.1UF

C206

.1UF

12

C200

.1UF

C215

.1UF

12

C191

.1UF

C224

.1UF

12

C181

.1UF

12

C229
.1UF

+

Remove:

RP4: 8P4R-0
R54: 0ohm
RP50: 8P4R-0
RP49: 8P4R-0

R223: 0ohm
R232: 31.6Kohm 1%
R214: 10Kohm
R231: 100Kohm 1%

R234: 0ohm

without Geyserville,
GHI#(CPU_LO/HI#) can
OPEN

RP47

8P4R-1.5K

RP56

@8P4R-4.7K

GT_NMI
GT_INTR
GT_IGNNE#
GT_A20M#

GT_CPUINIT#
GT_STPCLK#

GT_SMI#

CPU_LO/HI#
PWRGD_CPU

IGNNE#
NMI
INTR
A20M#

CPUINIT#
STPCLK#
SMI#
VRCHGNG#
GT_LO/HI#

CRESET#
GT_SUSTAT1#
GT_CPU_STP#

E

+CPU_IO

+2.5V_CLK

+3VS

+3V

Title

SCHEMATICS, M/B LA-971

Size Document Number Rev

B

401166

Date: Sheet

1 8
2 7
3 6
4 5

1 2

R147 1.5K

1 2

R227 1K

1 2

R224 680

1 2

R145 1.5K

1 2

R44 1.5K

1 2

R45 270_0603

1 2

R37 1.5K

1 2

R136 @1.5K

1 2

R140 1.5K

1 8
2 7
3 6
4 5

1 2

R241 @1K

1 2

R242 @680

1 2

R240 @4.7K

1 2

R239 @1.5K

1 2

R236 @100K

1 2

R208 @1K

1 2

R207 @100K

1 2

R209 @100K

Compal Electronics, Inc.

C243
220U_E

2.5V

SLP# 4

FLUSH# 4
IERR# 4

PREQ# 4

of

637Friday, December 01, 2000

1C

1 1

2 2

3 3

4 4

HD#[0..63]4

HD#[0..63]

A

B

C

OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER

THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL

ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.

THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION

2.32K_1%_0603

R53

1 2

12

.01UF

C87

12

.1UF

C86

12

.1UF

C79

1UF_0805

12

RB751V

C253

3.48K_1%_0603

R56

1 2

VCCTREF

+3V

2 1

R187 1K

D15

A

HD#0

HD#1

HD#2

HD#3

HD#4

HD#5

HD#6

HD#7

HD#8

HD#9

HD#10

HD#11

HD#12

HD#13

HD#14

HD#15

HD#16

HD#17

HD#18

HD#19

HD#20

HD#21

HD#22

HD#23

HD#24

HD#25

HD#26

HD#27

HD#28

HD#29

HD#30

HD#31

HD#32

HD#33

HD#34

HD#35

HD#36

HD#37

HD#38

HD#39

HD#40

HD#41

HD#42

HD#43

HD#44

HD#45

HD#46

HD#47

HD#48

HD#49

HD#50

HD#51

HD#52

HD#53

HD#54

HD#55

HD#56

HD#57

HD#58

HD#59

HD#60

HD#61

HD#62

HD#63

D22

D21

C21

E18

HD12#

HA14#

E23

HA#15

B20

HD11#

HA13#

F25

HA#14

E19

HD10#

HA12#

F24

HA#13

A20

HD9#

HA11#

F23

HA#12

150UF_E_10V

4.7U_1206

E20

HD8#

HA10#

F22

HA#11

C297

B21

HD7#

HA9#

G22

HA#10

C299

+

12

C20

G26

HA#9

A21

HD6#

HA8#

F26

HA#8

HD5#

HA7#

G24

HA#7

HD4#

HA6#

H23

HA#6

A22

HD3#

HA5#

G23

HA#5

+3V

E21

HD2#

HA4#

H22

HA#4

HD1#

HA3#

G25

HA#3

HD0#

B22

U12A

B

HA#[3..31]

HA#[3..31] 4

C

E11

B23

A7

HD55#

HD56#

RS#2

RS#2 4

A9

L25

A10

HD53#

HD54#

RS#0

RS#1

L26

RS#0 4

RS#1 4

B10

C8

HD52#

HTRDY#

H25

K26

HTRDY# 4

C12

HD50#

HD51#

DRDY#

DRDY# 4

B7

K23

A11

HD48#

HD49#

DBSY#

L23

DBSY# 4

B17

A17

B16

A16

B15

A15

B13

E14

A13

B12

B14

E13

A12

B11

HD24#

HD25#

HD26#

HD27#

HD28#

HD29#

HD30#

HD31#

HD32#

HD33#

HD34#

HD35#

HD36#

HD37#

HD38#

HD39#

HD40#

HD41#

HD42#

HD43#

HD44#

HD45#

HD46#

HD47#

HOST BUS INTERFACE (Processor System
Bus)

HREQ#0

HREQ#1

HREQ#2

HREQ#3

HREQ#4

HLOCK#

HITM#

HIT#

L22

HIT# 4

HITM# 4

BREQ0#

BPRI#

BNR#

B26

H26

H24

K22

L24

BREQ0# 4

BPRI# 4

BNR# 4

HLOCK# 4

ADS#

K21

J22

J23

K24

K25

J25

ADS# 4

HREQ#0 4

HREQ#1 4

HREQ#2 4

HREQ#3 4

HREQ#4 4

HA30#

HA31#

D23

HA#31

HA29#

E22

HA#30

HA28#

A23

HA#29

HA27#

C24

HA#28

HA26#

B24

HA#27

C23

HA#26

DEFER#

J26

DEFER# 4

E17

HD22#

HD23#

HA24#

HA25#

D24

HA#25

HD21#

HA23#

A24

HA#24

B18

HD20#

HA22#

C25

HA#23

A19

HD19#

HA21#

A25

HA#22

A18

HD18#

HA20#

C26

HA#21

B19

HD17#

HA19#

B25

HA#20

HD16#

HA18#

D26

HA#19

HD15#

HA17#

E25

D25

HA#17

HA#18

HD13#

HD14#

HA15#

HA16#

E26

HA#16

C11

C10

D9

10

443ZX-M/443BX

R59

HD62#

HD63#

HCLKIN

N23

HCLK_CPU 4,12

B8A8B9

HD60#

HD61#

HD58#

HD59#

CRESET#

CRESET# 6

HD57#

CPURST#

M26

CPURST# 4

+3V

AGPREF

1 2

12

C92

5PF

+5V

1 2

REFVCC5

D20

D19

D18

C19

C17

D17

C16

C15

D16

D14

D15

C14

D13

D12

C13

D11

D

Title

Size Document Number Rev

Date: Sheet

B

4011661CSCHEMATICS, M/B LA-971

Compal Electronics, Inc.

E

737Friday, December 01, 2000

of

12

C531

1UF_0603

12

C532

1UF_0603

+CPU_IO

443ZX-M/443BX

RSMRST#17,30

R71 0

1 2

BXPWROKRSMRST#

VSS64

VSS65

VSS66BXPWROK

AF13

AF26AF3

AF1

VSS62

VSS63

AD22

AD18

VSS60

VSS61

AD9

GT_SUSTAT1#6,13

AD4

SUSTAT#

VSS58

VSS59

AB25

AD5

+3V

R58 1K

1 2

M25

TESTIN#

VSS57

AB15

AB24

VSS55

VSS56

AB12

AB3

.1UF

.1UF

AE23

NC1

NC2

VSS53

VSS54

AA21

AE22

AA19

12

C82

12

C91

P22

NC0

VSS51

VSS52

AA8

AGPREF

N4

AGPREF

VSS50

AA6

REFVCC5

C2

REFVCC5

VSS48

VSS49

VTTB

VSS46

VSS47

+CPU_IO

M24

F17

VTTA

VSS45

T12

T15V3V24W6W21

VCCTREF

E16

GTL_REFA

GTL_REFB

VSS42

VSS43

VSS44

R16

R22

M23

R14

VCC40

VSS40

VSS41

R13

AF14

VCC39

VSS39

AF2

VCC38

VSS38

AE26

VCC37

VSS37

P26R5R11

AE1

P15

AA18

AA20

VCC35

VCC36

VSS35

VSS36

P13

P14

AA9

VCC33

VCC34

VSS33

VSS34

P12

12

.1UF

C77

12

.1UF

C84

12

.1UF

C101

12

.1UF

C95

12

.1UF

C81

12

.1UF

C93

12

.01UF

C97

12

.01UF

C98

AA7

VCC32

VCC30

VCC31

V21Y6Y21

VCC29

V6

VCC28

T16

VCC27

T14

VCC26

T13

VCC25

T11

VCC24

R15

POWER and GROUND

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

M13

M14

M16

M22N1N12

N13

N14

N15

N24

R12

VCC22

VCC23

VSS22

VSS23

P16

VCC21

VSS21

.1UF

.1UF

.01UF

P11

VCC20

VSS20

L15M5M11

P1

VCC19

VSS19

L12

12

C99

12

C83

12

C80

N26

VCC18

VSS18

N22

VCC17

VSS17

N16

VCC16

VSS16

N11

VCC15

VSS15

M15

VCC14

VSS14

F21H6H21J3J24

M12

VCC13

VSS13

F19

L16

VCC12

VSS12

L14

VCC11

VSS11

L13

VCC10

VSS10

E24F6F8

.1UF

.1UF

.1UF

.1UF

.01UF

.01UF

.01UF

.01UF

L11

E15

J21

VCC9

VSS9

C96

C94

C89

C100

C90

C85

C88

C78

J6

VCC8

VSS8

12

12

12

12

12

12

12

12

G21

VCC7

VSS7

C22E3E12

G6

VCC6

VSS6

C18

F20

VCC5

VSS5

F18

VCC4

VSS4

F9

VCC3

VSS3

A26C5C9

F7

VCC2

VSS2

A14

B1

VCC1

VSS1

A1

U12D

D

+3V

E

A

B

C

D

E

U12C

AB5

G_AD0

AE2

G_AD1

AD3

G_AD2

AD2

G_AD3

AD1

G_AD4

AC3

G_AD5

AC1

G_AD6

AB4

G_AD7

AB1

G_AD8

AA5

G_AD9

AA3

G_AD10

AA4

G_AD11

AA2

G_AD12

AA1

G_AD13

Y5

G_AD14

Y3

G_AD15

W1

G_AD16

V2

G_AD17

W2

G_AD18

U5

G_AD19

V1

G_AD20

U4

G_AD21

U3

G_AD22

U1

G_AD23

T3

G_AD24

T4

G_AD25

T2

G_AD26

T1

G_AD27

U6

G_AD28

R3

G_AD29

R4

G_AD30

R2

G_AD31

AB2

G_CBE0#

Y4

G_CBE1#

V4

G_CBE2#

U2

G_CBE3#

W3

G_FRAME#

V5

G_IRDY#

W4

G_TRDY#

W5

G_DEVSEL#

Y2

G_PAR

Y1

G_STOP

K1

SBA0

M2

SBA1

M1

SBA2

N2

SBA3

P2

SBA4

P4

SBA5

P3

SBA6

R1

SBA7

L5

G_REQ#

L3

G_GNT#

M4

RBF#

M3

PIPE#

AC2

AD_STBA

T5

AD_STBB

N3

SB_STB

L4

ST0

L2

ST1

L1

ST2

N5

GCLKIN

P5

GCLKO

R197

443ZX-M/443BX

10

1 2
12

C270

5PF

B

AGP INTERFACE

PCI INTERFACE

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8

AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE0#
CBE1#
CBE2#
CBE3#

FRAME#

IRDY#

TRDY#

DEVSEL#

PAR

STOP#

SERR#
PLOCK#
PHOLD#

PHLDA#

WSC#

PREQ0#
PREQ1#
PREQ2#
PREQ3#
PREQ4#

PGNT0#
PGNT1#
PGNT2#
PGNT3#
PGNT4#

PCIRST

CLKRUN#

PCLKIN

K6
K2
K4
K3
K5
J1
J2
H2
H1
J5
H3
H5
H4
G1
G2
G4
D1
D3
D2
C1
A2
C3
B3
D4
E5
A4
D5
B4
B5
A5
E6
C6

J4
G3
E4
C4

E2
E1
F5
F3
G5
F4
F1
F2
B6

D6
AE3
A6

C7
F10
D8
D10

E7
D7
E10
E8
E9

A3
AC4
B2

+3V

GC/BE#013
GC/BE#113
GC/BE#213
GC/BE#313

GFRAME#13

GIRDY#13

GTRDY#13

GDEVSEL#13

GSTOP#13

GSBA[0..7]13

GREQ#13
GGNT#13

RBF#13

PIPE#13

R225 0
R61 0

SBSTB13

ST013
ST113
ST213

1 2

R206

18_0603

D17

1
2

RB717F

D16

1
2

RB717F

GAD[0..31]

GFRAME#
GIRDY#
GTRDY#
GDEVSEL#

GSTOP#
GSBA[0..7]

GREQ#
GGNT#

RBF#
PIPE#

1 2
1 2

ST0
ST1
ST2

REQ#1
REQ#3

REQ#0
REQ#4

R205
18_0603

1 2

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GSBA0
GSBA1
GSBA2
GSBA3
GSBA4
GSBA5
GSBA6
GSBA7

R_ADSTBA
R_ADSTBB
SBSTB

AGPCLKI
AGPCLKO

GAD[0..31]13

8.2K

R65

GTRDY#

1 2

R63 8.2K

GIRDY#

1 2

GDEVSEL#

4 4

3 3

2 2

1 1

GSTOP#
ADSTBA
ADSTBB
GFRAME#
GREQ#
GGNT#
SBSTB
RBF#
PIPE#

GPAR13

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

PX4_REQ1#17

PX4_REQ2#17

A

8.2K

R64
R220 8.2K

8.2K

R229
R60 8.2K

R219 8.2K
R193 8.2K
R190 8.2K
R202 8.2K

8.2K

R55

8.2K

R195

R222

100K

1 2

ADSTBA13
ADSTBB13

GCLKO13

+3VS

+3VS

ADSTBA
ADSTBB

12

R176
10K

3

12

R177
10K

3

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

FRAME#
IRDY#
TRDY#
DEVSEL#

STOP#
SERR#

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4

GNT#0
GNT#1
GNT#2
GNT#3
GNT#4

AD[0..31]

CLKRUN#

R155

47

1 2
12

C247

15PF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

AD[0..31] 17,22,25,34

C/BE#0 17,22,25,34
C/BE#1 17,22,25,34
C/BE#2 17,22,25,34
C/BE#3 17,22,25,34

FRAME# 17,18,22,25,34
IRDY# 17,18,22,25,34
TRDY# 17,18,22,25,34
DEVSEL# 17,18,22,25,34
PAR 17,18,22,25,34
STOP# 17,18,22,25,34
SERR# 17,18,22,34
PLOCK# 18
PHLD# 17,18

PHLDA# 17,18

REQ#0 34
REQ#1 34
REQ#2 17
REQ#3 22
REQ#4 25

GNT#0 34
GNT#1 34
GNT#2
GNT#3 22
GNT#4 25

PCIRST# 17,22,23,25,34
CLKRUN# 13,17,18,22,25,31,34
PCLK_BX 12

+3VS

D

REQ#4

GNT#4

6
7
8
9

10

RP43

10P8R-10K

1 2

R182 10K

1 2

R183 10K

5

REQ#2

4

GNT#2

3

REQ#3

2

GNT#3

1

+3VS

REQ#0
GNT#0
REQ#1
GNT#1

PCI REQ ASSIGMENT
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4

MiniPCI(Compal)

MINI PCI
NO USED

PCMCIA CONTROLLER

PCI AUDIO

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

E

+3VS

1C

of

837Friday, December 01, 2000

A

B

C

D

E

U12B

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13

AB14
AF15
AE15
AC15
AD15
AE16

AD13
AC13
AC25
AB26
AE14
AC14
AA22
AA24

AE13
AD14

AE12
AC12

AF16
AA17

AF12
AB13

AE11
AA10
AA23
AA26
AF11
AD12
AA25

AC22
AF23
AE24
AD23
AC23
AF24

AF17
AB16
AE17
AC17
AF18
AE19
AF19
AC18
AC19
AE20
AD20
AF21
AC21
AF25

AD16
AC16
AD17
AB17
AE18
AD19
AB18
AB19
AF20
AC20
AB20
AE21
AD21
AF22

Y22

CSA0#/RASA0#
CSA#1/RASA1#
CSA2#/RASA2#
CSA3#/RASA3#
CSA4#/RASA4#
CSA5#/RASA5#

DQMA0/CASA0#
DQMA1/CASA1#
DQMA2/CASA2#
DQMA3/CASA3#
DQMA4/CASA4#
DQMA5/CASA5#
DQMA6/CASA6#
DQMA7/CASA7#

DQMB1/CASB1#
DQMB5/CASB5#

WEA#
WEB#

SRASA#
SRASB#

SCASA#
SCASB#

MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7

CKE0
CKE1
CKE2
CKE3
CKE4
CKE5

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

MAB0#
MAB1#
MAB2#
MAB3#
MAB4#
MAB5#
MAB6#
MAB7#
MAB8#
MAB9#
MAB10#
MAB11#
MAB12#
MAB13#

CSB0#/RASB0#
CSB1#/RASB1#
CSB2#/RASB2#
CSB3#/RASB3#
CSA4#/RASB4#
CSA5#/RASB5#

DRAM INTERFACE

4 4

CS0#11
CS2#10

CS3#10

FOR 443ZX-M IS NC PIN

CAS0#10,11
CAS1#10,11
CAS2#10,11
CAS3#10,11
CAS4#10,11
CAS5#10,11
CAS6#10,11
CAS7#10,11

FOR 443ZX-M IS NC PIN

BMWEA#10,11

SRASA#10,11

SCASA#10,11

3 3

FOR 443ZX-M IS NC PIN

CKE011
CKE210

CKE310

FOR 443ZX-M IS NC PIN

2 2

443ZX-M/443BX

MA[0..13]10,11

MA[0..13]

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8

MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

DCLKO

DCLKRD

DCLKWR

AE25
AD24
AD26
AC24
AC26
AB23

AF4
AE4
AF5
AD6
AE6
AB7
AC7
AF7
AB8
AB9
AC9
AE9
AB10
AC10
AF10
AD11
Y24
Y25
W23
W24
W26
W25
V26
U24
U23
T22
T23
T26
R24
R25
P23
N25
AC5
AE5
AB6
AC6
AF6
AD7
AE7
AC8
AD8
AF8
AE8
AF9
AD10
AE10
AB11
AC11
Y23
Y26
W22
V22
V23
V25
U22
U25
U26
T24
T25
U21
R23
R26
P24
P25

AB21
AB22
AD25

FOR 443ZX-M IS NC PIN

MDD0
MDD1
MDD2
MDD3
MDD4
MDD5
MDD6
MDD7
MDD8
MDD9
MDD10
MDD11
MDD12
MDD13
MDD14
MDD15
MDD16
MDD17
MDD18
MDD19
MDD20
MDD21
MDD22
MDD23
MDD24
MDD25
MDD26
MDD27
MDD28
MDD29
MDD30
MDD31
MDD32
MDD33
MDD34
MDD35
MDD36
MDD37
MDD38
MDD39
MDD40
MDD41
MDD42
MDD43
MDD44
MDD45
MDD46
MDD47
MDD48
MDD49
MDD50
MDD51
MDD52
MDD53
MDD54
MDD55
MDD56
MDD57
MDD58
MDD59
MDD60
MDD61
MDD62
MDD63

DCLKO1

R66 33

MDD5

1 8

MDD6

2 7

MDD37

3 6

MDD40

4 5
MDD36
MDD4
MDD7 MD7
MDD38
MDD14
MDD45
MDD44
MDD15
MDD46
MDD47 MD47
MDD12
MDD13
MDD59

1 8
MDD54

2 7
MDD24

3 6
MDD52

4 5
MDD22 MD22

1 8
MDD53

2 7
MDD20

3 6
MDD21

4 5
MDD27

1 8
MDD58

2 7
MDD56

3 6
MDD55

4 5
MDD31

1 8
MDD63

2 7
MDD29

3 6
MDD61

4 5
MDD32
MDD34

MDD3
MDD1
MDD0
MDD33
MDD2
MDD11

1 8
MDD43

2 7
MDD42

3 6
MDD41

4 5
MDD39

1 8
MDD8

2 7
MDD10

3 6
MDD9

4 5
MDD51

1 8
MDD19

2 7
MDD18

3 6
MDD50

4 5
MDD49

1 8
MDD17

2 7
MDD16

3 6
MDD48 MD48

4 5
MDD25

1 8
MDD26

2 7
MDD57

3 6
MDD23

4 5
MDD30

1 8
MDD62

2 7
MDD60

3 6
MDD28

4 5

1 2

R69

15

1 2
12

C102
47PF

MD[0..63]

MD5
MD6
MD37
MD40
MD36

18

MD4

27
36

MD38

45

MD14

18

MD45

27

MD44

36

MD15

45

MD46

18
27

MD12

36

MD13

45

MD59
MD54
MD24
MD52

MD53
MD20
MD21
MD27
MD58
MD56
MD55
MD31
MD63
MD29
MD61
MD32

45

MD34

36

MD35MDD35

27

MD3

18

MD1

18

MD0

27

MD33

36

MD2

45

MD11
MD43
MD42
MD41
MD39
MD8
MD10
MD9
MD51
MD19
MD18
MD50
MD49
MD17
MD16

MD25
MD26
MD57
MD23
MD30
MD62
MD60
MD28

DCLKO 12
DCLKWR 12

MD[0..63] 10,11

RP9
8P4R-10

RP55
8P4R-10

RP53
8P4R-10

RP12
8P4R-10

RP6
8P4R-10

RP46
8P4R-10

RP45
8P4R-10

RP44
8P4R-10

RP13
8P4R-10

RP54
8P4R-10

RP52
8P4R-10

RP8
8P4R-10

RP7
8P4R-10

RP48
8P4R-10

RP5
8P4R-10

RP3
8P4R-10

R70 10K

MA12

1 2

R68 10K

MA10

1 2

R67 10K

MA6

1 2

Pin Name Function Low High Interal Resistor

MAB12#

+3V

MAB10#

MAB6#

Host Frequency Select

Quick Start Select

Host Bus Buffer Mode Select

66MHz

Stop Clock Mode

Desktop GTL+

100MHz

Quick Start Mode
Mobile Low Power

GTL+

Pull-down

Pull-down

Pull-down none

Status Register

NBXCFG[13]

PMCR[3]

1 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

A

B

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

1C

of

937Friday, December 01, 2000

E

A

B

C

D

E

F

G

H

SODIMM X 1

(H:5.6mm)

Support 3 SDRAM CLOC K

PIN 60, 77, 78 Difference

4 4

BANK 2,3

33

10

12

12

R249

R246

C322
1000PF

C313

.1UF

15PF

1 2

33PF

1 2

12

C306
1UF_0805

12

C314
.1UF

C318

C316

12

C321

22UF_1206

CLK_SDRAM212

CLK_SDRAM312

3 3

+3V

12

12

2 2

+3V

12

C307
.1UF

C311
.1UF

C324
.1UF

12

C310
.1UF

CLK_SDRAM2

CLK_SDRAM3

MA[0..13]9,11

MD[0..63]9,11

12

C323
1000PF

12

C309
.1UF

12

12

1 2

1 2

MA[0..13]

MD[0..63]

C308
1000PF

C315
.1UF

CAS3#9,11
CAS2#9,11

CLK_SDRAM2

SRASA#9,11

BMWEA#9,11

CS2#9
CS3#9

CAS1#9,11
CAS0#9,11

SDAP412,17

+3V

1 2

R250 10K

+3V +3V

JP13

1
MD24
MD25
MD26
MD27

MD28
MD29
MD30
MD31

MA0
MA1
MA2

MD16
MD17
MD18
MD19

MD20
MD21
MD22
MD23

MD8
MD9
MD10
MD11

MD12
MD13
MD14
MD15

MA6
MA8 MA11

MA10

MD0
MD1
MD2
MD3

MD4
MD5
MD6
MD7

3

5

7

9

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65

CLK0
VCC
RAS#
WE#
S0#
S1#
OE#
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC

SODIMM-J34

RESVD/DQ68
RESVD/DQ69

RESVD/DQ70
RESVD/DQ71

CE6#/RESVD
CE7#/RESVD

VSS
DQ32
DQ33
DQ34
DQ35

VCC
DQ36
DQ37
DQ38
DQ39

VSS
CE4#
CE5#

VCC

VSS
DQ40
DQ41
DQ42
DQ43

VCC
DQ44
DQ45
DQ46
DQ47

VSS

CKE0

VCC
CAS#
CKE1

A12
A13

CLK1

VSS

VCC
DQ48
DQ49
DQ50
DQ51

VSS
DQ52
DQ53
DQ54
DQ55

VCC

BA0

VSS

BA1

A11

VCC

VSS
DQ56
DQ57
DQ58
DQ59

VCC
DQ60
DQ61
DQ62
DQ63

VSS

SCL

VCC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

A3

32

A4

34

A5

36
38
40
42
44
46
48
50
52
54
56
58
60

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104

A7

106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

MD56
MD57
MD58
MD59

MD60
MD61
MD62
MD63

MA3
MA4
MA5

MD48
MD49
MD50
MD51

MD52
MD53
MD54
MD55

MA12
MA13

CLK_SDRAM3

MD40
MD41
MD42
MD43

MD44
MD45
MD46
MD47

MA7

MA12MA9
MA13

MD32
MD33
MD34
MD35

MD36
MD37
MD38
MD39

1 2

R245 10K

CAS7# 9,11
CAS6# 9,11

CKE2 9
SCASA# 9,11

CKE3 9

CAS5# 9,11
CAS4# 9,11

SCKP4 12,17

+3V

SODIMM

1 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

A

B

C

D

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

G

1C

of

10 37Friday, December 01, 2000

H

A

B

C

D

E

F

G

H

32MB/64MB SDRAM

64Mbit 4Mx16 : Row: MA0-MA11
Column: MA0-MA7
Bank address: 2

4 4

3 3

2 2

128Mbit 8Mx16 : Row: MA0-MA11
Column: MA0-MA8
Bank address: 2

CLK_SDRAM0

12

R244
33

12

C300
15PF

CLK_SDRAM0 12

PLACE THE TERMINATOR
ON THE DRAM INPUT

BANK0

BMWEA#9,10

SCASA#9,10
SRASA#9,10

CS0#9

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA13
MA12
MA11

CAS0#
CAS1#
BMWEA#
SCASA#
SRASA#
CS0#

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA13
MA12
MA11

CAS2#
CAS3#
BMWEA#
SCASA#
SRASA#
CS0#

+3V

11427394349

23 2

A0 DQ0

24

A1

VCC

VCC
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0

DQMH
WE#
CAS#
RAS#
CS#

+3V

11427394349

VCC

VCCQ

VSS

VSS

VSS

2841546124652

VCC

VCC

VCC

VCCQ

VCCQ

VSS

VSS

VSS

VSSQ

2841546124652

25
26
29
30
31
32
33
34
22
35
21
20

39
16
17
18
19

23 2

A0 DQ0

24

A1

25

A2

26

A3

29

A4

30

A5

31

A6

32

A7

33

A8

34

A9

22

A10/AP

35

A11

21

A12/BA1

20

A13/BA0

39

DQMH

16

WE#

17

CAS#

18

RAS#

19

CS#

VCCQ

VSSQ

VCCQ

VSSQ

VCCQ

VSSQ

VCCQ

VSSQ

VCCQ

VSSQ

VSSQ

VSSQ

U19

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15DQML

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

CKE
CLK
RVD
RVD

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15DQML

CKE

CLK

RVD

RVD

U21

4
5
7
8
10
11
13
42
44
45
47
48
50
51
5315

37
38
36
40

8MX16S

4
5
7
8
10
11
13
42
44
45
47
48
50
51
5315

37
38
36
40

8MX16S

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15

CKE0

CLK_SDRAM0

MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31

CKE0

CLK_SDRAM0

CKE0 9

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA13
MA12
MA11

CAS4#
CAS5#
BMWEA#
SCASA#
SRASA#
CS0#

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA13
MA12
MA11

CAS6#
CAS7#
BMWEA#
SCASA#
SRASA#
CS0#

+3V

11427394349

23 2

A0 DQ0

24

A1

VCC

VCC

25
26
29
30
31
32
33
34
22
35
21
20

39
16
17
18
19

23 2
24
25
26
29
30
31
32
33
34
22
35
21
20

39
16
17
18
19

VCC
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0

DQMH
WE#
CAS#
RAS#
CS#

VSS

VSS

2841546124652

+3V

11427394349

A0 DQ0
A1

VCC

VCC

VCC
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0

DQMH
WE#
CAS#
RAS#
CS#

VSS

VSS

2841546124652

VCCQ

VSS

VCCQ

VSS

VCCQ

VCCQ

VSSQ

VSSQ

VCCQ

VCCQ

VSSQ

VSSQ

VCCQ

VSSQ

VSSQ

VCCQ

VSSQ

VSSQ

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15DQML

CKE

RVD

RVD

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15DQML

CKE

RVD

RVD

CLK

CLK

U25

4
5
7
8
10
11
13
42
44
45
47
48
50
51
5315

37
38
36
40

8MX16S

U20

4
5
7
8
10
11
13
42
44
45
47
48
50
51
5315

37
38
36
40

8MX16S

MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47

CKE0
CLK_SDRAM0

MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

CKE0
CLK_SDRAM0

+3V +3V

12

12

C343

C338
.1UF

C330

1000PF

12

A

C333
1000PF

1000PF

+3V +3V

12

1 1

+

C335

4.7UF_A

12

C364
.1UF

12

C363
.1UF

12

C349
.1UF

12

12

C342
.1UF

12

C359
.1UF

B

C340
1UF_0805

12

C347
.1UF

12

12

C360
.1UF

C369
1UF_0805

12

12

C

1000PF

C329

C361
.1UF

12

C365

1UF_0805

12

C331
1000PF

12

C328

.1UF

12

C327
.1UF

12

12

C341
.1UF

12

C346
.1UF

D

12

C332
.1UF

12

C339
.1UF

12

C348

C362

.1UF

1000PF

12

12

C357

C344

1UF_0805

.1UF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

Title

Size Document Number Rev

B

Date: Sheet

MA[0..13]9,10

MD[0..63]9,10

CAS0#9,10
CAS1#9,10
CAS2#9,10
CAS3#9,10
CAS4#9,10
CAS5#9,10
CAS6#9,10
CAS7#9,10

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

G

MA[0..13]

MD[0..63]

CAS0#
CAS1#
CAS2#
CAS3#
CAS4#
CAS5#
CAS6#
CAS7#

1C

of

11 37Friday, December 01, 2000

H

A

B

CLOCK GENERATOR & BUFFER

C

D

E

21

12

12

R186
10K

12

C275
.01UF

C271
1000PF

C254
10PF

+3VS

+VCLK_+3VS

C259
.01UF

12

SDAP410,17
SCKP410,17

12

12

C258
1000PF

C272
1000PF

1 2

1 2

R168

12

2M_0603

PWRDWN#

R164
10K

Y1

14.318MHZ

C257
10PF

SDAP4
SCKP4

12

R188 10

12

+3VS

R167
@10K

R163
10K

12

C256
.1UF

1 2

12

12

U13

7

VDDPCI

12

C268
.1UF

15

VDDPCI

21

VDD48

25

VDDCOR

46

VDDREF

48

VDDREF

28

VDDSDRAM

34

VDDSDRAM

40

VDDC

4

XIN

5

XOUT

39

SDRAM_IN

6

MODE

18

SEL_100/66#

26

SDRAM7/PCI_STP#

27

SDRAM6/CPU_STP#

44

PWR_DWN#

19

SDATA

20

SCLK

47

NC

3

GND

10

GND

17

GND

24

GND

31

GND

37

GND

43

GND

ICS9248-92

REF0
REF1
REF2

CPUCLK1
CPUCLK0

PCICLKF
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5

48/24MHZA
48/24MHZB

SDRAM5
SDRAM4
SDRAM3
SDRAM2
SDRAM1
SDRAM0

SDRAMFB

CLK_14MOSC

2

CLK_14.3M_SIO

1

CLK_14.3MGCL

45

CLK_HCLK_CPU HCLK_CPU

41
42

CLK_PCLK_PIIX4

8

CLK_PCLK_BX

9

CLK_PCLK_PCM

11

CLK_PCLK_MINI

12

CLK_PCLK_SIO

13

CLK_PCLK_AUD

14
16

CLK_48M

22
23

29
30

SDRAM3

32

SDRAM2

33
35

SDRAM0

36

CLK_DCLKWR

38

IMI C9806 CLOCK TABLE

PIN 6 PIN 18

S1 S0 CPUCLK PCICLK
00
01
1X

60MHZ 30MHZ

33MHZ66MHZ

100MHZ 33MHZ

R175 22

1 2

R174 22

1 2

R189 22

1 2

R194 15

1 2

R171 33

1 2

R162 33

1 2

R161 33

1 2

R170 33

1 2

R160 33

1 2

R169 33

1 2

R172 22

1 2

R201 10

1 2

R204 22

1 2

R198 10

1 2

R200 22

1 2

12

C280

33PF

*

ICS 9248-92 CLOCK TABLE

MODE PIN26,27 FUNCTION

1

*

0

14MOSC 17

14.3M_SIO 31

14.3MGCL 6

HCLK_CPU 4,7

PCLK_PIIX4 17
PCLK_BX 8
PCLK_PCM 22
PCLK_MINI 34
PCLK_SIO 31
PCLK_AUD 25

48M 17

CLK_SDRAM3 10
CLK_SDRAM2 10

CLK_SDRAM0 11
DCLKWR 9

SDRAM7,SDRAM6
PCI_STOP#, CPU_STOP#

SEL_100/66# CPUCLK PCICLK

0

*

1

66.6MHZ 33.3MHZ

33.3MHZ100MHZ

+3VS

4 4

+3V

+2.5V_CLK

3 3

2 2

1 1

CHB2012U170

1 2

CHB2012U170

4.7UF_0805_10V

1 2

CHB2012U170

4.7UF_0805_10V

PCI_STP#17

GT_CPU_STP#6

L24

L23

DCLKO9

SUSA#17,28

12

C267

4.7UF_0805_10V

12

C276

12

C282

R199
@47

C279
@15PF

SUSA#

12

12

12

12

.01UF

RB751V

D18

12

C269
.1UF

+VCLK_SDRAM

C273
.1UF

+VCLK_CPUP

C274

L22

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

A

B

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

1C

of

12 37Friday, December 01, 2000

E

5

4

3

2

1

+2.5V

+2.5V
T=80mil

+

C180

10UF_P_6.3V

D D

(175mA)
T=20mil

+3V

C C

R403

100K_1%_0603

C528

@2.2UF_0805_X7R

+2.5VP

B B

A A

4

3

+

C233
22UF_B_6.3V

1 2

GGREQ#17

VIN

ON/OFF#

80mil

JOPEN1

2MM

Q14
2SB1132

3 1

2
1

EXT

VSS

2

12

R192
10K

3

VOUT

U10
S-816A25

+2.5V

D19

RB717F

T=40mil

12

L14
CHB2012B121

C27

.1UF

5

+3V+3VS

12

1
2

1 2

R134

12

R196

8.2K

ADSTBA8
ADSTBB8

CLKRUN#8,17,18,22,25,31,34

(800mA)
0_0805

C38

.1UF

12

L17
CHB2012B121

(25mA)
T=20mil

AVDD

+

C158

10UF_P_6.3V

+

AGP_BUSY#
GREQ#

T=40mil

12

12

C199
.01UF

12

+2.5VP

C232
22UF_B_6.3V

GCLKO8

1 2

R40 @0

@10PF

C31

.1UF

R36
@33

C58

VDDC

@10PF

PVDD

R39
@33

C66

12

12

R28
@33

C166

+

10UF_P_6.3V

12

12

12

12

C47
@10PF

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GCLKO

1 2

CBRST#22,23,34
GIRDY#8

GFRAME#8

PIPE#8

GTRDY#8

GDEVSEL#8

GSTOP#8

GPAR8

GC/BE#08
GC/BE#18
GC/BE#28
GC/BE#38

PIRQA#17,18,22

GREQ#8
GGNT#8
SBSTB8

ST08
ST18
ST28

RBF#8

GT_SUSTAT1#6,7

12

R38
10K

+5V

GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3

GREQ#

1 2

ST0
ST1
ST2

GSBA0
GSBA1
GSBA2
GSBA3
GSBA4
GSBA5
GSBA6
GSBA7

AGP_BUSY#

1 2

R25 0

+3V

1 2

R1910

R330

R15210

U9A

B11

AD0

A11

AD1

C11

AD2

D12

AD3

C12

AD4

A12

AD5

B12

AD6

D13

AD7

A13

AD8

E14

AD9

C14

AD10

D14

AD11

A14

AD12

A18

AD13

D15

AD14

B14

AD15

D18

AD16

C19

AD17

E17

AD18

E18

AD19

D20

AD20

B20

AD21

F18

AD22

F19

AD23

G18

AD24

G19

AD25

F20

AD26

D17

AD27

J20

AD28

G16

AD29

G20

AD30

F16

AD31

J19

CPUCLK

G17

RESET#

A20

IRDY#

D19

FRAME#

E19

IDSEL/PIPE#

B19

TRDY#

D16

DEVSEL#

B17

STOP#

A16

PAR

B13

C/BE#0

E15

C/BE#1

E20

C/BE#2

C18

C/BE#3

K16

INTR#

J17

REQ#

J18

GNT#

C20

SB_STB

H16

ST0

H17

ST1

H20

ST2

A19

SBA0

B18

SBA1

A17

SBA2

C17

SBA3

E16

SBA4

B16

SBA5

C16

SBA6

A15

SBA7

H18

RBF#

C13

AD_STB0

F17

AD_STB1

H19

CLKRUN#

B15

AGP_BUSY#

C15

STP_AGP#

V4

PCI33EN

E13

VPP

F14

VPP

G15

VPP

J16

VPP

E11

AGPCLAMP

R2

GIOCLAMP

W2

TESTEN

ATI MOBILITY M1

D11

ZVPORT0

D10

ZVPORT1

C10

ZVPORT2

B10

ZVPORT3

A10

ZVPORT4

D9

ZVPORT5

C9

ZVPORT6

B9

ZVPORT7

A9

ZVPORT8

D8

ZVPORT9

C8

ZVPORT10

B8

ZVPORT11

A8

ZVPORT12

ZV PORTCORE I/O MEMORY POWER

PCI/AGP BUS INTERFACE

ZVPORT13
ZVPORT14
ZVPORT15
ZVPORT16
ZVPORT17
ZVPORT18

SSIN

SSOUT

NC/R

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR

VREF

VDDQ
VDDQ
VDDQ
VDDQ

VDDM
VDDM
VDDM
VDDM

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E7
D7
C7
B7
A7
E6

R1
T1

T2

T10
H6
E10
K5
L16
U11

T12
T14
P15
E8
F6
H5
N5
P6
T7
T9

M16
T13

T16
T8
R5

P16
P5
R6
R15

R4
J10
J11
K9
J12
K10
K11
K12
L9
L10
L11
L12
M9
M10
M11
M12
G6
F7
F15
R7
T15
U8
T5
E12
E9
J5
U13
J9
R3
P3
T11

ZVPORT8
ZVPORT9
ZVPORT10
ZVPORT11
ZVPORT12
ZVPORT13
ZVPORT14
ZVPORT15

R402 10K

12

+3V

R34

1 2

10K

+3V

+3V

SSIN 15
SSOUT 15

12

C37

C36

.1UF

.1UF

+3V

1UF_0805

+3V

C248

+3V

ZVPORT8
ZVPORT9
ZVPORT10
ZVPORT11

12

12

C50

C45

.1UF

1000PF

12

12

C62
.1UF

12

12

C250

+

22UF_B

C54
.1UF

12

12

C64
.1UF

C59
1000PF

12

10

C51
.1UF

GSBA[0..7]8
GAD[0..31]8

6
7
8
9

12

RP74

10P8R-10K

C56
.1UF

12

+

C188

22UF_B

12

C43

1000PF

12

12

VDDC

C61
1000PF

C34
.1UF

GSBA[0..7]
GAD[0..31]

5
4
3
2
1

+3V

12

10UF_P_6.3V

12

12

C53
.1UF

ZVPORT15
ZVPORT14
ZVPORT13
ZVPORT12

C241

C33
.1UF

12

C41
.1UF

12

12

C40

C55

.1UF

.1UF

12

12

C35

C46

.1UF

.1UF

12

12

C44

C52

.1UF

.1UF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

5

4

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

1C

of

13 37Friday, December 01, 2000

1

A A

12

R125

10K

C160

.1UF

12

4

5

1

OSC_29.498928M

ST

GND

2

VDD

OUT

3

R126 33

1 2

+3V

X1

B B

MCLK

R18 22

1 2

INT_MCLKIN

C C

VGA_MA1

VGA_MA2

VGA_MA3

VGA_MA4

VGA_MA10

VGA_MA11

R22 @10K12R24 @10K12R20 @10K12R27 @10K12R17 @10K12R8 @10K

12

D D

DNI

MA11

MA10

DNI

AGP PLL VCO GAIN

VCO GAIN ADJUSTMENT

DNI

DNI

MA4

DNI

MA3

DNI

AGP CLOCK SKEW ADJUSTMENT

INTERNAL VS EXTERNAL CLOCKS

BETWEEN X1 AND X2 CLOCKS

MA2

MA1

5

AGP CLOCK SKEW ADJUSTMENT

4

3

THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION

OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER

THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL

ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.

W3

Y4

ATI MOBILITY M1

CS0

CS1

CKE

ROMCS#

DSF

V5

W5

1 2

100K

+3V

INT_MCLKIN

MCLK

U6

V6

Y5

MCK

MCKIN

PAVDD

PAVSS

K17

K18

R13

W11

V11

DQM#6

DQM#7

PVDD

PVSS

C1

F5

U10

V10

DQM#4

DQM#5

XTALOUT

D1

C159

22PF

W10

DQM#3

XTALIN

E2

F29MHZ

12

Y10

DQM#1

DQM#2

A2VSSQ

F29MHZ

U9

V9

DQM#0

A2VSSN

M4

WE#

A2VDD

R2SET

AVDD

W4

Y6

CAS#

SYNC

R2SET

U5

RAS#

COMP

C

VGA_MA11

U2

MA11

Y

N1N2N3P2N4P1M5

VGA_MA10

W6

MA10

W9

Y9

MA8

MA9

AVSSQ

AVSSN

MA7

AVDD

AVDD

MA6

RSET

VGA_MA3

VGA_MA4

MA2

MA3

MA4

MA5

HSYNC

VSYNC

G

B

B15

HSYNC 15

VSYNC 15

VGA_MA1

VGA_MA2

K19

Y7W7V7U7Y8W8V8

T6

MD63

MA0

MA1

GPIO15

GPIO16

R

C3C2B1E3F4D3D2E4D4

R15

G15

K20

L17

MD61

MD62

GPIO13

GPIO14

R12 @0

R21 @100

1 2

1 2

M20

M19

M18

L18

MD60

L19

MD59

L20

MD58

M17

MD57

MD56

MD55

MD54

N17

MD53

N18

MD52

N19

MD51

N20

MD50

MD49

MEMORY INTERFACE

GPIO10

GPIO11

GPIO12

R11

1 2

R19 47K

1 2

GPIO8

GPIO9

GPIO6

GPIO7

GPIO4

GPIO5

GPIO3

GPIO1

GPIO2

N16

P17

MD47

MD48

GPIO0

A1A2B2A3B3A4B4C4A5B5C5D5E5A6B6C6D6

P19

P18

MD46

LPVSSR

R17

P20

MD44

MD45

LPVSSR

LPVSS

J4L5G5

R18

MD43

100K

R20

R19

MD40

MD41

MD42

LPVDDR

LPVDD

H4

H3

PVDD

12

R15

R16

T17

MD38

MD39

SUSPEND#

MONDET

P4

VGA_SUSP# 28

T20

T19

T18

MD36

MD37

STANDBY#

BLON

Y2

Y3

BLON#

R7 10K

1 2

U18

U17

MD34

MD35

FLAT PANEL INTERFACEGPIODAC2 DAC1PLL

BIASON

DIGON

V3W1Y1

ENVEE

ENVDD

ENVDD 16

U20

U19

MD32

MD33

LCDTMG3

V2

V19

V18

V20

MD29

MD30

MD31

LCDTMG0

LCDTMG1

LCDTMG2

U3U4V1

W20

MD28

Y19

Y20

MD26

MD27

LTGIO1

LTGIO2

W19

Y18

MD24

MD25

LTGIO0

T3T4U1

W17

W18

Y17

MD21

MD22

MD23

LCDDO21

LCDDO22

LCDDO23

M3

+3V

W16

Y16

V17

MD18

MD19

MD20

LCDDO18

LCDDO19

LCDDO20

U16

Y15

V16

MD15

MD16

MD17

LCDDO15

LCDDO16

LCDDO17

(DEFAULT)

W15

U15

V15

MD12

MD13

MD14

LCDDO12

LCDDO13

LCDDO14

W14

V14

Y14

MD9

MD10

MD11

LCDDO10

LCDDO11

LCDDO9

(DEFAULT)

W13

U14

Y13

MD6

MD7

MD8

LCDDO6

LCDDO7

LCDDO8

LCD6 16

LCD7 16

Y12

V13

MD3

MD4

MD5

LCDDO3

LCDDO4

LCDDO5

LCD3 16

LCD4 16

LCD5 16

(DEFAULT)

W12

U12

Y11

V12

MD0

MD1

MD2

LCDDO0

LCDDO1

LCDDO2

G4F3F2E1F1G3G2G1H1H2J3J2J1K4K3K2K1L1L2L3L4M1M2

LCD0 16

LCD1 16

LCD2 16

4

U9B

3

2

Title

Size Document Number Rev

Date: Sheet

B

4011661CSCHEMATICS, M/B LA-971

Compal Electronics, Inc.

1

14 37Friday, December 01, 2000

of

.1UF

.01UF

1000PF

.1UF

12

C30

12

C28

12

C63

12

C170

PVDD

.1UF

.01UF

357_1%_0603

C29

C26

R10

0

+3V

@ Charles modify

12

R9

365_1%_0603

DDC_CLK 15

DDC_DATA 15

DDC_MD2 15

AVDD

12

12

R2SET

12

M_SEN# 15

2.2K

2.2K

1 2

10K

1 2

@10K

R180

R181

R16

R23

at 4/23

12

12

+3V +3V+5V+5V

+3V

ENVEE29

ENVEE

BLON#

2

3

Q13

2N7002

2 1

RLZ5.1B

D14

D13

D12

RB751V

RB751V

21

21

1

12

R178

1K

DISPOFF# 16BKOFF#28

2

+3VS

1

1

A A

C_HSYNC
C_VSYNC
DDCD
DDCC

SUSP20,32,33

B B

C C

3

6
11
14

2

5
12
15

U1

1A
2A
3A
4A
1OE
2OE
3OE
4OE

QS3125

2

3125VCC

12

C24
.1UF

16

VCC

GND

4

1Y

7

2Y

10

3Y

13

4Y

1

NC

9

NC

8

HSYNC 14
VSYNC 14
DDC_DATA 14
DDC_CLK 14

3

D2 1N4148

M_SEN#14

DDC_MD214

4

21

+5V

5

SSOUT13

R131 @0

R130 @0
R128 @0

6

+3VS

12

C189

2

U8

1

X1/CLK

6

S1

VDD

GND

3

CLK

PD#S0
LEE

@MK1705

@.1UF

4

87
5

SSIN 13

7

8

Clock Modulator for EMI Reduction

D8

3

+3V

+3V

L10

12

12

R2

10K

1 2

CHB2012B800

1 2

CHB2012B800

1 2

CHB2012B800

C148
33PF

12

R1

10K

L9

L8

L1

1 2

CHB2012B121
L2

1 2

CHB2012B121

R14

G

G14

B

B14

12

R120

R121

75_0603

75_0603

12

12

R119

75_0603

12

12

C149
33PF

C147
33PF

C_HSYNC

C_VSYNC

1

2

DAN217
D9

3

1

2

DAN217

12

12

C143

C145

15PF

15PF

12

C1

68PF_0603

12

C2

68PF_0603

12

C144
15PF

D7

1

DAN217

+5VS

2

3

+3V

12

C4
100PF

2 1

D1

BR491D

12

C5
220PF

C7

@.1UF

12

DDCD

DDCC

C3
220PF

CRT_VCC

12

JP1

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

DZ11A9-H2-CRTCON

CRT_VCC CRT_VCC

D D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

1

2

3

4

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

6

CRT CONNECTOR

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

7

1C

of

15 37Friday, December 01, 2000

8

A

+12VS

4 4

LCDDVGA

ENVDD14

3 3

+5VS

12

R122
1K

1
3

2

2

Q9

2N7002

22K

R124

4.7K

1 2

13

22K

2

Q10
DTC124EK

R118
100K

1 2

13

22K

22K

Q8

DTC124EK

B

10V

SI2302DS

2

G

Q7

4.7UF_A

LCDDVGA

C6

10V

+

+3V

DS

1 3

7.2V

12

12

12

C151

R117
150K

C146

.1UF

.1UF

+

C150

4.7UF_A

C

SI2301DS: P CHANNEL
VGS: -4.5V, RDS: 130 mOHM
VGS: -2.5V, RDS: 190mOHM
Id(MAX): 2.3A
VGS(MAX): +-8V

SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
VGS: 2.5V, RDS: 115mOHM
Id(MAX): 2.8A
VGS(MAX): +-8V

D

FD1

1

H

FIDUCAL
CF1

1

H

SMD40M80
CF9

1

H

SMD40M80
CF17

1

H

SMD40M80
M5

1

H

O157x197D157x197N

FOR LAYOUT ONLY

FD2

FD3

FD4

1

H

FIDUCAL
CF2

H

SMD40M80
CF10

H

SMD40M80
CF18

H

SMD40M80

1

H

FIDUCAL

FIDUCAL

CF3

CF4

1

1

H

SMD40M80

SMD40M80

CF11

CF12

1

1

H

SMD40M80

SMD40M80

CF19

CF20

1

1

H

SMD40M80

SMD40M80

E

FD5

FD6

1

1

H

H

FIDUCAL
CF5

1

H

H

SMD40M80
CF13

1

H

H

SMD40M80
CF21

1

H

H

SMD40M80

1

H

FIDUCAL
CF6

CF7

CF8

1

1

1

H

H

SMD40M80

SMD40M80

CF14

CF15

1

1

H

H

SMD40M80

SMD40M80

CF22

1

1

H

SMD40M80

1

H

SMD40M80
CF16

1

1

H

SMD40M80

H1

1

H

S295D118

LCDDVGA

12

H7

1

H

S295D118

H13

1

H

S295D118-GNDA

M9

1

H

O185x87D98x16

+

C152
.1UF

LCD & INVERTER

Connector

2 2

LCD614
LCD714

LCD414
LCD514

PID017,18
PID117,18
PID217,18
PID317,18

DAC_BRIG28
INVT_PWM28

1 1

JP3

2930
2728
2526
2324
2122
1920
1718
1516
1314
1112

910
78
56
34
12

HEADER 2X15

KX14-30K-LCDCON

LCD2 14
LCD3 14

LCD0 14
LCD1 14

LCDDVGA

DISPOFF# 14

+5VALW

+5VALW

+

C8
.1UF

C9

10UF_B

C153
10UF_P_6.3V

H2

1

H

S295D118

H8

1

H

S295D118

H14

1

H

S295D118-GNDA

M10

1

H

O185x87D98x16

H3

1

H

S295D118

H9

1

H

S295D118

M6

1

H

S315D118-GNDA

M11

1

H

O87x185D16x98

PAD1

EMI_PAD

H4

1

H

S295D118

H10

1

H

S295D118

M1

1

H

C354D150

M12

H

C157D157N

1

H5

H

S295D118

H11

H

S295D118

M2

H

C354D150

1

H6

1

1

1

1

H

S295D118

H12

1

H

S295D118

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

A

B

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971

B

401166

1C

of

16 37Friday, December 01, 2000

E

PHLDA#8,18

SERR#8,18,22,34
TRDY#8,18,22,25,34

GGREQ#13

ATFINT#28

1K

RTCX1

PCIRST#8,22,23,25,34

IRDY#8,18,22,25,34

PHLD#8,18

STOP#8,18,22,25,34

REQ#28

CLKRUN#8,13,18,22,25,31,34

DEVSEL#8,18,22,25,34

SUSTAT1#6

PX4_LIDSW#28,29

MEMR#18,28

MEMW#18,28

100K

FRAME#8,18,22,25,34

PAR8,18,22,25,34

SMBALT#18

CPU_STP#6

PCI_STP#12
RSMRST#7,30

CPUINIT#6

STPCLK#6
GATEA2028

REFRESH#18

IOCHRDY18,28,31

PBTN#

MID3
MID2
MID1
32#/64M

REQC#

PIRQA#
PIRQB#
PIRQC#
PIRQD#

EXTSMI#28

SUSA#12,28
SUSB#28

SUSC#28

PX4_RI#29

SDAP410,12
SCKP410,12

C/BE#08,22,25,34
C/BE#18,22,25,34
C/BE#28,22,25,34
C/BE#38,22,25,34

FERR#4

IGNNE#6

A20M#6

IOCS16#18

ZWS#18

SBHE#18

RSTDRV19,20,31

IOW#18,28,31

12

A

IRDY#

PAR
PCIRST
PHLD#
PHLDA#

SERR#
STOP#
TRDY#

PBTN#

PX4_SLP#

INTR6

NMI6

SMI#6

RC#28

TC31

GPI018

IOR#18,28,31

AEN28,31

C397
22PF

2 1

RB751V

1 2

12

R287 33

C385
@47PF

A

AD10

AD8

AD9

AD7

AD8

AD9

MASTER

*
*

*

*

*

PCI

SA7

SA8

SA9

SA10

SA8

SA9

AD11

AD10

SA10

SA11

AD11

*
*

*

SA11

AD12

AD12

SA12

SA12

AD13

SA13

AD[0..31]

AD15

AD14

AD13

AD14

SA13

SA14

SA14

SA15

AD16

AD15

SA15

SA16

AD18

AD17

AD16

AD17

PCI

SA16

SA17

SA17

SA18

AD[0..31]8,22,25,34

AD2

AD3

AD0

AD4

AD6

AD1

AD5

AD7

A10D9C9B9A9D8E8B8A8D7C7B7A7D6E6E4C4B4A4D3E3C3B3E2C2B2A2D1E1C1B1M1N2P3N1P2P4

B10U11

AD1

AD2

AD3

AD4

AD5

AD6

AD0SA0

C10

CLKRUN#

E5

DEVSEL#

A5

FRAME#

A3

IDSEL

B5

IRDY#

B6

PAR

A1

PCIRST#

B12

PHOLD#

A12

PHLDA#

A6

SERR#

D5

STOP#

C5

TRDY#

E10

PCIREQ1#

A11

PCIREQ2#

B11

PCIREQ3#

C11

PCIREQ4#

*

EXTSMI#

*

SUSA#
SUSB#/GPO15
SUSC#/GPO16
SUS_ST1#/GPO20
SUS_ST2#/GPO21
BATLOW#/GPI9

*

PWRBTN#
LID/GPI10
SMBALERT#/GPI11
RI#/GPI12

*

SMBDATA

*

SMBCLK
THRM#/GPI8
CPU_STP#/GPO17
PCI_STP#/GPO18
ZZ/GPO19

*

RSMRST#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

SLP#
CPURST
INIT
FERR#
IGNNE#
INTR
NMI
SMI#
STPCLK#
RCIN#
A20GATE
A20M#

TC
MEMCS16#
MEMR#
MEMW#
SMEMR#
SMEMW#
SYSCLK
BALE
IOCHK#/GPI0
REFRESH#
I0CS16#
ZEROWS#
SBHE#
RSTDRV
IOR#
IOW#
IOCHRDY
AEN

SA1

SA2

SA3

SA4

SA5

SA6

T11

W11

Y11

T10

W10U9V9Y9T8W8U7V7Y7V6Y6T5W5U4V3W3U2T2W2Y2T1V1W16

SA4

SA5

SA1

SA0

SA2

SA3

SA6

SA7

ON/OFFBTN 30

PCIRST

D31

V20

W20

V19
U18
T17
T18
U19
U20
P16
N17
P18
T20
R19
H19

K16

M17

K20

M19

K19

P20
N20

M20

V10
Y12
V15
U15

U10

V12

W12

R1
R2

C8
C6
D4
D2

L18
L17

L19
L20

J18

P1

W4

U3

T7
Y1

W7

Y3

W1

Y5
T4
T3
Y4

RP66
8P4R-10K

R99

+3VS

1 2

R278 100

BATTLOW#29
R347 10K

48M

12

R93

22

12

C120
10PF

CLK_PX

12

R89
33

12

C112
22PF

+3VS

RTCX2

1 2

R318 20M_0603

12

C406
22PF

1 8
2 7
3 6
4 5

PIRQA#13,18,22

PIRQB#18,34
PIRQC#18,25
PIRQD#18,34

PX4_REQ1#8
PX4_REQ2#8

1 2

PX4_SLP#18

R366

1 2

X2

32.768KHZ

PBTN#18,29

+3VS

4 4

AD18

+3V

3 3

2 2

1 1

AD21

AD22

AD24

AD20

AD23

AD18

AD19

AD20

AD21

AD22

AD23

PM

CPU

SA18

SD0

SD1

SD2

SD3

SA19

V4

SD0

SD1

SD2

SD3

SD4

SA19 AD19

IRQ[3..7]18
SDD[0..15]20
PDD[0..15]19

DACK#[0..3]31

DRQ[0..3]18,31

SA[0..19]18,28,31
SD[0..15]18,28,31

DRQ[5..7]18

IRQ[0..1]18,28
IRQ[9..12]18,28

IRQ[14..15]18,19,20

B

AD25

AD24

SD4

SD5

B

AD26

AD27

AD25

AD26

SD5

SD6

SD7

SD6

IRQ[3..7]
SDD[0..15]
PDD[0..15]
DACK#[0..3]

DRQ[0..3]
SA[0..19]
SD[0..15]

DRQ[5..7]
IRQ[0..1]
IRQ[9..12]
IRQ[14..15]

AD28

AD27

SD7

SD8

ACIN_SYS#33

REQC#

AD31

REQA#

AD30

AD29

REQB#

AD28

AD29

AD30

AD31

REQA#/GPI2

REQB#/GPI3

REQC#/GPI4

PC/PCI DMA

ISA

SD8

SD9

SD10

SD11

SD12

SD13

SD14

SD15

T16

Y17

V17

Y18

W18

Y19

W19

SD9

SD10

SD14

SD15

SD11

SD12

SD13

GNTB#

J17

GNTA#/GPO9

GNTB#/GPO10

GNTC#/GPO11

APICACK#/GPO12

DACK0#

DACK1#

DACK2#

U14W6Y10V5T15

DACK#0

DACK#1

DACK#2

SIRQ

H18

K18

J19R3R4P5G1

SERIRQ/GPI7

APICREQ#/GPI5

APICCS#/GPO13

DACK3#

DACK5#

DACK6#

DACK7#

V16

W17

DACK#3

PIRQA#

PIRQB#

PIRQA#

PIRQB#

VRCHGNG#6

FLASH#29

SCI#28

PIRQC#

PIRQD#

PID0

P19L2J3L5K3K4H1H4H5G3G4

GPI1

GPI13

PIRQC#

PIRQD#

*

DREQ0

DREQ1

DREQ2

DREQ3

DREQ5

DREQ6

W15U6V2U5Y16

U16

DRQ0

DRQ2

DRQ6

DRQ1

DRQ3

DRQ5

PID[0..3]

C

+3VS

+3V

EXTIDEPWR#

INTIDERST

32#/64M

PID1

GPI14

PID3

PID2

MID1

MID2

MID3

GPI15

GPI16

GPO0

GPI17

GPI18

GPI19

GPI20

GPI21

EXTIDERST

Y15

T14

T12

Y13

V13

W14

U13

GPO7/LA23

GPO6/LA22

GPO5/LA21

GPO3/LA19

GPO4/LA20

GPO1/LA17

GPO2/LA18

GPO8

R16

R15R6F15

E11F6T6

N16

F4F3F2G5T19

VCC1

VCC2

VCC3

VCC4

VCCSUS1

VCCSUS2

VCC5

GPO30

GPO29

GPO28

GPO27

GPI/O PWR

MISC

DREQ7

IRQ0/GPO14

IRQ1

IRQ3

IRQ4

IRQ5

IRQ6

IRQ7

IRQ8#/GPI6

IRQ9

IRQ10

IRQ11

IRQ12

IRQ14

IRQ15

PDD0

PDD1

PDD2

PDD3

PDD4

PDD5

PDD6

PDD7

PDD8

U17

H20

DRQ7

PID[0..3] 16,18

C

J20T9W9U8V8Y8Y20U1U12

IRQ3

IRQ4

IRQ1

IRQ5

IRQ0

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

IRQ6

IRQ7

W13

IRQ9

IRQ8#

IRQ11

IRQ10

1 2

R359

IRQ8# 28

T13

V14

Y14

F20

E18

E20

D18

D20

C20

B20

A20

A19

IRQ12

IRQ15

IRQ14

10K

PDD4

PDD0

PDD1

+3V

PDD2

PDD3

PDD5

PDD6

PDD7

PDD8

D

P15R7G6

F14F5E16

VCCP1

VCCP2

VCCP3

VCCP4

VCCP5

VCCP6

VCCP7

IDE

PDD9

PDD10

PDD11

PDD12

PDD13

PDD14

PDD15

B19

C19

D19

D17

E19

E17

F19

PDD9

PDD10

PDD14

PDD15

PDD13

PDD11

PDD12

D

C391 1UF_0805

1 2

+3VS

PIIX4_VREF

E12E9K5

J5

VCCP8

VCCP9

VSSUSB

VCCUSB

SDDO

SDD1

SDD2

SDD3

SDD4

SDD5

E15

B15

D14

C14

A14

C13

SDD0

SDD1

SDD2

SDD3

SDD4

SDD5

SDD6

E

1 2

2

3

D27 RB425D

J16J9J10

VREF

SDD6

A13

C12

SDD7

R88 1K

1

J11

J12K9K10

K11

K12

GND

GND

GND

GND

GND

GND

GND

GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

NC
NC
NC

BIOSCS#
RTCALE/GPO25
RTCCS#/GPO24
KBCCS#/GPO26

XOE#/GPO23

XDIR#/GPO22

*

CONFIG1

*

CONFIG2

PCS0#
PCS1#

MCCS#

CLK48

OSC

PCICLK

*

SUSCLK

*

TEST#

SPKR

*

RTCX1

*

RTCX2

VBAT

*

PWROK

OC0#
OC1#

USBP1+

USBP1-

USBP0+

USBP0-

PDIOR#

PDIOW#

PIORDY

PDDREQ

PDDACK#

PDCS1#
PDCS3#

SDIOR#

SDIOW#

SIORDY

SDDREQ

SDDACK#

SDCS1#
SDCS3#

PDA0
PDA1
PDA2
SDA0
SDA1
SDA2

NC1
NC2
NC3

SDD7

SDD8

SDD9

SDD10

SDD11

SDD12

SDD13

SDD14

SDD15

D12

B13

D13

B14

E14

A15

C15

D15

SDD8

SDD10

SDD11

SDD12

SDD9

SDD13

SDD15

SDD14

Title

SCHEMATICS, M/B LA-971

Size Document Number Rev
Custom

401166

Date: Sheet

+3VS

U31

L9
L10
L11
L12
M9
M10
M11
M12
D10
E7
E13
M5
R5
M16

M2
L1
K2
K1
M4
M3

R17
R18
L4
N5
N4

L3
V11
D11
P17

V18
K17

N19
R20
L16
M18

J1
J2
F1
H2
G2
H3

F17
F16
G20
F18
G19
H17
H16

C16
B16
D16
A16
A17
B18
C18
G16
G18
G17
C17
B17
A18
J4
N18
N3

PIIX4M

+5VS

CONFIG1
CONFIG2

48M

14MOSC

CLK_PX
RTCCLK

1 2

RTCX1
RTCX2

PDDREQ

SDDREQ

+3V

BIOSCS# 28
GT_LO/HI# 6

R358

SIRQ
REQA#
REQB#
GNTB#

INTIDERST
EXTIDEPWR#

EXTIDERST

1 2

R338 100K

1 2

48M 12
14MOSC 12
PCLK_PIIX4 12
RTCCLK 23

10K

+3V

SPKR 25

+RTCVCC

SPWROFF# 30
OVCUR#0 21

OVCUR#1 18
USBP1+ 21
USBP1- 21
USBP0+ 21
USBP0- 21

PDIOR# 19
PDIOW# 19
PIORDY 19
PDDREQ 19
PDDACK# 19
PDCS1# 19
PDCS3# 19

SDIOR# 20
SDIOW# 20
SIORDY 20
SDDREQ 20
SDDACK# 20
SDCS1# 20
SDCS3# 20
PDA0 19
PDA1 19
PDA2 19
SDA0 20
SDA1 20
SDA2 20

Compal Electronics, Inc.

E

SIRQ 18,22,31
REQA# 18
REQB# 18,22,25
GNTB# 22,25

INTIDERST 19
EXTIDEPWR# 20

EXTIDERST 20

R330100K

32#/64M

14MOSC

+RTCVCC

17 37Friday, December 01, 2000

CONFIG1
CONFIG2

12

C420
1UF_0805

of

12

12

C134
22PF

12

R360
33

R97
@0

1C

A

B

C

D

E

ISA PCI

+3VS

+3VS

+3VS

+3VS

1
2
3
4
5

RP22

10P8R-10K

NOTE: +3V 8.2K

RP62
1 8
2 7
3 6
4 5

8P4R-10K

R304

10K

RP63
1 8
2 7
3 6
4 5

8P4R-10K

R90 4.7K

1 2

RP31

8P4R-10K

10
9

PHLDA#

8

PHLD#

7

CLKRUN#

6

PLOCK# 8
PAR 8,17,22,25,34
PIRQD# 17,34
PIRQC# 17,25

12

SIRQ 17,22,31

FRAME#
IRDY#
TRDY#
DEVSEL#

OVCUR#1 17

PID0

45

PID1

36

PID2

27

PID3

18

+3VS
SERR# 8,17,22,34
PHLDA# 8,17
PHLD# 8,17
CLKRUN# 8,13,17,22,25,31,34

FRAME# 8,17,22,25,34
IRDY# 8,17,22,25,34
TRDY# 8,17,22,25,34
DEVSEL# 8,17,22,25,34

PID0 16,17
PID1 16,17
PID2 16,17
PID3 16,17

SD[0..15]17,28,31

+3VS

SA3
SA0
SA5
SA7

+3VS

IRQ1 17,28
IRQ4 17
IRQ7 17
IRQ6 17

SD7
SD2
SD3
SD6

SD9
SD11
SD13
SD15

SA[0..19]17,28,31

+3VS

+3VS

1 1

SD5
SD1
SD4
SD0

SD8
SD10
SD12
SD14

1
2
3
4
5

1
2
3
4
5

6
7
8
9

10

6
7
8
9

10

RP34

10P8R-4.7K

RP33

10P8R-10K

RP69

10P8R-4.7K

RP36

10P8R-4.7K

10
9
8
7
6

10
9
8
7
6

5
4
3
2
1

5
4
3
2
1

SA2
SA1
SA4
SA6

+3VS

IRQ017

IRQ1017

IRQ317
IRQ917

+3VS

2 2

+3VS

+3VS

SD[0..15]
SA[0..19]

+3V

+3VS

+3VS

1
2
3
4
5

RP35

10P8R-4.7K

RP73

8P4R-10K

R368 1K

1 2

R336 1K

1 2

RP64

8P4R-4.7K

SA8
SA9 SA10
SA11
SA14

+3VS

10
9
8
7
6

45
36
27
18

IOCHRDY

45
36
27

PBTN#

18

ZWS#

SMBALT#

+3VS

SA12
SA13
SA15

IRQ11 17
IRQ12 17,28
IRQ5 17
REQA# 17

ZWS# 17

IOCHRDY 17,28,31

SMBALT# 17

PBTN# 17,29

PERR#

PERR#22,25,34

STOP# SERR#

STOP#8,17,22,25,34

PIRQB#

PIRQB#17,34

PIRQA#

PIRQA#13,17,22

+3VS

+3VS

+3VS +3VS

5
4
3
2
1

5
4
3
2
1

IOW# 17,28,31

SA18
SA16

MEMW# 17,28

DRQ0 17,31
DRQ1 17,31
DRQ2 17,31
DRQ3 17,31

6
7
8
9

10

6
7
8
9

10

RP32

10P8R-4.7K

RP37

10P8R-4.7K

+3VS

SA19
SA17

IOR#17,28,31

MEMR#17,28

DRQ517
DRQ617
DRQ717

A

3 3

4 4

+3VS

1 2

R103 1K

1 2

R367 4.7K

+5VS

1 2

R94 10K

1 2

R92 10K

+3VS

RP39

45
36
27
18

8P4R-10K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL
ELECTRONICS, INC.

B

REFRESH# 17
IOCS16# 17

IRQ14 17,19

IRQ15 17,20

GPI0 17
REQB# 17,22,25
PX4_SLP# 17
SBHE# 17

+3VS +3V

C

12

C119
.1UF

12

C121
.1UF

FOR PIIX4

12

12

C118
.1UF

12

12

C124

C125
.1UF

.1UF

D

C113
.1UF

12

C127
1000PF

12

C123
.1UF

+3VS

12

Title

Size Document Number Rev

Date: Sheet

12

C116
.1UF

C117
.01UF

12

C122
.01UF

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971

B

401166

12

C115
.01UF

12

C126
.01UF

12

C114
.01UF

12

C366

+

10UF_B_16V

E

12

C452

+

10UF_B_16V

18 37Friday, December 01, 2000

of

1C

A

1 1

B

C

D

E

IDE CONN.

RP29

8P4R-33

RPIORDY

PDD[0..15]

RP30

8P4R-33

PDCS_3#
PDCS_1#
PDA_2
PDA_1

IRQ_14

RPIORDY

RPDIOW#
RPDIOR#
RPDDACK#
PDA_0

BEXTHDD_LED#20

DRV0#20,31

PDA217
PDA117

IRQ1417,18

1 2

R84 1K

PDD[0..15]17

+5VS

12

13

C

22K

B

22K

1 8
2 7
3 6
4 5

1 2

R100 82_0603

1 2

R91 82_0603

1 8
2 7
3 6
4 5

R96

100K

INTIDERST#

Q43
DTC124EK

E

3

+5VS

PDCS3#17
PDCS1#17

PIORDY17

PDIOW#17

PDIOR#17

PDDACK#17

PDA017

2

1 2

R87 10K

INTIDERST#

+5VS

+5VS

C336
1UF_0805

PDD_7
PDD_5

PDD_4
PDD_3
PDD_2
PDD_1
PDD_0

RPDDREQ
RPDIOW#
RPDIOR#
RPIORDY
RPDDACK#
IRQ_14
PDA_1
PDA_0
PDCS_1#

1 2

R82 10K

12

C106
.1UF

12

C337

10UF_1206_10V

RPDDREQ

1 2

HDD_LED#31

R302

82_0603

12

1 2

2 2

3 3

R299 5.6K

PDDREQ17

+5VS

12

JP15

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

HDD 44P

C107
1000PF

PDD_8
PDD_9PDD_6
PDD_10
PDD_11
PDD_12
PDD_13
PDD_14
PDD_15

PHDD#

PCSEL

1 2

R86 470

R80 @10K

1 2
PDA_2
PDCS_3#

+5VS

RSTDRV17,20,31

INTIDERST17

RSTDRV

+5VS

1
2

D5

RB425D

PDD11
PDD10
PDD9
PDD8

PDD4
PDD5
PDD6
PDD7

RP23
1 8
2 7
3 6
4 5

8P4R-33

RP24
1 8
2 7
3 6
4 5

8P4R-33

+5VS

RP26

PDD12PDD_11
PDD_10
PDD_9
PDD_8

PDD_4
PDD_5
PDD_6
PDD_7

+5VS

12

R81
100K

D4

1
2

RB717F

12

R85
10K

3

1 8

PDD14

2 7

PDD3

3 6

PDD1

4 5

PDD13

1 8

PDD15

2 7

PDD2

3 6

PDD0

4 5

ACT_LED# 31

8P4R-33
RP25

8P4R-33

PDD_12
PDD_14
PDD_3
PDD_1

PDD_13
PDD_15
PDD_2
PDD_0

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL

A

ELECTRONICS, INC.

B

C

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971

401166

1C

of

19 37Friday, December 01, 2000

E

5

4

3

2

1

RP41

8P4R-1K

1 8
2 7
3 6
4 5

+5VS

10
9
8
7
6

+5VS

RP76

8P4R-100K

INDEX#
DRV0#

+5VS

STEP# 31
MTR0# 31
INDEX# 31
DRV0# 19,31

SUSP15,32,33
EXTIDEPWR#17

SUSP

C249

0.1UF

R157
10K

+5VALW

+12VS

+3V

5

U11

2
1

4

7SH32

R156

100K

2

6
5
2
1

47K

Q15

SI3456DV

12

47K

3

1

+5VMOD

4

Q16
DTC144EKA

12

+

C252

4.7UF_A

{1st Part Field}

12

C251
.01UF

12

R159
1K

1

EXTIDE_EN#

2

3

Q17
2N7002

3

SI3456DV: N CHANNEL
VGS: 4.5V, RDS: 65 mOHM
Id(MAX): 5.1A
VGS,+-20V

+5VS

R144
1K

R83 10K

SDDREQ17

SIORDY17

SDD[0..15]17
IRQ1517,18

R158 82_0603

SDIOR#17

SDIOW#17

SDDACK#17

SDA117

RP19 8P4R-33

SDA017
SDCS1#17
SDCS3#17

SDA217

RP18 8P4R-33

SDD11 RSDD11
SDD9
SDD10 RSDD10
SDD8

RP21 8P4R-33

SDD7

12

SDD5
SDD4

RP20 8P4R-33

SDD1
SDD14 RSDD14
SDD3
SDD12

RP16 8P4R-33

SDD13 RSDD13
SDD15
SDD2
SDD0

RP17 8P4R-33

SDDREQ RSDDREQ

1 2

1 2

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

R76 82_0603
R75 5.6K

12

R149 82_0603

SDD[0..15]

18
27
36
45

18
27
36
45

18
27
36
45

12
12

RSIORDY

RIRQ15

RSDIOR#
RSDIOW#
RSDDACK#
RSDA1

RSDA0
RSDCS1#
RSDCS3#
RSDA2

RSDD9
RSDD8

RSDD7
RSDD6SDD6
RSDD5
RSDD4

RSDD1
RSDD3

RSDD12

RSDD15
RSDD2
RSDD0

EXTID0
EXTID1
EXTID2

RP42
1
2
3
4
5

10P8R-1K

1 8
2 7
3 6
4 5

WDATA#

+5VS

12

R153
100K

D D

RSTDRV

RSTDRV17,19,31

EXTIDERST17

1 2

R151 470

C C

EXTCD_L26

EXTCD_AGND26

BEXTHDD_LED#19

B B

D20

1
2

2

3

RB425D

EXTCSEL

EXTCD_AGND
EXTIDERST# RSDD8
RSDD7 RSDD9
RSDD6 RSDD10
RSDD5 RSDD11
RSDD4 RSDD12
RSDD3 RSDD13
RSDD2 RSDD14
RSDD1 RSDD15
RSDD0

RSDIOW#
RSIORDY
RIRQ15
RSDA1
RSDA0
RSDCS1#
BEXTHDD_LED#
EXTCSEL INDEX#

DRV0#
DSKCHG#
MTR0#
STEP#
WDATA#
TRACK0#
WP#
RDATA#

EXTIDERST#

13

C

22K

B

E

22K

JP7

1 2

12

3 4

34

5 6

56

7 8

78

9 10

910

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

49 50

51 52

51 52

53 54

53 54

55 56

55 56

57 58

57 58

59 60

59 60

Q18
DTC124EK

EXTCD_REXTCD_L
EXTCD_AGND

RSDDREQ
RSDIOR#
RSDDACK#
RSDA2
RSDCS3#
EXTID0
EXTID1
EXTID2

3MODE#
FDDIR#

WGATE#
HDSEL#

EXTCD_R 26

WDATA#31
WGATE#31

HDSEL#31
FDDIR#31

DSKCHG#31

RDATA#31

TRACK0#31

EXTID0 28
EXTID1 28
EXTID2 28

+5VMOD

3MODE# 31

WGATE# STEP#
HDSEL# MTR0#
FDDIR#

+5VS

DSKCHG#
RDATA#
WP#

WP#31

TRACK0#

COMBO-60P

+5VMOD

12

12

C239

1000PF

A A

C245

10UF_1206_10V

12

C244
1UF_0805

12

C240
.1UF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

5

4

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

1C

of

20 37Friday, December 01, 2000

1

5

4

3

2

1

RP27

D D

USBP1+17

USBP1-17

USBP0+17

USBP0-17

1 8
2 7
3 6
4 5

8P4R-33
CP5
8P4C-33PF

1 8

2 7

3 6

4 5

PLACE THESE THREE PARTS CLOSE TO PIIX4E

C C

USB1_D+
USB1_D­USB0_D+
USB0_D-

182736

45

RP28
8P4R-15K

+5VS

OVCUR#017

POLYSWITCH_0.75A

OVCUR#0

F1

12

C109
1000PF

USB CONNECTOR

USBVCC0USB_VCC0

12

C110
.1UF

L28 CHB1608U301
1 2
1 2

L29 CHB1608U301

12

L30

+

C111

150UF_E_10V

FB_USB0_D­FB_USB0_D+

USBGND0

12

C395
.1UF

BUS-12-123-USBCON

1 2
CHB4516G750

12

R79
470K

12

R78
560K

USB0_D­USB0_D+

L3

CHB4516G750

JP16

1
2
3
4

B B

FIR Module

+3VS

1 2

R148 4.7_1206

1 2

+3VS

R150
47_1206

1 2
12

12

A A

C238

4.7UF_A

C65
.1UF

5

IRRX31

2
4
6
8

SD/MODE: SHUTDOWN MODE, HIGH ACTIVE
MODE: HIGH/LOW SPEED SELECT

U4

IRED Cathode
Rxd
Vcc
GND

FIR TFDU6101E

R141 4.7_1206

IRED Anode

IR_ANODE

1
3

Txd

5

SD/Mode

7

Mode

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL
ELECTRONICS, INC.

4

IRTX 31
IRMODE 31

3

2

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

of

21 37Friday, December 01, 2000

1

1C

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4 4

S2_D[0..15]23
S2_A023
S2_A123
S2_A223
S2_A323
S2_A423
S2_A523

3 3

S2_A623
S2_A723
S2_A823
S2_A923
S2_A1023
S2_A1123
S2_A1223
S2_A1323
S2_A1423
S2_A1523
S2_A1623
S2_A1723
S2_A1823
S2_A1923
S2_A2023
S2_A2123
S2_A2223
S2_A2323
S2_A2423
S2_A2523

2 2

S2_VCC S1_VCC

C378
1000P

1 1

+3VS

100K

R286

100K

R285

100K

R332

100K

R331

A

U33

S2_D0
S2_D1
S2_D2
S2_D3
S2_D4
S2_D5
S2_D6
S2_D7
S2_D8
S2_D9
S2_D10
S2_D11
S2_D12
S2_D13
S2_D14

S2_D[0..15]
S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6 S1_A6
S2_A7
S2_A8
S2_A9
S2_A10
S2_A11
S2_A12 S1_A12
S2_A13
S2_A14
S2_A15
S2_A16 S1_A16
S2_A17
S2_A18
S2_A19
S2_A20
S2_A21
S2_A22
S2_A23
S2_A24
S2_A25

S2_BVD123
S2_BVD223
S2_CD1#23
S2_CD2#23
S2_RDY#23
S2_WAIT#23
S2_WP23
S2_INPACK#23

S2_CE1#23
S2_CE2#23
S2_WE#23
S2_IORD#23
S2_IOWR#23
S2_OE#23
S2_VS123
S2_VS223
S2_REQ#23
S2_RST23

0_0805

MFUNC1
MFUNC2
MFUNC5
MFUNC6

A

S2_D15

R277

47

S2_BVD1
S2_BVD2
S2_CD1#
S2_CD2#
S2_RDY#
S2_WAIT#
S2_WP
S2_INPK#

S2_CE1#
S2_CE2#

S2_IORD#
S2_IOWR#
S2_OE#
S2_VS1
S2_VS2
S2_REG#
S2_RST

S2_VCCR S1_VCCR

R279

AD[0..31]8,17,25,34

C371
.1U

E10

B_CAD27//B_D0

A9

B_CAD29//B_D1

D9

B_RSVD//B_D2

J18

B_CAD0//B_D3

J15

B_CAD1//B_D4

H19

B_CAD3//B_D5

H16

B_CAD5//B_D6

G13

B_CAD7//B_D7

F9

B_CAD28//B_D8

B9

B_CAD30//B_D9

E9

B_CAD31//B_D10

J16

B_CAD2//B_D11

H14

B_CAD4//B_D12

H18

B_CAD6//B_D13

H15

B_RSVD//B_D14

G18

B_CAD8//B_D15

D11

B_CAD26//B_A0

E12

B_CAD25//B_A1

D12

B_CAD24//B_A2

D13

B_CAD23//B_A3

B13

B_CAD22//B_A4

E13

B_CAD21//B_A5

B14

B_CAD20//B_A6

B15

B_CAD18//B_A7

D19

B_CC/BE1#//B_A8

E18

B_CAD14//B_A9

G15

B_CAD9//B_A10

F15

BCAD12//B_A11

E15

B_CC/BE2#//B_A12

C19

B_CPAR//B_A13

C18

B_CPERR#//B_A14

B16

B_CIRDY#//B_A15

A17

B_CCLK//B_A16

E16

B_CAD16//B_A17

D18

B_RSVD//B_A18

D16

B_CBLOCK#//B_A19

B19

B_CSTOP#//B_A20

A18

B_CDEVSEL#//B_A21

B17

B_CTRDY#//B_A22

D15

B_CFRAME#//B_A23

A15

B_CAD17//B_A24

E14

B_CAD19//B_A25

A10

B_CSTSCHG//B_BVD1(STSCHG#/RI#)

F10

B_CAUDIO//B_BVD2(SPKR#)

J19

B_CCD1#//B_CD1#

D10

B_CCD2#//B_CD2#

E11

B_CINT#//B_READY(IREQ#)

F11

B_CSERR#//B_WAIT#

B10

B_CCLKRUN#//B_WP(IOIS16#)

A13

B_CREQ#//B_INPACK#

G16

B_CC/BE0#//B_CE1#

G14

B_CAD10//B_CE2#

B18

B_CGNT#//B_WE#

F16

B_CAD13//B_IORD#

F14

B_CAD15//B_IOWR#

F19

B_CAD11//B_OE#

B11

B_CVS1//B_VS1#

A14

B_CVS2//B_VS2#

A12

B_CC/BE3#//B_REG#

F13

B_CRST#//B_RESET

F18

VCCB

B12

VCCB

AD3

AD2

AD1

AD4

AD0

N13

R12

T12

T13

V12

AD4

AD3

AD0

AD1

AD2

AD[0..31]

CBRST#13,23,34

PCIRST#8,17,23,25,34

CBRST#13,23,34

AD15

1 2

1 2

R421 0

1 2

R422 @0

V3

W3

W4

ZV_MCLK

ZV_LRCLK

ZV_SDATA

V2

ZV_SCLK

B

U2

W2

ZV_UV6

ZV_UV7

T2

V1

ZV_UV4

ZV_UV5

R4

U1

ZV_UV3

R2

T1

ZV_UV2

ZV_UV1

R1

ZV_UV0

+3V

P6

ZV_Y6

ZV_Y7

ZV_Y4

ZV_Y5

P2P4P5

ZV_Y3

ZV_Y1

ZV_Y2

C373

.1U

N4N5N6

ZV_Y0

C372

.1U

N1

N2

V4

ZV_PCLK

ZV_HREF

ZV_VSYNC

N18

W13

VCCP

VCCP

V10

VCC

J14

VCC

E19

C374

.1U

VCC

C

C403

C413

.1U

.1U

A11

D14

E1

E6

P1

P15

T5T6T7

V13

W12

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

GND

C416

C414

.1U

D8

G19

M2

GND

GND

GND

GND

T4

GND

C412

.1U

.1U

A3

A16

C1

F12

G1

N16

V14

GND

GND

GND

GND

GND

GND

GND

Zoomed Video Power Supply

Slot B Slot A

PCI4450 GJG

PCI Interface

AD22

AD6

AD9

AD5

AD8

AD7

P13

P14

R13

R14

W14

W15

AD6

AD5

AD7

AD8

AD10

AD9

G_RST#
R3390
R280100

MFUNC7

P_RST#

AD10

B

V15

AD11

PCM_RI#32

AD11

T15

AD12

AD12

W16

AD13

AD13

V16

AD14

AD14

W17

AD15

AD15

R15

AD16

AD16

R19

AD17

AD17

R18

AD18

AD18

P16

AD19

AD19

AD20

P19

AD20

P18

AD21

AD21

C/BE#08,17,25,34
C/BE#18,17,25,34
C/BE#28,17,25,34
C/BE#38,17,25,34
PCLK_PCM12

N14

AD22

N15

AD23

AD23

AD24

M19

AD24

AD26

AD25

M15

M16

M18

AD26

AD25

AD27

R5 @0

22P

DEVSEL#8,17,18,25,34
FRAME#8,17,18,25,34
GNT#38
REQ#38
IRDY#8,17,18,25,34

AD27

AD28

L16

AD28

AD29

L19

AD29

AD30

L18

AD30

C377

L15

AD31

AD31

IDSEL/MFUNC7

N19

T14

MFUNC7

33

C/BE0#

C/BE1#

T16

R276

C/BE2#

M14

R16

C/BE3#

K15

PCLK

FRAME#

DEVSEL#

T18

U19

C

MFUNC2

MFUNC1

G_RST#

IRDY#

TRDY#

PAR

PERR#

REQ#

T19

STOP#

CLKRUN#

SERR#

K18

K19

U18

V17

V18

V19

W18

P_RST#

GNT#

K14

L14

PRST#

P11

G_RST#

MFUNC0

P9

P10

W10

MFUNC0

MFUNC1

MFUNC2

CLKRUN#

MFUNC3

R9

C379

C390

.1U

.1U

PHY_D7

PHY_D6

PHY_D5

PHY_D4

PHY_D3

P8

R8

T8

V6V7V8

W6W7W8

PHY_CTL1

PHY_CTL0

PHY_DATA3

PHY_DATA7

PHY_DATA6

PHY_DATA5

PHY_DATA4

IEEE 1394
PHY/Link
Interface

IRQSER

MFUNC6

SUSPEND#

MFUNC4

T9

W5

MFUNC5

RI_OUT#/PME#

SPKROUT#

MFUNC5

P12

R5

R10

R11

T10

MFUNC6

TI_SUSPEND_D#

SIRQ

R296 10K

CLKRUN# 8,13,17,18,25,31,34
STOP# 8,17,18,25,34
PERR# 18,25,34
SERR# 8,17,18,34
PAR 8,17,18,25,34
TRDY# 8,17,18,25,34

D

C418

.1U

PHY_D2

PHY_D1

PHY_D0

R7

PHY_DATA0

PHY_DATA1

PHY_DATA2

A_CSTSCHG//A_BVD1(STSCHG#/RI#)

SCL

SDA

V9

W9

C417

C375

.1U

.1U

PHY_D[0..7]

P7

R6

V5

LPS

A_CAD27//A_D0
A_CAD29//A_D1

LINKON

A_RSVD//A_D2

PHY_CLK

PHY_LREQ

A_CAD0//A_D3

ACAD1//A_D4
A_CAD3//A_D5
A_CAD5//A_D6
A_CAD7//A_D7

A_CAD28//A_D8
A_CAD30//A_D9

A_CAD31//A_D10

A_CAD2//A_D11
A_CAD4//A_D12
A_CAD6//A_D13
A_RSVD//A_D14
A_CAD8//A_D15

A_CAD26//A_A0
A_CAD25//A_A1
A_CAD24//A_A2
A_CAD23//A_A3
A_CAD22//A_A4
A_CAD21//A_A5
A_CAD20//A_A6
A_CAD18//A_A7

A_CC/BE1#//A_A8

A_CAD14//A_A9
A_CAD9//A_A10

A_CAD12//A_A11

A_CC/BE2#//A_A12

A_CPAR//A_A13

A_CPERR#//A_A14

A_CIRDY#//A_A15

A_CCLK//A_A16

A_CAD16//A_A17

A_RSVD//A_A18

A_CBLOCK#//A_A19

A_CSTOP#//A_A20

A_CDEVSEL#//A_A21

A_CTRDY#//A_A22

A_CERAME#//A_A23

A_CAD17//A_A24
A_CAD19//A_A25

A_CAUDIO//A_BVD2(SPKR#)

A_CCD1#//A_CD1#

A_CCD2#//A_CD2#

A_CINT#//A_READY(IREQ#)

A_CSERR#//A_WAIT#

A_CCLKRUN//A_WP(IOIS16#)

A_CREQ#//A_INPACK#

A_CC/BE0#//A_CE1#

A_CAD10//A_CE2#

A_CGNT#//A_WE#

A_CAD13//A_IORD#

A_CAD15//A_IOWR#

A_CAD11//A_OE#

A_CVS1/A_VS#1

A_CVS2//A_VS2#

A_CC/BE3#//A_REQ#

A_CRST#//A_RESET

CLOCK

DATA

LATCH

W11

SLATCH
SCLOCK

PCI4451 GJG

SLATCH 23
SLDATA 23
SCLOCK 23

TIDAT_SMB 24
TICLK_SMB 24
PME# 25,29,34

PCM_SPK# 25
SIRQ 17,18,31

T11

V11

+3VS

REQB# 17,18,25
GNTB# 17,25
PIRQA# 13,17,18

D

+3V

PHY_CTL1 24
PHY_CTL0 24

PHY_D[0..7] 24
PHY_LREQ 24
LINKON 24
LPS 24
PHY_CLK 24

S1_D0

L5

S1_D1

M1

S1_D2

M5

S1_D3

A8

S1_D4

E8

S1_D5

A7

S1_D6

D7

S1_D7

F7

S1_D8

M6

S1_D9

M4

S1_D10

N7

S1_D11

B8

S1_D12

G7

S1_D13

B7

S1_D14

E7

S1_D15

A6
K6

J6
J5
J1
H5
H4
H1
G2
A2
D4
F6
A4
G6
B1
D1
F4

R327

E2

47

B3
B2
C2
D2
E5
F5
F2
G5
G4

L1
L6
F8
L4
K2
K4
L2
J4

D6
A5
E4
D5
B4
B5
K1
H6
J2
H2

F1

VCCA

B6

VCCA

K5

VCCA

C415
.1U

Title

SCHEMATICS, M/B LA-971

Size Document Number Rev

B

401166

Date: Sheet

S1_D[0..15]
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5

S1_A7
S1_A8
S1_A9
S1_A10
S1_A11

S1_A13
S1_A14
S1_A15

S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25

S1_BVD1
S1_BVD2
S1_CD1#
S1_CD2#
S1_RDY#
S1_WAIT#
S1_WP
S1_INPK#_ILR

S1_CE1#
S1_CE2#

S1_IORD#
S1_IOWR#
S1_OE#
S1_VS1
S1_VS2
S1_REG#
S1_RST

+3VS

R316
47K

D28

2 1

RB751V

Compal Electronics, Inc .

E

S1_D[0..15] 23
S1_A0 23
S1_A1 23
S1_A2 23
S1_A3 23
S1_A4 23
S1_A5 23
S1_A6 23
S1_A7 23
S1_A8 23
S1_A9 23
S1_A10 23
S1_A11 23
S1_A12 23
S1_A13 23
S1_A14 23
S1_A15 23
S1_A16 23
S1_A17 23
S1_A18 23
S1_A19 23
S1_A20 23
S1_A21 23
S1_A22 23
S1_A23 23
S1_A24 23
S1_A25 23

S1_BVD1 23
S1_BVD2 23
S1_CD1# 23
S1_CD2# 23
S1_RDY# 23
S1_WAIT# 23
S1_WP 23
S1_INPACK# 23

S1_CE1# 23
S1_CE2# 23
S1_WE# 23
S1_IORD# 23
S1_IOWR# 23
S1_OE# 23
S1_VS1 23
S1_VS2 23
S1_REQ# 23
S1_RST 23

0_0805

R329

SLATCH

SCLOCK

PCM_SUSP# 28

E

C428
1000P

R303 @10K

1 2

R301 43K_0603

1 2

of

22 37Friday, December 01, 2000

1C

PCMCIA POWER CTRL.

+5V

+12V

+3V

C427

1 2

1U_0805

1 2

C443 .1U

1 2

C437 .1U

1 2

C451 .1U

1 2

C429 .1U

1 2
1 2

S1_VCC

S2_VCC

S1_VCC

S2_VCC

C477 .1U
C476 .1U

+3V

S1_BVD2
S1_BVD1
S1_WAIT#
S1_RDY#

S2_A19
S2_A21
S2_A14
S2_A20

S2_CD1#
S2_CD2#
S2_VS1
S2_VS2

S1_WP
S1_RST
S1_A15
S1_A21

S2_RDY#
S2_WAIT#
S2_BVD2
S2_BVD1

SLDATA22
SLATCH22
RTCCLK17

+3V

SCLOCK22

6
7
8
9

10

1
2
3
4
5

1
2
3
4
5

6
7
8
9

10

6
7
8
9

10

1 2

RP68

10P8R-47K

RP59

10P8R-47K
RP60

10P8R-47K
RP70

10P8R-47K

RP71

10P8R-47K

1 2

R380

100K

R343 0

5
4
3
2
1

10
9
8
7
6

10
9
8
7
6

5
4
3
2
1

5
4
3
2
1

S1_INPACK#

S2_A22
S2_A15
S2_RST
S2_WP

S1_VS1
S1_VS2
S1_CD2#
S1_CD1#

S1_A22
S1_A14
S1_A19
S1_A20

S2_INPACK#

Wire ZV PORT to Slot A

S1_VPP

U35

25

VCC_5V

7

12V

24

12V

1

5V

2

5V

30

5V

15

3.3V

16

3.3V

17

3.3V

3

DATA

5

LATCH

4

CLOCK

13

APWR_GOOD#

19

BPWR_GOOD#

18 12

OC# GND

TPS2216AI

S1_VCC

S2_VCC

+3V

S1_VCC

S2_VCC

AVPP
AVCC
AVCC
AVCC

BVPP
BVCC
BVCC
BVCC

RESET

RESET#

8
9
10
11

S2_VPP

23
20
21
22

6
14

26

NC

27

NC

28

NC

29

NC

12

+

CBRST#

PCIRST#8,17,22,25,34

C438

4.7UF_1206
10V

12

+

C132

4.7UF_1206
10V

PCMRST#28

S1_VPP
S1_VCC

S2_VPP
S2_VCC

S2_VPP

+3V

14

S1_VPP

12

C402
.01UF

1

2 3

U26A

7

74LVC125

12

S2_VCC

+3V

C400
.01UF

1 2

R262

10K

CBRST#

12

S1_VCC

12

C408

C411

.1UF

.1UF

CBRST# 13,22,34

12

+

C407
.1UF

C422
10UF_1206
16V

12

+

C410

C421

.1UF

10UF_1206
16V

C370
1000PF

S1_VPP
S1_VPP

1 2

S1_CD1#22

S1_CE1#22

S1_CE2#22
S1_OE#22
S1_VS122

S1_IORD#22
S1_IOWR#22

S1_WE#22
S1_RDY#22
S1_VCC

S1_VS222
S1_RST22
S1_WAIT#22
S1_INPACK#22
S1_REQ#22
S1_BVD222
S1_BVD122

S1_WP22
S1_CD2#22

CARDBUS

S1_A[0..25]22
S1_D[0..15]22
S2_A[0..25]22
S2_D[0..15]22

S1_D3
S1_D4

S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21

S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2# S2_CD2#

12

C494
1000PF

S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]

JP17

69

B01

70

B35

71

B02

72

B36

73

B03

74

B37

75

B04

76

B38

77

B05

78

B39

79

B06

80

B40

81

B07

82

B41

83

B08

84

B42

85

B09

86

B43

87

B10

88

B44

89

B11

90

B45

91

B12

92

B46

93

B13

94

B47

95

B14

96

B48

97

B15

98

B49

99

B16

100

B50

101

B17

102

B51

103

B18

104

B52

105

B19

106

B53

107

B20

108

B54

109

B21

110

B55

111

B22

112

B56

113

B23

114

B57

115

B24

116

B58

117

B25

118

B59

119

B26

120

B60

121

B27

122

B61

123

B28

124

B62

125

B29

126

B63

127

B30

128

B64

129

B31

130

B65

131

B32

132

B66

133

B33

134

B67

135

B34

136

B68

141

GND

GND

142

GND

GND

143

GND

GND

144

GND

GND

FOXCONNPCM144P

T01
T35
T02
T36
T03
T37
T04
T38
T05
T39
T06
T40
T07
T41
T08
T42
T09
T43
T10
T44
T11
T45
T12
T46
T13
T47
T14
T48
T15
T49
T16
T50
T17
T51
T18
T52
T19
T53
T20
T54
T21
T55
T22
T56
T23
T57
T24
T58
T25
T59
T26
T60
T27
T61
T28
T62
T29
T63
T30
T64
T31
T65
T32
T66
T33
T67
T34
T68

SOCKET

1
2

S2_D3

3

S2_CD1#S1_CD1#

4

S2_D4

5

S2_D11

6

S2_D5

7

S2_D12

8

S2_D6

9

S2_D13

10

S2_D7

11

S2_D14

12

S2_CE1#

13

S2_D15

14

S2_A10

15

S2_CE2#

16

S2_OE#

17

S2_VS1

18

S2_A11

19

S2_IORD#

20

S2_A9

21

S2_IOWR#

22

S2_A8

23

S2_A17

24

S2_A13

25

S2_A18

26

S2_A14

27

S2_A19

28

S2_WE#

29

S2_A20

30

S2_RDY#

31

S2_A21

32
33
34
35
36

S2_A16

37

S2_A22

38

S2_A15

39

S2_A23

40

S2_A12

41

S2_A24

42

S2_A7

43

S2_A25

44

S2_A6

45

S2_VS2

46

S2_A5

47

S2_RST

48

S2_A4

49

S2_WAIT#

50

S2_A3

51

S2_INPACK#

52

S2_A2

53

S2_REG#

54

S2_A1

55

S2_BVD2

56

S2_A0

57

S2_BVD1

58

S2_D0

59

S2_D8

60

S2_D1

61

S2_D9

62

S2_D2

63

S2_D10

64

S2_WP

65
66
67
68
137
138
139
140

12

C488
1000PF

C376
1000PF

1 2

S2_CD1# 22

S2_CE1# 22

S2_CE2# 22
S2_OE# 22
S2_VS1 22

S2_IORD# 22
S2_IOWR# 22

S2_WE# 22
S2_RDY# 22

S2_VCC

S2_VPP
S2_VPP

S2_VS2 22
S2_RST 22
S2_WAIT# 22
S2_INPACK# 22
S2_REQ# 22
S2_BVD2 22
S2_BVD1 22

S2_WP 22
S2_CD2# 22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

of

23 37Friday, December 01, 2000

1C

A

4 4

B

C

D

E

+3VS

+3VS +3VA

12

R384

@4.7K

LPS22

R383

1K

+3VS

PHY_CLK22
PHY_LREQ22
PHY_CTL022
PHY_CTL122

1 2

3 3

PHY_D[0..7]22

LINKON22

1 2

R397 1K

R394

10K

PHY_D[0..7]

12

C432
.1U

1 2

2 2

+3VS

+3VS

R395

1 2

10K

1 2

R398 @390K

1 2

R344 22

PHY_D0
PHY_D1
PHY_D2
PHY_D3
PHY_D4
PHY_D5
PHY_D6
PHY_D7

12

R390
1K

24
15
23

3
2

1
4
5

6
7
8

9
10
11
12
13

20
21
22
19

53
14

27
28
29

17
18
63
64

50
49
48
39
33
32

58
57

U38

CPS
LPS
ISO#
CNA

SYSCLK
LREQ
CTL0
CTL1

D0
D1
D2
D3
D4
D5
D6
D7

PC0
PC1
PC2
C/LKON

RESET#
PD

TESTM
SE
SM

DGND
DGND
DGND
DGND

AGND
AGND
AGND
AGND
AGND
AGND

PLLGND
PLLGND

TSB41LV01

DVDD
DVDD
DVDD
DVDD

AVDD
AVDD
AVDD
AVDD
AVDD

PLLVDD

FILTER0
FILTER1

TPBIAS0

TPA0+

TPA0-

TPB0+

TPB0-

+3VS

62
61
26
25

30
31
42
51
52

56
16

NC

59

XI

60

XO

54
55

41

R1

40

R0

38
47

NC

37
36
35
34

46

NC

45

NC

44

NC

43

NC

12

C130
.1U

12

C131
.1U

1 2

C128 .1U

1 2

R369 1M

1 2

R370

6.34K_0.1%_0603

12

12

12

12

12

C524

C504
.1U

C509
.1U

C515
.1U

12

12

C135
.1U

.1U

12

12

C133
.1U

C129
.01U

C518
.01U

+

C455
10UF_P_6.3V

C457

+

10UF_P_6.3V

1 2

+3VA

Y2

24.576 MHz

12

12

12

C396
16P_0603

R378
56_0603

R393
56_0603

12

12

12

R377
56_0603

R108
56_0603

C431

16P_0603

12

C469
1UF_0805

TPA0+
TPA0­TPB0+
TPB0-

L34

1 2

CHB3216Z260

JP18

4
3
2
1

1394_CONN 4PIN

12

+3VS

C388

12

@0.1UF

R295

1 2

TICLK_SMB22
TIDAT_SMB22

1 1

A

TICLK_SMB
TIDAT_SMB

@10K

R288

1 2

R297

1 2

@10K
@10K

U29

8

VCC

7

NC

6

SCL

5

SDA

@24C02-2.7

B

VSS

1

A0

2

A1

3

A2

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

C521
270P

12

R399

5.1K_0603

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

1C

of

24 37Friday, December 01, 2000

E

1

EECLK

1 2

JACX
JACY
JBCX
JBCY

JAB1
JAB2
JBB1
JBB2

IRQA
IRQB

IRQC

VAUX

EEDAT

71
72
73
74
75
63
91
76
77

49
50
51
52
53
54
55
56
57
60

22
16
15

66
69
65
70
9

58
83

97
5
18
28
36
47

84
98
4
19
27
37
46

62
59
10

R313 @33

1 2

R314 @33

1 2
R310
@33

R311 47
R312 47

R307 100K

1 2

R294 10K

1 2

EECLK

EEDAT

1 2

R308 100K

1 2

R309 100K

CRYVDD

12

R320 0

1 2

+3VS

BEEP#29

AD[0..31]8,17,22,34

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#08,17,22,34
C/BE#18,17,22,34
C/BE#28,17,22,34
C/BE#38,17,22,34

PIRQC#17,18

PCIRST#8,17,22,23,34

PCLK_AUD12

CLKRUN#8,13,17,18,22,31,34

DEVSEL#8,17,18,22,34

21

21

+3VS

VOL_UP#

VOL_DN#

AD19

D45 RB751V

D46 RB751V

A A

VOL_UP#29

VOL_DN#29

Place closely to CS4280

PCLK_AUD

12

R300
33

12

C392
22PF

GNT#48
REQ#48

FRAME#8,17,18,22,34

IRDY#8,17,18,22,34

TRDY#8,17,18,22,34

STOP#8,17,18,22,34

PERR#18,22,34

PAR8,17,18,22,34

PME#22,29,34

1 2

R317 @100K

1 2

R323 @100K

PCLK_AUD

1 2

R289 100

45
44
43
42
41
40
39
38
34
33
32
31
30
29
26
25

8
7
6
3
2
1

100

99
94
93
92
89
88
87
86
85

35
24
11
95

78
79
80
81
82
90
96
12
13
14
17
20
21
23
64

48
61
67
68

U30

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#

INTA#
RST#
PCICLK
GNT#
REQ#
CLKRUN#
IDSEL
FRAME#
IRDY#
TDRY#
DEVSEL#
STOP#
PERR#
PAR
PME#

TEST
TESTSEL
VOLUP
VOLDN

CS4281-CQ

AD[0..31]

EECLK/GPOUT/PCREQ#

EEDAT/GPIO2/PCGNT#

@CHB1608U800

1 2

L33

ABITCLK
ASDOUT

ASDIN

ASYNC

ARST#

ASDIN2/GPIO1

GPIO3

MIDIIN

MIDIOUT

CRYVDD
CRYGND

VDD5REF

CVDD[1]
CVDD[2]

PCIVDD[0]
PCIVDD[2]
PCIVDD[3]
PCIVDD[4]
PCIVDD[5]
PCIVDD[6]
PCIVDD[7]

PCIGND[0]
PCIGND[2]
PCIGND[3]
PCIGND[4]
PCIGND[5]
PCIGND[6]
PCIGND[7]

CGND[3]
CGND[2]
CGND[1]

IAC_BITCLK

1 2
C405
@15PF

IAC_SDATAO
IAC_SDATAI
IAC_SYNC
IAC_RST#

R305

1 2

C399
1000PF

4281VAUX

REQB# 17,18,22

GNTB# 17,22

4.7K

+3VS

1 2

L31 CHB1608U800

12

C404
.1UF

+3VS

5 6

74LVC125

+3VS

+3VS

0603

4

U26B

SPKR17

IAC_BITCLK 26

IAC_SDATAO 26
IAC_SDATAI 26
IAC_SYNC 26
IAC_RST# 26

+3V

12

R306
100K_1%_0603

R319 8.2K_1%_0603

1 2

+3V POWER

C423

.047UF_0603

+3VS

12

PCM_SPK#22

14

1 2
7

3 4

+3V POWER

12

C386
.1UF

U34A

74LVC14

+3V POWER

U34B

74LVC14

12

12

C398

C383

.1UF

.1UF

Place component's to
CS-4281

C426
1UF_0603

1 2

C424

1 2

1UF_0603

C425

1 2

1UF_0603

12

C367
.1UF

R341
560

1 2

R340

1 2

560

R342

1 2

560

+3VS

12

12

12

C389

C384

.01UF

.01UF

VDDA+3V

2

12

R345
10K

12

C368
.01UF

12

R349
220K

12

1
3

2 1

+

R350
10K

Q46
2SC2411EK

D30
RB751V

C326

10UF_P_6.3V

C440

12

1UF_0603

C439

1UF_0805

12

R356
82K_0603

MONO_IN 26

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

of

25 37Friday, December 01, 2000

1C

A

B

C

D

E

VDDA+5V

W=40Mil

12

C466

0.1UF

12

C467

0.1UF

12

C475

4.7UF_10V_0805

4 4

U43

4

VIN

2
7 1
8

SENSE

DELAY
ERROR CNOISE
ON/OFF#

SI9182

VOUT

GND

5
6

3

L40

1 2

CHB2012B121

12

C497
.01UF

12

C474

0.1UF

12

C501

4.7UF_10V_0805

SUSP#28,33,35

12

C459

4.7UF_10V_0805

3 3

6.8K_0603

R363

EXTCD_L20
EXTCD_R20

MD_SPK34

R412

2.2K

1 2

R379 6.8K_0603

1 2

R387 6.8K_0603

1 2

R355 6.8K_0603

1 2

R351

560

1 2

2 2

R375

EXTCD_AGND20

1 2

CD_AGND INT_CD_AGND

3.3K
R372

IAC_RST#25

C460 1UF_0805

1 2

3.3K

CD_L
CD_R

EXTMICIN27

1 2

R334 100

C454 1UF_0805

1 2

C471 1UF_0805

1 2

C446 1UF_0805

1 2

C436

@0.01UF

12

C458

0.1UF

MONO_IN25

AC97_RST#

12

IAC_SYNC25
IAC_SDATAO25

EAPD27

1 2

12

C482

0.1UF

12

4.7UF_10V_0805

Vrefout

CD_L_IN
CD_R_IN
INT_CD_AGND

Vrefout
PHONE
MONO_IN

R411

1 2

22K

C500

W=25mils

14
15
16
17
23
24
18
20
19
21
22
13
12

11
10

5

45
46

47
48

4
7

12

C533
10UF_16V_B

VDDA

25

AVCC

AUX_L
AUX_R
VIDEO_L
VIDEO_R
LIN_IN_L
LIN_IN_R
CD_L
CD_R
CD_GNA
MIC1
MIC2
PHONE
PC_BEEP

RESET#
SYNC
SDATA_OUT
NC

ID0#

NC

ID1#

NC

EAPD

NC

SPDF

GND
GND

U37
CS-4297-A

38

AVCC

C435

0.01UF

MIC_PWR

C534

0.1U
+3VS

12

LINE_OUT_L
LINE_OUT_R

MONO_OUT

HP_OUT_L
HP_OUT_R

BIT_CLK

SDATA_IN

XTL_OUT

VREFOUT

REFFLT

12

1

VCC

XTL_IN

AFLT1
AFLT2

CAP2

AGND
AGND

R335
0_1206

W=25mils

9

VCC

NC
NC
NC
NC
NC

NC

VDD_AC97

12

12

C434

0.1UF

4.7UF_10V_0805

C472 1000PF

C478 1000PF
35
36
37

C453 @1000PF

39

C448 @1000PF

41

6
8

MONO_OUT
1 2
1 2

BIT_CLK_R

SDATA_IN_R

LEFT 27
RIGHT 27

1 2
1 2

2

3

AFTL1

29

AFTL2

30
28
27
32

31
33
34
43
44

40
26
42

FLT3D

BPCFG
FLT1
FLT0

Vrefout
REFFLT
CAP2

C433

1 2
1 2

C463 1000PF

1 2

1 2

C465 1UF_0805

R346

47
47

R337

C493 1000PF

1 2

C517 1000PF

1 2

W=15mils

12

C484
1000PF

IAC_BITCLK 25
IAC_SDATAI 25

12

C525

@1UF_0805

MD_MIC

1 2

R376 @100K

XTL_IN

XTL_OUT

C492 0.1UF

1 2

C507 1UF_0805

1 2

12

+

@4.7UF_10V_A

C516

MD_MIC 34

12

R400

@0

1 2

24.576 MHz

VREFOUT

C481

0.01UF

Y3

C419 22PF

1 2

C491

1 2

0.1UF

L32

1 2

@CHB1608U800

L4

1 2

@CHB1608U800

L36

1 2

@CHB1608U800

0603

12

C430

22PF

1 2

C506
1UF_0805

1 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

A

B

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

1C

of

26 37Friday, December 01, 2000

E

1

VOLUME

0.61~0.73V

0.73~0.84V

0.84V~0.95V

0.95V~1.06V

1.06~1.17V

A A

1.17~1.28V

1.28~1.39V

1.39~1.5V

1.5~1.62V

B B

C C

GAIN of
Amplifier(db)

10
8
6
4
2
0

VR1

-2

HS-1503MF

-4

-6

R362
0_0603

AMPVCC

1 2
13

1 2

R371
0

2

R410
@51K

+5VS

R409

@100K

2

AMP_VOL28

R418

VR28

0

VOL_CTRL

84

U28B

5

+

6

7

-

LM358A

LEFT26
RIGHT26

3

U47

1

VCC

3

B0B1A

6

SEL

2

GND

@7SB3157

C473 2.2UF_0805

1 2
1 2

C462 2.2UF_0805

R417

0

+5VS

5
4

12

C529

@.1UF

C464 2.2UF_0805

1 2

1 2

C461 2.2UF_0805

W=25Mil

R415
@2M_0603

12

C470

0.1UF

4

AMPVCC

R382
0

R364 100K

1 2

INTSPK_L+
INTSPK_R+

12

12

C496

0.047UF_0603

INTSPK_R+

INTSPK_L+

CHB3216U121

C480

0.1UF

U40

7
18
19

2

3

4
21

5
23

6
20

17

TPA0132

1 2

L35

AMPVCC

12

C489

+

10UF_16V_B

SHUTDOWN#

PVDD
PVDD
VDD

PC-ENABLE
VOLUME
LOUT+
ROUT+
LLINEIN
RLINEIN
LHPIN
RHPIN

CLK

SE/BTL#

PC-BEEP

BYPASS

LOUT­ROUT-

LIN

RIN

GND
GND
GND
GND

1 2

C137 220UF_D

1 2

C139 220UF_D

DEPOP29

5

+5VS

C495

0.1UF

22
15
14
11
9
16
10
8

1
12
13
24

R115

@47K

1 2

+

+

1 2

R116 @47K

SHUTDOWN#

INTSPK_L­INTSPK_R-

12

C511

0.47UF_0603

HP_SENSE28

2

C512

+5VS

1
3

HP_SENSE

1 2

12

C490

0.47UF_0603

2
1
3

Q63
@SI2302

R365

100K

1 2

2

Q47
2N7002

0.47UF_0603

12

C503

0.47UF_0603

R413 15

HP_SENSE

R414 15

1
3

Q62
@SI2302

6

EAPD 26

L6

1 2

CHB1608U800

0603

L5

1 2

CHB1608U800

0603

C141
330PF

7

SPEAKER CONN

INTSPK_L+
INTSPK_L­INTSPK_R+
INTSPK_R-

VDDA

12

12

12

C140
330PF

R112

100K

EXT.
HEADPHONE

JP20

5
4
3

6
2
1

PHONEJACK

8

JP2

1
2
3
4

SPK_CON

EXT.

MIC_PWR

12

R114

C483

EXTMICIN MIC_OUT+

EXTMICIN26

D D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

1

2

3

4

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

1 2

1UF_0805

CHB1608U800

6

1 2

L7

0603

2.2K

12

C142
220PF

12

R113
0

Title

SCHEMATICS, M/B LA-971

Size Document Number Rev
Custom

401166

Date: Sheet

7

MICPHONE
JACK

JP21

5
4
3

6
2
1

PHONEJACK

Compal Electronics, Inc .

27 37Friday, December 01, 2000

1C

of

8

21-D724-D818-D319-D3

6,11,14,15,19

1

KBA[0..18]29

ADB[0..7]29

SA[0..18]17,18,31

SD[0..7]17,18,31
KSI[0..7]29
KSO[0..15]29

A A

B B

+5VALW

R328
100K

D29

R298 10K

+RTCVCC

1 2

IRQ1217,18

IRQ8#17

EC_HPOWON30

2 1

RB751V

+5VALW

+RTCVCC

C447

+5VS

1UF_0805

1 2

C C

GATEA2017

CRY1 CRY2

12

D D

C444
10PF

R333

4.7K

RC#17

1 2

22M_0603

32.768KHZ

R353

X3

12

12

2 1

2 1

R326

4.7K

D25 RB751V

D26 RB751V

R352
51K

C445
33PF

ENV0,1 TRIS# HRMS# HDEN# FXBUSEN# SHBM# strap pin have internal pull-down resistors

1

!

KBA[0..18]
ADB[0..7]
SA[0..18]
SD[0..7]
KSI[0..7]
KSO[0..15]

12

IRQ117,18

C382

.1UF

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

12

1000PF

36

KBSIN0

35

KBSIN1

34

KBSIN2

33

KBSIN3

32

KBSIN4

31

KBSIN5

30

KBSIN6

29

KBSIN7

56

KBSOUT0

55

KBSOUT1

54

KBSOUT2

53

KBSOUT3

52

KBSOUT4

51

KBSOUT5

50

KBSOUT6

49

KBSOUT7

48

KBSOUT8

47

KBSOUT9

42

KBSOUT10

41

KBSOUT11

40

KBSOUT12

39

KBSOUT13

38

KBSOUT14

37

KBSOUT15

156

IRQ1

155

IRQ8#

154

IRQ11

153

IRQ12

12

79

PFAIL#

165

HPWRON

28

VBAT

12

R321
10K

G20

RCL#

12

12

SCROLED#30

CAPSLED#30
PAD_LED#30

C394

PCM_SUSP#22

EN_WOL#34
NUMLED#30

SD[0..7]17,18,31

2

+5VALW

12

C401

.1UF

242666

GND

Environment ENV0 ENV1

IRE

IRD

Development

HDEN#(Host Device Enable)

Mode

Device are enabled o reset

Devices are disabled on reset

32KX1

252712

CRY1
CRY2

SA18
KBA18

RING#32

SMCLK

SMCLK4,29,35

SMDATA

SMDATA4,29,35

G20

2

RCL#

SCROLED#
NUMLED#
CAPSLED#
PADLED#
SUSP#

ON/OFF#30

SUSP#26,33,35

3

+5VALW

12

L27
CHB1608U601

GND

109

GND

570_AVCC

12

1602367

GND

GND

C441
1000PF

VCC

VCC

108

1619192

VCC

VCC

AVCC

80

AVREF

12

C380

.1UF

ECAGND

AGND

SA0

SA1

166

HA0

C530
1U_0603

CHB1608U601

SA2

SA3

167

168

169

HA1

HA2

1 2

SA4

SA5

170

171

HA3

HA4

HA5

(P104) (P103)

00

01

01

(P136)

SHBM#(Shared/Non-Shared BIOS Memory)

1

Non Shared Memories

0

Shared Memories

(P111)

32KX2

PE0/HA18

PE1/A18

PB0/RING

PB1/SCL

PB2/SDA

PB3/TA

PB4/TB

PB5/GA20

PB6/HRSTO

PB7/SWIN

PC0

PC1

PC2

PC6/PSCLK3

PC7/PSDAT3

PC3/EXINT0

PC4/EXTINT11

PC5/EXINT15

136717273747576777861626370695860575981

646568

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL
ELECTRONICS, INC.

3

4

Q41

2N7002

L26

SD5

SA7

SA12

SA9

SA13

SA17

HA14

SA15

HA15

SA16

HA16/PA3

HA17/PA4

SD0

HD0

SA10

SA14

SA11

SA6

SA8

172

173

174345678910111516171819202122157

HA6

HA7

HA8

HA9

HA10

HA11

HA12

HA13

SD1

HD1

SD2

HD2

SD3

HD3

SD4

HD4

HD5

SD6

HD6

SD7

HD7

HRMS#(Host Reset Mode Select)

Mode HRMS#

(P105)

Reset host when shared
memory access can not
be completed

Extend access until completed

FXBUSEN#(FX Bus Interface Enable)

Mode FXBUSEN#

(P130)

FX Bus Interface Enabled

ISA Bus Compatible Mode

PSDAT2

TRIS(TRI-STATE)

0

1

PD0/AD0

PD1/AD1

PD2/AD2

PD3/AD3

PD4/AD4

82838485869394

R419 0

EXT_DATA
KBD_DATA
EXT_CLK
KBD_CLK
TP_DATA
TP_CLK

PD5/AD5

PD6/AD6

PD7/AD7

4

DA0

DA1

959697

DA2

DA3

98

EXTID0 20
EXTID1 20
EXTID2 20
P/F# 32
HP_SENSE 27
VR 27

BATT_TEMP 35
EXT_DATA 30
KBD_DATA 30
EXT_CLK 30
KBD_CLK 30
TP_DATA 32
TP_CLK 32

PH0/BST0

104

HDEN#

1

0

PSCLK1

PSCLK2

PSDAT1

2

1 3

Q44

1 3

2N7002

162

163

13

158

HIOR#

HMEMCS#/PA0

HMEMRD#/PA1

HMEMWR#/PA2

HAEN/FXASTB#

(P102)

Normally

TriState

PH1/BST1

PH3/PFS#

PH2/BST2

PH5/ISE#

PH4/PLI#

103

101

10299100

570SCI#
ECSMI#
ENV1

ENV0

DAC_BRIG 16INVT_PWM16
AMP_VOL 27
EN_DFAN 34
TRICKLE

159

14

HIOW#

HIOCHRDY

5

2

1 3

1

0

1

0

NC

89

5

1 2

R74 100K

1 2

R324 10K

2

Q40
2N7002

2434445468788

NCNCNCNCNCNCNC

A13/BE0
A14/BE1

A15/PG1

A16/PA5
A17/PA6

PG0/SELIO#

PG2/CLK

PG3/SEL1#

PG4/WR1#

PF2/D10
PF3/D11
PF4/D12
PF5/D13
PF6/D14
PF7/D15

NCNCNCNCNC NC

NC

175

134

133

132

131 1

90

EC_ON 30
ACOFF 35

+5VALW

R293

@100K

+12VS
+5VS

BIOSCS# 17

MEMR# 17,18

MEMW# 17,18
AEN 17,31
IOR# 17,18,31
IOW# 17,18,31

IOCHRDY 17,18,31

U36

114

A0

115

A1

116

A2

117

A3

118

A4

119

A5

120

A6

121

A7

122

A8

123

A9

124

A10

125

A11

126

A12

127
128
129
130
135

137

D0

138

D1

139

D2

140

D3

141

D4

142

D5

143

D6

144

D7

111

RD#

105

SEL0#

112

WR0#

110
107
106
113

145

PF0/D8

146

PF1/D9

147
148
149
150
151
152

164

HMR

NC

PC87570-176PIN

176

2

ACIN

1

OCP 35

BATT_TEMP

C387 .01UF

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

FRD#
FSEL#

SELIO#
VGASUSP#_1

ATFOUT#

BATT_BQ

SYSON
ACIN
BKOFF#

Q65

DN042

1 2

6

SYSON#33

FRD# 29
FSEL# 29
FWR# 29

SELIO# 29
PCMRST# 23

SUSA# 12,17
SUSB# 17
SUSC# 17
SYSON 33
ACIN 33,35
BKOFF# 14

51RST 29

3

ECAGND

6

SYSON#

ECSMI#

+3V

D47 RB751V

21

LIDSW#29,30

10

9 8

U26C
74LVC125

+3V POWER

7

EXTSMI#

R263

1 2

10K

EXTSMI# 17

8

+3V

+3V

570SCI#

13

12 11

U26D
74LVC125

+3V POWER

SCI#

12

R261
10K

SCI# 17

+3V

1

U23A

12

R257
10K

VGA_SUSP# 14

C334
.1UF

VGASUSP#_1

12

14

2 3

74LVC125

+3V POWER

+3VS

ATFOUT#

+3V

14

5 6

4

U23B

74LVC125

R260

10K

12

ATFINT# 17

+3V POWER

PX4_LIDSW# 17,29

RP61

ENV1 ECSMI#
KBA15
KBA16 ENV0
KBA17

+5VS
EXT_DATA

EXT_CLK

10

9
8
7
6

10

9
8
7
6

10P8R-10K
RP67

10P8R-10K

LIDSW#
VGASUSP#_1
SUSP#

+5VALW

FRD# BKOFF#
SELIO# G20
SMCLK RCL#
SMDATA

1 8
2 7
3 6
4 5

RP65

10

9
8
7
6

RP72

8P4R-10K

10P8R-10K

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

7

1
2
3
4
5

1
2
3
4
5

1
2
3
4
5

FSEL#
KBA18

KBD_DATA
KBD_CLK
TP_DATA
TP_CLK

+5VALW

+5V

BATT_BQ

+5VS

+5VALW

28 37Friday, December 01, 2000

8

1C

of

1

2

3

4

5

6

7

8

+5VALW

RP38
1 8
2 7
3 6
4 5

8P4R-100K

A A

SELIO#28

+5VALW

U45D

74HCT32

14
12

13

7

B B

KSI[0..7]28

C C

KBA18
KBA16
KBA15 KBA17
KBA12 KBA14
KBA7 KBA13
KBA6 KBA8
KBA5 KBA9
KBA4 KBA11
KBA3
KBA2 KBA10
KBA1
KBA0 ADB7
ADB0 ADB6

D D

ADB1 ADB5
ADB2 ADB4

KSO[0..15]28
ADB[0..7]28

KBA[0..18]28

U6

1

NC

2

A16

3

A15

4

A12

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

12

A0

13

DQ0

14

DQ1

15

DQ2

16

VSS

29F040

1

EMAIL_BTN#30
INTERNET_BTN#30
USER1_BTN#30
USER2_BTN#30
ATF#4
LIDSW#28,30
ENVEE14
PME#22,25,34

+5VALW

U45B
74HCT32

CP6
8P4C_220P

CP7
8P4C_220P

CP8
8P4C_220P

CP9
8P4C_220P

CP10
8P4C_220P

CP11
8P4C_220P

KSI[0..7]
KSO[0..15]
ADB[0..7]

KBA[0..18]

VCC

WE*

A17
A14
A13

A8

A9
A11
OE*
A10
CE*

DQ7
DQ6
DQ5
DQ4
DQ3

14

4
5

7

+

C312
1 2

.1UF

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

C30410UF_B_16V

12

FWE#

ADB3

2

4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8

+5VALW

KBA1
SELIO#

11

+5V

USER2_BTN#
LIDSW#

PME#

CC

6

C105

.1UF

4
U5
7SH32

FRD# 28
FSEL# 28

INPUT

R408
100K

2 18

1A1 1Y1

4 16

1A2 1Y2

6 14

1A3 1Y3

8 12

1A4 1Y4

11 9

2A1 2Y1

13 7

2A2 2Y2

15 5

2A3 2Y3

17 3

2A4 2Y4

1

1G

19

2G

JP8

25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48

KB. CONN

+5VALW

12

5

2
1

OUTPUT

+5VALW

1 2

C136 .1UF

20

U41

ADB0 ADB1

VCC

GND

10

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

+5VALW

R73

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.

THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.

NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL

ELECTRONICS, INC.

3

ADB1 ADB2
ADB2 ADB3 MMO_ON
ADB3 ADB4
ADB4 ADB5
ADB5 ADB6
ADB6 ADB7
ADB7 KBA3

74HCT244

KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2
KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1

1 2

R72 100K

2

100K

1 3

Q4 2N7002

FLASH# 17
FWR# 28

+3V

+12VS

USER2_BTN#

AA
BB
CC

+3V

MMO_ON

PX4_PBTN#

LLBATT#

LIDSW#

4

R374 1K

D35 RB751V

D38

D34 RB751V

D37 @RB751V

RESET BTN

RP40
1 8
2 7
3 6
4 5

8P4R-100K

1 2

@RB751V

R106
10K

SW3

+5VALW

21

21

21

21

RST_BTN#

+5VALW

1 2

C502 .1UF

SELIO# LARST#

VR_ON 6,33,36

PBTN# 17,18

BATTLOW# 17

PX4_LIDSW# 17,28

KBA4
SELIO# LARST#

14

1
2

7

+5VALW

+5VALW

14

9

10

7

U45A

74HCT32

1 2

R101 20K

U45C

74HCT32

RST BTN

+5VALW

D32

1N4148

2 1

12

C450
1UF_0805

1 2

R102 4.7K

5

31

Q6

E

DTA114YKA

47K

B

2

10K

C

51RST

ADB0

AA

3

1 2

C442
1UF_0805

ADB0
ADB1
ADB2 PX4_RIB#
ADB3
ADB4
ADB5
ADB6
ADB7

BB

8

51RST 28

6

+5VALW

3

D0

4 5

D1 Q1

7 6

D2 Q2

8 9

D3 Q3

13 12

D4 Q4

14 15

D5 Q5

17 16

D6 Q6

18 19

D7 Q7

11

CLK

1

CLR

+5VALW

3

D0

4 5

D1 Q1

7 6

D2 Q2

8 9

D3 Q3

13 12

D4 Q4

14 15

D5 Q5

17 16

D6 Q6

18 19

D7 Q7

11

CLK

1

CLR

1 2

C449 .1UF

20

U39

Q0

VCC

10

20

Q0

VCC

10

2

GND

74HCT273

PX4_RIB#

1 2

C485 .1UF

U42

2

GND

74HCT273

PX4_PBTN#
LLBATT#

VOL_UP# 25
VOL_DN# 25

FSTCHG 35

R416 @0_0603

+3V

10

14

74LVC125

9 8

+3V POWER

DEPOP 27

U23C

PX4_RI# 17

PWR_LED# 31
BATT_CHG_LED# 31

EMAIL_LED# 31

BATT_LOW_LED# 31
BEEP# 25

NM24C164 Address definition: 1 A2 A1# A0 B2 B1 B0 R/W#

GND

+5VALW

12

R381
100K

1

A0

2

A1

3

A2

4

29 37Friday, December 01, 2000

8

+5VALW

1 2

C479 .1UF

SMCLK4,28,35

SMDATA4,28,35

Title

SCHEMATICS, M/B LA-971

Size Document Number Rev

B

401166

Date: Sheet of

7

U44

8

VCC

7

WC

6

SCL

5

SDA

NM24C16

EC I2C Bus Address:
1011xxx R/W#

Compal Electronics, Inc.

1C

A

B

C

D

E

+3V

12

R325
47K

1 2

R322

+3VS

330K_0603

1 2
R315
330K_0603

12

R275
113K_0805

12

R269
100K

4 4

3 3

R348

47K

12

C409

.1UF

+5V

12

12

C393
.1UF

V_GOOD6

12

C355
.01UF

5 6

+3V POWER

U34E

74LVC14

11 10

+3V POWER

+3VS

12

C354
.1UF

U34C

74LVC14

12

R268
1M

12

R267
@0

+3V

1 2

1
4
6

9 8

+3V POWER

5
2

1

U32 7SH32

+3V POWER

+3VS

C358

.1UF

MR#
PFI
NC

PWR ON CKT

U34D

RSMRST#

74LVC14

4

23

U27

7

RST#

VCCGND

8

RST

5

PFO#

MAX708

RSMRST# 7,17

+5V

+3V

13

14
12 11

+3V POWER

12

R282

2.2M_0603

1

5
2 4

3

U23D

74LVC125

SPWROFF#

U22

74HCT1G125GW

12

+2.5V_CLK +3V

12

C278
.1UF

EC_HPOWON 28

SPWROFF# 17

R259
10K

U14

1

VCC

RESET

2

GND

MAX6328UR22

3

1 2

R203 1K

VR_POK 6,36

+5VALW

31

Q45

E

DTA114YKA

47K

B

PAD_LED#28

CAPSLED#28

2

10K

C

1 2

R354 330

+5VALW +5VALW

31

Q39

E

DTA114YKA

47K

B

2

10K

C

1 2

R290 330

SCROLED#28

PAD_LED 32

NUMLED#28

CAPSLED 32 NUMLED 32

+5VALW

31

Q38

E

DTA114YKA

47K

B

2

10K

C

1 2

R283 330

31

Q42

E

DTA114YKA

47K

B

2

10K

C

1 2

R98 330

SCROLED 32

D41

1

EMAIL_BTN# 29

51ON# 51ON#

2

1

INTERNET_BTN# 29

2

USER1_BTN32

USER2_BTN32

ON/OFFBTN

LIDSW#28,29

D36

RLZ20A

2 1

3

DAN202U

D43

3

DAN202U

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL
ELECTRONICS, INC.

B

EMAIL_BTN32

2 2

+5VALW

12

R361
100K

1 2

2

D33

3

DAN202U

2

DTC124EK

22K

EC_ON

@2N7002

R396

4.7K

Q54

+5VALW

ON/OFFBTN

12

R392 33K

1
3

ON/OFFBTN17

EC_ON28

1 1

ON/OFF#

1

51ON#

2

13

Q59

22K

12

C468
1000PF

INTERNET_BTN32

ON/OFF# 28
51ON# 35

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

Change R214: 4.7k -> 22k, R215: 33k -> 22k, remove Q15.

A

3

3

SW1

1
2

ON/OFF

SW2

1
2

LID_SWITCH

C

D42

DAN202U

D44

DAN202U

3
4

3
4

1
2

1
2

USER1_BTN# 29

USER2_BTN# 29

51ON#51ON#

Q12
DN042

L13
CHB2012B121

EXT_CLK28

EXT_DATA28

+5VS KB_VCC

KBVCC
F2
POLYSWITCH_1.1A

1 2

L16 CHB4516G750

KBD_DATA28

KBD_CLK28

PS2 CONN.

D

1 2
1 2

L15
CHB2012B121

12

12

C162

C163

100PF

220PF

1 2

L12 CHB2012B121

1 2

L11 CHB2012B121

Q11

DN042

Title

SCHEMATICS, M/B LA-971

Size Document Number Rev
Custom

401166

Date: Sheet of

3

C156

220PF

1 2

1

2

12

C155
220PF

JP4

4
2
1

KB/PS2

563

12

C161

4.7UF_0805_10V

1

2

3

Compal Electronics, Inc.

E

1 2

12

C157
220PF

C154
220PF

1C

30 37Friday, December 01, 2000

1

ACT_LED#19

A A

HDD_LED#19

PWR_LED#29

B B

ACIN_LED#33

C C

BATT_LOW_LED#29

BATT_CHG_LED#29

D D

EMAIL_LED#29

1

+5VS

31

47K

B

2

10K

C

+5VS

31

47K

B

2

10K

C

+5VALW

31

E

47K

B

2

10K

C

+5VALW

31

E

47K

B

2

10K

C

+5VALW

31

E

47K

B

2

10K

C

+5VALW

31

E

47K

B

2

10K

C

+5VS

31

E

47K

B

2

10K

C

Q33

E

DTA114YKA

R264
330

1 2

Q49

E

DTA114YKA

R373
330

1 2

Q61

DTA114YKA

R405
560

1 2

Q48
DTA114YKA

R357
330

1 2

Q60
DTA114YKA

R404
200

1 2

Q37

DTA114YKA

R284
200

1 2

Q32

DTA114YKA

R252
330

1 2

2

ACT_LED

2

ACT_LED 32

HDD_LED 32

D39

2 1

LED

ACIN_LED 32

D40

2 4

1 3

DUAL_LED

1-3 Green
2-4 Amber

EMAIL_LED 32

14.3M_SIO12

C356

1 2

22PF

3

CLK

R281
33

C381
22PF

1 2

3

R265

4

5

6

7

8

SUPER I/O 37N869

SD[0..7]17,18,28

SA[0..15]17,18,28

33

DRQ117,18

SD[0..7]

SA[0..15]

DRQ317,18
DRQ217,18

DACK#317
DACK#217

SIRQ17,18,22
CLKRUN#8,13,17,18,22,25,34
PCLK_SIO12

RSTDRV17,19,20
IOCHRDY17,18,28
AEN17,28
TC17

IOR#17,18,28
IOW#17,18,28

DRQ017,18

3MODE#20

INDEX#

INDEX#20

MTR0#

MTR0#20

SA14
DRV0#

DRV0#19,20

SA13
FDDIR#

FDDIR#20

STEP#

STEP#20

WDATA#

WDATA#20

WGATE#

WGATE#20

TRACK0#20

DSKCHG#20

TRACK0#
WP#

WP#20

RDATA#

RDATA#20

HDSEL#

HDSEL#20

DSKCHG#
DRQ1

4

SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7

SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10

DRQ3
DRQ2

SA11
SA12

CLKRUN#
CLK

DRQ0

U24

46

D0

47

D1

48

D2

49

D3

51

D4

52

D5

53

D6

54

D7

26

A0

27

A1

28

A2

29

A3

30

A4

31

A5

32

A6

39

A7

40

A8

41

A9

95

A10

97

PDRQ(DRQ_C)

50

FDRQ(DRQ_B)

94

PDACK#(DACK_C#)

34

FDACK#(DACK_B#)

35

IRQ_C(A11)

36

IRQ_D(A12)

37

IRQ_E(SIRQ)

92

DRV2/ADX#/IRQ_B(ADRX/CLKRUN#)

38

IRQ_F(CLK33)

55

RESET

98

IOCHRDY

44

AEN

33

TC

42

IOR#

43

IOW#

18

CLK14

19

DRQ_A

99

DRVDEN0

10

INDEX#

100

MTR0#

3

MTR1#(A14)

2

DS0#

1

DS1#(A13)

5

DIR#

6

STEP#

7

WDATA#

8

WGATE#

11

TRK0#

12

WRTPRT#

14

RDATA#

9

HDSEL#

15

DSKCHG#

17

IRQ_A(DRQ_D)

16

DRVDEN1

FDC37N869

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

IRQIN/IRMOD/IR3

(DACK_D#)IDEEN#/IRQ_H

HDCS0#/IRRX2
HDCS1#/IRTX2

PWRGD/GAMECS#

5

STROBE#
AUTOFD#

ERROR#

INIT#

SLCTIN#

ACK#

BUSY

SLCT

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

IRQIN

VCC
VCC

VSS
VSS
VSS
VSS

DTR2#
CTS2#
RTS2#
DSR2#

TXD2/IRTX

RXD2/IRRX

DCD2#

RI2#

DTR1#
CTS1#
RTS1#
DSR1#

TXD1
RXD1

DCD1#

RI1#

(A15)CS#
DACK_A#

75
74
73
72
71
60
59
58

PE

57

LPD0

69

LPD1

68

LPD2

67

LPD3

66

LPD4

64

LPD5

63

LPD6

62

LPD7

61

96
13
70

4
45
65
93

91
90
89
88
87
86
85
84

81
80
79
78
77
76
83
82

21
22
23
24
25
20
56

+3VS

IRMODE
DACK#1
IRRX

SA15

+

CTS#2
DSR#2

DCD#2
RI#2

CTSA#
DSRA#
RXDA

DCDA#

6

R253 10K
1 2

C351

4.7UF_1206
10V

LPTSTB# 32
LPTAFD# 32
LPTERR# 32
LPTINIT# 32
LPTSLCTIN# 32
LPTACK# 32
LPTBUSY 32
LPTPE 32
LPTSLCT 32

12

R255

@10K

1 2
R254 10K

1 2

R256 10K

1 2

DTRA# 32
CTSA# 32
RTSA# 32
DSRA# 32
TXDA 32
RXDA 32
DCDA# 32

IRMODE 21
DACK#1 17
IRRX 21

DACK#0 17

12

LPD[0..7]

12

C350
.1UF

+3VS

+3VS

R251
10K

2 1

1 2

R272 56_0603

1 2

R271 1K

C353
.1UF

Title

Size Document Number Rev

Date: Sheet

LPD[0..7] 32

C345
.1UF

SELECT 3F0
HEX
SELECT 370
HEX

+3VS

1 8
2 7
3 6
4 5

D24

RB751V

RIA# 32

IRTX 21

+3VS

Compal Electronics, Inc.

SCHEMATICS, M/B LA-9 7 1

B

401166

7

RP58

8P4R-4.7K

CTSA#
DSRA#
DCDA#
RXDA

CTS#2
DSR#2
DCD#2
RI#2

RP75
1 8
2 7
3 6
4 5

8P4R-10K

+3VS

31 37Friday, December 01, 2000

1C

of

8

A

SERIAL/PARALLEL PORT

B

C

D

E

+3V

12

R3

D3

RB420D

33

PCM_RI#

+5VRUN_PRN

109876

12345

1
2

4 4

MINI_RI#34
PCM_RI#22 DCDA# 31

3 3

+5VS +5VRUN_PRN

2 1

2 2

D10

RB717F

LPT_D7
LPT_D6
LPT_D5
LPT_D4

RP15
10P8R-2.7K

+5VRUN_PRN

LPT_D3
LPT_D2
LPT_D1
LPT_D0

+5V

12

R127
100K

3

RING# 28

109876

12345

LPT_AFD#
LPT_ERR#
LPT_INIT#
LPT_SLCTIN#

LPT_ACK#
LPT_BUSY
LPT_PE
LPT_SLCT

RP11
10P8R-2.7K

+5VRUN_PRN

LPT_STB#

SUSP15,20,33

+5VRUN_PRN

R248

5.1K

LPT_D6

LPT_ACK#

LPT_BUSY
P/F#

U17

4

7

9

12

1

15

LPTSTB#_O
LPT_AFD#
LPT_D0
LPT_ERR#
LPT_D1
LPT_INIT#
LPT_D2
LPT_SLCTIN#
LPT_D3

LPT_D4
LPT_D5
FD6_O
LPT_D7
LPTACK#_O
LPTBUSY_O
LPT_PE
LPT_SLCT

+5V

C302

1 2

.1UF

16

VCC

2

IOA0

YA

YB

YC

YD
S

E#

8

GND

IOA1
IOB0

IOB1

IOC0
IOC1

IOD0
IOD1

QS3257

3
5

6
11

10
14

13

JP14

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

DZ1139-H7-LPTCON

C104
100PF

LPTSTB#_O

FD6_O

LPTACK#_O

LPTBUSY_O

EXTFDD

R274
100K

+5VRUN_PRN

C108
220PF

+5VS

R292
100K

R291
24K_0603

R243
10K

R77

0_1206

Q55 For BC027

+12VS

+5VS

U28A
LM358A

84

3

+

2

-

Q5
Si2304DS

1 3

D

G

2

R270
100K

EXTFDD_PON

1

DTRA#31
RTSA#31

TXDA31

CTSA#31

Q34

Si2304DS

13

S

S

D

G

2

13

D

Q36

2

G

FDV301N

S

P/F#

+5VS+5VEFDD

+

C352

4.7UF_1206
10V

P/F# 28

JP10

1

2

3

4

5

6

7

8

9

10

11

HRS DF9A-11P

LPT_AFD#
LPT_D0
LPT_ERR#
LPT_D1

LPT_INIT#
LPT_D2
LPT_SLCTIN#
LPT_D3

LPT_D4
LPT_D5
LPT_D6
LPT_D7

LPT_ACK#
LPT_BUSY
LPT_PE
LPT_SLCT

RIA# 31
RXDA 31

DSRA# 31

+5V

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

CP4

8P4C-220PF

CP3

8P4C-220PF

CP2

8P4C-220PF

CP1

8P4C-220PF

LPD0

JP11

1

TP_CLK28
TP_DATA28

+5VS

C103

.1UF

1 2

1 1

A

2
3
4
5
6

HEADER 6-T/P

LPTINIT#31

LPD1
LPD2
LPD3

LPD4
LPD5
LPD6
LPD7

LPTINIT#

LPD[0..7]31

RP14
1 8
2 7
3 6
4 5

8P4R-33

RP57
1 8
2 7
3 6
4 5

8P4R-33

R258
33

1 2

LPD[0..7]

LPT_D0
LPT_D1
LPT_D2
LPT_D3

LPT_D4
LPT_D5
LPT_D6
LPT_D7

LPT_INIT#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL
ELECTRONICS, INC.

B

LPTSLCTIN#31

LPTSLCT31

LPTBUSY31

LPTACK#31

LPTERR#31

LPTAFD#31

LPTSLCTIN#
LPTSLCT
LPTPE

LPTPE31

LPTBUSY

LPTACK#
LPTERR#
LPTSTB#

LPTSTB#31

LPTAFD#

C

RP51
1 8
2 7
3 6
4 5

8P4R-33

RP10
1 8
2 7
3 6
4 5

8P4R-33

LPT_SLCTIN#
LPT_SLCT
LPT_PE
LPT_BUSY

LPT_ACK#
LPT_ERR#
LPT_STB#
LPT_AFD#

ACT_LED31
HDD_LED31
ACIN_LED31

EMAIL_LED31
PAD_LED30
SCROLED30
CAPSLED30
NUMLED30

D

JP5

12
34
56
78
910

121411
13
15 16
171918

20

SUYIN 12778A-20

Compal Electronics, Inc .

Title

SCHEMATICS, M/B LA-971

Size Document Number Rev
Custom

401166

Date: Sheet of

EMAIL_BTN 30
INTERNET_BTN 30
USER1_BTN 30
USER2_BTN 30

32 37Friday, December 01, 2000

E

1C

5

4

3

2

1

+5VALW +5VALW

SUSP

2

+3VALW

12

C266

4.7UF_0805_10V

+12VALW

Q21

2N7002

12

C513

4.7UF_0805_10V

12

R389
10K

1

Q55

2N7002

3

R210

1 2

100K

2

12

4.7UF_0805_10V

C520

6
5
2
1

1
3

Q19
SI3456DV

3

12

C277

.01UF

12

R273
100K

D D

SYSON

SYSON28 SUSP#26,28,35

+5VALW

12

4.7UF_0805_10V

+12VALW

Q58

C C

+5VALW

B B

2N7002

SYSON# SYSON#

12

C487

4.7UF_0805_10V

+12V

SUSP SUSP

2

C486

1 2

2

U46

8

D

7

D

6

D

5

D

1 2

Q50

2N7002

2

R52

100K

SI4800

R107

6
5
2
1

1
3

100K

1
3

1
3

SYSON#

Q35
2N7002

Q53
SI3456DV

3

12

1

S

2

S

3

S

4

G

C522

.01UF

+5VS

12

4

C138

.01UF

SYSON# 28

+5V

12

C510

4.7UF_0805_10V

12

C499

4.7UF_0805_10V

12

R111
1M

12

12

C508
1UF_0805

C523
1UF_0805

12

C514

4.7UF_0805_10V

SUSP15,20,32

SUSP#

+12V +12VS +5VS +3VS

12

R233
1K

SYSON# SUSP SUSP SUSP

4

1

Q25

2

3

2N7002

+3V

C264

+

10UF_6.3V_P

+3VALW +3VS

U18

8

S

D

7

D

S

6

S

D

5

G

D

12

SI4800

C303

10UF_1206_10V

12

1
2
3
4

R238

12

1M

C263
1UF_0805

2

12

10UF_1206_10V

12

C301

.01UF

C320

Q29

2N7002

12

R235
1K

1

Q27

3

2N7002

R109
10K

1 2

VR_ON#

1

Q52

12

C319

1UF_0805

1 2

2

2

3

2N7002

12

C317

10UF_1206_10V

R237100K

MEASUREMENT VOLTAGE=3.64V

12

10UF_1206_10V

+12V

C305

12

C325

10UF_1206_10V

VR_ON6,29,36

1
3

12

R386
470

1

Q57

2

3

2N7002

+12VALW+5VALW

R218
100K

1 2

12

12

R221

C291

150K

.1UF

1

Q24

2

3

2N7002

SI2301DS: P CHANNEL
VGS: -4.5V, RDS: 130 mOHM
VGS: -2.5V, RDS: 190mOHM
Id(MAX): 2.3A
VGS(MAX): +-8V

12

C285
.1UF

1 3

+

C287

10UF_6.3V_P

SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
VGS: 2.5V, RDS: 115mOHM
Id(MAX): 2.8A
VGS(MAX): +-8V

+5VALW

R420
1K

Q23

2

SI2302DS

G

12

R385
470

1

Q56

2

3

2N7002

+2.5V_CLK+2.5V

SD

C289

+

10UF_6.3V_P

ACIN_LED# 31

1

Q64

2

RTC BATT

C295
.1UF_0805_25V

1 2

SUSP#

2

+12VALW

12

12

R226
100K

R230
47K

1
3

Q28

2N7002

2

+12VALW

12

3

Q26

1

NDS352P

+12VS

C298
1UF_0805_25V

12

C286
1UF_0805_25V

12

3

HSM126S

BATT1

1

CHG

2

D11

R137

1 2

270_0603

2

BATT1

-+

RTCBATT

+RTCVCC

12

JP9

JOPEN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

C209
.1UF

RTCVREF

ACIN28,35

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

+12VALW

C290
.1UF_0805_25V

1 2

A A

SYSON

12

1000PF

5

2

C281

+12VALW

12

R217
100K

3

2

Q20

2N7002

1

12

12

R211
47K

1
3

Q22

NDS352P

+12V

C284
1UF_0805_25V

12

C288
1UF_0805_25V

4

2N7002

3

+3VS

12

R104

4.7K

ACIN_SYS# 17

1

Q51

2

3

2N7002

1C

of

33 37Friday, December 01, 2000

1

A

SI2301DS: P CHANNEL
VGS: -4.5V, RDS: 130 mOHM
VGS: -2.5V, RDS: 190mOHM
Id(MAX): 2.3A
VGS(MAX): +-8V

SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
VGS: 2.5V, RDS: 115mOHM

4 4

Id(MAX): 2.8A
VGS(MAX): +-8V

EN_WOL#28

3 3

2 2

1 2

R95 @0

+12VALW

R50
@100K

1 2

12

13

22K

2

1 2

1 2

22K

PCLK_MINI

R165
33

C255

22PF

Q3

@DTC124EK

R51

@200K_0603

12

C76

@.1UF

+3VS

+3V

AD28

+5V
+5VS

+5VS_MINI_PCI

B

+3VALW

12

C262
@.1UF

10V

+3VS_MINIPCI

L21

1 2

@CHB1608B121

L37

1 2

CHB1608B121

PIRQB#17,18

PCLK_MINI12

REQ#18

R154 100

C/BE#38,17,22,25

C/BE#28,17,22,25

IRDY#8,17,18,22,25

CLKRUN#8,13,17,18,22,25,31

SERR#8,17,18,22
PERR#18,22,25

C/BE#18,17,22,25

MOD_AUDIO_MON

MD_MIC26

MINI_RI#32

L39

1 2

CHB1608B121

1 2

L19

@CHB1608B121

Q2

2

@SI2302DS

3.3VAUX

C260
@2.2U_0805

DS

1 3

G

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72
73 74
75 76
77 78
79 80
81 82
83 84
85 86
87 88
89 90
91 92
93 94
95 96
97 98
99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124

+5VS_MINI_PCI

JP6

PCLK_MINI
REQ#1
AD31

AD29
AD27

AD25

AD23
AD21

AD19
AD17

CLKRUN#

AD14
AD12 AD11

AD10
AD8

AD7
AD5
AD3
AD1

MINI_PCI CONN.

C

MODEM CONN.

+3VS_MINIPCI

L20

1 2

@CHB1608B121

L38

1 2

CHB1608B121

PIRQD# 17,18

GNT#0 8REQ#08

3.3VAUX

GNT#1

AD30
AD28

AD26
AD24

AD22
AD20

AD18
AD16

AD15
AD13

AD9

AD6
AD4
AD2
AD0

MD_SPK

1 2

R166 100

3.3VAUX

GNT#1 8
PME# 22,25,29

AD27

PAR 8,17,18,22,25

FRAME# 8,17,18,22,25
TRDY# 8,17,18,22,25
STOP# 8,17,18,22,25

DEVSEL# 8,17,18,22,25

C/BE#0 8,17,22,25

MD_SPK 26

+3VS

+3V

R406 @0
R407 0

PCIRST#

D

PCIRST# 8,17,22,23,25
CBRST# 13,22,23

3.3VAUX

12

12

C167
.1UF

12

C223
.1UF

12

C164
.1UF

+3VS_MINIPCI

C261
.1UF

E

+5VS+12VS

12

R247

3.5K_0603
Q30

C

2SC2411K

2

D23

1N4148

DVT2

2 1

B

D21

1N4148

E

21

3

EN_DFAN28

2

2SA1036K

Q31

1

1
3

D22
1SS355

2 1

JP12

1
2

53398-0290-FAN

FANVCC

FAN CONN.

12

C246
.1UF

12

C236
.1UF

12

C237

+

10UF_P_6.3V

1 1

R133 0

A

MD_SPKMOD_AUDIO_MON

12

B

AD[0..31]8,17,22,25

AD[0..31]

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

of

34 37Friday, December 01, 2000

E

1C

1

PCN1

1

3

A A

VMB

B B

C C

D D

3

2

SINGATRON 2DC-0026B200

+5VALW

BATT_TEMP<27>

+5VALW

SMDATA<3,27,28>

+5VALW

1

PD4
EP10QY03

1

2

3

2

BAS40-04

3

2

3

2

SMCLK<3,27,28>

+12VALW

+3VALW
+5VALW

51ON#<29>
SUSP#<25,27,32>
ACIN<27,32>

2

3

PC20

PR14

1K_0402

PR15
200_0402

PR16

200_0402

26
28
30
32
34
36
38
40

2

1

4

1P3S/2P3S#

VS
B+

1P3S/2P3S#

12

PC17

100PF_0402_50V

DC_GND

PC19

4.7UF_1210_25V

12

PF2

FUSE 5A

PR12 6.49K_1%

1

PR13

1000PF_0402_50V

1K_0402

PD5

1

PD6

BAS40-04

1

PD7

BAS40-04

PCN3

2

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25
27
29
31
33
35
37
39

20035A-40G2
E&T 50245-4001A

VMB

B+

VIN VIN

3

PT1
OC9080-D102

B/I
TS
SLD
SLC

25063A-07G1-C 7P P2.5 SUYIN

PD9_K

VMB

OCP

+3VALW
+5VALW

ACOFF <27>

RTCVREF

3

PCN2

1
2
3
4
5
6
7

FSTCHG <28>

PF1

FUSE 5A

PC18

100PF_0402_50V

Battery

0.1UF_0402_16V

VIN

PC24

4

0.1UF_0402_16V

RTCVREF

4

PC22

PTH1
10K_1%

PR35

3.65K_1%

PR27

19.1K_1%

5

RTCVREF

PC27

CPU

PTH2

10K_1%

PR36

3.65K_1%

PR22 1K_0402

PR21

18.2K_1%

PR30

100K_0402_1%

PR29
1K_0402

PR31

249K_0402_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

5

0.1UF_0402_16V

PR23

47K_0402

PR32

47K_0402

PC25

1000PF_0402_50V

6

VS

84

3

+

2

-

PU5A
LM393

470K_0402

VS

84

5

+

6

-

PU5B
LM393

470K_0402

6

1

7

PR25

PR34

PR24

25.5K_0402_1%

PZD1

RLZ5.1B

21

PR33

25.5K_0402_1%

PZD2

RLZ5.1B

21

7

1SS355

PD9

12

PC23

0.1UF_0402_16V

PD10

12

1SS355

PC26

0.1UF_0402_16V

Title

Size Document Number Rev

B

Date: Sheet

PC16
@1000PF_0402_50V

Compal Electronics, Inc.

SCHEMATICS, M/B LA-971
401166

7

PD9_K

13

100K

2

100K

MAX1711_2_SHDN#

PQ9
DTC115EK

35 37Friday, December 01, 2000

8

of

8

1C

1

2

3

4

5

6

7

8

+5VALW

PC1

1 1

0.1UF_0402
1 2

MAX1711_2_SHDN#

15

<5,28,32>

VR_ON

PR2

2.2K_0402
12

12

PR17

1K_0402

PR3 2.2K_0402

VID0<5>

VID1<5>

+5VALW

2 2

PC12

220PF_0402_50V

12

PC11

VID2<5>

VID3<5>

12

+5V

PR4 0_0402

12

0.22UF_0805_16V

12

PR6
47K_0402_1%

12

PR7

220K_0402_1%

3 3

VDD

2

SHDN#

21

SKIP#

20

D0

19

D1

PU1

18

D2

17

D3

5

CC

8

TON

6

ILIM

MAX1711

PGND

GNDS

PGOOD

GND

10

1 2

7

VCC

BST

FBSREF

PR1
20_0805

V+

DH

LX

DL

FB

D4

PD1
RB751V

2 1

1 2

1

22

24

23

13

14

3

16

49

11

12

PC2

0.22UF_0805_16V

0.1UF_0805_25V

VID4 <5>

PR5
10K_0402_1%

1 2

VR_POK <5,29>

PC6

1 2

PQ1
SI4800

876

134

DDD

SSG

S

2

5

D

+CPU_CORE

1 2

PC7

2200PF_0402_25V

PQ2

876

5

FDS6680S

DDD

D

SSG

S

134

2

PC10

1 2

2200PF_0402_25V

PQ5
SI4800

876

DDD

SSG

134

876

DDD

SSG

S

134

2

S

2

5

D

PQ3

5

FDS6680S

D

B+

PC3

4.7UF_1210_25V

PD8

@EC10QS04

2 1

JOPEN2

PC8

220UF_M_D_4V

+

SI3441DV

654

S

D

D

DDG

123

1 2

3MM
JOPEN3

1 2

3MM

JOPEN4

1 2

3MM

+

PC9
220UF_M_D_4V

CPU_COREP

PU2
AMS1085CD

3

IN

OUT

ADJUST

1

+CPU_IOP

2

CPU_COREP +CPU_CORE

12

PC5

4.7UF_1210_25V

12

PL1

12

+CPU_IOP +CPU_IO

PC4

4.7UF_1210_25V

12

HK-RM136-15A1R4

PD2

EP10QY03

2 1

PQ6

+3V

PR19

200K_0402

PC21

0.1UF_0402
PR9100_1%

PR20

20_1%

PR10

VR_ON

PR8

0_0402

10K_0402

100K

2

100K

13

PQ7
DTC115EK

PC13

4.7UF_1206_16V

PC15

100PF_0402_50V

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

1

2

3

4

INC.

5

6

Compal Electronics, Inc.

Title

SCHEMATICS, M/B LA-971

Size Document Number Rev

B

401166

Date: Sheet

7

36 37Friday, December 01, 2000

of

8

1C

5

4

3

2

1

888J2 PIR LIST

Reason for Change Rev. Page # Description BD. Ver. Phase Reason for Change Rev. Page # Description BD. Ver. Phase Reason for Change Rev. Page # Description BD. Ver. Phase

D D

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

5

4

THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

SCHEMATICS, M/B LA-971

Size Document Number Rev

B

401166

Date: Sheet

Compal Electronics, Inc.

of

37 37Friday, December 01, 2000

1

1C